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luyahanV8 LUCI CQ
luyahan
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V8 LUCI CQ
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[riscv64] Fix node.js build failed
Change-Id: I0a614fa6c381770f56037f0401db008a37c71dca Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2966209 Auto-Submit: Yahan Lu <[email protected]> Commit-Queue: Ji Qiu <[email protected]> Reviewed-by: Ji Qiu <[email protected]> Cr-Commit-Position: refs/heads/master@{#75199}
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‎src/codegen/riscv64/assembler-riscv64.cc‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -474,7 +474,7 @@ static inline Instr SetJalrOffset(int32_t offset, Instr instr) {
474474
instr &= ~kImm12Mask;
475475
int32_t imm12 = offset << kImm12Shift;
476476
DCHECK(Assembler::IsJalr(instr | (imm12 & kImm12Mask)));
477-
DCHECK(Assembler::JalrOffset(instr | (imm12 & kImm12Mask)) == offset);
477+
DCHECK_EQ(Assembler::JalrOffset(instr | (imm12 & kImm12Mask)), offset);
478478
return instr | (imm12 & kImm12Mask);
479479
}
480480

@@ -750,7 +750,7 @@ int Assembler::BrachlongOffset(Instr auipc, Instr instr_I) {
750750
DCHECK_EQ((auipc & kRdFieldMask) >> kRdShift,
751751
(instr_I & kRs1FieldMask) >> kRs1Shift);
752752
int32_t imm_auipc = AuipcOffset(auipc);
753-
int32_t imm12 = (instr_I & kImm12Mask) >> 20;
753+
int32_t imm12 = static_cast<int32_t>(instr_I & kImm12Mask) >> 20;
754754
int32_t offset = imm12 + imm_auipc;
755755
return offset;
756756
}
@@ -771,19 +771,19 @@ int Assembler::PatchBranchlongOffset(Address pc, Instr instr_auipc,
771771

772772
int Assembler::LdOffset(Instr instr) {
773773
DCHECK(IsLd(instr));
774-
int32_t imm12 = (instr & kImm12Mask) >> 20;
774+
int32_t imm12 = static_cast<int32_t>(instr & kImm12Mask) >> 20;
775775
return imm12;
776776
}
777777

778778
int Assembler::JalrOffset(Instr instr) {
779779
DCHECK(IsJalr(instr));
780-
int32_t imm12 = (instr & kImm12Mask) >> 20;
780+
int32_t imm12 = static_cast<int32_t>(instr & kImm12Mask) >> 20;
781781
return imm12;
782782
}
783783

784784
int Assembler::AuipcOffset(Instr instr) {
785785
DCHECK(IsAuipc(instr));
786-
int32_t imm20 = instr & kImm20Mask;
786+
int32_t imm20 = static_cast<int32_t>(instr & kImm20Mask);
787787
return imm20;
788788
}
789789
// We have to use a temporary register for things that can be relocated even
@@ -1343,7 +1343,7 @@ void Assembler::label_at_put(Label* L, int at_offset) {
13431343
DCHECK_EQ(imm18 & 3, 0);
13441344
int32_t imm16 = imm18 >> 2;
13451345
DCHECK(is_int16(imm16));
1346-
instr_at_put(at_offset, (imm16 & kImm16Mask));
1346+
instr_at_put(at_offset, (int32_t)(imm16 & kImm16Mask));
13471347
} else {
13481348
target_pos = kEndOfJumpChain;
13491349
instr_at_put(at_offset, target_pos);
@@ -2789,7 +2789,7 @@ void Assembler::GrowBuffer() {
27892789
reloc_info_writer.last_pc() + pc_delta);
27902790

27912791
// Relocate runtime entries.
2792-
Vector<byte> instructions{buffer_start_, pc_offset()};
2792+
Vector<byte> instructions{buffer_start_, static_cast<size_t>(pc_offset())};
27932793
Vector<const byte> reloc_info{reloc_info_writer.pos(), reloc_size};
27942794
for (RelocIterator it(instructions, reloc_info, 0); !it.done(); it.next()) {
27952795
RelocInfo::Mode rmode = it.rinfo()->rmode();

‎src/codegen/riscv64/constants-riscv64.h‎

Lines changed: 44 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -216,57 +216,63 @@ const int kRvcFunct6Shift = 10;
216216
const int kRvcFunct6Bits = 6;
217217

218218
// RISCV Instruction bit masks
219-
const int kBaseOpcodeMask = ((1 << kBaseOpcodeBits) - 1) << kBaseOpcodeShift;
220-
const int kFunct3Mask = ((1 << kFunct3Bits) - 1) << kFunct3Shift;
221-
const int kFunct5Mask = ((1 << kFunct5Bits) - 1) << kFunct5Shift;
222-
const int kFunct7Mask = ((1 << kFunct7Bits) - 1) << kFunct7Shift;
223-
const int kFunct2Mask = 0b11 << kFunct7Shift;
224-
const int kRTypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct7Mask;
225-
const int kRATypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct5Mask;
226-
const int kRFPTypeMask = kBaseOpcodeMask | kFunct7Mask;
227-
const int kR4TypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct2Mask;
228-
const int kITypeMask = kBaseOpcodeMask | kFunct3Mask;
229-
const int kSTypeMask = kBaseOpcodeMask | kFunct3Mask;
230-
const int kBTypeMask = kBaseOpcodeMask | kFunct3Mask;
231-
const int kUTypeMask = kBaseOpcodeMask;
232-
const int kJTypeMask = kBaseOpcodeMask;
233-
const int kRs1FieldMask = ((1 << kRs1Bits) - 1) << kRs1Shift;
234-
const int kRs2FieldMask = ((1 << kRs2Bits) - 1) << kRs2Shift;
235-
const int kRs3FieldMask = ((1 << kRs3Bits) - 1) << kRs3Shift;
236-
const int kRdFieldMask = ((1 << kRdBits) - 1) << kRdShift;
237-
const int kBImm12Mask = kFunct7Mask | kRdFieldMask;
238-
const int kImm20Mask = ((1 << kImm20Bits) - 1) << kImm20Shift;
239-
const int kImm12Mask = ((1 << kImm12Bits) - 1) << kImm12Shift;
240-
const int kImm11Mask = ((1 << kImm11Bits) - 1) << kImm11Shift;
241-
const int kImm31_12Mask = ((1 << 20) - 1) << 12;
242-
const int kImm19_0Mask = ((1 << 20) - 1);
243-
const int kRvcOpcodeMask =
219+
const uint32_t kBaseOpcodeMask = ((1 << kBaseOpcodeBits) - 1)
220+
<< kBaseOpcodeShift;
221+
const uint32_t kFunct3Mask = ((1 << kFunct3Bits) - 1) << kFunct3Shift;
222+
const uint32_t kFunct5Mask = ((1 << kFunct5Bits) - 1) << kFunct5Shift;
223+
const uint32_t kFunct7Mask = ((1 << kFunct7Bits) - 1) << kFunct7Shift;
224+
const uint32_t kFunct2Mask = 0b11 << kFunct7Shift;
225+
const uint32_t kRTypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct7Mask;
226+
const uint32_t kRATypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct5Mask;
227+
const uint32_t kRFPTypeMask = kBaseOpcodeMask | kFunct7Mask;
228+
const uint32_t kR4TypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct2Mask;
229+
const uint32_t kITypeMask = kBaseOpcodeMask | kFunct3Mask;
230+
const uint32_t kSTypeMask = kBaseOpcodeMask | kFunct3Mask;
231+
const uint32_t kBTypeMask = kBaseOpcodeMask | kFunct3Mask;
232+
const uint32_t kUTypeMask = kBaseOpcodeMask;
233+
const uint32_t kJTypeMask = kBaseOpcodeMask;
234+
const uint32_t kRs1FieldMask = ((1 << kRs1Bits) - 1) << kRs1Shift;
235+
const uint32_t kRs2FieldMask = ((1 << kRs2Bits) - 1) << kRs2Shift;
236+
const uint32_t kRs3FieldMask = ((1 << kRs3Bits) - 1) << kRs3Shift;
237+
const uint32_t kRdFieldMask = ((1 << kRdBits) - 1) << kRdShift;
238+
const uint32_t kBImm12Mask = kFunct7Mask | kRdFieldMask;
239+
const uint32_t kImm20Mask = ((1 << kImm20Bits) - 1) << kImm20Shift;
240+
const uint32_t kImm12Mask = ((1 << kImm12Bits) - 1) << kImm12Shift;
241+
const uint32_t kImm11Mask = ((1 << kImm11Bits) - 1) << kImm11Shift;
242+
const uint32_t kImm31_12Mask = ((1 << 20) - 1) << 12;
243+
const uint32_t kImm19_0Mask = ((1 << 20) - 1);
244+
const uint32_t kRvcOpcodeMask =
244245
0b11 | (((1 << kRvcFunct3Bits) - 1) << kRvcFunct3Shift);
245-
const int kRvcFunct3Mask = (((1 << kRvcFunct3Bits) - 1) << kRvcFunct3Shift);
246-
const int kRvcFunct4Mask = (((1 << kRvcFunct4Bits) - 1) << kRvcFunct4Shift);
247-
const int kRvcFunct6Mask = (((1 << kRvcFunct6Bits) - 1) << kRvcFunct6Shift);
248-
const int kRvcFunct2Mask = (((1 << kRvcFunct2Bits) - 1) << kRvcFunct2Shift);
249-
const int kRvcFunct2BMask = (((1 << kRvcFunct2Bits) - 1) << kRvcFunct2BShift);
250-
const int kCRTypeMask = kRvcOpcodeMask | kRvcFunct4Mask;
251-
const int kCSTypeMask = kRvcOpcodeMask | kRvcFunct6Mask;
252-
const int kCATypeMask = kRvcOpcodeMask | kRvcFunct6Mask | kRvcFunct2Mask;
253-
const int kRvcBImm8Mask = (((1 << 5) - 1) << 2) | (((1 << 3) - 1) << 10);
246+
const uint32_t kRvcFunct3Mask =
247+
(((1 << kRvcFunct3Bits) - 1) << kRvcFunct3Shift);
248+
const uint32_t kRvcFunct4Mask =
249+
(((1 << kRvcFunct4Bits) - 1) << kRvcFunct4Shift);
250+
const uint32_t kRvcFunct6Mask =
251+
(((1 << kRvcFunct6Bits) - 1) << kRvcFunct6Shift);
252+
const uint32_t kRvcFunct2Mask =
253+
(((1 << kRvcFunct2Bits) - 1) << kRvcFunct2Shift);
254+
const uint32_t kRvcFunct2BMask =
255+
(((1 << kRvcFunct2Bits) - 1) << kRvcFunct2BShift);
256+
const uint32_t kCRTypeMask = kRvcOpcodeMask | kRvcFunct4Mask;
257+
const uint32_t kCSTypeMask = kRvcOpcodeMask | kRvcFunct6Mask;
258+
const uint32_t kCATypeMask = kRvcOpcodeMask | kRvcFunct6Mask | kRvcFunct2Mask;
259+
const uint32_t kRvcBImm8Mask = (((1 << 5) - 1) << 2) | (((1 << 3) - 1) << 10);
254260

255261
// RISCV CSR related bit mask and shift
256262
const int kFcsrFlagsBits = 5;
257-
const int kFcsrFlagsMask = (1 << kFcsrFlagsBits) - 1;
263+
const uint32_t kFcsrFlagsMask = (1 << kFcsrFlagsBits) - 1;
258264
const int kFcsrFrmBits = 3;
259265
const int kFcsrFrmShift = kFcsrFlagsBits;
260-
const int kFcsrFrmMask = ((1 << kFcsrFrmBits) - 1) << kFcsrFrmShift;
266+
const uint32_t kFcsrFrmMask = ((1 << kFcsrFrmBits) - 1) << kFcsrFrmShift;
261267
const int kFcsrBits = kFcsrFlagsBits + kFcsrFrmBits;
262-
const int kFcsrMask = kFcsrFlagsMask | kFcsrFrmMask;
268+
const uint32_t kFcsrMask = kFcsrFlagsMask | kFcsrFrmMask;
263269

264270
const int kNopByte = 0x00000013;
265271
// Original MIPS constants
266272
// TODO(RISCV): to be cleaned up
267273
const int kImm16Shift = 0;
268274
const int kImm16Bits = 16;
269-
const int kImm16Mask = ((1 << kImm16Bits) - 1) << kImm16Shift;
275+
const uint32_t kImm16Mask = ((1 << kImm16Bits) - 1) << kImm16Shift;
270276
// end of TODO(RISCV): to be cleaned up
271277

272278
// ----- RISCV Base Opcodes

‎src/execution/riscv64/simulator-riscv64.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1842,7 +1842,7 @@ float Simulator::RoundF2FHelper(float input_val, int rmode) {
18421842
float rounded = 0;
18431843
switch (rmode) {
18441844
case RNE: { // Round to Nearest, tiest to Even
1845-
rounded = std::floorf(input_val);
1845+
rounded = floorf(input_val);
18461846
float error = input_val - rounded;
18471847

18481848
// Take care of correctly handling the range [-0.5, -0.0], which must

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