diff --git a/orchagent/copporch.cpp b/orchagent/copporch.cpp
index 2467d575744..f49a07fd5cd 100644
--- a/orchagent/copporch.cpp
+++ b/orchagent/copporch.cpp
@@ -42,7 +42,6 @@ map<string, sai_hostif_trap_type_t> trap_id_map = {
     {"igmp_v2_report", SAI_HOSTIF_TRAP_TYPE_IGMP_TYPE_V2_REPORT},
     {"igmp_v3_report", SAI_HOSTIF_TRAP_TYPE_IGMP_TYPE_V3_REPORT},
     {"sample_packet", SAI_HOSTIF_TRAP_TYPE_SAMPLEPACKET},
-    {"udld", SAI_HOSTIF_TRAP_TYPE_UDLD},
     {"switch_cust_range", SAI_HOSTIF_TRAP_TYPE_SWITCH_CUSTOM_RANGE_BASE},
     {"arp_req", SAI_HOSTIF_TRAP_TYPE_ARP_REQUEST},
     {"arp_resp", SAI_HOSTIF_TRAP_TYPE_ARP_RESPONSE},
diff --git a/orchagent/portsorch.cpp b/orchagent/portsorch.cpp
index c08c0b31522..0a0505fc57f 100644
--- a/orchagent/portsorch.cpp
+++ b/orchagent/portsorch.cpp
@@ -177,7 +177,9 @@ void PortsOrch::removeDefaultVlanMembers()
 void PortsOrch::removeDefaultBridgePorts()
 {
     /* Get bridge ports in default 1Q bridge */
-    vector<sai_object_id_t> bridge_port_list(m_portCount);
+    // FIXME: Mellanox SAI implementation will response SAI_BRIDGE_ATTR_PORT_LIST
+    // all the front panel ports and CPU port. The CPU bug should be there by SAI spec.
+    vector<sai_object_id_t> bridge_port_list(m_portCount + 1);
 
     sai_attribute_t attr;
     attr.id = SAI_BRIDGE_ATTR_PORT_LIST;