Skip to content

Commit 6b04c32

Browse files
committed
Add xfail for generic hash case test_lag_hash due to github issue 22586
Change-Id: Id8c6f67ca40010105ff3c500b2912217879cdfbe
1 parent acb5c0a commit 6b04c32

File tree

1 file changed

+36
-0
lines changed

1 file changed

+36
-0
lines changed

tests/common/plugins/conditional_mark/tests_mark_conditions.yaml

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1693,12 +1693,48 @@ hash/test_generic_hash.py::test_lag_hash:
16931693
conditions:
16941694
- "asic_type in ['broadcom', 'cisco-8000']"
16951695

1696+
hash/test_generic_hash.py::test_lag_hash[CRC-DST_MAC:
1697+
xfail:
1698+
reason: "Testcase ignored due to RM issue: https://github.com/sonic-net/sonic-buildimage/issues/22586"
1699+
conditions:
1700+
- "https://github.com/sonic-net/sonic-buildimage/issues/22586 and asic_type in ['mellanox', 'nvidia']"
1701+
1702+
hash/test_generic_hash.py::test_lag_hash[CRC-ETHERTYPE:
1703+
xfail:
1704+
reason: "Testcase ignored due to RM issue: https://github.com/sonic-net/sonic-buildimage/issues/22586"
1705+
conditions:
1706+
- "https://github.com/sonic-net/sonic-buildimage/issues/22586 and asic_type in ['mellanox', 'nvidia']"
1707+
16961708
hash/test_generic_hash.py::test_lag_hash[CRC-INNER_IP_PROTOCOL:
16971709
skip:
16981710
reason: "On Mellanox platforms, due to HW limitation, it would not support CRC algorithm on INNER_IP_PROTOCOL field. For broadcom, LAG hash is not supported in broadcom SAI."
16991711
conditions:
17001712
- "asic_type in ['broadcom', 'mellanox']"
17011713

1714+
hash/test_generic_hash.py::test_lag_hash[CRC-VLAN_ID:
1715+
xfail:
1716+
reason: "Testcase ignored due to RM issue: https://github.com/sonic-net/sonic-buildimage/issues/22586"
1717+
conditions:
1718+
- "https://github.com/sonic-net/sonic-buildimage/issues/22586 and asic_type in ['mellanox', 'nvidia']"
1719+
1720+
hash/test_generic_hash.py::test_lag_hash[CRC_CCITT-DST_MAC:
1721+
xfail:
1722+
reason: "Testcase ignored due to RM issue: https://github.com/sonic-net/sonic-buildimage/issues/22586"
1723+
conditions:
1724+
- "https://github.com/sonic-net/sonic-buildimage/issues/22586 and asic_type in ['mellanox', 'nvidia']"
1725+
1726+
hash/test_generic_hash.py::test_lag_hash[CRC_CCITT-ETHERTYPE:
1727+
xfail:
1728+
reason: "Testcase ignored due to RM issue: https://github.com/sonic-net/sonic-buildimage/issues/22586"
1729+
conditions:
1730+
- "https://github.com/sonic-net/sonic-buildimage/issues/22586 and asic_type in ['mellanox', 'nvidia']"
1731+
1732+
hash/test_generic_hash.py::test_lag_hash[CRC_CCITT-VLAN_ID:
1733+
xfail:
1734+
reason: "Testcase ignored due to RM issue: https://github.com/sonic-net/sonic-buildimage/issues/22586"
1735+
conditions:
1736+
- "https://github.com/sonic-net/sonic-buildimage/issues/22586 and asic_type in ['mellanox', 'nvidia']"
1737+
17021738
hash/test_generic_hash.py::test_lag_member_flap:
17031739
skip:
17041740
reason: 'On Mellanox SPC1 platforms, due to HW limitation, it would not support CRC_CCITT algorithm. For broadcom, LAG hash not supported in broadcom SAI. For other platforms, skipping due to missing object in SonicHost'

0 commit comments

Comments
 (0)