diff --git a/.gitignore b/.gitignore index 06b10caa315..73945416879 100644 --- a/.gitignore +++ b/.gitignore @@ -2,6 +2,7 @@ .DS_Store # Build system related +.arch .platform .screen diff --git a/Makefile.work b/Makefile.work index 389f3f7c831..7a3524a520b 100644 --- a/Makefile.work +++ b/Makefile.work @@ -141,6 +141,7 @@ DOCKER_BASE_BUILD = docker build --no-cache \ -t $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) \ --build-arg http_proxy=$(http_proxy) \ --build-arg https_proxy=$(https_proxy) \ + --build-arg apt_cacher_ng_proxy=$(apt_cacher_ng_proxy) \ $(SLAVE_DIR) DOCKER_BUILD = docker build --no-cache \ @@ -149,6 +150,7 @@ DOCKER_BUILD = docker build --no-cache \ --build-arg guid=$(shell id -g) \ --build-arg hostname=$(shell echo $$HOSTNAME) \ --build-arg slave_base_tag_ref=$(SLAVE_BASE_TAG) \ + --build-arg apt_cacher_ng_proxy=$(apt_cacher_ng_proxy) \ -t $(SLAVE_IMAGE):$(SLAVE_TAG) \ -f $(SLAVE_DIR)/Dockerfile.user \ $(SLAVE_DIR) @@ -173,6 +175,7 @@ SONIC_BUILD_INSTRUCTION := make \ KERNEL_PROCURE_METHOD=$(KERNEL_PROCURE_METHOD) \ HTTP_PROXY=$(http_proxy) \ HTTPS_PROXY=$(https_proxy) \ + APT_CACHER_NG_PROXY=$(apt_cacher_ng_proxy) \ SONIC_ENABLE_SYSTEM_TELEMETRY=$(ENABLE_SYSTEM_TELEMETRY) \ EXTRA_JESSIE_TARGETS=$(EXTRA_JESSIE_TARGETS) \ $(SONIC_OVERRIDE_BUILD_VARS) @@ -227,18 +230,24 @@ init : @git submodule update --init --recursive @git submodule foreach --recursive '[ -f .git ] && echo "gitdir: $$(realpath --relative-to=. $$(cut -d" " -f2 .git))" > .git' +.ONESHELL : reset reset : @echo && echo -n "Warning! All local changes will be lost. Proceed? [y/N]: " - @read ans && \ - if [ $$ans == y ]; then \ - echo "Resetting local repository. Please wait..."; \ - $(DOCKER_RUN) $(SLAVE_IMAGE):$(SLAVE_TAG) sudo rm -rf fsroot; \ - git clean -xfdf; \ - git reset --hard; \ - git submodule foreach --recursive git clean -xfdf; \ - git submodule foreach --recursive git reset --hard; \ - git submodule update --init --recursive; \ - echo "Reset complete!"; \ - else \ - echo "Reset aborted"; \ - fi + @read ans && ( + if [ $$ans == y ]; then + echo "Resetting local repository. Please wait..."; + $(DOCKER_RUN) $(SLAVE_IMAGE):$(SLAVE_TAG) sudo rm -rf fsroot; + if [[ "$(CONFIGURED_ARCH)" == "armhf" || "$(CONFIGURED_ARCH)" == "arm64" ]]; then + echo "Stopping march $(CONFIGURED_ARCH) docker" + sudo kill -9 `sudo cat /var/run/march/docker.pid` || true + sudo rm -f /var/run/march/docker.pid || true + fi + git clean -xfdf; + git reset --hard; + git submodule foreach --recursive git clean -xfdf; + git submodule foreach --recursive git reset --hard; + git submodule update --init --recursive; + echo "Reset complete!"; + else + echo "Reset aborted"; + fi ) diff --git a/README.md b/README.md index 9c486e41206..afa26457fe4 100644 --- a/README.md +++ b/README.md @@ -51,6 +51,11 @@ Install pip and jinja in host build machine, execute below commands if j2/j2cli sudo pip install --force-reinstall --upgrade jinja2>=2.10 sudo pip install j2cli +Configure your system to allow running the 'docker' command without 'sudo': + Add current user to the docker group + `sudo gpasswd -a ${USER} docker` + Log out and log back in so that your group membership is re-evaluated + ## SAI Version Please refer to [SONiC roadmap](https://github.com/Azure/SONiC/wiki/Sonic-Roadmap-Planning) on the SAI version for each SONiC release. diff --git a/build_debian.sh b/build_debian.sh index 9ff6fa019df..3cb6beda30e 100755 --- a/build_debian.sh +++ b/build_debian.sh @@ -31,7 +31,12 @@ set -x -e CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64) ## docker engine version (with platform) -DOCKER_VERSION=5:18.09.8~3-0~debian-stretch +if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then + # Version name differs between ARCH, copying same version as in sonic-slave docker + DOCKER_VERSION=18.06.3~ce~3-0~debian +else + DOCKER_VERSION=5:18.09.8~3-0~debian-stretch +fi LINUX_KERNEL_VERSION=4.9.0-9-2 ## Working directory to prepare the file system @@ -270,7 +275,10 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in tcptraceroute \ mtr-tiny \ locales \ - cgroup-tools + cgroup-tools \ + ipmitool \ + ndisc6 + if [[ $CONFIGURED_ARCH == amd64 ]]; then ## Pre-install the fundamental packages for amd64 (x86) @@ -485,10 +493,7 @@ then sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '/debug is mounted in each docker' >> /etc/motd" sudo mkdir -p $FILESYSTEM_ROOT/src - pushd src - ../scripts/dbg_files.sh | sudo tar -cvzf ../$FILESYSTEM_ROOT/src/sonic_src.tar.gz -T - - popd - + sudo cp $DEBUG_SRC_ARCHIVE_FILE $FILESYSTEM_ROOT/src/ sudo mkdir -p $FILESYSTEM_ROOT/debug fi diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as4630_54pe-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5712_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5712_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5812_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5812_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5835_54t-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5835_54t-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py index 9a9db688e7d..ba8e6181ebe 100644 --- a/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py @@ -11,6 +11,8 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" @@ -216,7 +218,7 @@ def get_low_power_mode(self, port_num): try: eeprom = None - eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="rb", buffering=0) eeprom.seek(93) lpmode = ord(eeprom.read(1)) @@ -251,7 +253,7 @@ def set_low_power_mode(self, port_num, lpmode): buffer[0] = chr(regval) # Write to eeprom - eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="r+b", buffering=0) eeprom.seek(93) eeprom.write(buffer[0]) return True @@ -273,7 +275,7 @@ def reset(self, port_num): path = "/sys/bus/i2c/devices/{0}/module_reset_{1}" port_ps = path.format(cpld_ps, cage_num) try: - reg_file = open(port_ps, 'w') + reg_file = open(port_ps, mode='w', buffering=0) except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -288,10 +290,97 @@ def reset(self, port_num): return True - def get_transceiver_change_event(self): - """ - TODO: This function need to be implemented - when decide to support monitoring SFP(Xcvrd) - on this platform. - """ - raise NotImplementedError + @property + def _get_presence_bitmap(self): + nodes = [] + nodes.append("/sys/bus/i2c/devices/3-0061/module_present_all") + nodes.append("/sys/bus/i2c/devices/3-0062/module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev.pop() # Remove the last useless character + + # Convert bitmap into continuously port order + rev[4] = hex((int(rev[4],16) | ((int(rev[5],16) & 0x3) << 6)))[2:] # Port 33-40 + rev[5] = hex((int(rev[5],16) >> 2) | ((int(rev[6],16) & 0x3) << 6))[2:] # Port 41-48 + + # Expand port 49-54 + tmp = rev.pop() + for i in range (2, 8): + val = (int(tmp,16) >> i) & 0x1 + rev.append(hex(val)[2:]) + + for i in range (0,6): + rev[i] = rev[i].zfill(2) + + rev = "".join(rev[::-1]) + return int(rev,16) + + data = {'valid':0, 'present':0} + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + port_dict = {} + port = 0 + blocking = False + + if timeout == 0: + blocking = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['valid'] = 1 + return True, port_dict + + if blocking: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} + + diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as6712_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as6712_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7116_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7212_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7212_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7312_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7312_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7312_54xs-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7315_27xb-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7512_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7512_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7712_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7712_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7716_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7716_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7716_32xb-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7816_64x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7816_64x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/port_config.ini b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/port_config.ini new file mode 100644 index 00000000000..a13514fcd90 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 73,74,75,76,77,78,79,80 fourHundredGigE1 0 400000 +Ethernet4 65,66,67,68,69,70,71,72 fourHundredGigE2 1 400000 +Ethernet8 81,82,83,84,85,86,87,88 fourHundredGigE3 2 400000 +Ethernet12 89,90,91,92,93,94,95,96 fourHundredGigE4 3 400000 +Ethernet16 97,98,99,100,101,102,103,104 fourHundredGigE5 4 400000 +Ethernet20 105,106,107,108,109,110,111,112 fourHundredGigE6 5 400000 +Ethernet24 113,114,115,116,117,118,119,120 fourHundredGigE7 6 400000 +Ethernet28 121,122,123,124,125,126,127,128 fourHundredGigE8 7 400000 +Ethernet32 41,42,43,44,45,46,47,48 fourHundredGigE9 8 400000 +Ethernet36 33,34,35,36,37,38,39,40 fourHundredGigE10 9 400000 +Ethernet40 49,50,51,52,53,54,55,56 fourHundredGigE11 10 400000 +Ethernet44 57,58,59,60,61,62,63,64 fourHundredGigE12 11 400000 +Ethernet48 129,130,131,132,133,134,135,136 fourHundredGigE13 12 400000 +Ethernet52 137,138,139,140,141,142,143,144 fourHundredGigE14 13 400000 +Ethernet56 145,146,147,148,149,150,151,152 fourHundredGigE15 14 400000 +Ethernet60 153,154,155,156,157,158,159,160 fourHundredGigE16 15 400000 +Ethernet64 169,170,171,172,173,174,175,176 fourHundredGigE17 16 400000 +Ethernet68 161,162,163,164,165,166,167,168 fourHundredGigE18 17 400000 +Ethernet72 177,178,179,180,181,182,183,184 fourHundredGigE19 18 400000 +Ethernet76 185,186,187,188,189,190,191,192 fourHundredGigE20 19 400000 +Ethernet80 1,2,3,4,5,6,7,8 fourHundredGigE21 20 400000 +Ethernet84 9,10,11,12,13,14,15,16 fourHundredGigE22 21 400000 +Ethernet88 17,18,19,20,21,22,23,24 fourHundredGigE23 22 400000 +Ethernet92 25,26,27,28,29,30,31,32 fourHundredGigE24 23 400000 +Ethernet96 201,202,203,204,205,206,207,208 fourHundredGigE25 24 400000 +Ethernet100 193,194,195,196,197,198,199,200 fourHundredGigE26 25 400000 +Ethernet104 217,218,219,220,221,222,223,224 fourHundredGigE27 26 400000 +Ethernet108 209,210,211,212,213,214,215,216 fourHundredGigE28 27 400000 +Ethernet112 233,234,235,236,237,238,239,240 fourHundredGigE29 28 400000 +Ethernet116 225,226,227,228,229,230,231,232 fourHundredGigE30 29 400000 +Ethernet120 249,250,251,252,253,254,255,256 fourHundredGigE31 30 400000 +Ethernet124 241,242,243,244,245,246,247,248 fourHundredGigE32 31 400000 diff --git a/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/sai.profile b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/sai.profile new file mode 100644 index 00000000000..be39b1f961f --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/th3-as9716-32x400G.config.bcm diff --git a/device/accton/x86_64-accton_as9716_32d-r0/default_sku b/device/accton/x86_64-accton_as9716_32d-r0/default_sku new file mode 100644 index 00000000000..ccebae89a34 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/default_sku @@ -0,0 +1 @@ +Accton-AS9716-32D t1 diff --git a/device/accton/x86_64-accton_as9716_32d-r0/installer.conf b/device/accton/x86_64-accton_as9716_32d-r0/installer.conf new file mode 100644 index 00000000000..d5f9419d77f --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off" diff --git a/device/accton/x86_64-accton_as9716_32d-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as9716_32d-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1e7d1046d93 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as9716_32d-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as9716_32d-r0/plugins/psuutil.py new file mode 100644 index 00000000000..25eceb7428c --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 2: "10-0051", + 1: "9-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py new file mode 100644 index 00000000000..17799035963 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py @@ -0,0 +1,150 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 33 + PORTS_IN_BLOCK = 34 + + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD1_PATH = "/sys/bus/i2c/devices/20-0061/" + BASE_CPLD2_PATH = "/sys/bus/i2c/devices/21-0062/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0: [1, 25], + 1: [2, 26], + 2: [3, 27], + 3: [4, 28], + 4: [5, 29], + 5: [6, 30], + 6: [7, 31], + 7: [8, 32], + 8: [9, 33], + 9: [10, 34], + 10: [11, 35], + 11: [12, 36], + 12: [13, 37], + 13: [14, 38], + 14: [15, 39], + 15: [16, 40], + 16: [17, 41], + 17: [18, 42], + 18: [19, 43], + 19: [20, 44], + 20: [21, 45], + 21: [22, 46], + 22: [23, 47], + 23: [24, 48], + 24: [25, 49], + 25: [26, 50], + 26: [27, 51], + 27: [28, 52], + 28: [29, 53], + 29: [30, 54], + 30: [31, 55], + 31: [32, 56], + 32: [33, 57], + 33: [34, 58], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(0, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < 16 : + present_path = self.BASE_CPLD1_PATH + "module_present_" + str(port_num+1) + else: + present_path = self.BASE_CPLD2_PATH + "module_present_" + str(port_num+1) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def set_low_power_mode(self, port_num, lpmode): + raise NotImplementedError + + def reset(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num < 16 : + mod_rst_path = self.BASE_CPLD1_PATH + "module_reset_" + str(port_num+1) + else: + mod_rst_path = self.BASE_CPLD2_PATH + "module_reset_" + str(port_num+1) + + self.__port_to_mod_rst = mod_rst_path + try: + reg_file = open(self.__port_to_mod_rst, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = '1' + + reg_file.write(reg_value) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError \ No newline at end of file diff --git a/device/accton/x86_64-accton_as9716_32d-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as9716_32d-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_minipack-r0/plugins/led_control.py b/device/accton/x86_64-accton_minipack-r0/plugins/led_control.py new file mode 100755 index 00000000000..26e2a7f7c8a --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/plugins/led_control.py @@ -0,0 +1,59 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import swsssdk + import threading + import os + import logging + import struct + import time + import syslog + from socket import * + from select import * + from minipack.pimutil import PimUtil +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +class LedControl(LedControlBase): + """Platform specific LED control class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + + + def __init__(self): + pim=PimUtil() + pim.init_pim_fpga() + + def _port_name_to_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + return port_idx + + def _port_state_to_mode(self, port_idx, state): + if state == "up": + return 1, 4 #port linkup, led is green + else: + return 0, 0 #port linkdown, led is off + + def port_link_state_change(self, portname, state): + pim=PimUtil() + port_idx = self._port_name_to_index(portname) + new_control, led_mode = self._port_state_to_mode(port_idx, state) + color, control=pim.get_port_led(port_idx) + + if color==led_mode: + if control==new_control: + return + + pim.set_port_led(port_idx, led_mode, new_control)#port linkup, led is green + #port linkdown, led is off + diff --git a/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py b/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py old mode 100644 new mode 100755 index 16105acbf78..6f62d8ed4c0 --- a/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py @@ -6,6 +6,9 @@ try: import time from sonic_sfp.sfputilbase import SfpUtilBase + import os + import sys, getopt + from minipack.pimutil import PimUtil except ImportError as e: raise ImportError("%s - required module not found" % str(e)) @@ -16,7 +19,7 @@ class SfpUtil(SfpUtilBase): PORT_START = 0 PORT_END = 128 - BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + LOCAL_OOM_PATH = "/usr/local/bin/minipack_qsfp/port%d_eeprom" _port_to_is_present = {} _port_to_lp_mode = {} @@ -53,42 +56,91 @@ def sfp_map(self, index): def __init__(self): - eeprom_path = self.BASE_OOM_PATH + "eeprom" - - for x in range(0, self.port_end+1): - bus = self.sfp_map(x) - self.port_to_eeprom_mapping[x] = eeprom_path.format( - bus) + for x in range(0, self.port_end): + self.port_to_eeprom_mapping[x] = self.LOCAL_OOM_PATH %x SfpUtilBase.__init__(self) + pim=PimUtil() + pim.init_pim_fpga() + + def __del__(self): + self.value=0 def get_presence(self, port_num): # Check for invalid port_num if port_num < self.port_start or port_num > self.port_end: return False - eeprom_path = self.port_to_eeprom_mapping[port_num] - with open(eeprom_path) as f: - try: - content = f.read(1) - except IOError as e: - #Not print any error, for if any, treat as Not present. - return False - return True - + pim=PimUtil() + status=pim.get_qsfp_presence(port_num) + return status + def get_low_power_mode(self, port_num): - raise NotImplementedError + if port_num < self.port_start or port_num > self.port_end: + return False + + pim=PimUtil() + return pim.get_low_power_mode(port_num) def set_low_power_mode(self, port_num, lpmode): - raise NotImplementedError + if port_num < self.port_start or port_num > self.port_end: + return False + pim=PimUtil() + pim.set_low_power_mode(port_num, lpmode) + return True def reset(self, port_num): - raise NotImplementedError + if port_num < self.port_start or port_num > self.port_end: + return False + pim=PimUtil() + pim.reset(port_num) + return True + + def get_transceiver_change_event(self, timeout=0): + pim=PimUtil() + start_time = time.time() + port_dict = {} + forever = False - def get_transceiver_change_event(self): - """ - TODO: This function need to be implemented - when decide to support monitoring SFP(Xcvrd) - on this platform. - """ - raise NotImplementedError + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + change_status=0 + port_dict = pim.get_qsfp_interrupt() + present=0 + for key, value in port_dict.iteritems(): + if value==1: + present=self.get_presence(key) + change_status=1 + if present: + port_dict[key]='1' + else: + port_dict[key]='0' + + if change_status: + return True, port_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_evt_change_event: Should not reach here." + return False, {} diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm index 5cb507321b0..d3a66dee635 100644 --- a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm @@ -815,3 +815,37 @@ serdes_core_tx_polarity_flip_physical{233}=0x36 serdes_core_tx_polarity_flip_physical{241}=0xc6 serdes_core_tx_polarity_flip_physical{249}=0xc3 serdes_core_tx_polarity_flip_physical{257}=0x0 +serdes_tx_taps_cd0=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd1=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd2=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd3=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd4=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd5=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd6=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd7=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd8=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd9=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd10=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd11=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd12=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd13=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd14=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd15=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd16=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd17=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd18=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd19=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd20=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd21=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd22=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd23=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd24=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd25=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd26=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd27=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd28=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd29=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd30=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd31=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd32=pam4:1:34:9:0:0:0 +serdes_tx_taps_cd33=pam4:1:34:9:0:0:0 diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf index 2a2270767d8..403b08d6bb5 100644 --- a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf @@ -22,13 +22,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf index 2a2270767d8..403b08d6bb5 100644 --- a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf @@ -22,13 +22,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm index f1a0e0d0897..0af841fe64f 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm @@ -1012,3 +1012,5 @@ serdes_preemphasis_114=0x61c01 serdes_preemphasis_115=0x61c01 serdes_preemphasis_116=0x105004 serdes_preemphasis_117=0x105004 + +mmu_init_config="MSFT-TH2-Tier0" diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini index 37ed4b68986..d98c55a4e88 100644 --- a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini @@ -1,33 +1,33 @@ -# name lanes alias speed autoneg fec -Ethernet0 0,1,2,3 Ethernet0 100000 0 rs -Ethernet4 4,5,6,7 Ethernet4 100000 0 rs -Ethernet8 8,9,10,11 Ethernet8 100000 0 rs -Ethernet12 12,13,14,15 Ethernet12 100000 0 rs -Ethernet16 16,17,18,19 Ethernet16 100000 0 rs -Ethernet20 20,21,22,23 Ethernet20 100000 0 rs -Ethernet24 24,25,26,27 Ethernet24 100000 0 rs -Ethernet28 28,29,30,31 Ethernet28 100000 0 rs -Ethernet32 32,33,34,35 Ethernet32 100000 0 rs -Ethernet36 36,37,38,39 Ethernet36 100000 0 rs -Ethernet40 40,41,42,43 Ethernet40 100000 0 rs -Ethernet44 44,45,46,47 Ethernet44 100000 0 rs -Ethernet48 48,49,50,51 Ethernet48 100000 0 rs -Ethernet52 52,53,54,55 Ethernet52 100000 0 rs -Ethernet56 56,57,58,59 Ethernet56 100000 0 rs -Ethernet60 60,61,62,63 Ethernet60 100000 0 rs -Ethernet64 64,65,66,67 Ethernet64 100000 0 rs -Ethernet68 68,69,70,71 Ethernet68 100000 0 rs -Ethernet72 72,73,74,75 Ethernet72 100000 0 rs -Ethernet76 76,77,78,79 Ethernet76 100000 0 rs -Ethernet80 80,81,82,83 Ethernet80 100000 0 rs -Ethernet84 84,85,86,87 Ethernet84 100000 0 rs -Ethernet88 88,89,90,91 Ethernet88 100000 0 rs -Ethernet92 92,93,94,95 Ethernet92 100000 0 rs -Ethernet96 96,97,98,99 Ethernet96 100000 0 rs -Ethernet100 100,101,102,103 Ethernet100 100000 0 rs -Ethernet104 104,105,106,107 Ethernet104 100000 0 rs -Ethernet108 108,109,110,111 Ethernet108 100000 0 rs -Ethernet112 112,113,114,115 Ethernet112 100000 0 rs -Ethernet116 116,117,118,119 Ethernet116 100000 0 rs -Ethernet120 120,121,122,123 Ethernet120 100000 0 rs -Ethernet124 124,125,126,127 Ethernet124 100000 0 rs +# name lanes alias index speed autoneg fec +Ethernet0 0,1,2,3 Ethernet0 1 100000 0 rs +Ethernet4 4,5,6,7 Ethernet4 2 100000 0 rs +Ethernet8 8,9,10,11 Ethernet8 3 100000 0 rs +Ethernet12 12,13,14,15 Ethernet12 4 100000 0 rs +Ethernet16 16,17,18,19 Ethernet16 5 100000 0 rs +Ethernet20 20,21,22,23 Ethernet20 6 100000 0 rs +Ethernet24 24,25,26,27 Ethernet24 7 100000 0 rs +Ethernet28 28,29,30,31 Ethernet28 8 100000 0 rs +Ethernet32 32,33,34,35 Ethernet32 9 100000 0 rs +Ethernet36 36,37,38,39 Ethernet36 10 100000 0 rs +Ethernet40 40,41,42,43 Ethernet40 11 100000 0 rs +Ethernet44 44,45,46,47 Ethernet44 12 100000 0 rs +Ethernet48 48,49,50,51 Ethernet48 13 100000 0 rs +Ethernet52 52,53,54,55 Ethernet52 14 100000 0 rs +Ethernet56 56,57,58,59 Ethernet56 15 100000 0 rs +Ethernet60 60,61,62,63 Ethernet60 16 100000 0 rs +Ethernet64 64,65,66,67 Ethernet64 17 100000 0 rs +Ethernet68 68,69,70,71 Ethernet68 18 100000 0 rs +Ethernet72 72,73,74,75 Ethernet72 19 100000 0 rs +Ethernet76 76,77,78,79 Ethernet76 20 100000 0 rs +Ethernet80 80,81,82,83 Ethernet80 21 100000 0 rs +Ethernet84 84,85,86,87 Ethernet84 22 100000 0 rs +Ethernet88 88,89,90,91 Ethernet88 23 100000 0 rs +Ethernet92 92,93,94,95 Ethernet92 24 100000 0 rs +Ethernet96 96,97,98,99 Ethernet96 25 100000 0 rs +Ethernet100 100,101,102,103 Ethernet100 26 100000 0 rs +Ethernet104 104,105,106,107 Ethernet104 27 100000 0 rs +Ethernet108 108,109,110,111 Ethernet108 28 100000 0 rs +Ethernet112 112,113,114,115 Ethernet112 29 100000 0 rs +Ethernet116 116,117,118,119 Ethernet116 30 100000 0 rs +Ethernet120 120,121,122,123 Ethernet120 31 100000 0 rs +Ethernet124 124,125,126,127 Ethernet124 32 100000 0 rs diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf index 79b10cafa86..a459e925531 100644 --- a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf @@ -23,13 +23,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py index 1faeff9d18b..9c14441475d 100644 --- a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py @@ -9,6 +9,9 @@ import sys import errno import datetime + import logging + import logging.config + import yaml sys.path.append(os.path.dirname(__file__)) import pltfm_mgr_rpc @@ -71,12 +74,17 @@ pltfm_mgr = None EEPROM_SYMLINK = "/var/run/platform/eeprom/syseeprom" - +EEPROM_STATUS = "/var/run/platform/eeprom/status" class board(eeprom_tlvinfo.TlvInfoDecoder): + RETRIES = 3 def __init__(self, name, path, cpld_root, ro): + with open(os.path.dirname(__file__) + "/logging.conf", 'r') as f: + config_dict = yaml.load(f) + logging.config.dictConfig(config_dict) + if not os.path.exists(os.path.dirname(EEPROM_SYMLINK)): try: os.makedirs(os.path.dirname(EEPROM_SYMLINK)) @@ -85,10 +93,17 @@ def __init__(self, name, path, cpld_root, ro): raise open(EEPROM_SYMLINK, 'a').close() + f = open(EEPROM_STATUS, 'w') + f.write("initializing..") + f.close() self.eeprom_path = EEPROM_SYMLINK - super(board, self).__init__(self.eeprom_path, 0, '', True) - self.eeprom_init() + super(board, self).__init__(self.eeprom_path, 0, EEPROM_STATUS, True) + + for attempt in range(self.RETRIES): + if self.eeprom_init() or (attempt + 1 >= self.RETRIES): + break + time.sleep(1) def thrift_setup(self): global thrift_server, transport, pltfm_mgr @@ -109,9 +124,17 @@ def thrift_teardown(self): def eeprom_init(self): global pltfm_mgr - self.thrift_setup() - eeprom = pltfm_mgr.pltfm_mgr_sys_eeprom_get() - self.thrift_teardown() + + try: + self.thrift_setup() + eeprom = pltfm_mgr.pltfm_mgr_sys_eeprom_get() + self.thrift_teardown() + except: + return False + + f = open(EEPROM_STATUS, 'w') + f.write("ok") + f.close() eeprom_params = "" for attr, val in eeprom.__dict__.iteritems(): @@ -143,3 +166,5 @@ def eeprom_init(self): sys.stdout = orig_stdout eeprom_base.EepromDecoder.write_eeprom(self, new_e) + return True + diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/logging.conf b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/logging.conf new file mode 100644 index 00000000000..d7fd8477340 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/logging.conf @@ -0,0 +1,17 @@ +version: 1 +disable_existing_loggers: False + +formatters: + simple: + format: '%(asctime)s %(name)-30s %(levelname)-7s %(message)s' + +handlers: + file: + class: logging.handlers.RotatingFileHandler + formatter: simple + filename: /var/log/platform.log + +root: + level: ERROR + handlers: + - file diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py index 734901c2adf..2c0e2fdb224 100644 --- a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py @@ -63,9 +63,13 @@ def get_psu_status(self, index): return False global pltfm_mgr - self.thrift_setup() - psu_info = pltfm_mgr.pltfm_mgr_pwr_supply_info_get(index) - self.thrift_teardown() + + try: + self.thrift_setup() + psu_info = pltfm_mgr.pltfm_mgr_pwr_supply_info_get(index) + self.thrift_teardown() + except: + return False return (psu_info.ffault == False) @@ -80,9 +84,13 @@ def get_psu_presence(self, index): return False global pltfm_mgr - self.thrift_setup() - status = pltfm_mgr.pltfm_mgr_pwr_supply_present_get(index) - self.thrift_teardown() + + try: + self.thrift_setup() + status = pltfm_mgr.pltfm_mgr_pwr_supply_present_get(index) + self.thrift_teardown() + except: + return False return status diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/sfputil.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..5e75376baa2 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/sfputil.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python + +try: + import os + import sys + import importlib + import time + + sys.path.append(os.path.dirname(__file__)) + import pltfm_mgr_rpc + from pltfm_mgr_rpc.ttypes import * + + from thrift.transport import TSocket + from thrift.transport import TTransport + from thrift.protocol import TBinaryProtocol + from thrift.protocol import TMultiplexedProtocol + + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +thrift_server = 'localhost' +transport = None +pltfm_mgr = None + +SFP_EEPROM_CACHE = "/var/run/platform/sfp/cache" + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 0 + PORTS_IN_BLOCK = 0 + QSFP_PORT_START = 1 + QSFP_PORT_END = 0 + EEPROM_OFFSET = 0 + QSFP_CHECK_INTERVAL = 4 + + @property + def port_start(self): + self.update_port_info() + return self.PORT_START + + @property + def port_end(self): + self.update_port_info() + return self.PORT_END + + @property + def qsfp_ports(self): + self.update_port_info() + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + print "dependency on sysfs has been removed" + raise Exception() + + def __init__(self): + self.ready = False + self.phy_port_dict = {'-1': 'system_not_ready'} + self.phy_port_cur_state = {} + self.qsfp_interval = self.QSFP_CHECK_INTERVAL + + if not os.path.exists(os.path.dirname(SFP_EEPROM_CACHE)): + try: + os.makedirs(os.path.dirname(SFP_EEPROM_CACHE)) + except OSError as e: + if e.errno != errno.EEXIST: + raise + + open(SFP_EEPROM_CACHE, 'ab').close() + + SfpUtilBase.__init__(self) + + def update_port_info(self): + global pltfm_mgr + + if self.QSFP_PORT_END == 0: + self.thrift_setup() + self.QSFP_PORT_END = pltfm_mgr.pltfm_mgr_qsfp_get_max_port(); + self.PORT_END = self.QSFP_PORT_END + self.PORTS_IN_BLOCK = self.QSFP_PORT_END + self.thrift_teardown() + + def thrift_setup(self): + global thrift_server, transport, pltfm_mgr + transport = TSocket.TSocket(thrift_server, 9090) + + transport = TTransport.TBufferedTransport(transport) + bprotocol = TBinaryProtocol.TBinaryProtocol(transport) + + pltfm_mgr_client_module = importlib.import_module(".".join(["pltfm_mgr_rpc", "pltfm_mgr_rpc"])) + pltfm_mgr_protocol = TMultiplexedProtocol.TMultiplexedProtocol(bprotocol, "pltfm_mgr_rpc") + pltfm_mgr = pltfm_mgr_client_module.Client(pltfm_mgr_protocol) + + transport.open() + + def thrift_teardown(self): + global transport + transport.close() + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + presence = False + + try: + self.thrift_setup() + presence = pltfm_mgr.pltfm_mgr_qsfp_presence_get(port_num) + self.thrift_teardown() + except Exception as e: + print e.__doc__ + print e.message + + return presence + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + self.thrift_setup() + lpmode = pltfm_mgr.pltfm_mgr_qsfp_lpmode_get(port_num) + self.thrift_teardown() + return lpmode + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + self.thrift_setup() + status = pltfm_mgr.pltfm_mgr_qsfp_lpmode_set(port_num, lpmode) + self.thrift_teardown() + return status + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + self.thrift_setup() + status = pltfm_mgr.pltfm_mgr_qsfp_reset(port_num, True) + status = pltfm_mgr.pltfm_mgr_qsfp_reset(port_num, False) + self.thrift_teardown() + return status + + def check_transceiver_change(self): + if not self.ready: + return + + self.phy_port_dict = {} + + try: + self.thrift_setup() + except: + return + + # Get presence of each SFP + for port in range(self.port_start, self.port_end + 1): + try: + sfp_resent = pltfm_mgr.pltfm_mgr_qsfp_presence_get(port) + except: + sfp_resent = False + sfp_state = '1' if sfp_resent else '0' + + if port in self.phy_port_cur_state: + if self.phy_port_cur_state[port] != sfp_state: + self.phy_port_dict[port] = sfp_state + else: + self.phy_port_dict[port] = sfp_state + + # Update port current state + self.phy_port_cur_state[port] = sfp_state + + self.thrift_teardown() + + def get_transceiver_change_event(self, timeout=0): + forever = False + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + while forever or timeout > 0: + if not self.ready: + try: + self.thrift_setup() + self.thrift_teardown() + except: + pass + else: + self.ready = True + self.phy_port_dict = {} + break + elif self.qsfp_interval == 0: + self.qsfp_interval = self.QSFP_CHECK_INTERVAL + + # Process transceiver plug-in/out event + self.check_transceiver_change() + + # Break if tranceiver state has changed + if bool(self.phy_port_dict): + break + + if timeout: + timeout -= 1 + + if self.qsfp_interval: + self.qsfp_interval -= 1 + + time.sleep(1) + + return self.ready, self.phy_port_dict + + def _get_port_eeprom_path(self, port_num, devid): + eeprom_path = None + + self.thrift_setup() + presence = pltfm_mgr.pltfm_mgr_qsfp_presence_get(port_num) + if presence == True: + eeprom_cache = open(SFP_EEPROM_CACHE, 'wb') + eeprom_hex = pltfm_mgr.pltfm_mgr_qsfp_info_get(port_num) + eeprom_raw = bytearray.fromhex(eeprom_hex) + eeprom_cache.write(eeprom_raw) + eeprom_cache.close() + eeprom_path = SFP_EEPROM_CACHE + self.thrift_teardown() + + return eeprom_path + diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini index f81066d53bf..7a3b600fe8d 100644 --- a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini @@ -1,65 +1,65 @@ -# name lanes alias speed autoneg fec -Ethernet0 0,1,2,3 Ethernet0 100000 0 rs -Ethernet4 4,5,6,7 Ethernet4 100000 0 rs -Ethernet8 8,9,10,11 Ethernet8 100000 0 rs -Ethernet12 12,13,14,15 Ethernet12 100000 0 rs -Ethernet16 16,17,18,19 Ethernet16 100000 0 rs -Ethernet20 20,21,22,23 Ethernet20 100000 0 rs -Ethernet24 24,25,26,27 Ethernet24 100000 0 rs -Ethernet28 28,29,30,31 Ethernet28 100000 0 rs -Ethernet32 32,33,34,35 Ethernet32 100000 0 rs -Ethernet36 36,37,38,39 Ethernet36 100000 0 rs -Ethernet40 40,41,42,43 Ethernet40 100000 0 rs -Ethernet44 44,45,46,47 Ethernet44 100000 0 rs -Ethernet48 48,49,50,51 Ethernet48 100000 0 rs -Ethernet52 52,53,54,55 Ethernet52 100000 0 rs -Ethernet56 56,57,58,59 Ethernet56 100000 0 rs -Ethernet60 60,61,62,63 Ethernet60 100000 0 rs -Ethernet64 64,65,66,67 Ethernet64 100000 0 rs -Ethernet68 68,69,70,71 Ethernet68 100000 0 rs -Ethernet72 72,73,74,75 Ethernet72 100000 0 rs -Ethernet76 76,77,78,79 Ethernet76 100000 0 rs -Ethernet80 80,81,82,83 Ethernet80 100000 0 rs -Ethernet84 84,85,86,87 Ethernet84 100000 0 rs -Ethernet88 88,89,90,91 Ethernet88 100000 0 rs -Ethernet92 92,93,94,95 Ethernet92 100000 0 rs -Ethernet96 96,97,98,99 Ethernet96 100000 0 rs -Ethernet100 100,101,102,103 Ethernet100 100000 0 rs -Ethernet104 104,105,106,107 Ethernet104 100000 0 rs -Ethernet108 108,109,110,111 Ethernet108 100000 0 rs -Ethernet112 112,113,114,115 Ethernet112 100000 0 rs -Ethernet116 116,117,118,119 Ethernet116 100000 0 rs -Ethernet120 120,121,122,123 Ethernet120 100000 0 rs -Ethernet124 124,125,126,127 Ethernet124 100000 0 rs -Ethernet128 128,129,130,131 Ethernet128 100000 0 rs -Ethernet132 132,133,134,135 Ethernet132 100000 0 rs -Ethernet136 136,137,138,139 Ethernet136 100000 0 rs -Ethernet140 140,141,142,143 Ethernet140 100000 0 rs -Ethernet144 144,145,146,147 Ethernet144 100000 0 rs -Ethernet148 148,149,150,151 Ethernet148 100000 0 rs -Ethernet152 152,153,154,155 Ethernet152 100000 0 rs -Ethernet156 156,157,158,159 Ethernet156 100000 0 rs -Ethernet160 160,161,162,163 Ethernet169 100000 0 rs -Ethernet164 164,165,166,167 Ethernet164 100000 0 rs -Ethernet168 168,169,170,171 Ethernet168 100000 0 rs -Ethernet172 172,173,174,175 Ethernet172 100000 0 rs -Ethernet176 176,177,178,179 Ethernet176 100000 0 rs -Ethernet180 180,181,182,183 Ethernet180 100000 0 rs -Ethernet184 184,185,186,187 Ethernet184 100000 0 rs -Ethernet188 188,189,190,191 Ethernet188 100000 0 rs -Ethernet192 192,193,194,195 Ethernet192 100000 0 rs -Ethernet196 196,197,198,199 Ethernet196 100000 0 rs -Ethernet200 200,201,202,203 Ethernet200 100000 0 rs -Ethernet204 204,205,206,207 Ethernet204 100000 0 rs -Ethernet208 208,209,210,211 Ethernet208 100000 0 rs -Ethernet212 212,213,214,215 Ethernet212 100000 0 rs -Ethernet216 216,217,218,219 Ethernet216 100000 0 rs -Ethernet220 220,221,222,223 Ethernet220 100000 0 rs -Ethernet224 224,225,226,227 Ethernet224 100000 0 rs -Ethernet228 228,229,230,231 Ethernet228 100000 0 rs -Ethernet232 232,233,234,235 Ethernet232 100000 0 rs -Ethernet236 236,237,238,239 Ethernet236 100000 0 rs -Ethernet240 240,241,242,243 Ethernet240 100000 0 rs -Ethernet244 244,245,246,247 Ethernet244 100000 0 rs -Ethernet248 248,249,250,251 Ethernet248 100000 0 rs -Ethernet252 252,253,254,255 Etherner252 100000 0 rs +# name lanes alias index speed autoneg fec +Ethernet0 0,1,2,3 Ethernet0 1 100000 0 rs +Ethernet4 4,5,6,7 Ethernet4 2 100000 0 rs +Ethernet8 8,9,10,11 Ethernet8 3 100000 0 rs +Ethernet12 12,13,14,15 Ethernet12 4 100000 0 rs +Ethernet16 16,17,18,19 Ethernet16 5 100000 0 rs +Ethernet20 20,21,22,23 Ethernet20 6 100000 0 rs +Ethernet24 24,25,26,27 Ethernet24 7 100000 0 rs +Ethernet28 28,29,30,31 Ethernet28 8 100000 0 rs +Ethernet32 32,33,34,35 Ethernet32 9 100000 0 rs +Ethernet36 36,37,38,39 Ethernet36 10 100000 0 rs +Ethernet40 40,41,42,43 Ethernet40 11 100000 0 rs +Ethernet44 44,45,46,47 Ethernet44 12 100000 0 rs +Ethernet48 48,49,50,51 Ethernet48 13 100000 0 rs +Ethernet52 52,53,54,55 Ethernet52 14 100000 0 rs +Ethernet56 56,57,58,59 Ethernet56 15 100000 0 rs +Ethernet60 60,61,62,63 Ethernet60 16 100000 0 rs +Ethernet64 64,65,66,67 Ethernet64 17 100000 0 rs +Ethernet68 68,69,70,71 Ethernet68 18 100000 0 rs +Ethernet72 72,73,74,75 Ethernet72 19 100000 0 rs +Ethernet76 76,77,78,79 Ethernet76 20 100000 0 rs +Ethernet80 80,81,82,83 Ethernet80 21 100000 0 rs +Ethernet84 84,85,86,87 Ethernet84 22 100000 0 rs +Ethernet88 88,89,90,91 Ethernet88 23 100000 0 rs +Ethernet92 92,93,94,95 Ethernet92 24 100000 0 rs +Ethernet96 96,97,98,99 Ethernet96 25 100000 0 rs +Ethernet100 100,101,102,103 Ethernet100 26 100000 0 rs +Ethernet104 104,105,106,107 Ethernet104 27 100000 0 rs +Ethernet108 108,109,110,111 Ethernet108 28 100000 0 rs +Ethernet112 112,113,114,115 Ethernet112 29 100000 0 rs +Ethernet116 116,117,118,119 Ethernet116 30 100000 0 rs +Ethernet120 120,121,122,123 Ethernet120 31 100000 0 rs +Ethernet124 124,125,126,127 Ethernet124 32 100000 0 rs +Ethernet128 128,129,130,131 Ethernet128 33 100000 0 rs +Ethernet132 132,133,134,135 Ethernet132 34 100000 0 rs +Ethernet136 136,137,138,139 Ethernet136 35 100000 0 rs +Ethernet140 140,141,142,143 Ethernet140 36 100000 0 rs +Ethernet144 144,145,146,147 Ethernet144 37 100000 0 rs +Ethernet148 148,149,150,151 Ethernet148 38 100000 0 rs +Ethernet152 152,153,154,155 Ethernet152 39 100000 0 rs +Ethernet156 156,157,158,159 Ethernet156 40 100000 0 rs +Ethernet160 160,161,162,163 Ethernet169 41 100000 0 rs +Ethernet164 164,165,166,167 Ethernet164 42 100000 0 rs +Ethernet168 168,169,170,171 Ethernet168 43 100000 0 rs +Ethernet172 172,173,174,175 Ethernet172 44 100000 0 rs +Ethernet176 176,177,178,179 Ethernet176 45 100000 0 rs +Ethernet180 180,181,182,183 Ethernet180 46 100000 0 rs +Ethernet184 184,185,186,187 Ethernet184 47 100000 0 rs +Ethernet188 188,189,190,191 Ethernet188 48 100000 0 rs +Ethernet192 192,193,194,195 Ethernet192 49 100000 0 rs +Ethernet196 196,197,198,199 Ethernet196 50 100000 0 rs +Ethernet200 200,201,202,203 Ethernet200 51 100000 0 rs +Ethernet204 204,205,206,207 Ethernet204 52 100000 0 rs +Ethernet208 208,209,210,211 Ethernet208 53 100000 0 rs +Ethernet212 212,213,214,215 Ethernet212 54 100000 0 rs +Ethernet216 216,217,218,219 Ethernet216 55 100000 0 rs +Ethernet220 220,221,222,223 Ethernet220 56 100000 0 rs +Ethernet224 224,225,226,227 Ethernet224 57 100000 0 rs +Ethernet228 228,229,230,231 Ethernet228 58 100000 0 rs +Ethernet232 232,233,234,235 Ethernet232 59 100000 0 rs +Ethernet236 236,237,238,239 Ethernet236 60 100000 0 rs +Ethernet240 240,241,242,243 Ethernet240 61 100000 0 rs +Ethernet244 244,245,246,247 Ethernet244 62 100000 0 rs +Ethernet248 248,249,250,251 Ethernet248 63 100000 0 rs +Ethernet252 252,253,254,255 Etherner252 64 100000 0 rs diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf index 647f4183828..5497836266e 100644 --- a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf @@ -23,13 +23,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F b/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F index cab392995bb..883f3c0c899 100644 --- a/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F +++ b/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F @@ -1,7 +1,7 @@ # Configuration file generated by pwmconfig, changes will be lost INTERVAL=2 DEVPATH=hwmon3=devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-23/23-004d hwmon2=devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-11/11-001a -DEVNAME=hwmon3=emc2305 hwmon2=max6697 +DEVNAME=hwmon3=emc2305 hwmon2=max6699 FCTEMPS=hwmon3/device/pwm1=hwmon2/temp1_input hwmon3/device/pwm2=hwmon2/temp1_input hwmon3/device/pwm4=hwmon2/temp1_input FCFANS=hwmon3/device/pwm1=hwmon3/device/fan1_input hwmon3/device/pwm2=hwmon3/device/fan2_input hwmon3/device/pwm4=hwmon3/device/fan4_input MINTEMP=hwmon3/device/pwm1=27 hwmon3/device/pwm2=27 hwmon3/device/pwm4=27 diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py index e69de29bb2d..d82f3749319 100644 --- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py index 85da302fcc1..fde9afaa6f4 100644 --- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py @@ -21,16 +21,20 @@ from sonic_platform.component import Component from sonic_platform.watchdog import Watchdog from sonic_platform.thermal import Thermal + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Tlv except ImportError as e: raise ImportError(str(e) + "- required module not found") NUM_FAN = 3 NUM_PSU = 2 NUM_THERMAL = 7 -CONFIG_DB_PATH = "/etc/sonic/config_db.json" +NUM_SFP = 52 RESET_REGISTER = "0x112" -REBOOT_CAUSE_PATH = "/host/reboot-cause/previous-reboot-cause.txt" +HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/previous-reboot-cause.txt" +PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/previous-reboot-cause.txt" COMPONENT_NAME_LIST = ["SMC_CPLD", "MMC_CPLD", "BIOS"] +HOST_CHK_CMD = "docker > /dev/null 2>&1" class Chassis(ChassisBase): @@ -47,17 +51,18 @@ def __init__(self): for index in range(0, NUM_THERMAL): thermal = Thermal(index) self._thermal_list.append(thermal) + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) ChassisBase.__init__(self) + self._reboot_cause_path = HOST_REBOOT_CAUSE_PATH if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH self._component_name_list = COMPONENT_NAME_LIST self._watchdog = Watchdog() + self._eeprom = Tlv() - def __read_config_db(self): - try: - with open(CONFIG_DB_PATH, 'r') as fd: - data = json.load(fd) - return data - except IOError: - raise IOError("Unable to open config_db file !") + def __is_host(self): + return os.system(HOST_CHK_CMD) == 0 def __read_txt_file(self, file_path): try: @@ -65,7 +70,8 @@ def __read_txt_file(self, file_path): data = fd.read() return data.strip() except IOError: - raise IOError("Unable to open %s file !" % file_path) + pass + return None def get_base_mac(self): """ @@ -74,12 +80,25 @@ def get_base_mac(self): A string containing the MAC address in the format 'XX:XX:XX:XX:XX:XX' """ - try: - self.config_data = self.__read_config_db() - base_mac = self.config_data["DEVICE_METADATA"]["localhost"]["mac"] - return str(base_mac) - except KeyError: - return str(None) + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() def get_firmware_version(self, component_name): """ @@ -126,14 +145,15 @@ def get_reboot_cause(self): description = 'None' reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER hw_reboot_cause = self.component.get_register_value(RESET_REGISTER) - sw_reboot_cause = self.__read_txt_file(REBOOT_CAUSE_PATH) + sw_reboot_cause = self.__read_txt_file( + self._reboot_cause_path) or "Unknown" - if sw_reboot_cause != "Unexpected reboot": + if hw_reboot_cause == "0x55": reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE description = sw_reboot_cause elif hw_reboot_cause == "0x11": reboot_cause = self.REBOOT_CAUSE_POWER_LOSS - elif hw_reboot_cause == "0x33" or hw_reboot_cause == "0x55": + elif hw_reboot_cause == "0x33": reboot_cause = self.REBOOT_CAUSE_WATCHDOG else: reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/eeprom.py new file mode 100644 index 00000000000..b6881620612 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/eeprom.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Haliburton +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import glob + import os + import sys + import imp + import re + from array import array + from cStringIO import StringIO + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' + + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + err = self.read_eeprom_db() + if err: + # Failed to read EEPROM information from database. Read from cache file + pass + else: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if status <> 'ok': + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py index ad993ce2418..88e21b3e5ee 100644 --- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py @@ -34,6 +34,7 @@ def __init__(self, fan_index): self.index = fan_index self.config_data = {} self.fan_speed = 0 + FanBase.__init__(self) # e1031 fan attributes # Single emc2305 chip located at i2c-23-4d diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py new file mode 100644 index 00000000000..c67e487e4cd --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py @@ -0,0 +1,552 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# + +import os +import time +import subprocess +import sonic_device_util +from ctypes import create_string_buffer + +try: + from swsssdk import ConfigDBConnector + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Sfp(SfpBase, SfpUtilBase): + """Platform-specific Sfp class""" + + PORT_START = 1 + PORT_END = 52 + port_to_i2c_mapping = { + 49: 15, + 50: 14, + 51: 17, + 52: 16 + } + PRS_PATH = "/sys/devices/platform/e1031.smc/SFP/sfp_modabs" + PLATFORM_ROOT_PATH = '/usr/share/sonic/device' + PMON_HWSKU_PATH = '/usr/share/sonic/hwsku' + SFP_STATUS_CONTROL_OFFSET = 110 + SFP_STATUS_CONTROL_WIDTH = 1 + + _port_to_eeprom_mapping = {} + _sfp_port = range(49, PORT_END + 1) + + SFP_EEPROM_TYPE_KEY = "TypeOfTransceiver" + SFP_EEPROM_HW_REV_KEY = "VendorRev" + SFP_EEPROM_MF_NAME_KEY = "VendorName" + SFP_EEPROM_MODEL_NAME_KEY = "VendorPN" + SFP_EEPROM_SERIAL_KEY = "VendorSN" + SFP_EEPROM_CONNECTOR_KEY = "Connector" + SFP_EEPROM_ENCODE_KEY = "EncodingCodes" + SFP_EEPROM_EXT_IDENT_KEY = "ExtIdentOfTypeOfTransceiver" + SFP_EEPROM_CABLE_KEY = "LengthCable(UnitsOfm)" + SFP_EEPROM_BIT_RATE_KEY = "NominalSignallingRate(UnitsOf100Mbd)" + SFP_EEPROM_SPEC_COM_KEY = "Specification compliance" + SFP_EEPROM_DATE_KEY = "VendorDataCode(YYYY-MM-DD Lot)" + SFP_EEPROM_OUI_KEY = "VendorOUI" + SFP_EEPROM_MON_DATA_KEY = "MonitorData" + SFP_EEPROM_TEMP_KEY = "Temperature" + SFP_EEPROM_VCC_KEY = "Vcc" + SFP_EEPROM_RX_PWR_KEY = "RXPower" + SFP_EEPROM_TX_PWR_KEY = "TXPower" + SFP_EEPROM_TX_BS_KEY = "TXBias" + SFP_EEPROM_STATUS_CON_KEY = "StatusControl" + PLATFORM = "x86_64-cel_e1031-r0" + HWSKU = "Celestica-E1031-T48S4" + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return [] + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def set_low_power_mode(self, port_num, lpmode): + raise NotImplementedError + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError + + def __init__(self, sfp_index): + # Init SfpUtilBase + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + for x in range(self.PORT_START, self.PORT_END + 1): + if x not in self._sfp_port: + self.port_to_i2c_mapping[x] = None + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self.port_to_i2c_mapping[x]) + self.read_porttab_mappings(self.__get_path_to_port_config_file()) + SfpUtilBase.__init__(self) + + # Init index + self.index = sfp_index + self.port_num = self.index + 1 + + def __is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def __get_sysfsfile_eeprom(self): + sysfsfile_eeprom = None + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="r+b", buffering=0) + except IOError: + pass + return sysfsfile_eeprom + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) + hwsku_path = "/".join([platform_path, self.HWSKU] + ) if self.__is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + transceiver_info_dict = dict() + # get eeprom data + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('interface'): + transceiver_info_data = self.eeprom_dict['interface'].get('data') + + # set specification_compliance + spec_com = transceiver_info_data.get( + self.SFP_EEPROM_SPEC_COM_KEY, {}) + spec_com_str = "/".join(list(spec_com.values())) + + # set normal transceiver info + transceiver_info_dict['type'] = transceiver_info_data.get( + self.SFP_EEPROM_TYPE_KEY, 'N/A') + transceiver_info_dict['hardwarerev'] = transceiver_info_data.get( + self.SFP_EEPROM_HW_REV_KEY, 'N/A') + transceiver_info_dict['manufacturename'] = transceiver_info_data.get( + self.SFP_EEPROM_MF_NAME_KEY, 'N/A') + transceiver_info_dict['modelname'] = transceiver_info_data.get( + self.SFP_EEPROM_MODEL_NAME_KEY, 'N/A') + transceiver_info_dict['serialnum'] = transceiver_info_data.get( + self.SFP_EEPROM_SERIAL_KEY, 'N/A') + transceiver_info_dict['Connector'] = transceiver_info_data.get( + self.SFP_EEPROM_CONNECTOR_KEY, 'N/A') + transceiver_info_dict['encoding'] = transceiver_info_data.get( + self.SFP_EEPROM_ENCODE_KEY, 'N/A') + transceiver_info_dict['ext_identifier'] = transceiver_info_data.get( + self.SFP_EEPROM_EXT_IDENT_KEY, 'N/A') + transceiver_info_dict['cable_length'] = transceiver_info_data.get( + self.SFP_EEPROM_CABLE_KEY, 'N/A') + transceiver_info_dict['nominal_bit_rate'] = transceiver_info_data.get( + self.SFP_EEPROM_BIT_RATE_KEY, 'N/A') + transceiver_info_dict['vendor_date'] = transceiver_info_data.get( + self.SFP_EEPROM_DATE_KEY, 'N/A') + transceiver_info_dict['vendor_oui'] = transceiver_info_data.get( + self.SFP_EEPROM_OUI_KEY, 'N/A') + transceiver_info_dict['ext_rateselect_compliance'] = "N/A" + transceiver_info_dict['specification_compliance'] = spec_com_str or "N/A" + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + RX LOS |BOOLEAN |RX lost-of-signal status, + | |True if has RX los, False if not. + TX FAULT |BOOLEAN |TX fault status, + | |True if has TX fault, False if not. + Reset status |BOOLEAN |reset status, + | |True if SFP in reset, False if not. + LP mode |BOOLEAN |low power mode status, + | |True in lp mode, False if not. + TX disable |BOOLEAN |TX disable status, + | |True TX disabled, False if not. + TX disabled channel |HEX |disabled TX channles in hex, + | |bits 0 to 3 represent channel 0 + | |to channel 3. + Temperature |INT |module temperature in Celsius + Voltage |INT |supply voltage in mV + TX bias |INT |TX Bias Current in mA + RX power |INT |received optical power in mW + TX power |INT |TX output power in mW + ======================================================================== + """ + transceiver_bulk_status_dict = dict() + # get eeprom data + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('dom'): + transceiver_dom_data = self.eeprom_dict['dom'].get('data', {}) + transceiver_dom_data_mmv = transceiver_dom_data.get( + self.SFP_EEPROM_MON_DATA_KEY) + + # set normal transceiver bulk status + transceiver_bulk_status_dict['temperature'] = transceiver_dom_data_mmv.get( + self.SFP_EEPROM_TEMP_KEY, 'N/A') + transceiver_bulk_status_dict['voltage'] = transceiver_dom_data_mmv.get( + self.SFP_EEPROM_VCC_KEY, 'N/A') + transceiver_bulk_status_dict['rx1power'] = transceiver_dom_data_mmv.get( + self.SFP_EEPROM_RX_PWR_KEY, 'N/A') + transceiver_bulk_status_dict['rx2power'] = "N/A" + transceiver_bulk_status_dict['rx3power'] = "N/A" + transceiver_bulk_status_dict['rx4power'] = "N/A" + transceiver_bulk_status_dict['tx1bias'] = transceiver_dom_data_mmv.get( + self.SFP_EEPROM_TX_BS_KEY, 'N/A') + transceiver_bulk_status_dict['tx2bias'] = "N/A" + transceiver_bulk_status_dict['tx3bias'] = "N/A" + transceiver_bulk_status_dict['tx4bias'] = "N/A" + transceiver_bulk_status_dict['tx1power'] = transceiver_dom_data_mmv.get( + self.SFP_EEPROM_TX_PWR_KEY, 'N/A') + transceiver_bulk_status_dict['tx2power'] = "N/A" + transceiver_bulk_status_dict['tx3power'] = "N/A" + transceiver_bulk_status_dict['tx4power'] = "N/A" + + for key in transceiver_bulk_status_dict: + transceiver_bulk_status_dict[key] = self._convert_string_to_num( + transceiver_bulk_status_dict[key]) + + return transceiver_bulk_status_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return NotImplementedError + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + rx_los_key = "RXLOSState" + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('dom'): + transceiver_dom_data = self.eeprom_dict['dom'].get('data', {}) + transceiver_dom_data_sc = transceiver_dom_data.get( + self.SFP_EEPROM_STATUS_CON_KEY) + state = transceiver_dom_data_sc.get(rx_los_key) + rx_los = True if 'off' not in state.lower() else False + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + tx_fault_key = "TXFaultState" + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('dom'): + transceiver_dom_data = self.eeprom_dict['dom'].get('data', {}) + transceiver_dom_data_sc = transceiver_dom_data.get( + self.SFP_EEPROM_STATUS_CON_KEY) + state = transceiver_dom_data_sc.get(tx_fault_key) + tx_fault = True if 'off' not in state.lower() else False + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_disable_key = "TXDisableState" + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('dom'): + transceiver_dom_data = self.eeprom_dict['dom'].get('data', {}) + transceiver_dom_data_sc = transceiver_dom_data.get( + self.SFP_EEPROM_STATUS_CON_KEY) + state = transceiver_dom_data_sc.get(tx_disable_key) + tx_disable = True if 'off' not in state.lower() else False + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return NotImplementedError + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return self.get_low_power_mode(self.port_num) + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return NotImplementedError + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return NotImplementedError + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + + sysfsfile_eeprom = self.__get_sysfsfile_eeprom() + status_control_raw = self._read_eeprom_specific_bytes( + sysfsfile_eeprom, self.SFP_STATUS_CONTROL_OFFSET, self.SFP_STATUS_CONTROL_WIDTH) if sysfsfile_eeprom else None + if status_control_raw is not None: + tx_disable_bit = 0x80 if tx_disable else 0x7f + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else ( + status_control & tx_disable_bit) + try: + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(self.SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return NotImplementedError + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + return self.set_low_power_mode(self.port_num, lpmode) + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + return NotImplementedError + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self.logical[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + if self.port_num not in self._sfp_port: + return False + + status = 1 + try: + with open(self.PRS_PATH, 'r') as port_status: + status = int(port_status.read(), 16) + status = (status >> (self.port_num - 49)) & 1 + except IOError: + return False + + return status == 0 + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("serialnum", "N/A") diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py index a6d45dc41c9..6c37f3b7ce8 100644 --- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py @@ -22,8 +22,8 @@ class Thermal(ThermalBase): """Platform-specific Thermal class""" THERMAL_NAME_LIST = [] - MAINBOARD_SS_PATH = "/sys/class/i2c-adapter/i2c-11/11-001a/hwmon/" - CPUBOARD_SS_PATH = "/sys/class/i2c-adapter/i2c-3/3-001a/hwmon/" + MAINBOARD_SS_PATH = "/sys/class/i2c-adapter/i2c-11/11-001a/hwmon/hwmon2" + CPUBOARD_SS_PATH = "/sys/class/i2c-adapter/i2c-3/3-001a/hwmon/hwmon1" SS_CONFIG_PATH = "/usr/share/sonic/device/x86_64-cel_e1031-r0/sensors.conf" def __init__(self, thermal_index): @@ -41,10 +41,8 @@ def __init__(self, thermal_index): self.THERMAL_NAME_LIST.append("CPU board temperature sensor : 2") # Set hwmon path - self.ss_index, self.ss_path = self.__get_ss_info(self.index) + self.ss_index, self.hwmon_path = self.__get_ss_info(self.index) self.ss_key = self.THERMAL_NAME_LIST[self.index] - self.hwmon_name = os.listdir(self.ss_path)[0] - self.hwmon_path = os.path.join(self.ss_path, self.hwmon_name) def __get_ss_info(self, index): if self.index <= 4: diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/config_64x100G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/config_64x100G_midstone200i.yaml new file mode 100755 index 00000000000..0b7e1a2db9d --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/config_64x100G_midstone200i.yaml @@ -0,0 +1,639 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "128" + type: "cpu" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KRFEC" + id: "2" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "2" + type: "eth" + - fec: "KRFEC" + id: "3" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "3" + type: "eth" + - fec: "KRFEC" + id: "4" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "4" + type: "eth" + - fec: "KRFEC" + id: "5" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "5" + type: "eth" + - fec: "KRFEC" + id: "6" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "6" + type: "eth" + - fec: "KRFEC" + id: "7" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "7" + type: "eth" + - fec: "KRFEC" + id: "8" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "8" + type: "eth" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KRFEC" + id: "10" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "10" + type: "eth" + - fec: "KRFEC" + id: "11" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KRFEC" + id: "12" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "12" + type: "eth" + - fec: "KRFEC" + id: "13" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "KRFEC" + id: "14" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "14" + type: "eth" + - fec: "KRFEC" + id: "15" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "KRFEC" + id: "16" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "16" + type: "eth" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KRFEC" + id: "18" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "18" + type: "eth" + - fec: "KRFEC" + id: "19" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "19" + type: "eth" + - fec: "KRFEC" + id: "20" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "20" + type: "eth" + - fec: "KRFEC" + id: "21" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "21" + type: "eth" + - fec: "KRFEC" + id: "22" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "22" + type: "eth" + - fec: "KRFEC" + id: "23" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "23" + type: "eth" + - fec: "KRFEC" + id: "24" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "24" + type: "eth" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KRFEC" + id: "26" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "26" + type: "eth" + - fec: "KRFEC" + id: "27" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KRFEC" + id: "28" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "28" + type: "eth" + - fec: "KRFEC" + id: "29" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KRFEC" + id: "30" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "30" + type: "eth" + - fec: "KRFEC" + id: "31" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KRFEC" + id: "32" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "32" + type: "eth" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KRFEC" + id: "34" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "34" + type: "eth" + - fec: "KRFEC" + id: "35" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "35" + type: "eth" + - fec: "KRFEC" + id: "36" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "36" + type: "eth" + - fec: "KRFEC" + id: "37" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "37" + type: "eth" + - fec: "KRFEC" + id: "38" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "38" + type: "eth" + - fec: "KRFEC" + id: "39" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "39" + type: "eth" + - fec: "KRFEC" + id: "40" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "40" + type: "eth" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KRFEC" + id: "42" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "42" + type: "eth" + - fec: "KRFEC" + id: "43" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KRFEC" + id: "44" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "44" + type: "eth" + - fec: "KRFEC" + id: "45" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KRFEC" + id: "46" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "46" + type: "eth" + - fec: "KRFEC" + id: "47" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KRFEC" + id: "48" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "48" + type: "eth" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KRFEC" + id: "50" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "50" + type: "eth" + - fec: "KRFEC" + id: "51" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KRFEC" + id: "52" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "52" + type: "eth" + - fec: "KRFEC" + id: "53" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "53" + type: "eth" + - fec: "KRFEC" + id: "54" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "54" + type: "eth" + - fec: "KRFEC" + id: "55" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "55" + type: "eth" + - fec: "KRFEC" + id: "56" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "56" + type: "eth" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KRFEC" + id: "58" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "58" + type: "eth" + - fec: "KRFEC" + id: "59" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "59" + type: "eth" + - fec: "KRFEC" + id: "60" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "60" + type: "eth" + - fec: "KRFEC" + id: "61" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "61" + type: "eth" + - fec: "KRFEC" + id: "62" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "62" + type: "eth" + - fec: "KRFEC" + id: "63" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "63" + type: "eth" + - fec: "KRFEC" + id: "64" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "64" + type: "eth" + isg: + - id: "0" + tx_polarity: "00101001" + rx_polarity: "01110001" + lane_swap: "01234567" + - id: "1" + tx_polarity: "10111111" + rx_polarity: "11100100" + lane_swap: "01234567" + - id: "2" + tx_polarity: "00100010" + rx_polarity: "00010001" + lane_swap: "01234567" + - id: "3" + tx_polarity: "00101010" + rx_polarity: "11011101" + lane_swap: "01234567" + - id: "4" + tx_polarity: "10111110" + rx_polarity: "10010101" + lane_swap: "01234567" + - id: "5" + tx_polarity: "01101000" + rx_polarity: "10111001" + lane_swap: "01234567" + - id: "6" + tx_polarity: "01110110" + rx_polarity: "01110011" + lane_swap: "01234567" + - id: "7" + tx_polarity: "01001000" + rx_polarity: "10111001" + lane_swap: "01234567" + - id: "8" + tx_polarity: "11000100" + rx_polarity: "01000000" + lane_swap: "01234567" + - id: "9" + tx_polarity: "10001010" + rx_polarity: "10100100" + lane_swap: "01234567" + - id: "10" + tx_polarity: "11000110" + rx_polarity: "00011101" + lane_swap: "01234567" + - id: "11" + tx_polarity: "01000111" + rx_polarity: "00000101" + lane_swap: "01234567" + - id: "12" + tx_polarity: "01111000" + rx_polarity: "11100000" + lane_swap: "01234567" + - id: "13" + tx_polarity: "10011111" + rx_polarity: "00101111" + lane_swap: "01234567" + - id: "14" + tx_polarity: "00101001" + rx_polarity: "00011000" + lane_swap: "01234567" + - id: "15" + tx_polarity: "10110111" + rx_polarity: "00110110" + lane_swap: "01234567" + - id: "16" + tx_polarity: "00101001" + rx_polarity: "00000111" + lane_swap: "01234567" + - id: "17" + tx_polarity: "10100111" + rx_polarity: "10001000" + lane_swap: "01234567" + - id: "18" + tx_polarity: "00011001" + rx_polarity: "11111110" + lane_swap: "01234567" + - id: "19" + tx_polarity: "10010101" + rx_polarity: "10011010" + lane_swap: "01234567" + - id: "20" + tx_polarity: "00101001" + rx_polarity: "01100000" + lane_swap: "01234567" + - id: "21" + tx_polarity: "10010111" + rx_polarity: "01111001" + lane_swap: "01234567" + - id: "22" + tx_polarity: "00101001" + rx_polarity: "11010011" + lane_swap: "01234567" + - id: "23" + tx_polarity: "10110111" + rx_polarity: "01111011" + lane_swap: "01234567" + - id: "24" + tx_polarity: "00101001" + rx_polarity: "11101011" + lane_swap: "01234567" + - id: "25" + tx_polarity: "10110111" + rx_polarity: "11010111" + lane_swap: "01234567" + - id: "26" + tx_polarity: "00100001" + rx_polarity: "00101101" + lane_swap: "01234567" + - id: "27" + tx_polarity: "11000111" + rx_polarity: "11011001" + lane_swap: "01234567" + - id: "28" + tx_polarity: "00100001" + rx_polarity: "01010011" + lane_swap: "01234567" + - id: "29" + tx_polarity: "10110111" + rx_polarity: "01111001" + lane_swap: "01234567" + - id: "30" + tx_polarity: "00101001" + rx_polarity: "00110001" + lane_swap: "01234567" + - id: "31" + tx_polarity: "10110101" + rx_polarity: "01101101" + lane_swap: "01234567" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/inno.config.yaml new file mode 100755 index 00000000000..b2a079136ab --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/port_config.ini new file mode 100755 index 00000000000..c9b30d768d5 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/port_config.ini @@ -0,0 +1,65 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 100000 1 9126 +Ethernet4 253,254,255,256 100000 2 9126 +Ethernet8 245,246,247,248 100000 3 9126 +Ethernet12 241,242,243,244 100000 4 9126 +Ethernet16 233,234,235,236 100000 5 9126 +Ethernet20 237,238,239,240 100000 6 9126 +Ethernet24 229,230,231,232 100000 7 9126 +Ethernet28 225,226,227,228 100000 8 9126 +Ethernet32 217,218,219,220 100000 9 9126 +Ethernet36 221,222,223,224 100000 10 9126 +Ethernet40 213,214,215,216 100000 11 9126 +Ethernet44 209,210,211,212 100000 12 9126 +Ethernet48 201,202,203,204 100000 13 9126 +Ethernet52 205,206,207,208 100000 14 9126 +Ethernet56 197,198,199,200 100000 15 9126 +Ethernet60 193,194,195,196 100000 16 9126 +Ethernet64 185,186,187,188 100000 17 9126 +Ethernet68 189,190,191,192 100000 18 9126 +Ethernet72 181,182,183,184 100000 19 9126 +Ethernet76 177,178,179,180 100000 20 9126 +Ethernet80 169,170,171,172 100000 21 9126 +Ethernet84 173,174,175,176 100000 22 9126 +Ethernet88 165,166,167,168 100000 23 9126 +Ethernet92 161,162,163,164 100000 24 9126 +Ethernet96 153,154,155,156 100000 25 9126 +Ethernet100 157,158,159,160 100000 26 9126 +Ethernet104 149,150,151,152 100000 27 9126 +Ethernet108 145,146,147,148 100000 28 9126 +Ethernet112 137,138,139,140 100000 29 9126 +Ethernet116 141,142,143,144 100000 30 9126 +Ethernet120 133,134,135,136 100000 31 9126 +Ethernet124 129,130,131,132 100000 32 9126 +Ethernet128 121,122,123,124 100000 33 9126 +Ethernet132 125,126,127,128 100000 34 9126 +Ethernet136 117,118,119,120 100000 35 9126 +Ethernet140 113,114,115,116 100000 36 9126 +Ethernet144 105,106,107,108 100000 37 9126 +Ethernet148 109,110,111,112 100000 38 9126 +Ethernet152 101,102,103,104 100000 39 9126 +Ethernet156 97,98,99,100 100000 40 9126 +Ethernet160 89,90,91,92 100000 41 9126 +Ethernet164 93,94,95,96 100000 42 9126 +Ethernet168 85,86,87,88 100000 43 9126 +Ethernet172 81,82,83,84 100000 44 9126 +Ethernet176 73,74,75,76 100000 45 9126 +Ethernet180 77,78,79,80 100000 46 9126 +Ethernet184 69,70,71,72 100000 47 9126 +Ethernet188 65,66,67,68 100000 48 9126 +Ethernet192 57,58,59,60 100000 49 9126 +Ethernet196 61,62,63,64 100000 50 9126 +Ethernet200 53,54,55,56 100000 51 9126 +Ethernet204 49,50,51,52 100000 52 9126 +Ethernet208 41,42,43,44 100000 53 9126 +Ethernet212 45,46,47,48 100000 54 9126 +Ethernet216 37,38,39,40 100000 55 9126 +Ethernet220 33,34,35,36 100000 56 9126 +Ethernet224 25,26,27,28 100000 57 9126 +Ethernet228 29,30,31,32 100000 58 9126 +Ethernet232 21,22,23,24 100000 59 9126 +Ethernet236 17,18,19,20 100000 60 9126 +Ethernet240 9,10,11,12 100000 61 9126 +Ethernet244 13,14,15,16 100000 62 9126 +Ethernet248 5,6,7,8 100000 63 9126 +Ethernet252 1,2,3,4 100000 64 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/buffers.json.j2 new file mode 100644 index 00000000000..9529fbf52fb --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 128 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/config_128x100G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/config_128x100G_midstone200i.yaml new file mode 100644 index 00000000000..342d223a96e --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/config_128x100G_midstone200i.yaml @@ -0,0 +1,1100 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:2" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "251" + lanes: "2:2" + serdes_group: "31" + speed: "100G" + sysport: "251" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:2" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "255" + lanes: "6:2" + serdes_group: "31" + speed: "100G" + sysport: "255" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:2" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "247" + lanes: "6:2" + serdes_group: "30" + speed: "100G" + sysport: "247" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:2" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "243" + lanes: "2:2" + serdes_group: "30" + speed: "100G" + sysport: "243" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:2" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "235" + lanes: "2:2" + serdes_group: "29" + speed: "100G" + sysport: "235" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:2" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "239" + lanes: "6:2" + serdes_group: "29" + speed: "100G" + sysport: "239" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:2" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "231" + lanes: "6:2" + serdes_group: "28" + speed: "100G" + sysport: "231" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:2" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "227" + lanes: "2:2" + serdes_group: "28" + speed: "100G" + sysport: "227" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:2" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "219" + lanes: "2:2" + serdes_group: "27" + speed: "100G" + sysport: "219" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:2" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "223" + lanes: "6:2" + serdes_group: "27" + speed: "100G" + sysport: "223" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:2" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "215" + lanes: "6:2" + serdes_group: "26" + speed: "100G" + sysport: "215" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:2" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "211" + lanes: "2:2" + serdes_group: "26" + speed: "100G" + sysport: "211" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:2" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "203" + lanes: "2:2" + serdes_group: "25" + speed: "100G" + sysport: "203" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:2" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "207" + lanes: "6:2" + serdes_group: "25" + speed: "100G" + sysport: "207" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:2" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "199" + lanes: "6:2" + serdes_group: "24" + speed: "100G" + sysport: "199" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:2" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "195" + lanes: "2:2" + serdes_group: "24" + speed: "100G" + sysport: "195" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:2" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "187" + lanes: "2:2" + serdes_group: "23" + speed: "100G" + sysport: "187" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:2" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "191" + lanes: "6:2" + serdes_group: "23" + speed: "100G" + sysport: "191" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:2" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "183" + lanes: "6:2" + serdes_group: "22" + speed: "100G" + sysport: "183" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:2" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "179" + lanes: "2:2" + serdes_group: "22" + speed: "100G" + sysport: "179" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:2" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "171" + lanes: "2:2" + serdes_group: "21" + speed: "100G" + sysport: "171" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:2" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "175" + lanes: "6:2" + serdes_group: "21" + speed: "100G" + sysport: "175" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:2" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "167" + lanes: "6:2" + serdes_group: "20" + speed: "100G" + sysport: "167" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:2" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "163" + lanes: "2:2" + serdes_group: "20" + speed: "100G" + sysport: "163" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:2" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "155" + lanes: "2:2" + serdes_group: "19" + speed: "100G" + sysport: "155" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:2" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "159" + lanes: "6:2" + serdes_group: "19" + speed: "100G" + sysport: "159" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:2" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "151" + lanes: "6:2" + serdes_group: "18" + speed: "100G" + sysport: "151" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:2" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "147" + lanes: "2:2" + serdes_group: "18" + speed: "100G" + sysport: "147" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:2" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "139" + lanes: "2:2" + serdes_group: "17" + speed: "100G" + sysport: "139" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:2" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "143" + lanes: "6:2" + serdes_group: "17" + speed: "100G" + sysport: "143" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:2" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "135" + lanes: "6:2" + serdes_group: "16" + speed: "100G" + sysport: "135" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:2" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "131" + lanes: "2:2" + serdes_group: "16" + speed: "100G" + sysport: "131" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:2" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "2:2" + serdes_group: "15" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:2" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "6:2" + serdes_group: "15" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "6:2" + serdes_group: "14" + speed: "100G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "2:2" + serdes_group: "14" + speed: "100G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:2" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "107" + lanes: "2:2" + serdes_group: "13" + speed: "100G" + sysport: "107" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:2" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "6:2" + serdes_group: "13" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "6:2" + serdes_group: "12" + speed: "100G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "2:2" + serdes_group: "12" + speed: "100G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "2:2" + serdes_group: "11" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "6:2" + serdes_group: "11" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:2" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "6:2" + serdes_group: "10" + speed: "100G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "0:2" + serdes_group: "10" + speed: "100G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "83" + lanes: "2:2" + serdes_group: "10" + speed: "100G" + sysport: "83" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "9" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "75" + lanes: "2:2" + serdes_group: "9" + speed: "100G" + sysport: "75" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "4:2" + serdes_group: "9" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "79" + lanes: "6:2" + serdes_group: "9" + speed: "100G" + sysport: "79" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "8" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "71" + lanes: "6:2" + serdes_group: "8" + speed: "100G" + sysport: "71" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "0:2" + serdes_group: "8" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "67" + lanes: "2:2" + serdes_group: "8" + speed: "100G" + sysport: "67" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "7" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "59" + lanes: "2:2" + serdes_group: "7" + speed: "100G" + sysport: "59" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "4:2" + serdes_group: "7" + speed: "100G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "63" + lanes: "6:2" + serdes_group: "7" + speed: "100G" + sysport: "63" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "6" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "55" + lanes: "6:2" + serdes_group: "6" + speed: "100G" + sysport: "55" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "0:2" + serdes_group: "6" + speed: "100G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "51" + lanes: "2:2" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:2" + serdes_group: "5" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "43" + lanes: "2:2" + serdes_group: "5" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KPFEC" + id: "107" + lanes: "4:2" + serdes_group: "5" + speed: "100G" + sysport: "107" + type: "eth" + - fec: "KPFEC" + id: "47" + lanes: "6:2" + serdes_group: "5" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:2" + serdes_group: "4" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "39" + lanes: "6:2" + serdes_group: "4" + speed: "100G" + sysport: "39" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "0:2" + serdes_group: "4" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "35" + lanes: "2:2" + serdes_group: "4" + speed: "100G" + sysport: "35" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "3" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "27" + lanes: "2:2" + serdes_group: "3" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "4:2" + serdes_group: "3" + speed: "100G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "31" + lanes: "6:2" + serdes_group: "3" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "2" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "23" + lanes: "6:2" + serdes_group: "2" + speed: "100G" + sysport: "23" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "0:2" + serdes_group: "2" + speed: "100G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "19" + lanes: "2:2" + serdes_group: "2" + speed: "100G" + sysport: "19" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:2" + serdes_group: "1" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "11" + lanes: "2:2" + serdes_group: "1" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "4:2" + serdes_group: "1" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "15" + lanes: "6:2" + serdes_group: "1" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:2" + serdes_group: "0" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "7" + lanes: "6:2" + serdes_group: "0" + speed: "100G" + sysport: "7" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "0:2" + serdes_group: "0" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "3" + lanes: "2:2" + serdes_group: "0" + speed: "100G" + sysport: "3" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/inno.config.yaml new file mode 100755 index 00000000000..66e43d312ef --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_128x100G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/port_config.ini new file mode 100644 index 00000000000..9366905c4eb --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/port_config.ini @@ -0,0 +1,131 @@ +# name lanes speed index mtu +Ethernet0 249,250 100000 0 9126 +Ethernet2 251,252 100000 0 9126 +Ethernet4 253,254 100000 1 9126 +Ethernet6 255,256 100000 1 9126 +Ethernet8 245,246 100000 2 9126 +Ethernet10 247,248 100000 2 9126 +Ethernet12 241,242 100000 3 9126 +Ethernet14 243,244 100000 3 9126 +Ethernet16 233,234 100000 4 9126 +Ethernet18 235,236 100000 4 9126 +Ethernet20 237,238 100000 5 9126 +Ethernet22 239,240 100000 5 9126 +Ethernet24 229,230 100000 6 9126 +Ethernet26 231,232 100000 6 9126 +Ethernet28 225,226 100000 7 9126 +Ethernet30 227,228 100000 7 9126 +Ethernet32 217,218 100000 8 9126 +Ethernet34 219,220 100000 8 9126 +Ethernet36 221,222 100000 9 9126 +Ethernet38 223,224 100000 9 9126 +Ethernet40 213,214 100000 10 9126 +Ethernet42 215,216 100000 10 9126 +Ethernet44 209,210 100000 11 9126 +Ethernet46 211,212 100000 11 9126 +Ethernet48 201,202 100000 12 9126 +Ethernet50 203,204 100000 12 9126 +Ethernet52 205,206 100000 13 9126 +Ethernet54 207,208 100000 13 9126 +Ethernet56 197,198 100000 14 9126 +Ethernet58 199,200 100000 14 9126 +Ethernet60 193,194 100000 15 9126 +Ethernet62 195,196 100000 15 9126 +Ethernet64 185,186 100000 16 9126 +Ethernet66 187,188 100000 16 9126 +Ethernet68 189,190 100000 17 9126 +Ethernet70 191,192 100000 17 9126 +Ethernet72 181,182 100000 18 9126 +Ethernet74 183,184 100000 18 9126 +Ethernet76 177,178 100000 19 9126 +Ethernet78 179,180 100000 19 9126 +Ethernet80 169,170 100000 20 9126 +Ethernet82 171,172 100000 20 9126 +Ethernet84 173,174 100000 21 9126 +Ethernet86 175,176 100000 21 9126 +Ethernet88 165,166 100000 22 9126 +Ethernet90 167,168 100000 22 9126 +Ethernet92 161,162 100000 23 9126 +Ethernet94 163,164 100000 23 9126 +Ethernet96 153,154 100000 24 9126 +Ethernet98 155,156 100000 24 9126 +Ethernet100 157,158 100000 25 9126 +Ethernet102 159,160 100000 25 9126 +Ethernet104 149,150 100000 26 9126 +Ethernet106 151,152 100000 26 9126 +Ethernet108 145,146 100000 27 9126 +Ethernet110 147,148 100000 27 9126 +Ethernet112 137,138 100000 28 9126 +Ethernet114 139,140 100000 28 9126 +Ethernet116 141,142 100000 29 9126 +Ethernet118 143,144 100000 29 9126 +Ethernet120 133,134 100000 30 9126 +Ethernet122 135,136 100000 30 9126 +Ethernet124 129,130 100000 31 9126 +Ethernet126 131,132 100000 31 9126 +Ethernet128 121,122 100000 32 9126 +Ethernet130 123,124 100000 32 9126 +Ethernet132 125,126 100000 33 9126 +Ethernet134 127,128 100000 33 9126 +Ethernet136 117,118 100000 34 9126 +Ethernet138 119,120 100000 34 9126 +Ethernet140 113,114 100000 35 9126 +Ethernet142 115,116 100000 35 9126 +Ethernet144 105,106 100000 36 9126 +Ethernet146 107,108 100000 36 9126 +Ethernet148 109,110 100000 37 9126 +Ethernet150 111,112 100000 37 9126 +Ethernet152 101,102 100000 38 9126 +Ethernet154 103,104 100000 38 9126 +Ethernet156 97,98 100000 39 9126 +Ethernet158 99,100 100000 39 9126 +Ethernet160 89,90 100000 40 9126 +Ethernet162 91,92 100000 40 9126 +Ethernet164 93,94 100000 41 9126 +Ethernet166 95,96 100000 41 9126 +Ethernet168 85,86 100000 42 9126 +Ethernet170 87,88 100000 42 9126 +Ethernet172 81,82 100000 43 9126 +Ethernet174 83,84 100000 43 9126 +Ethernet176 73,74 100000 44 9126 +Ethernet178 75,76 100000 44 9126 +Ethernet180 77,78 100000 45 9126 +Ethernet182 79,80 100000 45 9126 +Ethernet184 69,70 100000 46 9126 +Ethernet186 71,72 100000 46 9126 +Ethernet188 65,66 100000 47 9126 +Ethernet190 67,68 100000 47 9126 +Ethernet192 57,58 100000 48 9126 +Ethernet194 59,60 100000 48 9126 +Ethernet196 61,62 100000 49 9126 +Ethernet198 63,64 100000 49 9126 +Ethernet200 53,54 100000 50 9126 +Ethernet202 55,56 100000 50 9126 +Ethernet204 49,50 100000 51 9126 +Ethernet206 51,52 100000 51 9126 +Ethernet208 41,42 100000 52 9126 +Ethernet210 43,44 100000 52 9126 +Ethernet212 45,46 100000 53 9126 +Ethernet214 47,48 100000 53 9126 +Ethernet216 37,38 100000 54 9126 +Ethernet218 39,40 100000 54 9126 +Ethernet220 33,34 100000 55 9126 +Ethernet222 35,36 100000 55 9126 +Ethernet224 25,26 100000 56 9126 +Ethernet226 27,28 100000 56 9126 +Ethernet228 29,30 100000 57 9126 +Ethernet230 31,32 100000 57 9126 +Ethernet232 21,22 100000 58 9126 +Ethernet234 23,24 100000 58 9126 +Ethernet236 17,18 100000 59 9126 +Ethernet238 19,20 100000 59 9126 +Ethernet240 9,10 100000 60 9126 +Ethernet242 11,12 100000 60 9126 +Ethernet244 13,14 100000 61 9126 +Ethernet246 15,16 100000 61 9126 +Ethernet248 5,6 100000 62 9126 +Ethernet250 7,8 100000 62 9126 +Ethernet252 1,2 100000 63 9126 +Ethernet254 3,4 100000 63 9126 +Ethernet256 257 10000 64 9126 +Ethernet257 258 10000 65 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/qos.json.j2 new file mode 100755 index 00000000000..733bd51dc86 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 128 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/config_32x400G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/config_32x400G_midstone200i.yaml new file mode 100644 index 00000000000..6c387ee17c2 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/config_32x400G_midstone200i.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "257" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/inno.config.yaml new file mode 100755 index 00000000000..bf1c8f41009 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/innovium.77700_A b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/port_config.ini new file mode 100644 index 00000000000..c8ded273cca --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 400000 0 9126 rs +Ethernet8 241,242,243,244 400000 2 9126 rs +Ethernet16 233,234,235,236 400000 4 9126 rs +Ethernet24 225,226,227,228 400000 6 9126 rs +Ethernet32 217,218,219,220 400000 8 9126 rs +Ethernet40 209,210,211,212 400000 10 9126 rs +Ethernet48 201,202,203,204 400000 12 9126 rs +Ethernet56 193,194,195,196 400000 14 9126 rs +Ethernet64 185,186,187,188 400000 16 9126 rs +Ethernet72 177,178,179,180 400000 18 9126 rs +Ethernet80 169,170,171,172 400000 20 9126 rs +Ethernet88 161,162,163,164 400000 22 9126 rs +Ethernet96 153,154,155,156 400000 24 9126 rs +Ethernet104 145,146,147,148 400000 26 9126 rs +Ethernet112 137,138,139,140 400000 28 9126 rs +Ethernet120 129,130,131,132 400000 30 9126 rs +Ethernet128 121,122,123,124 400000 32 9126 rs +Ethernet136 113,114,115,116 400000 34 9126 rs +Ethernet144 105,106,107,108 400000 36 9126 rs +Ethernet152 97,98,99,100 400000 38 9126 rs +Ethernet160 89,90,91,92 400000 40 9126 rs +Ethernet168 81,82,83,84 400000 42 9126 rs +Ethernet176 73,74,75,76 400000 44 9126 rs +Ethernet184 65,66,67,68 400000 46 9126 rs +Ethernet192 57,58,59,60 400000 48 9126 rs +Ethernet200 49,50,51,52 400000 50 9126 rs +Ethernet208 41,42,43,44 400000 52 9126 rs +Ethernet216 33,34,35,36 400000 54 9126 rs +Ethernet224 25,26,27,28 400000 56 9126 rs +Ethernet232 17,18,19,20 400000 58 9126 rs +Ethernet240 9,10,11,12 400000 60 9126 rs +Ethernet248 1,2,3,4 400000 62 9126 rs +Ethernet256 257 10000 64 9126 none +Ethernet257 258 10000 65 9126 none diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/config_64x100G_nrz_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/config_64x100G_nrz_midstone200i.yaml new file mode 100644 index 00000000000..813d012ca3d --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/config_64x100G_nrz_midstone200i.yaml @@ -0,0 +1,785 @@ +ifcs: + options: + log_level: "off" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KRFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "69" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "61" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "53" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "53" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "53" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "37" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "57" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "21" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "61" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "61" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "5" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + admin_state: "true" + loopback: "none" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + admin_state: "true" + loopback: "none" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/inno.config.yaml new file mode 100755 index 00000000000..7dea4565d8e --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_nrz_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/port_config.ini new file mode 100644 index 00000000000..cb862ff9b52 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 100000 0 9126 +Ethernet4 253,254,255,256 100000 1 9126 +Ethernet8 245,246,247,248 100000 2 9126 +Ethernet12 241,242,243,244 100000 3 9126 +Ethernet16 233,234,235,236 100000 4 9126 +Ethernet20 237,238,239,240 100000 5 9126 +Ethernet24 229,230,231,232 100000 6 9126 +Ethernet28 225,226,227,228 100000 7 9126 +Ethernet32 217,218,219,220 100000 8 9126 +Ethernet36 221,222,223,224 100000 9 9126 +Ethernet40 213,214,215,216 100000 10 9126 +Ethernet44 209,210,211,212 100000 11 9126 +Ethernet48 201,202,203,204 100000 12 9126 +Ethernet52 205,206,207,208 100000 13 9126 +Ethernet56 197,198,199,200 100000 14 9126 +Ethernet60 193,194,195,196 100000 15 9126 +Ethernet64 185,186,187,188 100000 16 9126 +Ethernet68 189,190,191,192 100000 17 9126 +Ethernet72 181,182,183,184 100000 18 9126 +Ethernet76 177,178,179,180 100000 19 9126 +Ethernet80 169,170,171,172 100000 20 9126 +Ethernet84 173,174,175,176 100000 21 9126 +Ethernet88 165,166,167,168 100000 22 9126 +Ethernet92 161,162,163,164 100000 23 9126 +Ethernet96 153,154,155,156 100000 24 9126 +Ethernet100 157,158,159,160 100000 25 9126 +Ethernet104 149,150,151,152 100000 26 9126 +Ethernet108 145,146,147,148 100000 27 9126 +Ethernet112 137,138,139,140 100000 28 9126 +Ethernet116 141,142,143,144 100000 29 9126 +Ethernet120 133,134,135,136 100000 30 9126 +Ethernet124 129,130,131,132 100000 31 9126 +Ethernet128 121,122,123,124 100000 32 9126 +Ethernet132 125,126,127,128 100000 33 9126 +Ethernet136 117,118,119,120 100000 34 9126 +Ethernet140 113,114,115,116 100000 35 9126 +Ethernet144 105,106,107,108 100000 36 9126 +Ethernet148 109,110,111,112 100000 37 9126 +Ethernet152 101,102,103,104 100000 38 9126 +Ethernet156 97,98,99,100 100000 39 9126 +Ethernet160 89,90,91,92 100000 40 9126 +Ethernet164 93,94,95,96 100000 41 9126 +Ethernet168 85,86,87,88 100000 42 9126 +Ethernet172 81,82,83,84 100000 43 9126 +Ethernet176 73,74,75,76 100000 44 9126 +Ethernet180 77,78,79,80 100000 45 9126 +Ethernet184 69,70,71,72 100000 46 9126 +Ethernet188 65,66,67,68 100000 47 9126 +Ethernet192 57,58,59,60 100000 48 9126 +Ethernet196 61,62,63,64 100000 49 9126 +Ethernet200 53,54,55,56 100000 50 9126 +Ethernet204 49,50,51,52 100000 51 9126 +Ethernet208 41,42,43,44 100000 52 9126 +Ethernet212 45,46,47,48 100000 53 9126 +Ethernet216 37,38,39,40 100000 54 9126 +Ethernet220 33,34,35,36 100000 55 9126 +Ethernet224 25,26,27,28 100000 56 9126 +Ethernet228 29,30,31,32 100000 57 9126 +Ethernet232 21,22,23,24 100000 58 9126 +Ethernet236 17,18,19,20 100000 59 9126 +Ethernet240 9,10,11,12 100000 60 9126 +Ethernet244 13,14,15,16 100000 61 9126 +Ethernet248 5,6,7,8 100000 62 9126 +Ethernet252 1,2,3,4 100000 63 9126 +Ethernet256 257 10000 64 9126 +Ethernet257 258 10000 65 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/buffers.json.j2 new file mode 100644 index 00000000000..0285e389fd6 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/buffers.json.j2 @@ -0,0 +1,121 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/config_64x100G_nrz_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/config_64x100G_nrz_midstone200i.yaml new file mode 100644 index 00000000000..8fb6a114a46 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/config_64x100G_nrz_midstone200i.yaml @@ -0,0 +1,767 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "bootstrap_lossless" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "65" + type: "cpu" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "1" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "2" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "2" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "3" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "3" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "4" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "4" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "5" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "5" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "6" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "6" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "7" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "7" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "8" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "8" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "9" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "10" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "10" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "11" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "11" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "12" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "12" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "13" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "13" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "14" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "14" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "15" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "15" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "16" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "16" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "17" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "18" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "18" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "19" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "19" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "20" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "20" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "21" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "21" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "22" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "22" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "23" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "23" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "24" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "24" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "25" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "26" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "26" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "27" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "27" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "28" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "28" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "29" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "29" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "30" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "30" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "31" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "31" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "32" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "32" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "33" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "34" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "34" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "35" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "35" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "36" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "36" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "37" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "37" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "38" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "38" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "39" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "39" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "40" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "40" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "41" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "42" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "42" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "43" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "43" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "44" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "44" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "45" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "45" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "46" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "46" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "47" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "47" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "48" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "48" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "49" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "50" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "50" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "51" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "52" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "52" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "53" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "53" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "54" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "54" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "55" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "55" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "56" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "56" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "57" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "58" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "58" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "59" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "59" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "60" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "60" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "61" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "61" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "62" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "62" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "63" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "63" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "64" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "64" + type: "eth" + admin_state: "true" + loopback: "none" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/inno.config.yaml new file mode 100755 index 00000000000..490de1ca3fd --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_nrz_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/port_config.ini new file mode 100644 index 00000000000..462950d390b --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/port_config.ini @@ -0,0 +1,65 @@ +# name lanes speed mtu +Ethernet0 249,250,251,252 100000 9126 +Ethernet4 253,254,255,256 100000 9126 +Ethernet8 245,246,247,248 100000 9126 +Ethernet12 241,242,243,244 100000 9126 +Ethernet16 233,234,235,236 100000 9126 +Ethernet20 237,238,239,240 100000 9126 +Ethernet24 229,230,231,232 100000 9126 +Ethernet28 225,226,227,228 100000 9126 +Ethernet32 217,218,219,220 100000 9126 +Ethernet36 221,222,223,224 100000 9126 +Ethernet40 213,214,215,216 100000 9126 +Ethernet44 209,210,211,212 100000 9126 +Ethernet48 201,202,203,204 100000 9126 +Ethernet52 205,206,207,208 100000 9126 +Ethernet56 197,198,199,200 100000 9126 +Ethernet60 193,194,195,196 100000 9126 +Ethernet64 185,186,187,188 100000 9126 +Ethernet68 189,190,191,192 100000 9126 +Ethernet72 181,182,183,184 100000 9126 +Ethernet76 177,178,179,180 100000 9126 +Ethernet80 169,170,171,172 100000 9126 +Ethernet84 173,174,175,176 100000 9126 +Ethernet88 165,166,167,168 100000 9126 +Ethernet92 161,162,163,164 100000 9126 +Ethernet96 153,154,155,156 100000 9126 +Ethernet100 157,158,159,160 100000 9126 +Ethernet104 149,150,151,152 100000 9126 +Ethernet108 145,146,147,148 100000 9126 +Ethernet112 137,138,139,140 100000 9126 +Ethernet116 141,142,143,144 100000 9126 +Ethernet120 133,134,135,136 100000 9126 +Ethernet124 129,130,131,132 100000 9126 +Ethernet128 121,122,123,124 100000 9126 +Ethernet132 125,126,127,128 100000 9126 +Ethernet136 117,118,119,120 100000 9126 +Ethernet140 113,114,115,116 100000 9126 +Ethernet144 105,106,107,108 100000 9126 +Ethernet148 109,110,111,112 100000 9126 +Ethernet152 101,102,103,104 100000 9126 +Ethernet156 97,98,99,100 100000 9126 +Ethernet160 89,90,91,92 100000 9126 +Ethernet164 93,94,95,96 100000 9126 +Ethernet168 85,86,87,88 100000 9126 +Ethernet172 81,82,83,84 100000 9126 +Ethernet176 73,74,75,76 100000 9126 +Ethernet180 77,78,79,80 100000 9126 +Ethernet184 69,70,71,72 100000 9126 +Ethernet188 65,66,67,68 100000 9126 +Ethernet192 57,58,59,60 100000 9126 +Ethernet196 61,62,63,64 100000 9126 +Ethernet200 53,54,55,56 100000 9126 +Ethernet204 49,50,51,52 100000 9126 +Ethernet208 41,42,43,44 100000 9126 +Ethernet212 45,46,47,48 100000 9126 +Ethernet216 37,38,39,40 100000 9126 +Ethernet220 33,34,35,36 100000 9126 +Ethernet224 25,26,27,28 100000 9126 +Ethernet228 29,30,31,32 100000 9126 +Ethernet232 21,22,23,24 100000 9126 +Ethernet236 17,18,19,20 100000 9126 +Ethernet240 9,10,11,12 100000 9126 +Ethernet244 13,14,15,16 100000 9126 +Ethernet248 5,6,7,8 100000 9126 +Ethernet252 1,2,3,4 100000 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/qos.json.j2 new file mode 100755 index 00000000000..b22aa6ef599 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/qos.json.j2 @@ -0,0 +1,102 @@ +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "Ethernet180,Ethernet8,Ethernet44,Ethernet184,Ethernet188,Ethernet0,Ethernet4,Ethernet108,Ethernet248,Ethernet100,Ethernet244,Ethernet128,Ethernet104,Ethernet240,Ethernet40,Ethernet228,Ethernet96,Ethernet168,Ethernet148,Ethernet204,Ethernet120,Ethernet220,Ethernet144,Ethernet208,Ethernet160,Ethernet224,Ethernet140,Ethernet56,Ethernet164,Ethernet76,Ethernet72,Ethernet32,Ethernet16,Ethernet36,Ethernet12,Ethernet196,Ethernet28,Ethernet192,Ethernet200,Ethernet124,Ethernet24,Ethernet116,Ethernet80,Ethernet112,Ethernet84,Ethernet152,Ethernet136,Ethernet156,Ethernet92,Ethernet132,Ethernet48,Ethernet232,Ethernet172,Ethernet216,Ethernet236,Ethernet176,Ethernet212,Ethernet64,Ethernet88,Ethernet60,Ethernet52,Ethernet20,Ethernet68,Ethernet252": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/config_64x200G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/config_64x200G_midstone200i.yaml new file mode 100644 index 00000000000..7133de54e49 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/config_64x200G_midstone200i.yaml @@ -0,0 +1,653 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "200G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "200G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "200G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "200G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "200G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "200G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "200G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "200G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "200G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "200G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "200G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "200G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "200G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "200G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "200G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "200G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "200G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "200G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "200G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "200G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "200G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "200G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "200G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "200G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "200G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "200G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "200G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "200G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "200G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "200G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "200G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "200G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "200G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "200G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "200G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "200G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "200G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "200G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "200G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "200G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "200G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "200G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 0" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/inno.config.yaml new file mode 100755 index 00000000000..970a5830339 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x200G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/port_config.ini new file mode 100644 index 00000000000..3dcbf72bc32 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 200000 0 9126 rs +Ethernet4 253,254,255,256 200000 1 9126 rs +Ethernet8 245,246,247,248 200000 2 9126 rs +Ethernet12 241,242,243,244 200000 3 9126 rs +Ethernet16 233,234,235,236 200000 4 9126 rs +Ethernet20 237,238,239,240 200000 5 9126 rs +Ethernet24 229,230,231,232 200000 6 9126 rs +Ethernet28 225,226,227,228 200000 7 9126 rs +Ethernet32 217,218,219,220 200000 8 9126 rs +Ethernet36 221,222,223,224 200000 9 9126 rs +Ethernet40 213,214,215,216 200000 10 9126 rs +Ethernet44 209,210,211,212 200000 11 9126 rs +Ethernet48 201,202,203,204 200000 12 9126 rs +Ethernet52 205,206,207,208 200000 13 9126 rs +Ethernet56 197,198,199,200 200000 14 9126 rs +Ethernet60 193,194,195,196 200000 15 9126 rs +Ethernet64 185,186,187,188 200000 16 9126 rs +Ethernet68 189,190,191,192 200000 17 9126 rs +Ethernet72 181,182,183,184 200000 18 9126 rs +Ethernet76 177,178,179,180 200000 19 9126 rs +Ethernet80 169,170,171,172 200000 20 9126 rs +Ethernet84 173,174,175,176 200000 21 9126 rs +Ethernet88 165,166,167,168 200000 22 9126 rs +Ethernet92 161,162,163,164 200000 23 9126 rs +Ethernet96 153,154,155,156 200000 24 9126 rs +Ethernet100 157,158,159,160 200000 25 9126 rs +Ethernet104 149,150,151,152 200000 26 9126 rs +Ethernet108 145,146,147,148 200000 27 9126 rs +Ethernet112 137,138,139,140 200000 28 9126 rs +Ethernet116 141,142,143,144 200000 29 9126 rs +Ethernet120 133,134,135,136 200000 30 9126 rs +Ethernet124 129,130,131,132 200000 31 9126 rs +Ethernet128 121,122,123,124 200000 32 9126 rs +Ethernet132 125,126,127,128 200000 33 9126 rs +Ethernet136 117,118,119,120 200000 34 9126 rs +Ethernet140 113,114,115,116 200000 35 9126 rs +Ethernet144 105,106,107,108 200000 36 9126 rs +Ethernet148 109,110,111,112 200000 37 9126 rs +Ethernet152 101,102,103,104 200000 38 9126 rs +Ethernet156 97,98,99,100 200000 39 9126 rs +Ethernet160 89,90,91,92 200000 40 9126 rs +Ethernet164 93,94,95,96 200000 41 9126 rs +Ethernet168 85,86,87,88 200000 42 9126 rs +Ethernet172 81,82,83,84 200000 43 9126 rs +Ethernet176 73,74,75,76 200000 44 9126 rs +Ethernet180 77,78,79,80 200000 45 9126 rs +Ethernet184 69,70,71,72 200000 46 9126 rs +Ethernet188 65,66,67,68 200000 47 9126 rs +Ethernet192 57,58,59,60 200000 48 9126 rs +Ethernet196 61,62,63,64 200000 49 9126 rs +Ethernet200 53,54,55,56 200000 50 9126 rs +Ethernet204 49,50,51,52 200000 51 9126 rs +Ethernet208 41,42,43,44 200000 52 9126 rs +Ethernet212 45,46,47,48 200000 53 9126 rs +Ethernet216 37,38,39,40 200000 54 9126 rs +Ethernet220 33,34,35,36 200000 55 9126 rs +Ethernet224 25,26,27,28 200000 56 9126 rs +Ethernet228 29,30,31,32 200000 57 9126 rs +Ethernet232 21,22,23,24 200000 58 9126 rs +Ethernet236 17,18,19,20 200000 59 9126 rs +Ethernet240 9,10,11,12 200000 60 9126 rs +Ethernet244 13,14,15,16 200000 61 9126 rs +Ethernet248 5,6,7,8 200000 62 9126 rs +Ethernet252 1,2,3,4 200000 63 9126 rs +Ethernet256 257 10000 64 9126 none +Ethernet257 258 10000 65 9126 none diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/default_sku b/device/celestica/x86_64-cel_midstone-r0/default_sku new file mode 100755 index 00000000000..6fe6e28064b --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/default_sku @@ -0,0 +1 @@ +Midstone-200i t1 diff --git a/device/celestica/x86_64-cel_midstone-r0/fancontrol b/device/celestica/x86_64-cel_midstone-r0/fancontrol new file mode 100755 index 00000000000..e69de29bb2d diff --git a/device/celestica/x86_64-cel_midstone-r0/installer.conf b/device/celestica/x86_64-cel_midstone-r0/installer.conf new file mode 100755 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/celestica/x86_64-cel_midstone-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_midstone-r0/plugins/eeprom.py new file mode 100755 index 00000000000..86e7f1b2af1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Midstone-200i +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/celestica/x86_64-cel_midstone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_midstone-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4e6c5eec5d8 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path +import subprocess + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 1 + return status == 1 + + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 1 + return status == 1 + diff --git a/device/celestica/x86_64-cel_midstone-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_midstone-r0/plugins/sfputil.py new file mode 100755 index 00000000000..4d2a444c198 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/plugins/sfputil.py @@ -0,0 +1,205 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 65 + QSFP_PORT_START = PORT_START + QSFP_PORT_END = 63 + + EEPROM_OFFSET = 1 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.QSFP_PORT_END+1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + if self.port_start == 1: + offset = self.EEPROM_OFFSET - 1 + else: + offset = self.EEPROM_OFFSET + + for x in range(self.port_start, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + offset) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ms200i_cpld/qsfp_modprs") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ms200i_cpld/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ms200i_cpld/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).strip('L') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/ms200i_cpld/qsfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True diff --git a/device/celestica/x86_64-cel_midstone-r0/sensors.conf b/device/celestica/x86_64-cel_midstone-r0/sensors.conf new file mode 100755 index 00000000000..7c9a6321dfc --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/sensors.conf @@ -0,0 +1,2 @@ +# libsensors configuration file for Celestica Midstone-200i. +# The i2c bus portion is omit because adapter name diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py index e69de29bb2d..d82f3749319 100644 --- a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py index 9c9f8a03d8c..91db08f4a61 100644 --- a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py @@ -21,16 +21,22 @@ from sonic_platform.component import Component from sonic_platform.watchdog import Watchdog from sonic_platform.thermal import Thermal + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Tlv except ImportError as e: raise ImportError(str(e) + "- required module not found") -CONFIG_DB_PATH = "/etc/sonic/config_db.json" NUM_FAN = 5 NUM_PSU = 2 NUM_THERMAL = 5 +NUM_SFP = 32 RESET_REGISTER = "0x103" -REBOOT_CAUSE_PATH = "/host/reboot-cause/previous-reboot-cause.txt" +HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/" +PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/" +REBOOT_CAUSE_FILE = "reboot-cause.txt" +PREV_REBOOT_CAUSE_FILE = "previous-reboot-cause.txt" COMPONENT_NAME_LIST = ["CPLD1", "CPLD2", "CPLD3", "CPLD4", "BIOS"] +HOST_CHK_CMD = "docker > /dev/null 2>&1" class Chassis(ChassisBase): @@ -47,17 +53,17 @@ def __init__(self): for index in range(0, NUM_THERMAL): thermal = Thermal(index) self._thermal_list.append(thermal) + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) ChassisBase.__init__(self) + self._component_name_list = COMPONENT_NAME_LIST self._watchdog = Watchdog() + self._eeprom = Tlv() - def __read_config_db(self): - try: - with open(CONFIG_DB_PATH, 'r') as fd: - data = json.load(fd) - return data - except IOError: - raise IOError("Unable to open config_db file !") + def __is_host(self): + return os.system(HOST_CHK_CMD) == 0 def __read_txt_file(self, file_path): try: @@ -65,7 +71,8 @@ def __read_txt_file(self, file_path): data = fd.read() return data.strip() except IOError: - raise IOError("Unable to open %s file !" % file_path) + pass + return None def get_base_mac(self): """ @@ -74,12 +81,25 @@ def get_base_mac(self): A string containing the MAC address in the format 'XX:XX:XX:XX:XX:XX' """ - try: - self.config_data = self.__read_config_db() - base_mac = self.config_data["DEVICE_METADATA"]["localhost"]["mac"] - return str(base_mac) - except KeyError: - return str(None) + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() def get_firmware_version(self, component_name): """ @@ -125,14 +145,27 @@ def get_reboot_cause(self): self.component = Component("CPLD1") description = 'None' reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + + reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE) if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE + prev_reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE) if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE + hw_reboot_cause = self.component.get_register_value(RESET_REGISTER) - sw_reboot_cause = self.__read_txt_file(REBOOT_CAUSE_PATH) - if sw_reboot_cause != "Unexpected reboot": + sw_reboot_cause = self.__read_txt_file( + reboot_cause_path) or "Unknown" + prev_sw_reboot_cause = self.__read_txt_file( + prev_reboot_cause_path) or "Unknown" + + if sw_reboot_cause == "Unknown" and (prev_sw_reboot_cause == "Unknown" or prev_sw_reboot_cause == self.REBOOT_CAUSE_POWER_LOSS) and hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + elif sw_reboot_cause != "Unknown" and hw_reboot_cause == "0x11": reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE description = sw_reboot_cause - elif hw_reboot_cause == "0x11": - reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + elif prev_reboot_cause_path != "Unknown" and hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = prev_sw_reboot_cause elif hw_reboot_cause == "0x22": reboot_cause = self.REBOOT_CAUSE_WATCHDOG, else: diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/eeprom.py new file mode 100644 index 00000000000..1e10848ca43 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/eeprom.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Seastone-DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import glob + import os + import sys + import imp + import re + from array import array + from cStringIO import StringIO + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' + + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-12/12-0050/eeprom" + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + err = self.read_eeprom_db() + if err: + # Failed to read EEPROM information from database. Read from cache file + pass + else: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if status <> 'ok': + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py index 99e86d0a6c6..86eda4cfbe1 100644 --- a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py @@ -17,7 +17,6 @@ except ImportError as e: raise ImportError(str(e) + "- required module not found") -CONFIG_DB_PATH = "/etc/sonic/config_db.json" EMC2305_PATH = "/sys/bus/i2c/drivers/emc2305/" SYS_GPIO_DIR = "/sys/class/gpio" EMC2305_MAX_PWM = 255 diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/sfp.py new file mode 100644 index 00000000000..9275776e0ea --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/sfp.py @@ -0,0 +1,762 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# + +import os +import time +import subprocess +import sonic_device_util +from ctypes import create_string_buffer + +try: + from swsssdk import ConfigDBConnector + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Sfp(SfpBase, SfpUtilBase): + """Platform-specific Sfp class""" + + # Port number + PORT_START = 1 + PORT_END = 32 + PORTS_IN_BLOCK = 32 + + # Offset for values in QSFP info eeprom + QSFP_CONTROL_OFFSET = 86 + QSFP_CONTROL_WIDTH = 8 + QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 + QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 + QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 + QSFP_POWEROVERRIDE_OFFSET = 93 + QSFP_POWEROVERRIDE_WIDTH = 1 + + # Key for values in QSFP eeprom dict + QSFP_EEPROM_TYPE_KEY = "Identifier" + QSFP_EEPROM_HW_REV_KEY = "Vendor Rev" + QSFP_EEPROM_MF_NAME_KEY = "Vendor Name" + QSFP_EEPROM_MODEL_NAME_KEY = "Vendor PN" + QSFP_EEPROM_SERIAL_KEY = "Vendor SN" + QSFP_EEPROM_CONNECTOR_KEY = "Connector" + QSFP_EEPROM_ENCODE_KEY = "Encoding" + QSFP_EEPROM_EXT_IDENT_KEY = "Extended Identifier" + QSFP_EEPROM_EXT_RATE_KEY = "Extended RateSelect Compliance" + QSFP_EEPROM_CABLE_KEY = "Length(km)" + QSFP_EEPROM_BIT_RATE_KEY = "Nominal Bit Rate(100Mbs)" + QSFP_EEPROM_SPEC_COM_KEY = "Specification compliance" + QSFP_EEPROM_DATE_KEY = "Vendor Date Code(YYYY-MM-DD Lot)" + QSFP_EEPROM_OUI_KEY = "Vendor OUI" + + # Path to QSFP sysfs + RESET_PATH = "/sys/devices/platform/dx010_cpld/qsfp_reset" + LP_PATH = "/sys/devices/platform/dx010_cpld/qsfp_lpmode" + PRS_PATH = "/sys/devices/platform/dx010_cpld/qsfp_modprs" + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + PLATFORM = "x86_64-cel_seastone-r0" + HWSKU = "Seastone-DX010" + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(self.LP_PATH, "r") + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = port_num - 1 if self.port_start == 1 else port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + try: + reg_file = open(self.LP_PATH, "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = port_num - 1 if self.port_start == 1 else port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + # LPMode is active high; set or clear the bit accordingly + reg_value = reg_value | mask if lpmode else reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).strip('L') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError + + def __init__(self, sfp_index): + # Init SfpUtilBase + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END + 1): + if self.port_start == 1: + self._port_to_eeprom_mapping[x] = eeprom_path.format( + (x - 1) + 26) + else: + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + 26) + + self.__read_porttab() + SfpUtilBase.__init__(self) + + # Init index + self.index = sfp_index + self.port_num = self.index + 1 + + def __read_porttab(self): + try: + self.read_porttab_mappings(self.__get_path_to_port_config_file()) + except: + pass + + def __is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) + hwsku_path = "/".join([platform_path, self.HWSKU] + ) if self.__is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = None + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % + sysfs_sfp_i2c_client_eeprom_path) + finally: + if sysfsfile_eeprom: + eeprom_raw = self._read_eeprom_specific_bytes( + sysfsfile_eeprom, offset, num_bytes) + sysfsfile_eeprom.close() + return eeprom_raw + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + transceiver_info_dict = dict() + # get eeprom data + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('interface'): + transceiver_info_data = self.eeprom_dict['interface'].get('data') + + # set specification_compliance + spec_com = transceiver_info_data.get( + self.QSFP_EEPROM_SPEC_COM_KEY, {}) + spec_com_str = "/".join(list(spec_com.values())) + + # set normal transceiver info + transceiver_info_dict['type'] = transceiver_info_data.get( + self.QSFP_EEPROM_TYPE_KEY, 'N/A') + transceiver_info_dict['hardwarerev'] = transceiver_info_data.get( + self.QSFP_EEPROM_HW_REV_KEY, 'N/A') + transceiver_info_dict['manufacturename'] = transceiver_info_data.get( + self.QSFP_EEPROM_MF_NAME_KEY, 'N/A') + transceiver_info_dict['modelname'] = transceiver_info_data.get( + self.QSFP_EEPROM_MODEL_NAME_KEY, 'N/A') + transceiver_info_dict['serialnum'] = transceiver_info_data.get( + self.QSFP_EEPROM_SERIAL_KEY, 'N/A') + transceiver_info_dict['Connector'] = transceiver_info_data.get( + self.QSFP_EEPROM_CONNECTOR_KEY, 'N/A') + transceiver_info_dict['encoding'] = transceiver_info_data.get( + self.QSFP_EEPROM_ENCODE_KEY, 'N/A') + transceiver_info_dict['ext_identifier'] = transceiver_info_data.get( + self.QSFP_EEPROM_EXT_IDENT_KEY, 'N/A') + transceiver_info_dict['ext_rateselect_compliance'] = transceiver_info_data.get( + self.QSFP_EEPROM_EXT_RATE_KEY, 'N/A') + transceiver_info_dict['cable_length'] = transceiver_info_data.get( + self.QSFP_EEPROM_CABLE_KEY, 'N/A') + transceiver_info_dict['vendor_date'] = transceiver_info_data.get( + self.QSFP_EEPROM_DATE_KEY, 'N/A') + transceiver_info_dict['vendor_oui'] = transceiver_info_data.get( + self.QSFP_EEPROM_OUI_KEY, 'N/A') + transceiver_info_dict['nominal_bit_rate'] = transceiver_info_data.get( + self.QSFP_EEPROM_BIT_RATE_KEY, 'N/A') + transceiver_info_dict['specification_compliance'] = spec_com_str or "N/A" + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + RX LOS |BOOLEAN |RX lost-of-signal status, + | |True if has RX los, False if not. + TX FAULT |BOOLEAN |TX fault status, + | |True if has TX fault, False if not. + Reset status |BOOLEAN |reset status, + | |True if SFP in reset, False if not. + LP mode |BOOLEAN |low power mode status, + | |True in lp mode, False if not. + TX disable |BOOLEAN |TX disable status, + | |True TX disabled, False if not. + TX disabled channel |HEX |disabled TX channles in hex, + | |bits 0 to 3 represent channel 0 + | |to channel 3. + Temperature |INT |module temperature in Celsius + Voltage |INT |supply voltage in mV + TX bias |INT |TX Bias Current in mA + RX power |INT |received optical power in mW + TX power |INT |TX output power in mW + ======================================================================== + """ + transceiver_dom_info_dict = dict() + self.eeprom_dict = self.get_eeprom_dict(self.port_num) + if self.eeprom_dict and self.eeprom_dict.get('dom'): + transceiver_dom_data = self.eeprom_dict['dom'].get('data', {}) + transceiver_dom_data_mmv = transceiver_dom_data.get( + "ModuleMonitorValues") + transceiver_dom_data_cmv = transceiver_dom_data.get( + "ChannelMonitorValues") + transceiver_dom_info_dict['temperature'] = transceiver_dom_data_mmv.get( + 'Temperature', 'N/A') + transceiver_dom_info_dict['voltage'] = transceiver_dom_data_mmv.get( + 'Vcc', 'N/A') + transceiver_dom_info_dict['rx1power'] = transceiver_dom_data_cmv.get( + 'RX1Power', 'N/A') + transceiver_dom_info_dict['rx2power'] = transceiver_dom_data_cmv.get( + 'RX2Power', 'N/A') + transceiver_dom_info_dict['rx3power'] = transceiver_dom_data_cmv.get( + 'RX3Power', 'N/A') + transceiver_dom_info_dict['rx4power'] = transceiver_dom_data_cmv.get( + 'RX4Power', 'N/A') + transceiver_dom_info_dict['tx1bias'] = transceiver_dom_data_cmv.get( + 'TX1Bias', 'N/A') + transceiver_dom_info_dict['tx2bias'] = transceiver_dom_data_cmv.get( + 'TX2Bias', 'N/A') + transceiver_dom_info_dict['tx3bias'] = transceiver_dom_data_cmv.get( + 'TX3Bias', 'N/A') + transceiver_dom_info_dict['tx4bias'] = transceiver_dom_data_cmv.get( + 'TX4Bias', 'N/A') + transceiver_dom_info_dict['tx1power'] = transceiver_dom_data_cmv.get( + 'TX1Power', 'N/A') + transceiver_dom_info_dict['tx2power'] = transceiver_dom_data_cmv.get( + 'TX2Power', 'N/A') + transceiver_dom_info_dict['tx3power'] = transceiver_dom_data_cmv.get( + 'TX3Power', 'N/A') + transceiver_dom_info_dict['tx4power'] = transceiver_dom_data_cmv.get( + 'TX4Power', 'N/A') + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self._convert_string_to_num( + transceiver_dom_info_dict[key]) + + return transceiver_dom_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + try: + reg_file = open(self.RESET_PATH, "r") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + bin_format = bin(reg_value)[2:].zfill(32) + return bin_format[::-1][self.index] == '0' + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los_list = [] + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + self.QSFP_CHANNL_RX_LOS_STATUS_OFFSET, self.QSFP_CHANNL_RX_LOS_STATUS_WIDTH) if self.get_presence() else None + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + return rx_los_list + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault_list = [] + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + self.QSFP_CHANNL_TX_FAULT_STATUS_OFFSET, self.QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) if self.get_presence() else None + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + return tx_fault_list + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return False + + dom_control_raw = self.__read_eeprom_specific_bytes( + self.QSFP_CONTROL_OFFSET, self.QSFP_CONTROL_WIDTH) if self.get_presence() else None + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX4Disable']['value']) + + return tx_disable_list + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_list = self.get_tx_disable() + if tx_disable_list is None: + return 0 + tx_disabled = 0 + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disabled |= 1 << i + return tx_disabled + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + return self.get_low_power_mode(self.port_num) + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + power_override = False + + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return False + + dom_control_raw = self.__read_eeprom_specific_bytes( + self.QSFP_CONTROL_OFFSET, self.QSFP_CONTROL_WIDTH) if self.get_presence() else None + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + power_override = ( + 'On' == dom_control_data['data']['PowerOverride']['value']) + + return power_override + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + tx2_bs = transceiver_dom_info_dict.get("tx2bias", "N/A") + tx3_bs = transceiver_dom_info_dict.get("tx3bias", "N/A") + tx4_bs = transceiver_dom_info_dict.get("tx4bias", "N/A") + return [tx1_bs, tx2_bs, tx3_bs, tx4_bs] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + rx2_pw = transceiver_dom_info_dict.get("rx2power", "N/A") + rx3_pw = transceiver_dom_info_dict.get("rx3power", "N/A") + rx4_pw = transceiver_dom_info_dict.get("rx4power", "N/A") + return [rx1_pw, rx2_pw, rx3_pw, rx4_pw] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + tx2_pw = transceiver_dom_info_dict.get("tx2power", "N/A") + tx3_pw = transceiver_dom_info_dict.get("tx3power", "N/A") + tx4_pw = transceiver_dom_info_dict.get("tx4power", "N/A") + return [tx1_pw, tx2_pw, tx3_pw, tx4_pw] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # Check for invalid port_num + + try: + reg_file = open(self.RESET_PATH, "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the + # register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.port_num - 1 if self.port_start == 1 else self.port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(self.RESET_PATH, "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfsfile_eeprom = None + try: + tx_disable_ctl = 0xf if tx_disable else 0x0 + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(self.QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + Returns: + A boolean, True if successful, False if not + """ + sysfsfile_eeprom = None + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[ + channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(self.QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + return self.set_low_power_mode(self.port_num, lpmode) + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(self.QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self.logical[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + try: + reg_file = open(self.PRS_PATH, "r") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.port_num - 1 if self.port_start == 1 else self.port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("serialnum", "N/A") diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py index 43390dce830..1e0a2c4b564 100644 --- a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py @@ -37,18 +37,16 @@ def __init__(self, thermal_index): # Set hwmon path i2c_path = { - 0: "i2c-5/5-0048", # u4 system-inlet - 1: "i2c-6/6-0049", # u2 system-inlet - 2: "i2c-7/7-004a", # u44 bmc56960-on-board - 3: "i2c-14/14-0048", # u9200 cpu-on-board - 4: "i2c-15/15-004e" # u9201 system-outlet + 0: "i2c-5/5-0048/hwmon/hwmon1", # u4 system-inlet + 1: "i2c-6/6-0049/hwmon/hwmon2", # u2 system-inlet + 2: "i2c-7/7-004a/hwmon/hwmon3", # u44 bmc56960-on-board + 3: "i2c-14/14-0048/hwmon/hwmon4", # u9200 cpu-on-board + 4: "i2c-15/15-004e/hwmon/hwmon5" # u9201 system-outlet }.get(self.index, None) - self.ss_path = "{}/{}/hwmon".format(self.I2C_ADAPTER_PATH, i2c_path) + self.hwmon_path = "{}/{}".format(self.I2C_ADAPTER_PATH, i2c_path) self.ss_key = self.THERMAL_NAME_LIST[self.index] self.ss_index = 1 - self.hwmon_name = os.listdir(self.ss_path)[0] - self.hwmon_path = os.path.join(self.ss_path, self.hwmon_name) def __read_txt_file(self, file_path): try: @@ -56,7 +54,7 @@ def __read_txt_file(self, file_path): data = fd.read() return data.strip() except IOError: - raise IOError("Unable to open %s file !" % file_path) + pass def __get_temp(self, temp_file): temp_file_path = os.path.join(self.hwmon_path, temp_file) diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/bin/S6100-BIOS-3.25.0.2-7.bin b/device/dell/x86_64-dell_s6100_c2538-r0/bin/S6100-BIOS-3.25.0.2-7.bin new file mode 100644 index 00000000000..e6371a2602d Binary files /dev/null and b/device/dell/x86_64-dell_s6100_c2538-r0/bin/S6100-BIOS-3.25.0.2-7.bin differ diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/config_32x400G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/config_32x400G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..2ba23d2a5a6 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/config_32x400G_Delta-et-c032if.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/inno.config.yaml new file mode 100755 index 00000000000..360b5af8e60 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/innovium.77700_A b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/port_config.ini new file mode 100755 index 00000000000..360e363f485 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 400000 0 9126 rs +Ethernet8 241,242,243,244 400000 1 9126 rs +Ethernet16 233,234,235,236 400000 2 9126 rs +Ethernet24 225,226,227,228 400000 3 9126 rs +Ethernet32 217,218,219,220 400000 4 9126 rs +Ethernet40 209,210,211,212 400000 5 9126 rs +Ethernet48 201,202,203,204 400000 6 9126 rs +Ethernet56 193,194,195,196 400000 7 9126 rs +Ethernet64 185,186,187,188 400000 8 9126 rs +Ethernet72 177,178,179,180 400000 9 9126 rs +Ethernet80 169,170,171,172 400000 10 9126 rs +Ethernet88 161,162,163,164 400000 11 9126 rs +Ethernet96 153,154,155,156 400000 12 9126 rs +Ethernet104 145,146,147,148 400000 13 9126 rs +Ethernet112 137,138,139,140 400000 14 9126 rs +Ethernet120 129,130,131,132 400000 15 9126 rs +Ethernet128 121,122,123,124 400000 16 9126 rs +Ethernet136 113,114,115,116 400000 17 9126 rs +Ethernet144 97,98,99,100 400000 18 9126 rs +Ethernet152 105,106,107,108 400000 19 9126 rs +Ethernet160 81,82,83,84 400000 20 9126 rs +Ethernet168 89,90,91,92 400000 21 9126 rs +Ethernet176 65,66,67,68 400000 22 9126 rs +Ethernet184 73,74,75,76 400000 23 9126 rs +Ethernet192 49,50,51,52 400000 24 9126 rs +Ethernet200 57,58,59,60 400000 25 9126 rs +Ethernet208 33,34,35,36 400000 26 9126 rs +Ethernet216 41,42,43,44 400000 27 9126 rs +Ethernet224 17,18,19,20 400000 28 9126 rs +Ethernet232 25,26,27,28 400000 29 9126 rs +Ethernet240 1,2,3,4 400000 30 9126 rs +Ethernet248 9,10,11,12 400000 31 9126 rs +Ethernet256 257 10000 32 9126 none +Ethernet257 258 10000 33 9126 none diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/buffers.json.j2 new file mode 100644 index 00000000000..9529fbf52fb --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 128 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/config_128x100G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/config_128x100G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..ad50fd04c2a --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/config_128x100G_Delta-et-c032if.yaml @@ -0,0 +1,1102 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:2" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "251" + lanes: "2:2" + serdes_group: "31" + speed: "100G" + sysport: "251" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:2" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "255" + lanes: "6:2" + serdes_group: "31" + speed: "100G" + sysport: "255" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:2" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "243" + lanes: "2:2" + serdes_group: "30" + speed: "100G" + sysport: "243" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:2" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "247" + lanes: "6:2" + serdes_group: "30" + speed: "100G" + sysport: "247" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:2" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "235" + lanes: "2:2" + serdes_group: "29" + speed: "100G" + sysport: "235" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:2" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "239" + lanes: "6:2" + serdes_group: "29" + speed: "100G" + sysport: "239" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:2" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "227" + lanes: "2:2" + serdes_group: "28" + speed: "100G" + sysport: "227" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:2" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "231" + lanes: "6:2" + serdes_group: "28" + speed: "100G" + sysport: "231" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:2" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "219" + lanes: "2:2" + serdes_group: "27" + speed: "100G" + sysport: "219" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:2" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "223" + lanes: "6:2" + serdes_group: "27" + speed: "100G" + sysport: "223" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:2" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "211" + lanes: "2:2" + serdes_group: "26" + speed: "100G" + sysport: "211" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:2" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "215" + lanes: "6:2" + serdes_group: "26" + speed: "100G" + sysport: "215" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:2" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "203" + lanes: "2:2" + serdes_group: "25" + speed: "100G" + sysport: "203" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:2" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "207" + lanes: "6:2" + serdes_group: "25" + speed: "100G" + sysport: "207" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:2" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "195" + lanes: "2:2" + serdes_group: "24" + speed: "100G" + sysport: "195" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:2" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "199" + lanes: "6:2" + serdes_group: "24" + speed: "100G" + sysport: "199" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:2" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "187" + lanes: "2:2" + serdes_group: "23" + speed: "100G" + sysport: "187" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:2" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "191" + lanes: "6:2" + serdes_group: "23" + speed: "100G" + sysport: "191" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:2" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "179" + lanes: "2:2" + serdes_group: "22" + speed: "100G" + sysport: "179" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:2" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "183" + lanes: "6:2" + serdes_group: "22" + speed: "100G" + sysport: "183" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:2" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "171" + lanes: "2:2" + serdes_group: "21" + speed: "100G" + sysport: "171" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:2" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "175" + lanes: "6:2" + serdes_group: "21" + speed: "100G" + sysport: "175" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:2" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "163" + lanes: "2:2" + serdes_group: "20" + speed: "100G" + sysport: "163" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:2" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "167" + lanes: "6:2" + serdes_group: "20" + speed: "100G" + sysport: "167" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:2" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "155" + lanes: "2:2" + serdes_group: "19" + speed: "100G" + sysport: "155" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:2" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "159" + lanes: "6:2" + serdes_group: "19" + speed: "100G" + sysport: "159" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:2" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "147" + lanes: "2:2" + serdes_group: "18" + speed: "100G" + sysport: "147" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:2" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "151" + lanes: "6:2" + serdes_group: "18" + speed: "100G" + sysport: "151" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:2" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "139" + lanes: "2:2" + serdes_group: "17" + speed: "100G" + sysport: "139" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:2" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "143" + lanes: "6:2" + serdes_group: "17" + speed: "100G" + sysport: "143" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:2" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "131" + lanes: "2:2" + serdes_group: "16" + speed: "100G" + sysport: "131" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:2" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "135" + lanes: "6:2" + serdes_group: "16" + speed: "100G" + sysport: "135" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:2" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "2:2" + serdes_group: "15" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:2" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "6:2" + serdes_group: "15" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "2:2" + serdes_group: "14" + speed: "100G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "6:2" + serdes_group: "14" + speed: "100G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "2:2" + serdes_group: "12" + speed: "100G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "6:2" + serdes_group: "12" + speed: "100G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:2" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "107" + lanes: "2:2" + serdes_group: "13" + speed: "100G" + sysport: "107" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:2" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "6:2" + serdes_group: "13" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:2" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "83" + lanes: "2:2" + serdes_group: "10" + speed: "100G" + sysport: "83" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:2" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "6:2" + serdes_group: "10" + speed: "100G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "2:2" + serdes_group: "11" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "6:2" + serdes_group: "11" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:2" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "67" + lanes: "2:2" + serdes_group: "8" + speed: "100G" + sysport: "67" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:2" + serdes_group: "8" + speed: "100G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "71" + lanes: "6:2" + serdes_group: "8" + speed: "100G" + sysport: "71" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:2" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "75" + lanes: "2:2" + serdes_group: "9" + speed: "100G" + sysport: "75" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:2" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "79" + lanes: "6:2" + serdes_group: "9" + speed: "100G" + sysport: "79" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:2" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "51" + lanes: "2:2" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:2" + serdes_group: "6" + speed: "100G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "55" + lanes: "6:2" + serdes_group: "6" + speed: "100G" + sysport: "55" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:2" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "59" + lanes: "2:2" + serdes_group: "7" + speed: "100G" + sysport: "59" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:2" + serdes_group: "7" + speed: "100G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "63" + lanes: "6:2" + serdes_group: "7" + speed: "100G" + sysport: "63" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:2" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "35" + lanes: "2:2" + serdes_group: "4" + speed: "100G" + sysport: "35" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:2" + serdes_group: "4" + speed: "100G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "39" + lanes: "6:2" + serdes_group: "4" + speed: "100G" + sysport: "39" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:2" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "43" + lanes: "2:2" + serdes_group: "5" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:2" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "47" + lanes: "6:2" + serdes_group: "5" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:2" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "19" + lanes: "2:2" + serdes_group: "2" + speed: "100G" + sysport: "19" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:2" + serdes_group: "2" + speed: "100G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "23" + lanes: "6:2" + serdes_group: "2" + speed: "100G" + sysport: "23" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:2" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "27" + lanes: "2:2" + serdes_group: "3" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:2" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "31" + lanes: "6:2" + serdes_group: "3" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:2" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "3" + lanes: "2:2" + serdes_group: "0" + speed: "100G" + sysport: "3" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:2" + serdes_group: "0" + speed: "100G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "7" + lanes: "6:2" + serdes_group: "0" + speed: "100G" + sysport: "7" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:2" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "11" + lanes: "2:2" + serdes_group: "1" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:2" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "15" + lanes: "6:2" + serdes_group: "1" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/inno.config.yaml new file mode 100755 index 00000000000..17f3e060d71 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_128x100G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/port_config.ini new file mode 100644 index 00000000000..cd4dbc611ec --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/port_config.ini @@ -0,0 +1,131 @@ +# name lanes speed index mtu +Ethernet0 249,250 100000 0 9126 +Ethernet2 251,252 100000 0 9126 +Ethernet4 253,254 100000 0 9126 +Ethernet6 255,256 100000 0 9126 +Ethernet8 241,242 100000 1 9126 +Ethernet10 243,244 100000 1 9126 +Ethernet12 245,246 100000 1 9126 +Ethernet14 247,248 100000 1 9126 +Ethernet16 233,234 100000 2 9126 +Ethernet18 235,236 100000 2 9126 +Ethernet20 237,238 100000 2 9126 +Ethernet22 239,240 100000 2 9126 +Ethernet24 225,226 100000 3 9126 +Ethernet26 227,228 100000 3 9126 +Ethernet28 229,230 100000 3 9126 +Ethernet30 231,232 100000 3 9126 +Ethernet32 217,218 100000 4 9126 +Ethernet34 219,220 100000 4 9126 +Ethernet36 221,222 100000 4 9126 +Ethernet38 223,224 100000 4 9126 +Ethernet40 209,210 100000 5 9126 +Ethernet42 211,212 100000 5 9126 +Ethernet44 213,214 100000 5 9126 +Ethernet46 215,216 100000 5 9126 +Ethernet48 201,202 100000 6 9126 +Ethernet50 203,204 100000 6 9126 +Ethernet52 205,206 100000 6 9126 +Ethernet54 207,208 100000 6 9126 +Ethernet56 193,194 100000 7 9126 +Ethernet58 195,196 100000 7 9126 +Ethernet60 197,198 100000 7 9126 +Ethernet62 199,200 100000 7 9126 +Ethernet64 185,186 100000 8 9126 +Ethernet66 187,188 100000 8 9126 +Ethernet68 189,190 100000 8 9126 +Ethernet70 191,192 100000 8 9126 +Ethernet72 177,178 100000 9 9126 +Ethernet74 179,180 100000 9 9126 +Ethernet76 181,182 100000 9 9126 +Ethernet78 183,184 100000 9 9126 +Ethernet80 169,170 100000 10 9126 +Ethernet82 171,172 100000 10 9126 +Ethernet84 173,174 100000 10 9126 +Ethernet86 175,176 100000 10 9126 +Ethernet88 161,162 100000 11 9126 +Ethernet90 163,164 100000 11 9126 +Ethernet92 165,166 100000 11 9126 +Ethernet94 167,168 100000 11 9126 +Ethernet96 153,154 100000 12 9126 +Ethernet98 155,156 100000 12 9126 +Ethernet100 157,158 100000 12 9126 +Ethernet102 159,160 100000 12 9126 +Ethernet104 145,146 100000 13 9126 +Ethernet106 147,148 100000 13 9126 +Ethernet108 149,150 100000 13 9126 +Ethernet110 151,152 100000 13 9126 +Ethernet112 137,138 100000 14 9126 +Ethernet114 139,140 100000 14 9126 +Ethernet116 141,142 100000 14 9126 +Ethernet118 143,144 100000 14 9126 +Ethernet120 129,130 100000 15 9126 +Ethernet122 131,132 100000 15 9126 +Ethernet124 133,134 100000 15 9126 +Ethernet126 135,136 100000 15 9126 +Ethernet128 121,122 100000 16 9126 +Ethernet130 123,124 100000 16 9126 +Ethernet132 125,126 100000 16 9126 +Ethernet134 127,128 100000 16 9126 +Ethernet136 113,114 100000 17 9126 +Ethernet138 115,116 100000 17 9126 +Ethernet140 117,118 100000 17 9126 +Ethernet142 119,120 100000 17 9126 +Ethernet144 97,98 100000 18 9126 +Ethernet146 99,100 100000 18 9126 +Ethernet148 101,102 100000 18 9126 +Ethernet150 103,104 100000 18 9126 +Ethernet152 105,106 100000 19 9126 +Ethernet154 107,108 100000 19 9126 +Ethernet156 109,110 100000 19 9126 +Ethernet158 111,112 100000 19 9126 +Ethernet160 81,82 100000 20 9126 +Ethernet162 83,84 100000 20 9126 +Ethernet164 85,86 100000 20 9126 +Ethernet166 87,88 100000 20 9126 +Ethernet168 89,90 100000 21 9126 +Ethernet170 91,92 100000 21 9126 +Ethernet172 93,94 100000 21 9126 +Ethernet174 95,96 100000 21 9126 +Ethernet176 65,66 100000 22 9126 +Ethernet178 67,68 100000 22 9126 +Ethernet180 69,70 100000 22 9126 +Ethernet182 71,72 100000 22 9126 +Ethernet184 73,74 100000 23 9126 +Ethernet186 75,76 100000 23 9126 +Ethernet188 77,78 100000 23 9126 +Ethernet190 79,80 100000 23 9126 +Ethernet192 49,50 100000 24 9126 +Ethernet194 51,52 100000 24 9126 +Ethernet196 53,54 100000 24 9126 +Ethernet198 55,56 100000 24 9126 +Ethernet200 57,58 100000 25 9126 +Ethernet202 59,60 100000 25 9126 +Ethernet204 61,62 100000 25 9126 +Ethernet206 63,64 100000 25 9126 +Ethernet208 33,34 100000 26 9126 +Ethernet210 35,36 100000 26 9126 +Ethernet212 37,38 100000 26 9126 +Ethernet214 39,40 100000 26 9126 +Ethernet216 41,42 100000 27 9126 +Ethernet218 43,44 100000 27 9126 +Ethernet220 45,46 100000 27 9126 +Ethernet222 47,48 100000 27 9126 +Ethernet224 17,18 100000 28 9126 +Ethernet226 19,20 100000 28 9126 +Ethernet228 21,22 100000 28 9126 +Ethernet230 23,24 100000 28 9126 +Ethernet232 25,26 100000 29 9126 +Ethernet234 27,28 100000 29 9126 +Ethernet236 29,30 100000 29 9126 +Ethernet238 31,32 100000 29 9126 +Ethernet240 1,2 100000 30 9126 +Ethernet242 3,4 100000 30 9126 +Ethernet244 5,6 100000 30 9126 +Ethernet246 7,8 100000 30 9126 +Ethernet248 9,10 100000 31 9126 +Ethernet250 11,12 100000 31 9126 +Ethernet252 13,14 100000 31 9126 +Ethernet254 15,16 100000 31 9126 +Ethernet256 257 10000 32 9126 +Ethernet257 258 10000 33 9126 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/qos.json.j2 new file mode 100755 index 00000000000..733bd51dc86 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 128 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/config_32x100G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/config_32x100G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..4b4f02da489 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/config_32x100G_Delta-et-c032if.yaml @@ -0,0 +1,415 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KRFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KRFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KRFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KRFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KRFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KRFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KRFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KRFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KRFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KRFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KRFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KRFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KRFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KRFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KRFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KRFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KRFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KRFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KRFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KRFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KRFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + - fec: "KRFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KRFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + - fec: "KRFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/inno.config.yaml new file mode 100755 index 00000000000..9350e166634 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x100G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_A b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/port_config.ini new file mode 100755 index 00000000000..45fbfd346c9 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/port_config.ini @@ -0,0 +1,33 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 100000 0 9126 rs +Ethernet8 241,242,243,244 100000 1 9126 rs +Ethernet16 233,234,235,236 100000 2 9126 rs +Ethernet24 225,226,227,228 100000 3 9126 rs +Ethernet32 217,218,219,220 100000 4 9126 rs +Ethernet40 209,210,211,212 100000 5 9126 rs +Ethernet48 201,202,203,204 100000 6 9126 rs +Ethernet56 193,194,195,196 100000 7 9126 rs +Ethernet64 185,186,187,188 100000 8 9126 rs +Ethernet72 177,178,179,180 100000 9 9126 rs +Ethernet80 169,170,171,172 100000 10 9126 rs +Ethernet88 161,162,163,164 100000 11 9126 rs +Ethernet96 153,154,155,156 100000 12 9126 rs +Ethernet104 145,146,147,148 100000 13 9126 rs +Ethernet112 137,138,139,140 100000 14 9126 rs +Ethernet120 129,130,131,132 100000 15 9126 rs +Ethernet128 121,122,123,124 100000 16 9126 rs +Ethernet136 113,114,115,116 100000 17 9126 rs +Ethernet144 97,98,99,100 100000 18 9126 rs +Ethernet152 105,106,107,108 100000 19 9126 rs +Ethernet160 81,82,83,84 100000 20 9126 rs +Ethernet168 89,90,91,92 100000 21 9126 rs +Ethernet176 65,66,67,68 100000 22 9126 rs +Ethernet184 73,74,75,76 100000 23 9126 rs +Ethernet192 49,50,51,52 100000 24 9126 rs +Ethernet200 57,58,59,60 100000 25 9126 rs +Ethernet208 33,34,35,36 100000 26 9126 rs +Ethernet216 41,42,43,44 100000 27 9126 rs +Ethernet224 17,18,19,20 100000 28 9126 rs +Ethernet232 25,26,27,28 100000 29 9126 rs +Ethernet240 1,2,3,4 100000 30 9126 rs +Ethernet248 9,10,11,12 100000 31 9126 rs diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/config_32x200G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/config_32x200G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..0a76811110e --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/config_32x200G_Delta-et-c032if.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "200G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "200G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "200G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "200G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "200G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "200G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "200G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "200G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "200G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "200G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/inno.config.yaml new file mode 100755 index 00000000000..9bc0114cf69 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x200G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/port_config.ini new file mode 100755 index 00000000000..48091f5e367 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 200000 0 9126 rs +Ethernet8 241,242,243,244 200000 1 9126 rs +Ethernet16 233,234,235,236 200000 2 9126 rs +Ethernet24 225,226,227,228 200000 3 9126 rs +Ethernet32 217,218,219,220 200000 4 9126 rs +Ethernet40 209,210,211,212 200000 5 9126 rs +Ethernet48 201,202,203,204 200000 6 9126 rs +Ethernet56 193,194,195,196 200000 7 9126 rs +Ethernet64 185,186,187,188 200000 8 9126 rs +Ethernet72 177,178,179,180 200000 9 9126 rs +Ethernet80 169,170,171,172 200000 10 9126 rs +Ethernet88 161,162,163,164 200000 11 9126 rs +Ethernet96 153,154,155,156 200000 12 9126 rs +Ethernet104 145,146,147,148 200000 13 9126 rs +Ethernet112 137,138,139,140 200000 14 9126 rs +Ethernet120 129,130,131,132 200000 15 9126 rs +Ethernet128 121,122,123,124 200000 16 9126 rs +Ethernet136 113,114,115,116 200000 17 9126 rs +Ethernet144 97,98,99,100 200000 18 9126 rs +Ethernet152 105,106,107,108 200000 19 9126 rs +Ethernet160 81,82,83,84 200000 20 9126 rs +Ethernet168 89,90,91,92 200000 21 9126 rs +Ethernet176 65,66,67,68 200000 22 9126 rs +Ethernet184 73,74,75,76 200000 23 9126 rs +Ethernet192 49,50,51,52 200000 24 9126 rs +Ethernet200 57,58,59,60 200000 25 9126 rs +Ethernet208 33,34,35,36 200000 26 9126 rs +Ethernet216 41,42,43,44 200000 27 9126 rs +Ethernet224 17,18,19,20 200000 28 9126 rs +Ethernet232 25,26,27,28 200000 29 9126 rs +Ethernet240 1,2,3,4 200000 30 9126 rs +Ethernet248 9,10,11,12 200000 31 9126 rs +Ethernet256 257 10000 32 9126 none +Ethernet257 258 10000 33 9126 none diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/config_32x400G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/config_32x400G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..2ba23d2a5a6 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/config_32x400G_Delta-et-c032if.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/inno.config.yaml new file mode 100755 index 00000000000..360b5af8e60 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_A b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/port_config.ini new file mode 100755 index 00000000000..360e363f485 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 400000 0 9126 rs +Ethernet8 241,242,243,244 400000 1 9126 rs +Ethernet16 233,234,235,236 400000 2 9126 rs +Ethernet24 225,226,227,228 400000 3 9126 rs +Ethernet32 217,218,219,220 400000 4 9126 rs +Ethernet40 209,210,211,212 400000 5 9126 rs +Ethernet48 201,202,203,204 400000 6 9126 rs +Ethernet56 193,194,195,196 400000 7 9126 rs +Ethernet64 185,186,187,188 400000 8 9126 rs +Ethernet72 177,178,179,180 400000 9 9126 rs +Ethernet80 169,170,171,172 400000 10 9126 rs +Ethernet88 161,162,163,164 400000 11 9126 rs +Ethernet96 153,154,155,156 400000 12 9126 rs +Ethernet104 145,146,147,148 400000 13 9126 rs +Ethernet112 137,138,139,140 400000 14 9126 rs +Ethernet120 129,130,131,132 400000 15 9126 rs +Ethernet128 121,122,123,124 400000 16 9126 rs +Ethernet136 113,114,115,116 400000 17 9126 rs +Ethernet144 97,98,99,100 400000 18 9126 rs +Ethernet152 105,106,107,108 400000 19 9126 rs +Ethernet160 81,82,83,84 400000 20 9126 rs +Ethernet168 89,90,91,92 400000 21 9126 rs +Ethernet176 65,66,67,68 400000 22 9126 rs +Ethernet184 73,74,75,76 400000 23 9126 rs +Ethernet192 49,50,51,52 400000 24 9126 rs +Ethernet200 57,58,59,60 400000 25 9126 rs +Ethernet208 33,34,35,36 400000 26 9126 rs +Ethernet216 41,42,43,44 400000 27 9126 rs +Ethernet224 17,18,19,20 400000 28 9126 rs +Ethernet232 25,26,27,28 400000 29 9126 rs +Ethernet240 1,2,3,4 400000 30 9126 rs +Ethernet248 9,10,11,12 400000 31 9126 rs +Ethernet256 257 10000 32 9126 none +Ethernet257 258 10000 33 9126 none diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/config_64x100G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/config_64x100G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..e5fbcc93543 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/config_64x100G_Delta-et-c032if.yaml @@ -0,0 +1,653 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KRFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KRFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KRFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KRFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + - fec: "KRFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KRFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KRFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KRFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KRFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KRFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + - fec: "KRFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KRFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + - fec: "KRFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KRFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KRFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KRFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + - fec: "KRFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KRFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + - fec: "KRFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KRFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + - fec: "KRFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KRFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KRFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KRFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + - fec: "KRFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KRFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + - fec: "KRFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KRFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KRFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KRFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + - fec: "KRFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KRFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + - fec: "KRFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KRFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KRFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KRFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KRFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KRFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KRFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KRFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KRFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + - fec: "KRFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + - fec: "KRFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KRFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KRFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + - fec: "KRFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "69" + type: "eth" + - fec: "KRFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KRFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KRFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "53" + type: "eth" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KRFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "61" + type: "eth" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KRFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "37" + type: "eth" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KRFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KRFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "21" + type: "eth" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KRFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KRFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "5" + type: "eth" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KRFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/inno.config.yaml new file mode 100755 index 00000000000..d44c7bc0bc2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/port_config.ini new file mode 100644 index 00000000000..9999a677da4 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 100000 0 9126 +Ethernet4 253,254,255,256 100000 0 9126 +Ethernet8 241,242,243,244 100000 1 9126 +Ethernet12 245,246,247,248 100000 1 9126 +Ethernet16 233,234,235,236 100000 2 9126 +Ethernet20 237,238,239,240 100000 2 9126 +Ethernet24 225,226,227,228 100000 3 9126 +Ethernet28 229,230,231,232 100000 3 9126 +Ethernet32 217,218,219,220 100000 4 9126 +Ethernet36 221,222,223,224 100000 4 9126 +Ethernet40 209,210,211,212 100000 5 9126 +Ethernet44 213,214,215,216 100000 5 9126 +Ethernet48 201,202,203,204 100000 6 9126 +Ethernet52 205,206,207,208 100000 6 9126 +Ethernet56 193,194,195,196 100000 7 9126 +Ethernet60 197,198,199,200 100000 7 9126 +Ethernet64 185,186,187,188 100000 8 9126 +Ethernet68 189,190,191,192 100000 8 9126 +Ethernet72 177,178,179,180 100000 9 9126 +Ethernet76 181,182,183,184 100000 9 9126 +Ethernet80 169,170,171,172 100000 10 9126 +Ethernet84 173,174,175,176 100000 10 9126 +Ethernet88 161,162,163,164 100000 11 9126 +Ethernet92 165,166,167,168 100000 11 9126 +Ethernet96 153,154,155,156 100000 12 9126 +Ethernet100 157,158,159,160 100000 12 9126 +Ethernet104 145,146,147,148 100000 13 9126 +Ethernet108 149,150,151,152 100000 13 9126 +Ethernet112 137,138,139,140 100000 14 9126 +Ethernet116 141,142,143,144 100000 14 9126 +Ethernet120 129,130,131,132 100000 15 9126 +Ethernet124 133,134,135,136 100000 15 9126 +Ethernet128 121,122,123,124 100000 16 9126 +Ethernet132 125,126,127,128 100000 16 9126 +Ethernet136 113,114,115,116 100000 17 9126 +Ethernet140 117,118,119,120 100000 17 9126 +Ethernet144 97,98,99,100 100000 18 9126 +Ethernet148 101,102,103,104 100000 18 9126 +Ethernet152 105,106,107,108 100000 19 9126 +Ethernet156 109,110,111,112 100000 19 9126 +Ethernet160 81,82,83,84 100000 20 9126 +Ethernet164 85,86,87,88 100000 20 9126 +Ethernet168 89,90,91,92 100000 21 9126 +Ethernet172 93,94,95,96 100000 21 9126 +Ethernet176 65,66,67,68 100000 22 9126 +Ethernet180 69,70,71,72 100000 22 9126 +Ethernet184 73,74,75,76 100000 23 9126 +Ethernet188 77,78,79,80 100000 23 9126 +Ethernet192 49,50,51,52 100000 24 9126 +Ethernet196 53,54,55,56 100000 24 9126 +Ethernet200 57,58,59,60 100000 25 9126 +Ethernet204 61,62,63,64 100000 25 9126 +Ethernet208 33,34,35,36 100000 26 9126 +Ethernet212 37,38,39,40 100000 26 9126 +Ethernet216 41,42,43,44 100000 27 9126 +Ethernet220 45,46,47,48 100000 27 9126 +Ethernet224 17,18,19,20 100000 28 9126 +Ethernet228 21,22,23,24 100000 28 9126 +Ethernet232 25,26,27,28 100000 29 9126 +Ethernet236 29,30,31,32 100000 29 9126 +Ethernet240 1,2,3,4 100000 30 9126 +Ethernet244 5,6,7,8 100000 30 9126 +Ethernet248 9,10,11,12 100000 31 9126 +Ethernet252 13,14,15,16 100000 31 9126 +Ethernet256 257 10000 32 9126 +Ethernet257 258 10000 33 9126 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/config_64x200G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/config_64x200G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..4b75a205ab5 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/config_64x200G_Delta-et-c032if.yaml @@ -0,0 +1,653 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "200G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "200G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "200G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "200G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "200G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "200G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "200G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "200G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "200G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "200G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "200G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "200G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "200G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "200G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "200G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "200G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "200G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "200G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "200G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "200G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "200G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "200G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "200G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "200G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "200G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "200G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "200G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "200G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "200G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "200G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "200G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "200G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "200G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "200G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "200G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "200G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "200G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "200G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "200G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "200G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "200G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "200G" + sysport: "13" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/inno.config.yaml new file mode 100755 index 00000000000..f68930c37ef --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x200G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/port_config.ini new file mode 100644 index 00000000000..726e1a377d8 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 200000 0 9126 +Ethernet4 253,254,255,256 200000 0 9126 +Ethernet8 241,242,243,244 200000 1 9126 +Ethernet12 245,246,247,248 200000 1 9126 +Ethernet16 233,234,235,236 200000 2 9126 +Ethernet20 237,238,239,240 200000 2 9126 +Ethernet24 225,226,227,228 200000 3 9126 +Ethernet28 229,230,231,232 200000 3 9126 +Ethernet32 217,218,219,220 200000 4 9126 +Ethernet36 221,222,223,224 200000 4 9126 +Ethernet40 209,210,211,212 200000 5 9126 +Ethernet44 213,214,215,216 200000 5 9126 +Ethernet48 201,202,203,204 200000 6 9126 +Ethernet52 205,206,207,208 200000 6 9126 +Ethernet56 193,194,195,196 200000 7 9126 +Ethernet60 197,198,199,200 200000 7 9126 +Ethernet64 185,186,187,188 200000 8 9126 +Ethernet68 189,190,191,192 200000 8 9126 +Ethernet72 177,178,179,180 200000 9 9126 +Ethernet76 181,182,183,184 200000 9 9126 +Ethernet80 169,170,171,172 200000 10 9126 +Ethernet84 173,174,175,176 200000 10 9126 +Ethernet88 161,162,163,164 200000 11 9126 +Ethernet92 165,166,167,168 200000 11 9126 +Ethernet96 153,154,155,156 200000 12 9126 +Ethernet100 157,158,159,160 200000 12 9126 +Ethernet104 145,146,147,148 200000 13 9126 +Ethernet108 149,150,151,152 200000 13 9126 +Ethernet112 137,138,139,140 200000 14 9126 +Ethernet116 141,142,143,144 200000 14 9126 +Ethernet120 129,130,131,132 200000 15 9126 +Ethernet124 133,134,135,136 200000 15 9126 +Ethernet128 121,122,123,124 200000 16 9126 +Ethernet132 125,126,127,128 200000 16 9126 +Ethernet136 113,114,115,116 200000 17 9126 +Ethernet140 117,118,119,120 200000 17 9126 +Ethernet144 97,98,99,100 200000 18 9126 +Ethernet148 101,102,103,104 200000 18 9126 +Ethernet152 105,106,107,108 200000 19 9126 +Ethernet156 109,110,111,112 200000 19 9126 +Ethernet160 81,82,83,84 200000 20 9126 +Ethernet164 85,86,87,88 200000 20 9126 +Ethernet168 89,90,91,92 200000 21 9126 +Ethernet172 93,94,95,96 200000 21 9126 +Ethernet176 65,66,67,68 200000 22 9126 +Ethernet180 69,70,71,72 200000 22 9126 +Ethernet184 73,74,75,76 200000 23 9126 +Ethernet188 77,78,79,80 200000 23 9126 +Ethernet192 49,50,51,52 200000 24 9126 +Ethernet196 53,54,55,56 200000 24 9126 +Ethernet200 57,58,59,60 200000 25 9126 +Ethernet204 61,62,63,64 200000 25 9126 +Ethernet208 33,34,35,36 200000 26 9126 +Ethernet212 37,38,39,40 200000 26 9126 +Ethernet216 41,42,43,44 200000 27 9126 +Ethernet220 45,46,47,48 200000 27 9126 +Ethernet224 17,18,19,20 200000 28 9126 +Ethernet228 21,22,23,24 200000 28 9126 +Ethernet232 25,26,27,28 200000 29 9126 +Ethernet236 29,30,31,32 200000 29 9126 +Ethernet240 1,2,3,4 200000 30 9126 +Ethernet244 5,6,7,8 200000 30 9126 +Ethernet248 9,10,11,12 200000 31 9126 +Ethernet252 13,14,15,16 200000 31 9126 +Ethernet256 257 10000 32 9126 +Ethernet257 258 10000 33 9126 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/default_sku b/device/delta/x86_64-delta_et-c032if-r0/default_sku new file mode 100644 index 00000000000..92740942d0e --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/default_sku @@ -0,0 +1 @@ +Delta-et-c032if t1 diff --git a/device/delta/x86_64-delta_et-c032if-r0/installer.conf b/device/delta/x86_64-delta_et-c032if-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/delta/x86_64-delta_et-c032if-r0/led_proc_init.soc b/device/delta/x86_64-delta_et-c032if-r0/led_proc_init.soc new file mode 100644 index 00000000000..4173de277f6 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/led_proc_init.soc @@ -0,0 +1,10 @@ +#ET_C032IF Port_Remap +# Vlan set and port enable + +# led0 port order remap + +#ET_C032IF_LED + +#-------------------------------------------------------------------------------------------------- +#LED Auto link/up + diff --git a/device/delta/x86_64-delta_et-c032if-r0/plugins/eeprom.py b/device/delta/x86_64-delta_et-c032if-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1a624414637 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-10/10-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_et-c032if-r0/plugins/psuutil.py b/device/delta/x86_64-delta_et-c032if-r0/plugins/psuutil.py new file mode 100644 index 00000000000..80383aaffdd --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/plugins/psuutil.py @@ -0,0 +1,78 @@ +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# + +import os.path +import subprocess + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + self.psu_status = "ipmitool raw 0x38 0x1 {} 0x50" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + p = os.popen("ipmitool raw 0x38 0x2 7 0x32 0x28 1") + content = p.readline().rstrip() + reg_value = int(content, 16) + mask = (1 << (8 - index)) + if reg_value & mask == 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + + + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + status = 0 + try: + p = os.popen(self.psu_status.format(index - 1)) + content = p.readline().rstrip() + reg_value = int(content, 16) + if reg_value != 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + diff --git a/device/delta/x86_64-delta_et-c032if-r0/plugins/sfputil.py b/device/delta/x86_64-delta_et-c032if-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4802c3a8f0c --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/plugins/sfputil.py @@ -0,0 +1,255 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import datetime + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_START_SFP = 32 + PORT_END = 33 + PORTS_IN_BLOCK = 34 + + EEPROM_OFFSET = 1 + + _port_to_eeprom_mapping = {} + port_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_start_sfp(self): + return self.PORT_START_SFP + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def get_transceiver_status(self): + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_is_present") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + reg_file.close() + + return int(content, 16) + + + def __init__(self): + eeprom_path = "/sys/kernel/sfp/eeprom_sfp_{0}" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + self.modprs_register = self.get_transceiver_status + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_is_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num + 6)) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 2: + return False + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_lp_mode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 2) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 2: + return False + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_lp_mode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 2) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).rstrip("L") or "0" + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/delta-et-c032if-cpld.0/sfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 2: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 2) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + start_time = time.time() + port_dict = {} + port = self.port_start + forever = False + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + while timeout >= 0: + # Check for OIR events and return updated port_dict + reg_value = self.get_transceiver_status + if reg_value != self.modprs_register: + changed_ports = self.modprs_register ^ reg_value + while port >= self.port_start and port <= self.port_end: + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port + 6)) + + if changed_ports & mask: + # ModPrsL is active low + if reg_value & mask == 0: + port_dict[port] = '1' + else: + port_dict[port] = '0' + + port += 1 + + # Update reg value + self.modprs_register = reg_value + return True, port_dict + + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} diff --git a/device/delta/x86_64-delta_et-c032if-r0/sensors.conf b/device/delta/x86_64-delta_et-c032if-r0/sensors.conf new file mode 100644 index 00000000000..db34a541b26 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/sensors.conf @@ -0,0 +1,4 @@ +# libsensors configuration file for DELTA-ET-C032IF +# ------------------------------------------------ +# + diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf index 6ad356614a0..43ed0e4af6a 100644 --- a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf @@ -23,13 +23,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf index 36f2ca83df7..29e8f4bae0b 100644 --- a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf @@ -23,13 +23,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/port_config.ini b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/port_config.ini new file mode 100755 index 00000000000..ba13dd5743b --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index +Ethernet0 1 Ethernet0 0 +Ethernet1 2 Ethernet1 1 +Ethernet2 3 Ethernet2 2 +Ethernet3 4 Ethernet3 3 +Ethernet4 5 Ethernet4 4 +Ethernet5 6 Ethernet5 5 +Ethernet6 7 Ethernet6 6 +Ethernet7 8 Ethernet7 7 +Ethernet8 13 Ethernet8 8 +Ethernet9 14 Ethernet9 9 +Ethernet10 15 Ethernet10 10 +Ethernet11 16 Ethernet11 11 +Ethernet12 21 Ethernet12 12 +Ethernet13 22 Ethernet13 13 +Ethernet14 23 Ethernet14 14 +Ethernet15 24 Ethernet15 15 +Ethernet16 29 Ethernet16 16 +Ethernet17 30 Ethernet17 17 +Ethernet18 31 Ethernet18 18 +Ethernet19 32 Ethernet19 19 +Ethernet20 33 Ethernet20 20 +Ethernet21 34 Ethernet21 21 +Ethernet22 35 Ethernet22 22 +Ethernet23 36 Ethernet23 23 +Ethernet24 41 Ethernet24 24 +Ethernet25 42 Ethernet25 25 +Ethernet26 43 Ethernet26 26 +Ethernet27 44 Ethernet27 27 +Ethernet28 49 Ethernet28 28 +Ethernet29 50 Ethernet29 29 +Ethernet30 51 Ethernet30 30 +Ethernet31 52 Ethernet31 31 +Ethernet32 57 Ethernet32 32 +Ethernet33 58 Ethernet33 33 +Ethernet34 59 Ethernet34 34 +Ethernet35 60 Ethernet35 35 +Ethernet36 61 Ethernet36 36 +Ethernet37 62 Ethernet37 37 +Ethernet38 63 Ethernet38 38 +Ethernet39 64 Ethernet39 39 +Ethernet40 65 Ethernet40 40 +Ethernet41 66 Ethernet41 41 +Ethernet42 67 Ethernet42 42 +Ethernet43 68 Ethernet43 43 +Ethernet44 69 Ethernet44 44 +Ethernet45 70 Ethernet45 45 +Ethernet46 71 Ethernet46 46 +Ethernet47 72 Ethernet47 47 +Ethernet48 85,86,87,88 Ethernet48 48 +Ethernet52 77,78,79,80 Ethernet52 49 +Ethernet56 93,94,95,96 Ethernet56 50 +Ethernet60 97,98,99,100 Ethernet60 51 +Ethernet64 113,114,115,116 Ethernet64 52 +Ethernet68 105,106,107,108 Ethernet68 53 +Ethernet72 121,122,123,124 Ethernet72 54 +Ethernet76 125,126,127,128 Ethernet76 55 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/sai.profile b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/sai.profile new file mode 100755 index 00000000000..f147d44c0b3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-d6356-48x25G-8x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x25G-8x100G.config.bcm b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x25G-8x100G.config.bcm new file mode 100644 index 00000000000..f6fc4f02f1e --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x25G-8x100G.config.bcm @@ -0,0 +1,398 @@ +### fix for sonic +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +### end fix + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +oversubscribe_mode=1 +pbmp_xport_xe=0x488787878808787fdfe1e1e1fe1e1e1fe + + +portmap_65=130:10 + +### Pipeline0, halfpipe 0 (12x25G + 2x100G) +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_32=32:25 + +### Pipeline0, halfpipe 1 (12x25G + 2x100G) +portmap_33=33:25 +portmap_34=34:25 +portmap_35=35:25 +portmap_36=36:25 +portmap_41=41:25 +portmap_42=42:25 +portmap_43=43:25 +portmap_44=44:25 +portmap_49=49:25 +portmap_50=50:25 +portmap_51=51:25 +portmap_52=52:25 +portmap_57=57:25 +portmap_58=58:25 +portmap_59=59:25 +portmap_60=60:25 +portmap_61=61:25 +portmap_62=62:25 +portmap_63=63:25 +portmap_64=64:25 + +### Pipeline 1 +### First management port +portmap_66=129:10:m +### Second management port +portmap_130=128:10:m +### Loopback port +portmap_131=131:10 + +### Pipeline 1, halfpipe 0 (12x25G + 2x100G) +portmap_67=65:25 +portmap_68=66:25 +portmap_69=67:25 +portmap_70=68:25 +portmap_71=69:25 +portmap_72=70:25 +portmap_73=71:25 +portmap_74=72:25 +portmap_79=77:100 +portmap_87=85:100 +portmap_95=93:100 + +### Pipeline 1, halfpipe 1 (12x25G + 2x100G) +portmap_99=97:100 +portmap_107=105:100 +portmap_115=113:100 +portmap_123=121:100 +portmap_127=125:100 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + + +#dport part +dport_map_port_79=87 +dport_map_port_87=79 +dport_map_port_107=115 +dport_map_port_115=107 + +#Polarity flips after lane swaps +#rx part +#FC1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#FC3 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#FC5 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#FC8 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC10 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#FC12 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#FC14 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#FC15 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +#FC16 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 + +#FC17 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC19 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 + +#FC21 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 + +#FC23 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 + +#FC24 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 + +#FC28 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +#phy_chain_rx_polarity_flip_physical{114.0}=0x1 + +#FC30 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 + +#FC31 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 + +#tx part +#FC19 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +#FC21 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 + +#FC23 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +#FC24 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +#FC28 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +#FC30 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 + +#FC31 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + + +phy_chain_rx_lane_map_physical{1.0}=0x1032 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x1032 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 + +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 + +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 + +phy_chain_rx_lane_map_physical{85.0}=0x0213 +phy_chain_tx_lane_map_physical{85.0}=0x3120 +phy_chain_rx_lane_map_physical{77.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x1302 + +phy_chain_rx_lane_map_physical{93.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x1302 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3120 + +phy_chain_rx_lane_map_physical{113.0}=0x1203 +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x2031 +phy_chain_tx_lane_map_physical{105.0}=0x1302 + +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{121.0}=0x1302 +phy_chain_rx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x3120 + +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +# EQ/IDriver +serdes_preemphasis_1=0x13460B +serdes_preemphasis_2=0x13460B +serdes_preemphasis_3=0x14450B +serdes_preemphasis_4=0x13460B +serdes_preemphasis_5=0x11480B +serdes_preemphasis_6=0x13470A +serdes_preemphasis_7=0x14460A +serdes_preemphasis_8=0x11490A +serdes_preemphasis_13=0x10490B +serdes_preemphasis_14=0x104A0A +serdes_preemphasis_15=0x0F4B0A +serdes_preemphasis_16=0x0F4B0A +serdes_preemphasis_21=0x0D4D0A +serdes_preemphasis_22=0x0D4D0A +serdes_preemphasis_23=0x0D4D0A +serdes_preemphasis_24=0x0D4D0A +serdes_preemphasis_29=0x0B4F0A +serdes_preemphasis_30=0x0D4E09 +serdes_preemphasis_31=0x0B4F0A +serdes_preemphasis_32=0x0C4F09 +serdes_preemphasis_33=0x0B4F0A +serdes_preemphasis_34=0x0A5109 +serdes_preemphasis_35=0x09510A +serdes_preemphasis_36=0x0B5009 +serdes_preemphasis_41=0x09510A +serdes_preemphasis_42=0x0B5009 +serdes_preemphasis_43=0x09510A +serdes_preemphasis_44=0x0A5109 +serdes_preemphasis_49=0x0A500A +serdes_preemphasis_50=0x0B4F0A +serdes_preemphasis_51=0x09510A +serdes_preemphasis_52=0x0E4C0A +serdes_preemphasis_57=0x0D4D0A +serdes_preemphasis_58=0x0E4D09 +serdes_preemphasis_59=0x0C4E0A +serdes_preemphasis_60=0x0E4D09 +serdes_preemphasis_61=0x0B4F0A +serdes_preemphasis_62=0x0D4E09 +serdes_preemphasis_63=0x0D4D0A +serdes_preemphasis_64=0x0D4D0A +serdes_preemphasis_67=0x0B4F0A +serdes_preemphasis_68=0x0C4E0A +serdes_preemphasis_69=0x0B4F0A +serdes_preemphasis_70=0x0B4F0A +serdes_preemphasis_71=0x0B4F0A +serdes_preemphasis_72=0x0F4B0A +serdes_preemphasis_73=0x0E4C0A +serdes_preemphasis_74=0x0F4B0A +serdes_preemphasis_87=0x0E4C0A +serdes_preemphasis_79=0x0F4B0A +serdes_preemphasis_95=0x0F4B0A +serdes_preemphasis_99=0x0F4B0A +serdes_preemphasis_115=0x13470A +serdes_preemphasis_107=0x12480A +serdes_preemphasis_123=0x154609 +serdes_preemphasis_127=0x13470A + +# interface type +serdes_if_type_1=13 +serdes_if_type_2=13 +serdes_if_type_3=13 +serdes_if_type_4=13 +serdes_if_type_5=13 +serdes_if_type_6=13 +serdes_if_type_7=13 +serdes_if_type_8=13 +serdes_if_type_13=13 +serdes_if_type_14=13 +serdes_if_type_15=13 +serdes_if_type_16=13 +serdes_if_type_21=13 +serdes_if_type_22=13 +serdes_if_type_23=13 +serdes_if_type_24=13 +serdes_if_type_29=13 +serdes_if_type_30=13 +serdes_if_type_31=13 +serdes_if_type_32=13 +serdes_if_type_33=13 +serdes_if_type_34=13 +serdes_if_type_35=13 +serdes_if_type_36=13 +serdes_if_type_41=13 +serdes_if_type_42=13 +serdes_if_type_43=13 +serdes_if_type_44=13 +serdes_if_type_49=13 +serdes_if_type_50=13 +serdes_if_type_51=13 +serdes_if_type_52=13 +serdes_if_type_57=13 +serdes_if_type_58=13 +serdes_if_type_59=13 +serdes_if_type_60=13 +serdes_if_type_61=13 +serdes_if_type_62=13 +serdes_if_type_63=13 +serdes_if_type_64=13 +serdes_if_type_67=13 +serdes_if_type_68=13 +serdes_if_type_69=13 +serdes_if_type_70=13 +serdes_if_type_71=13 +serdes_if_type_72=13 +serdes_if_type_73=13 +serdes_if_type_74=13 +serdes_if_type_87=14 +serdes_if_type_79=14 +serdes_if_type_95=14 +serdes_if_type_99=14 +serdes_if_type_115=14 +serdes_if_type_107=14 +serdes_if_type_123=14 +serdes_if_type_127=14 + diff --git a/device/inventec/x86_64-inventec_d6356-r0/default_sku b/device/inventec/x86_64-inventec_d6356-r0/default_sku new file mode 100644 index 00000000000..f4c77ebd10f --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D6356 t1 diff --git a/device/inventec/x86_64-inventec_d6356-r0/installer.conf b/device/inventec/x86_64-inventec_d6356-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6356-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6356-r0/led_proc_init.soc new file mode 100644 index 00000000000..d4c2fde64f9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +led auto off +led stop +m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/inventec/x86_64-inventec_d6356-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6356-r0/plugins/eeprom.py new file mode 100644 index 00000000000..953570d79cd --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d6356 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/2-0055/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6356-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6356-r0/plugins/psuutil.py new file mode 100755 index 00000000000..8ed0bce7297 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/class/hwmon/hwmon1" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d6356-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6356-r0/plugins/sfputil.py new file mode 100755 index 00000000000..5ea81ffcfc1 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/plugins/sfputil.py @@ -0,0 +1,217 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0:22, + 1:23, + 2:24, + 3:25, + 4:26, + 5:27, + 6:28, + 7:29, + 8:30, + 9:31, + 10:32, + 11:33, + 12:34, + 13:35, + 14:36, + 15:37, + 16:38, + 17:39, + 18:40, + 19:41, + 20:42, + 21:43, + 22:44, + 23:45, + 24:46, + 25:47, + 26:48, + 27:49, + 28:50, + 29:51, + 30:52, + 31:53, + 32:54, + 33:55, + 34:56, + 35:57, + 36:58, + 37:59, + 38:60, + 39:61, + 40:62, + 41:63, + 42:64, + 43:65, + 44:66, + 45:67, + 46:68, + 47:69, + 48:14, + 49:15, + 50:16, + 51:17, + 52:18, + 53:19, + 54:20, + 55:21 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + """ + raise NotImplementedError diff --git a/device/inventec/x86_64-inventec_d6356-r0/sensors.conf b/device/inventec/x86_64-inventec_d6356-r0/sensors.conf new file mode 100644 index 00000000000..6f7318168ee --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/sensors.conf @@ -0,0 +1,106 @@ +# libsensors configuration file +chip "ucd90160-*" + ignore temp1 + +chip "tmp75-i2c-*-0048" + label temp1 "CPU Board Temperature" + +chip "tmp75-i2c-*-004a" + label temp1 "FrontSide Temperature" + +chip "tmp75-i2c-*-004e" + label temp1 "NearASIC Temperature" + +chip "tmp75-i2c-*-004d" + label temp1 "RearSide Temperature" + +chip "inv_cpld-i2c-*-77" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM (0-255)" + label pwm2 "FanModule2 PWM (0-255)" + label pwm3 "FanModule3 PWM (0-255)" + label pwm4 "FanModule4 PWM (0-255)" + label pwm5 "FanModule5 PWM (0-255)" + +chip "pmbus-i2c-*-005a" + ignore power3 + ignore curr3 + label fan1 "PSU1 Fan RPM" + label temp1 "PSU1 Temperature1" + label temp2 "PSU1 Temperature2" + label temp3 "PSU1 Temperature3" + label in1 "PSU1 Input Voltage" + label curr1 "PSU1 Input Current" + label power1 "PSU1 Input Power" + label in2 "PSU1 Output Voltage" + label curr2 "PSU1 Output Current" + label power2 "PSU1 Output Power" + label pwm1 "PSU1 PWM (0-100)" + +chip "pmbus-i2c-*-005b" + ignore power3 + ignore curr3 + label fan1 "PSU2 Fan RPM" + label temp1 "PSU2 Temperature1" + label temp2 "PSU2 Temperature2" + label temp3 "PSU2 Temperature3" + label in1 "PSU2 Input Voltage" + label curr1 "PSU2 Input Current" + label power1 "PSU2 Input Power" + label in2 "PSU2 Output Voltage" + label curr2 "PSU2 Output Current" + label power2 "PSU2 Output Power" + label pwm1 "PSU2 PWM (0-100)" + +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center Temperature" + + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot index 58ead640239..d310210497e 100755 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot @@ -4,6 +4,7 @@ declare -r EXIT_SUCCESS="0" declare -r EXIT_ERROR="1" declare -r FW_UPGRADE_SCRIPT="/usr/bin/mlnx-fw-upgrade.sh" +declare -r SYSFS_PWR_CYCLE="/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_cycle" FORCE_REBOOT="no" @@ -20,7 +21,7 @@ function ParseArguments() { ParseArguments "$@" -${FW_UPGRADE_SCRIPT} --upgrade +${FW_UPGRADE_SCRIPT} --upgrade --verbose EXIT_CODE="$?" if [[ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]]; then echo "Failed to burn MLNX FW: errno=${EXIT_CODE}" @@ -31,4 +32,7 @@ if [[ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]]; then fi fi -exec /sbin/reboot $@ +# perform "hardware" reboot +echo 1 > $SYSFS_PWR_CYCLE +sleep 3 +echo 0 > $SYSFS_PWR_CYCLE diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot deleted file mode 120000 index 43c8ea56749..00000000000 --- a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot new file mode 100755 index 00000000000..5b9809e1042 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot @@ -0,0 +1,21 @@ +#!/bin/bash + +declare -r EXIT_SUCCESS="0" +declare -r EXIT_ERROR="1" + +FORCE_REBOOT="no" + +function ParseArguments() { + while [ $# -ge 1 ]; do + case "$1" in + -f|--force) + FORCE_REBOOT="yes" + ;; + esac + shift + done +} + +ParseArguments "$@" + +exec /sbin/reboot $@ diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_wait deleted file mode 120000 index 4b30bd42985..00000000000 --- a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_wait +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot index d66ab7537bf..dfaf5341766 120000 --- a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot @@ -1 +1 @@ -../x86_64-mlnx_msn3700-r0/platform_reboot \ No newline at end of file +../x86_64-mlnx_msn2700_simx-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_wait deleted file mode 120000 index 685dfb8437f..00000000000 --- a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_wait +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn3700-r0/platform_wait \ No newline at end of file diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/default_sku b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/default_sku new file mode 100755 index 00000000000..68cbc0d6058 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX1B-32X t1 diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/minigraph.xml b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/minigraph.xml deleted file mode 100755 index 9d348f0051b..00000000000 --- a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/minigraph.xml +++ /dev/null @@ -1,1074 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - sonic - 10.0.0.34 - 1 - 180 - 60 - - - sonic - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - sonic - 10.0.0.36 - 1 - 180 - 60 - - - sonic - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - sonic - 10.0.0.38 - 1 - 180 - 60 - - - sonic - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - sonic - 10.0.0.40 - 1 - 180 - 60 - - - sonic - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - sonic - 10.0.0.42 - 1 - 180 - 60 - - - sonic - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - sonic - 10.0.0.44 - 1 - 180 - 60 - - - sonic - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - sonic - 10.0.0.46 - 1 - 180 - 60 - - - sonic - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - ARISTA09T0 - 10.0.0.49 - sonic - 10.0.0.48 - 1 - 180 - 60 - - - sonic - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - sonic - 10.0.0.50 - 1 - 180 - 60 - - - sonic - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - sonic - 10.0.0.52 - 1 - 180 - 60 - - - sonic - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - sonic - 10.0.0.54 - 1 - 180 - 60 - - - sonic - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - sonic - 10.0.0.56 - 1 - 180 - 60 - - - sonic - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - sonic - 10.0.0.58 - 1 - 180 - 60 - - - sonic - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - sonic - 10.0.0.60 - 1 - 180 - 60 - - - sonic - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - sonic - 10.0.0.62 - 1 - 180 - 60 - - - sonic - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - sonic - - -
10.0.0.33
- - - - -
10.0.0.1
- - - - -
10.0.0.35
- - - - -
10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - sonic - - - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - sonic - Quanta-IX1B-32X - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - sonic - Quanta-IX1B-32X - diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini index 42b75f2175b..14f4716d909 100644 --- a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini @@ -1,33 +1,33 @@ # name lanes alias index speed -Ethernet0 29,30,31,32 hundredGigE1 0 100000 -Ethernet4 33,34,35,36 hundredGigE2 1 100000 -Ethernet8 41,42,43,44 hundredGigE3 2 100000 -Ethernet12 45,46,47,48 hundredGigE4 3 100000 -Ethernet16 1,2,3,4 hundredGigE5 4 100000 -Ethernet20 5,6,7,8 hundredGigE6 5 100000 -Ethernet24 9,10,11,12 hundredGigE7 6 100000 -Ethernet28 13,14,15,16 hundredGigE8 7 100000 -Ethernet32 17,18,19,20 hundredGigE9 8 100000 -Ethernet36 21,22,23,24 hundredGigE10 9 100000 -Ethernet40 25,26,27,28 hundredGigE11 10 100000 -Ethernet44 37,38,39,40 hundredGigE12 11 100000 -Ethernet48 49,50,51,52 hundredGigE13 12 100000 -Ethernet52 53,54,55,56 hundredGigE14 13 100000 -Ethernet56 57,58,59,60 hundredGigE15 14 100000 -Ethernet60 61,62,63,64 hundredGigE16 15 100000 -Ethernet64 65,66,67,68 hundredGigE17 16 100000 -Ethernet68 69,70,71,72 hundredGigE18 17 100000 -Ethernet72 73,74,75,76 hundredGigE19 18 100000 -Ethernet76 77,78,79,80 hundredGigE20 19 100000 -Ethernet80 93,94,95,96 hundredGigE21 20 100000 -Ethernet84 101,102,103,104 hundredGigE22 21 100000 -Ethernet88 105,106,107,108 hundredGigE23 22 100000 -Ethernet92 109,110,111,112 hundredGigE24 23 100000 -Ethernet96 113,114,115,116 hundredGigE25 24 100000 -Ethernet100 117,118,119,120 hundredGigE26 25 100000 -Ethernet104 121,122,123,124 hundredGigE27 26 100000 -Ethernet108 125,126,127,128 hundredGigE28 27 100000 -Ethernet112 81,82,83,84 hundredGigE29 28 100000 -Ethernet116 85,86,87,88 hundredGigE30 29 100000 -Ethernet120 89,90,91,92 hundredGigE31 30 100000 -Ethernet124 97,98,99,100 hundredGigE32 31 100000 +Ethernet0 29,30,31,32 hundredGigE1 1 100000 +Ethernet4 33,34,35,36 hundredGigE2 2 100000 +Ethernet8 41,42,43,44 hundredGigE3 3 100000 +Ethernet12 45,46,47,48 hundredGigE4 4 100000 +Ethernet16 1,2,3,4 hundredGigE5 5 100000 +Ethernet20 5,6,7,8 hundredGigE6 6 100000 +Ethernet24 9,10,11,12 hundredGigE7 7 100000 +Ethernet28 13,14,15,16 hundredGigE8 8 100000 +Ethernet32 17,18,19,20 hundredGigE9 9 100000 +Ethernet36 21,22,23,24 hundredGigE10 10 100000 +Ethernet40 25,26,27,28 hundredGigE11 11 100000 +Ethernet44 37,38,39,40 hundredGigE12 12 100000 +Ethernet48 49,50,51,52 hundredGigE13 13 100000 +Ethernet52 53,54,55,56 hundredGigE14 14 100000 +Ethernet56 57,58,59,60 hundredGigE15 15 100000 +Ethernet60 61,62,63,64 hundredGigE16 16 100000 +Ethernet64 65,66,67,68 hundredGigE17 17 100000 +Ethernet68 69,70,71,72 hundredGigE18 18 100000 +Ethernet72 73,74,75,76 hundredGigE19 19 100000 +Ethernet76 77,78,79,80 hundredGigE20 20 100000 +Ethernet80 93,94,95,96 hundredGigE21 21 100000 +Ethernet84 101,102,103,104 hundredGigE22 22 100000 +Ethernet88 105,106,107,108 hundredGigE23 23 100000 +Ethernet92 109,110,111,112 hundredGigE24 24 100000 +Ethernet96 113,114,115,116 hundredGigE25 25 100000 +Ethernet100 117,118,119,120 hundredGigE26 26 100000 +Ethernet104 121,122,123,124 hundredGigE27 27 100000 +Ethernet108 125,126,127,128 hundredGigE28 28 100000 +Ethernet112 81,82,83,84 hundredGigE29 29 100000 +Ethernet116 85,86,87,88 hundredGigE30 30 100000 +Ethernet120 89,90,91,92 hundredGigE31 31 100000 +Ethernet124 97,98,99,100 hundredGigE32 32 100000 diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py index 09ce8928b8e..85a4aad26da 100644 --- a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py @@ -1,53 +1,58 @@ -#!/usr/bin/env python +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# try: import time - from sonic_sfp.sfputilbase import SfpUtilBase -except ImportError, e: - raise ImportError (str(e) + "- required module not found") + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) class SfpUtil(SfpUtilBase): - """Platform specific SfpUtill class""" + """Platform-specific SfpUtil class""" - PORT_START = 0 - PORT_END = 31 + PORT_START = 1 + PORT_END = 32 PORTS_IN_BLOCK = 32 _port_to_eeprom_mapping = {} _port_to_i2c_mapping = { - 0 : 32, - 1 : 33, - 2 : 34, - 3 : 35, - 4 : 36, - 5 : 37, - 6 : 38, - 7 : 39, - 8 : 40, - 9 : 41, - 10 : 42, - 11 : 43, - 12 : 44, - 13 : 45, - 14 : 46, - 15 : 47, - 16 : 48, - 17 : 49, - 18 : 50, - 19 : 51, - 20 : 52, - 21 : 53, - 22 : 54, - 23 : 55, - 24 : 56, - 25 : 57, - 26 : 58, - 27 : 59, - 28 : 60, - 29 : 61, - 30 : 62, - 31 : 63, + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, } @property @@ -68,17 +73,17 @@ def port_to_eeprom_mapping(self): def __init__(self): eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' - for x in range(0, self.port_end+1): + for x in range(self.port_start, self.port_end+1): self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x]) SfpUtilBase.__init__(self) def get_presence(self, port_num): # Check for invalid port_num - if port_num < self.PORT_START or port_num > self.PORT_END: + if port_num < self.port_start or port_num > self.port_end: return False try: - reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/module_present") + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/module_present") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -95,7 +100,7 @@ def get_low_power_mode(self, port_num): return False try: - reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/lpmode") + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/lpmode") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -113,7 +118,7 @@ def set_low_power_mode(self, port_num, lpmode): return False try: - reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/lpmode", "r+") + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/lpmode", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -137,7 +142,7 @@ def reset(self, port_num): return False try: - reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/reset", "r+") + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/reset", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -151,7 +156,7 @@ def reset(self, port_num): # Flip the value back write back to the register to take port out of reset try: - reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/reset", "r+") + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/reset", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini index 1b33f50c92d..c9dd2fb999f 100644 --- a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini @@ -1,57 +1,57 @@ # name lanes alias index speed -Ethernet0 60 twentyfiveGigE1 0 25000 -Ethernet1 59 twentyfiveGigE2 1 25000 -Ethernet2 58 twentyfiveGigE3 2 25000 -Ethernet3 57 twentyfiveGigE4 3 25000 -Ethernet4 64 twentyfiveGigE5 4 25000 -Ethernet5 63 twentyfiveGigE6 5 25000 -Ethernet6 62 twentyfiveGigE7 6 25000 -Ethernet7 61 twentyfiveGigE8 7 25000 -Ethernet8 49 twentyfiveGigE9 8 25000 -Ethernet9 50 twentyfiveGigE10 9 25000 -Ethernet10 51 twentyfiveGigE11 10 25000 -Ethernet11 52 twentyfiveGigE12 11 25000 -Ethernet12 4 twentyfiveGigE13 12 25000 -Ethernet13 3 twentyfiveGigE14 13 25000 -Ethernet14 2 twentyfiveGigE15 14 25000 -Ethernet15 1 twentyfiveGigE16 15 25000 -Ethernet16 8 twentyfiveGigE17 16 25000 -Ethernet17 7 twentyfiveGigE18 17 25000 -Ethernet18 6 twentyfiveGigE19 18 25000 -Ethernet19 5 twentyfiveGigE20 19 25000 -Ethernet20 16 twentyfiveGigE21 20 25000 -Ethernet21 15 twentyfiveGigE22 21 25000 -Ethernet22 14 twentyfiveGigE23 22 25000 -Ethernet23 13 twentyfiveGigE24 23 25000 -Ethernet24 24 twentyfiveGigE25 24 25000 -Ethernet25 23 twentyfiveGigE26 25 25000 -Ethernet26 22 twentyfiveGigE27 26 25000 -Ethernet27 21 twentyfiveGigE28 27 25000 -Ethernet28 32 twentyfiveGigE29 28 25000 -Ethernet29 31 twentyfiveGigE30 29 25000 -Ethernet30 30 twentyfiveGigE31 30 25000 -Ethernet31 29 twentyfiveGigE32 31 25000 -Ethernet32 36 twentyfiveGigE33 32 25000 -Ethernet33 35 twentyfiveGigE34 33 25000 -Ethernet34 34 twentyfiveGigE35 34 25000 -Ethernet35 33 twentyfiveGigE36 35 25000 -Ethernet36 44 twentyfiveGigE37 36 25000 -Ethernet37 43 twentyfiveGigE38 37 25000 -Ethernet38 42 twentyfiveGigE39 38 25000 -Ethernet39 41 twentyfiveGigE40 39 25000 -Ethernet40 86 twentyfiveGigE41 40 25000 -Ethernet41 85 twentyfiveGigE42 41 25000 -Ethernet42 88 twentyfiveGigE43 42 25000 -Ethernet43 87 twentyfiveGigE44 43 25000 -Ethernet44 94 twentyfiveGigE45 44 25000 -Ethernet45 93 twentyfiveGigE46 45 25000 -Ethernet46 96 twentyfiveGigE47 46 25000 -Ethernet47 95 twentyfiveGigE48 47 25000 -Ethernet48 97,98,99,100 hundredGigE49 48 100000 -Ethernet52 105,106,107,108 hundredGigE50 49 100000 -Ethernet56 113,114,115,116 hundredGigE51 50 100000 -Ethernet60 121,122,123,124 hundredGigE52 51 100000 -Ethernet64 77,78,79,80 hundredGigE53 52 100000 -Ethernet68 65,66,67,68 hundredGigE54 53 100000 -Ethernet72 69,70,71,72 hundredGigE55 54 100000 -Ethernet76 125,126,127,128 hundredGigE56 55 100000 +Ethernet0 60 twentyfiveGigE1 1 25000 +Ethernet1 59 twentyfiveGigE2 2 25000 +Ethernet2 58 twentyfiveGigE3 3 25000 +Ethernet3 57 twentyfiveGigE4 4 25000 +Ethernet4 64 twentyfiveGigE5 5 25000 +Ethernet5 63 twentyfiveGigE6 6 25000 +Ethernet6 62 twentyfiveGigE7 7 25000 +Ethernet7 61 twentyfiveGigE8 8 25000 +Ethernet8 49 twentyfiveGigE9 9 25000 +Ethernet9 50 twentyfiveGigE10 10 25000 +Ethernet10 51 twentyfiveGigE11 11 25000 +Ethernet11 52 twentyfiveGigE12 12 25000 +Ethernet12 4 twentyfiveGigE13 13 25000 +Ethernet13 3 twentyfiveGigE14 14 25000 +Ethernet14 2 twentyfiveGigE15 15 25000 +Ethernet15 1 twentyfiveGigE16 16 25000 +Ethernet16 8 twentyfiveGigE17 17 25000 +Ethernet17 7 twentyfiveGigE18 18 25000 +Ethernet18 6 twentyfiveGigE19 19 25000 +Ethernet19 5 twentyfiveGigE20 20 25000 +Ethernet20 16 twentyfiveGigE21 21 25000 +Ethernet21 15 twentyfiveGigE22 22 25000 +Ethernet22 14 twentyfiveGigE23 23 25000 +Ethernet23 13 twentyfiveGigE24 24 25000 +Ethernet24 24 twentyfiveGigE25 25 25000 +Ethernet25 23 twentyfiveGigE26 26 25000 +Ethernet26 22 twentyfiveGigE27 27 25000 +Ethernet27 21 twentyfiveGigE28 28 25000 +Ethernet28 32 twentyfiveGigE29 29 25000 +Ethernet29 31 twentyfiveGigE30 30 25000 +Ethernet30 30 twentyfiveGigE31 31 25000 +Ethernet31 29 twentyfiveGigE32 32 25000 +Ethernet32 36 twentyfiveGigE33 33 25000 +Ethernet33 35 twentyfiveGigE34 34 25000 +Ethernet34 34 twentyfiveGigE35 35 25000 +Ethernet35 33 twentyfiveGigE36 36 25000 +Ethernet36 44 twentyfiveGigE37 37 25000 +Ethernet37 43 twentyfiveGigE38 38 25000 +Ethernet38 42 twentyfiveGigE39 39 25000 +Ethernet39 41 twentyfiveGigE40 40 25000 +Ethernet40 86 twentyfiveGigE41 41 25000 +Ethernet41 85 twentyfiveGigE42 42 25000 +Ethernet42 88 twentyfiveGigE43 43 25000 +Ethernet43 87 twentyfiveGigE44 44 25000 +Ethernet44 94 twentyfiveGigE45 45 25000 +Ethernet45 93 twentyfiveGigE46 46 25000 +Ethernet46 96 twentyfiveGigE47 47 25000 +Ethernet47 95 twentyfiveGigE48 48 25000 +Ethernet48 97,98,99,100 hundredGigE49 49 100000 +Ethernet52 105,106,107,108 hundredGigE50 50 100000 +Ethernet56 113,114,115,116 hundredGigE51 51 100000 +Ethernet60 121,122,123,124 hundredGigE52 52 100000 +Ethernet64 77,78,79,80 hundredGigE53 53 100000 +Ethernet68 65,66,67,68 hundredGigE54 54 100000 +Ethernet72 69,70,71,72 hundredGigE55 55 100000 +Ethernet76 125,126,127,128 hundredGigE56 56 100000 diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py index 205ed3c82d0..627c99fee0c 100644 --- a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py @@ -1,91 +1,101 @@ -#!/usr/bin/env python +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# try: import time - from sonic_sfp.sfputilbase import SfpUtilBase -except ImportError, e: - raise ImportError (str(e) + "- required module not found") + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) class SfpUtil(SfpUtilBase): - """Platform specific SfpUtill class""" + """Platform-specific SfpUtil class""" - PORT_START = 0 - PORT_END = 55 - QSFP_PORT_START = 48 + PORT_START = 1 + PORT_END = 56 PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 49 + QSFP_PORT_END = 56 _port_to_eeprom_mapping = {} _port_to_i2c_mapping = { - 0 : 32, - 1 : 33, - 2 : 34, - 3 : 35, - 4 : 36, - 5 : 37, - 6 : 38, - 7 : 39, - 8 : 40, - 9 : 41, - 10 : 42, - 11 : 43, - 12 : 44, - 13 : 45, - 14 : 46, - 15 : 47, - 16 : 48, - 17 : 49, - 18 : 50, - 19 : 51, - 20 : 52, - 21 : 53, - 22 : 54, - 23 : 55, - 24 : 56, - 25 : 57, - 26 : 58, - 27 : 59, - 28 : 60, - 29 : 61, - 30 : 62, - 31 : 63, - 32 : 64, - 33 : 65, - 34 : 66, - 35 : 67, - 36 : 68, - 37 : 69, - 38 : 70, - 39 : 71, - 40 : 72, - 41 : 73, - 42 : 74, - 43 : 75, - 44 : 76, - 45 : 77, - 46 : 78, - 47 : 79, - 48 : 80,#QSFP49 - 49 : 81,#QSFP50 - 50 : 82,#QSFP51 - 51 : 83,#QSFP52 - 52 : 84,#QSFP53 - 53 : 85,#QSFP54 - 54 : 86,#QSFP55 - 55 : 87,#QSFP56 + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + 33 : 64, + 34 : 65, + 35 : 66, + 36 : 67, + 37 : 68, + 38 : 69, + 39 : 70, + 40 : 71, + 41 : 72, + 42 : 73, + 43 : 74, + 44 : 75, + 45 : 76, + 46 : 77, + 47 : 78, + 48 : 79, + 49 : 80,#QSFP49 + 50 : 81,#QSFP50 + 51 : 82,#QSFP51 + 52 : 83,#QSFP52 + 53 : 84,#QSFP53 + 54 : 85,#QSFP54 + 55 : 86,#QSFP55 + 56 : 87,#QSFP56 } @property def port_start(self): return self.PORT_START + @property + def port_end(self): + return self.PORT_END + @property def qsfp_port_start(self): return self.QSFP_PORT_START @property - def port_end(self): - return self.PORT_END + def qsfp_port_end(self): + return self.QSFP_PORT_END @property def qsfp_ports(self): @@ -97,26 +107,26 @@ def port_to_eeprom_mapping(self): def __init__(self): eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' - for x in range(0, self.port_end+1): + for x in range(self.port_start, self.port_end+1): self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x]) SfpUtilBase.__init__(self) def get_presence(self, port_num): # Check for invalid port_num - if port_num < self.PORT_START or port_num > self.PORT_END: + if port_num < self.port_start or port_num > self.port_end: return False try: - if port_num < 48: - reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num+1)+"/pre_n") + if port_num < self.qsfp_port_start: + reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num)+"/pre_n") else: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+34)+"/value") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+34)+"/value") except IOError as e: print "Error: unable to open file: %s" % str(e) return False reg_value = reg_file.readline().rstrip() - if port_num < 48: + if port_num < self.qsfp_port_start: if reg_value == '1': return True else: @@ -127,11 +137,11 @@ def get_presence(self, port_num): def get_low_power_mode(self, port_num): # Check for invalid port_num - if port_num < self.qsfp_port_start or port_num > self.port_end: + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+35)+"/value") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -145,11 +155,11 @@ def get_low_power_mode(self, port_num): def set_low_power_mode(self, port_num, lpmode): # Check for invalid port_num - if port_num < self.qsfp_port_start or port_num > self.port_end: + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+35)+"/value", "r+") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -173,7 +183,7 @@ def reset(self, port_num): return False try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+32)+"/value", "r+") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -187,7 +197,7 @@ def reset(self, port_num): # Flip the value back write back to the register to take port out of reset try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+32)+"/value", "r+") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini index 1b33f50c92d..c9dd2fb999f 100644 --- a/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini @@ -1,57 +1,57 @@ # name lanes alias index speed -Ethernet0 60 twentyfiveGigE1 0 25000 -Ethernet1 59 twentyfiveGigE2 1 25000 -Ethernet2 58 twentyfiveGigE3 2 25000 -Ethernet3 57 twentyfiveGigE4 3 25000 -Ethernet4 64 twentyfiveGigE5 4 25000 -Ethernet5 63 twentyfiveGigE6 5 25000 -Ethernet6 62 twentyfiveGigE7 6 25000 -Ethernet7 61 twentyfiveGigE8 7 25000 -Ethernet8 49 twentyfiveGigE9 8 25000 -Ethernet9 50 twentyfiveGigE10 9 25000 -Ethernet10 51 twentyfiveGigE11 10 25000 -Ethernet11 52 twentyfiveGigE12 11 25000 -Ethernet12 4 twentyfiveGigE13 12 25000 -Ethernet13 3 twentyfiveGigE14 13 25000 -Ethernet14 2 twentyfiveGigE15 14 25000 -Ethernet15 1 twentyfiveGigE16 15 25000 -Ethernet16 8 twentyfiveGigE17 16 25000 -Ethernet17 7 twentyfiveGigE18 17 25000 -Ethernet18 6 twentyfiveGigE19 18 25000 -Ethernet19 5 twentyfiveGigE20 19 25000 -Ethernet20 16 twentyfiveGigE21 20 25000 -Ethernet21 15 twentyfiveGigE22 21 25000 -Ethernet22 14 twentyfiveGigE23 22 25000 -Ethernet23 13 twentyfiveGigE24 23 25000 -Ethernet24 24 twentyfiveGigE25 24 25000 -Ethernet25 23 twentyfiveGigE26 25 25000 -Ethernet26 22 twentyfiveGigE27 26 25000 -Ethernet27 21 twentyfiveGigE28 27 25000 -Ethernet28 32 twentyfiveGigE29 28 25000 -Ethernet29 31 twentyfiveGigE30 29 25000 -Ethernet30 30 twentyfiveGigE31 30 25000 -Ethernet31 29 twentyfiveGigE32 31 25000 -Ethernet32 36 twentyfiveGigE33 32 25000 -Ethernet33 35 twentyfiveGigE34 33 25000 -Ethernet34 34 twentyfiveGigE35 34 25000 -Ethernet35 33 twentyfiveGigE36 35 25000 -Ethernet36 44 twentyfiveGigE37 36 25000 -Ethernet37 43 twentyfiveGigE38 37 25000 -Ethernet38 42 twentyfiveGigE39 38 25000 -Ethernet39 41 twentyfiveGigE40 39 25000 -Ethernet40 86 twentyfiveGigE41 40 25000 -Ethernet41 85 twentyfiveGigE42 41 25000 -Ethernet42 88 twentyfiveGigE43 42 25000 -Ethernet43 87 twentyfiveGigE44 43 25000 -Ethernet44 94 twentyfiveGigE45 44 25000 -Ethernet45 93 twentyfiveGigE46 45 25000 -Ethernet46 96 twentyfiveGigE47 46 25000 -Ethernet47 95 twentyfiveGigE48 47 25000 -Ethernet48 97,98,99,100 hundredGigE49 48 100000 -Ethernet52 105,106,107,108 hundredGigE50 49 100000 -Ethernet56 113,114,115,116 hundredGigE51 50 100000 -Ethernet60 121,122,123,124 hundredGigE52 51 100000 -Ethernet64 77,78,79,80 hundredGigE53 52 100000 -Ethernet68 65,66,67,68 hundredGigE54 53 100000 -Ethernet72 69,70,71,72 hundredGigE55 54 100000 -Ethernet76 125,126,127,128 hundredGigE56 55 100000 +Ethernet0 60 twentyfiveGigE1 1 25000 +Ethernet1 59 twentyfiveGigE2 2 25000 +Ethernet2 58 twentyfiveGigE3 3 25000 +Ethernet3 57 twentyfiveGigE4 4 25000 +Ethernet4 64 twentyfiveGigE5 5 25000 +Ethernet5 63 twentyfiveGigE6 6 25000 +Ethernet6 62 twentyfiveGigE7 7 25000 +Ethernet7 61 twentyfiveGigE8 8 25000 +Ethernet8 49 twentyfiveGigE9 9 25000 +Ethernet9 50 twentyfiveGigE10 10 25000 +Ethernet10 51 twentyfiveGigE11 11 25000 +Ethernet11 52 twentyfiveGigE12 12 25000 +Ethernet12 4 twentyfiveGigE13 13 25000 +Ethernet13 3 twentyfiveGigE14 14 25000 +Ethernet14 2 twentyfiveGigE15 15 25000 +Ethernet15 1 twentyfiveGigE16 16 25000 +Ethernet16 8 twentyfiveGigE17 17 25000 +Ethernet17 7 twentyfiveGigE18 18 25000 +Ethernet18 6 twentyfiveGigE19 19 25000 +Ethernet19 5 twentyfiveGigE20 20 25000 +Ethernet20 16 twentyfiveGigE21 21 25000 +Ethernet21 15 twentyfiveGigE22 22 25000 +Ethernet22 14 twentyfiveGigE23 23 25000 +Ethernet23 13 twentyfiveGigE24 24 25000 +Ethernet24 24 twentyfiveGigE25 25 25000 +Ethernet25 23 twentyfiveGigE26 26 25000 +Ethernet26 22 twentyfiveGigE27 27 25000 +Ethernet27 21 twentyfiveGigE28 28 25000 +Ethernet28 32 twentyfiveGigE29 29 25000 +Ethernet29 31 twentyfiveGigE30 30 25000 +Ethernet30 30 twentyfiveGigE31 31 25000 +Ethernet31 29 twentyfiveGigE32 32 25000 +Ethernet32 36 twentyfiveGigE33 33 25000 +Ethernet33 35 twentyfiveGigE34 34 25000 +Ethernet34 34 twentyfiveGigE35 35 25000 +Ethernet35 33 twentyfiveGigE36 36 25000 +Ethernet36 44 twentyfiveGigE37 37 25000 +Ethernet37 43 twentyfiveGigE38 38 25000 +Ethernet38 42 twentyfiveGigE39 39 25000 +Ethernet39 41 twentyfiveGigE40 40 25000 +Ethernet40 86 twentyfiveGigE41 41 25000 +Ethernet41 85 twentyfiveGigE42 42 25000 +Ethernet42 88 twentyfiveGigE43 43 25000 +Ethernet43 87 twentyfiveGigE44 44 25000 +Ethernet44 94 twentyfiveGigE45 45 25000 +Ethernet45 93 twentyfiveGigE46 46 25000 +Ethernet46 96 twentyfiveGigE47 47 25000 +Ethernet47 95 twentyfiveGigE48 48 25000 +Ethernet48 97,98,99,100 hundredGigE49 49 100000 +Ethernet52 105,106,107,108 hundredGigE50 50 100000 +Ethernet56 113,114,115,116 hundredGigE51 51 100000 +Ethernet60 121,122,123,124 hundredGigE52 52 100000 +Ethernet64 77,78,79,80 hundredGigE53 53 100000 +Ethernet68 65,66,67,68 hundredGigE54 54 100000 +Ethernet72 69,70,71,72 hundredGigE55 55 100000 +Ethernet76 125,126,127,128 hundredGigE56 56 100000 diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py index 205ed3c82d0..627c99fee0c 100644 --- a/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py @@ -1,91 +1,101 @@ -#!/usr/bin/env python +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# try: import time - from sonic_sfp.sfputilbase import SfpUtilBase -except ImportError, e: - raise ImportError (str(e) + "- required module not found") + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) class SfpUtil(SfpUtilBase): - """Platform specific SfpUtill class""" + """Platform-specific SfpUtil class""" - PORT_START = 0 - PORT_END = 55 - QSFP_PORT_START = 48 + PORT_START = 1 + PORT_END = 56 PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 49 + QSFP_PORT_END = 56 _port_to_eeprom_mapping = {} _port_to_i2c_mapping = { - 0 : 32, - 1 : 33, - 2 : 34, - 3 : 35, - 4 : 36, - 5 : 37, - 6 : 38, - 7 : 39, - 8 : 40, - 9 : 41, - 10 : 42, - 11 : 43, - 12 : 44, - 13 : 45, - 14 : 46, - 15 : 47, - 16 : 48, - 17 : 49, - 18 : 50, - 19 : 51, - 20 : 52, - 21 : 53, - 22 : 54, - 23 : 55, - 24 : 56, - 25 : 57, - 26 : 58, - 27 : 59, - 28 : 60, - 29 : 61, - 30 : 62, - 31 : 63, - 32 : 64, - 33 : 65, - 34 : 66, - 35 : 67, - 36 : 68, - 37 : 69, - 38 : 70, - 39 : 71, - 40 : 72, - 41 : 73, - 42 : 74, - 43 : 75, - 44 : 76, - 45 : 77, - 46 : 78, - 47 : 79, - 48 : 80,#QSFP49 - 49 : 81,#QSFP50 - 50 : 82,#QSFP51 - 51 : 83,#QSFP52 - 52 : 84,#QSFP53 - 53 : 85,#QSFP54 - 54 : 86,#QSFP55 - 55 : 87,#QSFP56 + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + 33 : 64, + 34 : 65, + 35 : 66, + 36 : 67, + 37 : 68, + 38 : 69, + 39 : 70, + 40 : 71, + 41 : 72, + 42 : 73, + 43 : 74, + 44 : 75, + 45 : 76, + 46 : 77, + 47 : 78, + 48 : 79, + 49 : 80,#QSFP49 + 50 : 81,#QSFP50 + 51 : 82,#QSFP51 + 52 : 83,#QSFP52 + 53 : 84,#QSFP53 + 54 : 85,#QSFP54 + 55 : 86,#QSFP55 + 56 : 87,#QSFP56 } @property def port_start(self): return self.PORT_START + @property + def port_end(self): + return self.PORT_END + @property def qsfp_port_start(self): return self.QSFP_PORT_START @property - def port_end(self): - return self.PORT_END + def qsfp_port_end(self): + return self.QSFP_PORT_END @property def qsfp_ports(self): @@ -97,26 +107,26 @@ def port_to_eeprom_mapping(self): def __init__(self): eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' - for x in range(0, self.port_end+1): + for x in range(self.port_start, self.port_end+1): self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x]) SfpUtilBase.__init__(self) def get_presence(self, port_num): # Check for invalid port_num - if port_num < self.PORT_START or port_num > self.PORT_END: + if port_num < self.port_start or port_num > self.port_end: return False try: - if port_num < 48: - reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num+1)+"/pre_n") + if port_num < self.qsfp_port_start: + reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num)+"/pre_n") else: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+34)+"/value") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+34)+"/value") except IOError as e: print "Error: unable to open file: %s" % str(e) return False reg_value = reg_file.readline().rstrip() - if port_num < 48: + if port_num < self.qsfp_port_start: if reg_value == '1': return True else: @@ -127,11 +137,11 @@ def get_presence(self, port_num): def get_low_power_mode(self, port_num): # Check for invalid port_num - if port_num < self.qsfp_port_start or port_num > self.port_end: + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+35)+"/value") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -145,11 +155,11 @@ def get_low_power_mode(self, port_num): def set_low_power_mode(self, port_num, lpmode): # Check for invalid port_num - if port_num < self.qsfp_port_start or port_num > self.port_end: + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+35)+"/value", "r+") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -173,7 +183,7 @@ def reset(self, port_num): return False try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+32)+"/value", "r+") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False @@ -187,7 +197,7 @@ def reset(self, port_num): # Flip the value back write back to the register to take port out of reset try: - reg_file = open("/sys/class/gpio/gpio"+str((port_num-48)*4+32)+"/value", "r+") + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") except IOError as e: print "Error: unable to open file: %s" % str(e) return False diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/port_config.ini b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/port_config.ini new file mode 100644 index 00000000000..8f770329437 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 33,34,35,36,37,38,39,40 fourhundredGigE1 0 +Ethernet4 25,26,27,28,29,30,31,32 fourhundredGigE2 1 +Ethernet8 49,50,51,52,53,54,55,56 fourhundredGigE3 2 +Ethernet12 57,58,59,60,61,62,63,64 fourhundredGigE4 3 +Ethernet16 65,66,67,68,69,70,71,72 fourhundredGigE5 4 +Ethernet20 73,74,75,76,77,78,79,80 fourhundredGigE6 5 +Ethernet24 81,82,83,84,85,86,87,88 fourhundredGigE7 6 +Ethernet28 89,90,91,92,93,94,95,96 fourhundredGigE8 7 +Ethernet32 17,18,19,20,21,22,23,24 fourhundredGigE9 8 +Ethernet36 97,98,99,100,101,102,103,104 fourhundredGigE10 9 +Ethernet40 9,10,11,12,13,14,15,16 fourhundredGigE11 10 +Ethernet44 41,42,43,44,45,46,47,48 fourhundredGigE12 11 +Ethernet48 113,114,115,116,117,118,119,120 fourhundredGigE13 12 +Ethernet52 105,106,107,108,109,110,111,112 fourhundredGigE14 13 +Ethernet56 121,122,123,124,125,126,127,128 fourhundredGigE15 14 +Ethernet60 1,2,3,4,5,6,7,8 fourhundredGigE16 15 +Ethernet64 137,138,139,140,141,142,143,144 fourhundredGigE17 16 +Ethernet68 129,130,131,132,133,134,135,136 fourhundredGigE18 17 +Ethernet72 241,242,243,244,245,246,247,248 fourhundredGigE19 18 +Ethernet76 249,250,251,252,253,254,255,256 fourhundredGigE20 19 +Ethernet80 225,226,227,228,229,230,231,232 fourhundredGigE21 20 +Ethernet84 145,146,147,148,149,150,151,152 fourhundredGigE22 21 +Ethernet88 153,154,155,156,157,158,159,160 fourhundredGigE23 22 +Ethernet92 233,234,235,236,237,238,239,240 fourhundredGigE24 23 +Ethernet96 161,162,163,164,165,166,167,168 fourhundredGigE25 24 +Ethernet100 169,170,171,172,173,174,175,176 fourhundredGigE26 25 +Ethernet104 177,178,179,180,181,182,183,184 fourhundredGigE27 26 +Ethernet108 185,186,187,188,189,190,191,192 fourhundredGigE28 27 +Ethernet112 193,194,195,196,197,198,199,200 fourhundredGigE29 28 +Ethernet116 201,202,203,204,205,206,207,208 fourhundredGigE30 29 +Ethernet120 209,210,211,212,213,214,215,216 fourhundredGigE31 30 +Ethernet124 217,218,219,220,221,222,223,224 fourhundredGigE32 31 diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/sai.profile b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/sai.profile new file mode 100644 index 00000000000..54b62b1d097 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-ix9-32x400G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/th3-ix9-32x400G.config.bcm b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/th3-ix9-32x400G.config.bcm new file mode 100644 index 00000000000..704183e1092 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/th3-ix9-32x400G.config.bcm @@ -0,0 +1,341 @@ +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +init_all_modules=0 +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 + +load_firmware=0x2 +port_flex_enable=1 + +# portmap settings +pbmp_xport_xe=0x111101111411110111101111011114111102222 + +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 + +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 + +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 + +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 + +# datapath port +portmap_38=257:10 +portmap_118=258:10 + +# loopback port +portmap_19=260:10 +portmap_39=260:10 +portmap_59=261:10 +portmap_79=262:10 +portmap_99=263:10 +portmap_119=264:10 +portmap_139=265:10 +portmap_159=266:10 + +# port order remap +dport_map_port_20=1 +dport_map_port_13=2 +dport_map_port_28=3 +dport_map_port_32=4 +dport_map_port_40=5 +dport_map_port_44=6 +dport_map_port_48=7 +dport_map_port_52=8 +dport_map_port_9=9 +dport_map_port_60=10 +dport_map_port_5=11 +dport_map_port_24=12 +dport_map_port_68=13 +dport_map_port_64=14 +dport_map_port_72=15 +dport_map_port_1=16 + +dport_map_port_84=17 +dport_map_port_80=18 +dport_map_port_148=19 +dport_map_port_152=20 +dport_map_port_140=21 +dport_map_port_88=22 +dport_map_port_92=23 +dport_map_port_144=24 +dport_map_port_100=25 +dport_map_port_104=26 +dport_map_port_108=27 +dport_map_port_112=28 +dport_map_port_120=29 +dport_map_port_124=30 +dport_map_port_128=31 +dport_map_port_132=32 + +dport_map_port_38=33 +dport_map_port_118=34 + +### lane swap and polarity follow front port order ### +phy_chain_tx_lane_map_physical{33.0}=0x75206431 +serdes_core_tx_polarity_flip_physical{33}=0xdb +phy_chain_rx_lane_map_physical{33.0}=0x13572064 +serdes_core_rx_polarity_flip_physical{33}=0x69 + +phy_chain_tx_lane_map_physical{25.0}=0x75314206 +serdes_core_tx_polarity_flip_physical{25}=0xe8 +phy_chain_rx_lane_map_physical{25.0}=0x67103524 +serdes_core_rx_polarity_flip_physical{25}=0x7c + +phy_chain_tx_lane_map_physical{49.0}=0x57326014 +serdes_core_tx_polarity_flip_physical{49}=0x0e +phy_chain_rx_lane_map_physical{49.0}=0x21463057 +serdes_core_rx_polarity_flip_physical{49}=0xd2 + +phy_chain_tx_lane_map_physical{57.0}=0x12307564 +serdes_core_tx_polarity_flip_physical{57}=0xa6 +phy_chain_rx_lane_map_physical{57.0}=0x57460231 +serdes_core_rx_polarity_flip_physical{57}=0x99 + +phy_chain_tx_lane_map_physical{65.0}=0x60345721 +serdes_core_tx_polarity_flip_physical{65}=0xe2 +phy_chain_rx_lane_map_physical{65.0}=0x40675123 +serdes_core_rx_polarity_flip_physical{65}=0x0f + +phy_chain_tx_lane_map_physical{73.0}=0x21306574 +serdes_core_tx_polarity_flip_physical{73}=0xa4 +phy_chain_rx_lane_map_physical{73.0}=0x67451302 +serdes_core_rx_polarity_flip_physical{73}=0x06 + +phy_chain_tx_lane_map_physical{81.0}=0x65210347 +serdes_core_tx_polarity_flip_physical{81}=0xe2 +phy_chain_rx_lane_map_physical{81.0}=0x10675423 +serdes_core_rx_polarity_flip_physical{81}=0x0f + +phy_chain_tx_lane_map_physical{89.0}=0x41236570 +serdes_core_tx_polarity_flip_physical{89}=0x8d +phy_chain_rx_lane_map_physical{89.0}=0x45672031 +serdes_core_rx_polarity_flip_physical{89}=0x63 + +phy_chain_tx_lane_map_physical{17.0}=0x76312504 +serdes_core_tx_polarity_flip_physical{17}=0x8e +phy_chain_rx_lane_map_physical{17.0}=0x75126403 +serdes_core_rx_polarity_flip_physical{17}=0x2d + +phy_chain_tx_lane_map_physical{97.0}=0x31025764 +serdes_core_tx_polarity_flip_physical{97}=0x3c +phy_chain_rx_lane_map_physical{97.0}=0x52136470 +serdes_core_rx_polarity_flip_physical{97}=0x9c + +phy_chain_tx_lane_map_physical{9.0}=0x57326014 +serdes_core_tx_polarity_flip_physical{9}=0x3d +phy_chain_rx_lane_map_physical{9.0}=0x31452076 +serdes_core_rx_polarity_flip_physical{9}=0x1e + +phy_chain_tx_lane_map_physical{41.0}=0x03215764 +serdes_core_tx_polarity_flip_physical{41}=0x3c +phy_chain_rx_lane_map_physical{41.0}=0x54671302 +serdes_core_rx_polarity_flip_physical{41}=0x99 + +phy_chain_tx_lane_map_physical{113.0}=0x60175243 +serdes_core_tx_polarity_flip_physical{113}=0xcd +phy_chain_rx_lane_map_physical{113.0}=0x20473156 +serdes_core_rx_polarity_flip_physical{113}=0x87 + +phy_chain_tx_lane_map_physical{105.0}=0x65034721 +serdes_core_tx_polarity_flip_physical{105}=0xe6 +phy_chain_rx_lane_map_physical{105.0}=0x04157263 +serdes_core_rx_polarity_flip_physical{105}=0x4c + +phy_chain_tx_lane_map_physical{121.0}=0x16435072 +serdes_core_tx_polarity_flip_physical{121}=0xae +phy_chain_rx_lane_map_physical{121.0}=0x13560247 +serdes_core_rx_polarity_flip_physical{121}=0x2d + +phy_chain_tx_lane_map_physical{1.0}=0x34650172 +serdes_core_tx_polarity_flip_physical{1}=0xff +phy_chain_rx_lane_map_physical{1.0}=0x13026457 +serdes_core_rx_polarity_flip_physical{1}=0x99 + +phy_chain_tx_lane_map_physical{137.0}=0x02673451 +serdes_core_tx_polarity_flip_physical{137}=0x25 +phy_chain_rx_lane_map_physical{137.0}=0x14730562 +serdes_core_rx_polarity_flip_physical{137}=0x86 + +phy_chain_tx_lane_map_physical{129.0}=0x12304675 +serdes_core_tx_polarity_flip_physical{129}=0x49 +phy_chain_rx_lane_map_physical{129.0}=0x76453021 +serdes_core_rx_polarity_flip_physical{129}=0xc3 + +phy_chain_tx_lane_map_physical{241.0}=0x31462075 +serdes_core_tx_polarity_flip_physical{241}=0xf5 +phy_chain_rx_lane_map_physical{241.0}=0x47315602 +serdes_core_rx_polarity_flip_physical{241}=0xe1 + +phy_chain_tx_lane_map_physical{249.0}=0x13206547 +serdes_core_tx_polarity_flip_physical{249}=0x27 +phy_chain_rx_lane_map_physical{249.0}=0x64750312 +serdes_core_rx_polarity_flip_physical{249}=0xbd + +phy_chain_tx_lane_map_physical{225.0}=0x60315742 +serdes_core_tx_polarity_flip_physical{225}=0x44 +phy_chain_rx_lane_map_physical{225.0}=0x01546372 +serdes_core_rx_polarity_flip_physical{225}=0xc3 + +phy_chain_tx_lane_map_physical{145.0}=0x51374602 +serdes_core_tx_polarity_flip_physical{145}=0x5f +phy_chain_rx_lane_map_physical{145.0}=0x23106754 +serdes_core_rx_polarity_flip_physical{145}=0xbc + +phy_chain_tx_lane_map_physical{153.0}=0x05163742 +serdes_core_tx_polarity_flip_physical{153}=0x0f +phy_chain_rx_lane_map_physical{153.0}=0x67102354 +serdes_core_rx_polarity_flip_physical{153}=0xf0 + +phy_chain_tx_lane_map_physical{233.0}=0x20134576 +serdes_core_tx_polarity_flip_physical{233}=0x07 +phy_chain_rx_lane_map_physical{233.0}=0x23107465 +serdes_core_rx_polarity_flip_physical{233}=0xe6 + +phy_chain_tx_lane_map_physical{161.0}=0x53246710 +serdes_core_tx_polarity_flip_physical{161}=0x0f +phy_chain_rx_lane_map_physical{161.0}=0x03471265 +serdes_core_rx_polarity_flip_physical{161}=0xc0 + +phy_chain_tx_lane_map_physical{169.0}=0x20137654 +serdes_core_tx_polarity_flip_physical{169}=0x8a +phy_chain_rx_lane_map_physical{169.0}=0x27360415 +serdes_core_rx_polarity_flip_physical{169}=0x9c + +phy_chain_tx_lane_map_physical{177.0}=0x50346712 +serdes_core_tx_polarity_flip_physical{177}=0x4f +phy_chain_rx_lane_map_physical{177.0}=0x13460257 +serdes_core_rx_polarity_flip_physical{177}=0x5a + +phy_chain_tx_lane_map_physical{185.0}=0x12305674 +serdes_core_tx_polarity_flip_physical{185}=0xba +phy_chain_rx_lane_map_physical{185.0}=0x57460123 +serdes_core_rx_polarity_flip_physical{185}=0x9f + +phy_chain_tx_lane_map_physical{193.0}=0x50346712 +serdes_core_tx_polarity_flip_physical{193}=0x4f +phy_chain_rx_lane_map_physical{193.0}=0x13750264 +serdes_core_rx_polarity_flip_physical{193}=0x69 + +phy_chain_tx_lane_map_physical{201.0}=0x12305674 +serdes_core_tx_polarity_flip_physical{201}=0xba +phy_chain_rx_lane_map_physical{201.0}=0x57460123 +serdes_core_rx_polarity_flip_physical{201}=0x9f + +phy_chain_tx_lane_map_physical{209.0}=0x50346712 +serdes_core_tx_polarity_flip_physical{209}=0x4f +phy_chain_rx_lane_map_physical{209.0}=0x13460275 +serdes_core_rx_polarity_flip_physical{209}=0x5a + +phy_chain_tx_lane_map_physical{217.0}=0x31205674 +serdes_core_tx_polarity_flip_physical{217}=0x5a +phy_chain_rx_lane_map_physical{217.0}=0x67541203 +serdes_core_rx_polarity_flip_physical{217}=0x33 + + +port_fec_20=9 +port_fec_13=9 +port_fec_28=9 +port_fec_32=9 +port_fec_40=9 +port_fec_44=9 +port_fec_48=9 +port_fec_52=9 +port_fec_9=9 +port_fec_60=9 +port_fec_5=9 +port_fec_24=9 +port_fec_68=9 +port_fec_64=9 +port_fec_72=9 +port_fec_1=9 + +port_fec_84=9 +port_fec_80=9 +port_fec_148=9 +port_fec_152=9 +port_fec_140=9 +port_fec_88=9 +port_fec_92=9 +port_fec_144=9 +port_fec_100=9 +port_fec_104=9 +port_fec_108=9 +port_fec_112=9 +port_fec_120=9 +port_fec_124=9 +port_fec_128=9 +port_fec_132=9 + + +port_init_cl72_20=1 +port_init_cl72_13=1 +port_init_cl72_28=1 +port_init_cl72_32=1 +port_init_cl72_40=1 +port_init_cl72_44=1 +port_init_cl72_48=1 +port_init_cl72_52=1 +port_init_cl72_9=1 +port_init_cl72_60=1 +port_init_cl72_5=1 +port_init_cl72_24=1 +port_init_cl72_68=1 +port_init_cl72_64=1 +port_init_cl72_72=1 +port_init_cl72_1=1 + +port_init_cl72_84=1 +port_init_cl72_80=1 +port_init_cl72_148=1 +port_init_cl72_152=1 +port_init_cl72_140=1 +port_init_cl72_88=1 +port_init_cl72_92=1 +port_init_cl72_144=1 +port_init_cl72_100=1 +port_init_cl72_104=1 +port_init_cl72_108=1 +port_init_cl72_112=1 +port_init_cl72_120=1 +port_init_cl72_124=1 +port_init_cl72_128=1 +port_init_cl72_132=1 + + diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/default_sku b/device/quanta/x86_64-quanta_ix9_bwde-r0/default_sku new file mode 100644 index 00000000000..0ca35bb0074 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX9-32X t1 diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/installer.conf b/device/quanta/x86_64-quanta_ix9_bwde-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix9_bwde-r0/led_proc_init.soc new file mode 100644 index 00000000000..adff95218e4 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/led_proc_init.soc @@ -0,0 +1,2 @@ +sleep 10 +led auto on diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/eeprom.py new file mode 100644 index 00000000000..2a35f3a22a1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/psuutil.py new file mode 100644 index 00000000000..885842bbda5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/psuutil.py @@ -0,0 +1,49 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 1 + + return status diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/sfputil.py new file mode 100644 index 00000000000..6dc23d8195f --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/sfputil.py @@ -0,0 +1,176 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 0 + _port_end = 31 + ports_in_block = 32 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + } + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(0, self._port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x+1]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/module_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + diff --git a/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf index 4bff0a177b6..f156534f873 100644 --- a/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf +++ b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf @@ -23,13 +23,13 @@ "p4_pipelines": [ { "p4_pipeline_name": "pipe", - "config": "share/tofinopd/switch/pipe/tofino.bin", - "context": "share/tofinopd/switch/pipe/context.json" + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" } ], "program-name": "switch", "switchsai": "lib/libswitchsai.so", - "bfrt-config": "share/tofinopd/switch/bf-rt.json", + "bfrt-config": "share/switch/bf-rt.json", "model_json_path" : "share/switch/aug_model.json", "switchapi_port_add": false, "non_default_port_ppgs": 5 diff --git a/dockers/docker-base-stretch/Dockerfile.j2 b/dockers/docker-base-stretch/Dockerfile.j2 index ed59c329871..ec0aaac1bbe 100644 --- a/dockers/docker-base-stretch/Dockerfile.j2 +++ b/dockers/docker-base-stretch/Dockerfile.j2 @@ -21,6 +21,10 @@ RUN while [ -n "$(find /usr/share/doc -depth -type d -empty -print -exec rmdir { /var/cache/man/* \ /usr/share/locale/* +{% if APT_CACHER_NG_PROXY.strip() -%} + RUN echo 'Acquire::http::Proxy "{{APT_CACHER_NG_PROXY}}";' >> /etc/apt/apt.conf.d/02proxy +{%- endif %} + # Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/dockers/docker-base/Dockerfile.j2 b/dockers/docker-base/Dockerfile.j2 index 74c9d6fd8ce..7d482b0e2f1 100644 --- a/dockers/docker-base/Dockerfile.j2 +++ b/dockers/docker-base/Dockerfile.j2 @@ -23,6 +23,10 @@ RUN rm -rf \ /var/cache/man/* \ /usr/share/locale/* +{% if APT_CACHER_NG_PROXY.strip() -%} + RUN echo 'Acquire::http::Proxy "{{APT_CACHER_NG_PROXY}}";' >> /etc/apt/apt.conf.d/02proxy +{%- endif %} + # Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2 index 9ec3926de6f..acb5e013fb8 100644 --- a/dockers/docker-database/Dockerfile.j2 +++ b/dockers/docker-database/Dockerfile.j2 @@ -32,6 +32,9 @@ RUN apt-get clean -y && \ s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/ \ ' /etc/redis/redis.conf -COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["supervisord.conf.j2", "/usr/share/sonic/templates/"] +COPY ["docker-database-init.sh", "/usr/local/bin/"] +COPY ["ping_pong_db_insts", "/usr/local/bin/"] +COPY ["database_config.json", "/etc/default/sonic-db/"] -ENTRYPOINT ["/usr/bin/supervisord"] +ENTRYPOINT ["/usr/local/bin/docker-database-init.sh"] diff --git a/dockers/docker-database/database_config.json b/dockers/docker-database/database_config.json new file mode 100644 index 00000000000..6725af38c5e --- /dev/null +++ b/dockers/docker-database/database_config.json @@ -0,0 +1,43 @@ +{ + "INSTANCES": { + "redis":{ + "port": 6379, + "socket": "/var/run/redis/redis.sock" + } + }, + "DATABASES" : { + "APPL_DB" : { + "id" : 0, + "instance" : "redis" + }, + "ASIC_DB" : { + "id" : 1, + "instance" : "redis" + }, + "COUNTERS_DB" : { + "id" : 2, + "instance" : "redis" + }, + "LOGLEVEL_DB" : { + "id" : 3, + "instance" : "redis" + }, + "CONFIG_DB" : { + "id" : 4, + "instance" : "redis" + }, + "PFC_WD_DB" : { + "id" : 5, + "instance" : "redis" + }, + "FLEX_COUNTER_DB" : { + "id" : 5, + "instance" : "redis" + }, + "STATE_DB" : { + "id" : 6, + "instance" : "redis" + } + }, + "VERSION" : "1.0" +} diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh new file mode 100755 index 00000000000..ebdcc6abb69 --- /dev/null +++ b/dockers/docker-database/docker-database-init.sh @@ -0,0 +1,14 @@ +#!/usr/bin/env bash + +mkdir -p /var/run/redis/sonic-db +if [ -f /etc/sonic/database_config.json ]; then + cp /etc/sonic/database_config.json /var/run/redis/sonic-db +else + cp /etc/default/sonic-db/database_config.json /var/run/redis/sonic-db +fi + +mkdir -p /etc/supervisor/conf.d/ +# generate all redis server supervisord configuration file +sonic-cfggen -j /var/run/redis/sonic-db/database_config.json -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf + +exec /usr/bin/supervisord diff --git a/dockers/docker-database/ping_pong_db_insts b/dockers/docker-database/ping_pong_db_insts new file mode 100755 index 00000000000..484d4da0cfb --- /dev/null +++ b/dockers/docker-database/ping_pong_db_insts @@ -0,0 +1,40 @@ +#!/usr/bin/python +import json +import os +import subprocess +import time +import syslog + +def ping_redis(cmd): + output = '' + while True: + try: + output = subprocess.check_output(cmd, shell=True) + except subprocess.CalledProcessError as e: + syslog.syslog(syslog.LOG_ERR, 'ping redis failed, cmd : {}'.format(cmd)) + + if 'PONG' in output: + break + syslog.syslog(syslog.LOG_ERR, 'ping response : {}'.format(output)) + time.sleep(1) + +database_config_file = "/var/run/redis/sonic-db/database_config.json" + +data = {} +while True: + if os.path.isfile(database_config_file): + with open(database_config_file, "r") as read_file: + data = json.load(read_file) + break + time.sleep(1) + syslog.syslog(syslog.LOG_ERR, 'config file {} does not exist right now'.format(database_config_file)) + +while True: + if 'INSTANCES' in data: + for inst in data["INSTANCES"]: + port = data["INSTANCES"][inst]["port"] + cmd = "redis-cli -p " + str(port) + " ping" + ping_redis(cmd) + break + time.sleep(1) + syslog.syslog(syslog.LOG_ERR, 'config file {} does not have INSTANCES'.format(database_config_file)) diff --git a/dockers/docker-database/supervisord.conf b/dockers/docker-database/supervisord.conf deleted file mode 100644 index 798fedd0c89..00000000000 --- a/dockers/docker-database/supervisord.conf +++ /dev/null @@ -1,21 +0,0 @@ -[supervisord] -logfile_maxbytes=1MB -logfile_backups=2 -nodaemon=true - -[program:rsyslogd] -command=/bin/bash -c "rm -f /var/run/rsyslogd.pid && /usr/sbin/rsyslogd -n" -priority=1 -autostart=true -autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog - -[program:redis-server] -command=/bin/bash -c "{ [[ -s /var/lib/redis/dump.rdb ]] || rm -f /var/lib/redis/dump.rdb; } && exec /usr/bin/redis-server /etc/redis/redis.conf" -priority=2 -autostart=true -autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog - diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2 new file mode 100644 index 00000000000..9e4a42d6b3a --- /dev/null +++ b/dockers/docker-database/supervisord.conf.j2 @@ -0,0 +1,24 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:rsyslogd] +command=/bin/bash -c "rm -f /var/run/rsyslogd.pid && /usr/sbin/rsyslogd -n" +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +{% if INSTANCES %} +{% for redis_inst, redis_items in INSTANCES.iteritems() %} +[program: {{ redis_inst }}] +command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && exec /usr/bin/redis-server /etc/redis/redis.conf --port {{ redis_items['port'] }} --unixsocket {{ redis_items['socket'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }}" +priority=2 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +{% endfor %} +{% endif %} diff --git a/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 b/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 index bf50abe4f05..fd7c3ff95bc 100644 --- a/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 +++ b/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 @@ -29,12 +29,19 @@ function wait_until_iface_ready # Wait for all interfaces to be up and ready -{% for (name, prefix) in INTERFACE|pfx_filter %} +{% for name in PORT %} +{% if name in INTERFACE %} wait_until_iface_ready ${PORT_TABLE_PREFIX} {{ name }} +{% endif %} {% endfor %} -{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +{% for name in VLAN %} +{% if name in VLAN_INTERFACE %} wait_until_iface_ready ${VLAN_TABLE_PREFIX} {{ name }} +{% endif %} {% endfor %} -{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %} +{% for name in PORTCHANNEL %} +{% if name in PORTCHANNEL_INTERFACE %} wait_until_iface_ready ${LAG_TABLE_PREFIX} {{ name }} +{% endif %} {% endfor %} + diff --git a/dockers/docker-fpm-frr/bgpcfgd b/dockers/docker-fpm-frr/bgpcfgd index 012a766c20b..f6d0b86385b 100755 --- a/dockers/docker-fpm-frr/bgpcfgd +++ b/dockers/docker-fpm-frr/bgpcfgd @@ -1,65 +1,124 @@ #!/usr/bin/env python import sys +import copy +import Queue import redis import subprocess import syslog -from swsssdk import ConfigDBConnector +import os +from swsscommon import swsscommon -class BGPConfigDaemon: + +def run_command(command): + syslog.syslog(syslog.LOG_DEBUG, "execute command {}.".format(command)) + p = subprocess.Popen(command, shell=True, stdout=subprocess.PIPE) + stdout = p.communicate()[0] + p.wait() + if p.returncode != 0: + syslog.syslog(syslog.LOG_ERR, 'command execution returned {}. Command: "{}", stdout: "{}"'.format(p.returncode, command, stdout)) + + +class BGPConfigManager(object): + def __init__(self, daemon): + self.daemon = daemon + self.bgp_asn = None + self.bgp_message = Queue.Queue(0) + daemon.add_manager(swsscommon.CONFIG_DB, swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, self.__metadata_handler) + daemon.add_manager(swsscommon.CONFIG_DB, swsscommon.CFG_BGP_NEIGHBOR_TABLE_NAME, self.__bgp_handler) + + def __metadata_handler(self, key, op, data): + if key != "localhost" \ + or "bgp_asn" not in data \ + or self.bgp_asn == data["bgp_asn"]: + return + + # TODO add ASN update commands + + self.bgp_asn = data["bgp_asn"] + self.__update_bgp() + + def __update_bgp(self): + while not self.bgp_message.empty(): + key, op, data = self.bgp_message.get() + syslog.syslog(syslog.LOG_INFO, 'value for {} changed to {}'.format(key, data)) + if op == swsscommon.SET_COMMAND: + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'neighbor {} remote-as {}'".format(self.bgp_asn, key, data['asn']) + run_command(command) + if "name" in data: + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'neighbor {} description {}'".format(self.bgp_asn, key, data['name']) + run_command(command) + if "admin_status" in data: + command_mod = "no " if data["admin_status"] == "up" else "" + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c '{}neighbor {} shutdown'".format(self.bgp_asn, command_mod, key) + run_command(command) + elif op == swsscommon.DEL_COMMAND: + # Neighbor is deleted + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'no neighbor {}'".format(self.bgp_asn, key) + run_command(command) + + def __bgp_handler(self, key, op, data): + self.bgp_message.put((key, op, data)) + # If ASN is not set, we just cache this message until the ASN is set. + if self.bgp_asn == None: + return + self.__update_bgp() + + +class Daemon(object): + + SELECT_TIMEOUT = 1000 + SUPPORT_DATABASE_LIST = (swsscommon.APPL_DB, swsscommon.CONFIG_DB) def __init__(self): - self.config_db = ConfigDBConnector() - self.config_db.connect() - self.bgp_asn = self.config_db.get_entry('DEVICE_METADATA', 'localhost')['bgp_asn'] - self.bgp_neighbor = self.config_db.get_table('BGP_NEIGHBOR') - - def __run_command(self, command): -# print command - p = subprocess.Popen(command, shell=True, stdout=subprocess.PIPE) - stdout = p.communicate()[0] - p.wait() - if p.returncode != 0: - syslog.syslog(syslog.LOG_ERR, '[bgp cfgd] command execution returned {}. Command: "{}", stdout: "{}"'.format(p.returncode, command, stdout)) - - def metadata_handler(self, key, data): - if key == 'localhost' and data.has_key('bgp_asn'): - if data['bgp_asn'] != self.bgp_asn: - syslog.syslog(syslog.LOG_INFO, '[bgp cfgd] ASN changed to {} from {}, restart BGP...'.format(data['bgp_asn'], self.bgp_asn)) - self.__run_command("supervisorctl restart start.sh") - self.__run_command("service quagga restart") - self.bgp_asn = data['bgp_asn'] - - def bgp_handler(self, key, data): - syslog.syslog(syslog.LOG_INFO, '[bgp cfgd] value for {} changed to {}'.format(key, data)) - if not data: - # Neighbor is deleted - command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'no neighbor {}'".format(self.bgp_asn, key) - self.__run_command(command) - self.bgp_neighbor.pop(key) - else: - command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'neighbor {} remote-as {}'".format(self.bgp_asn, key, data['asn']) - self.__run_command(command) - if data.has_key('name'): - command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'neighbor {} description {}'".format(self.bgp_asn, key, data['name']) - self.__run_command(command) - if data.has_key('admin_status'): - command_mod = 'no ' if data['admin_status'] == 'up' else '' - command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c '{}neighbor {} shutdown'".format(self.bgp_asn, command_mod, key) - self.__run_command(command) - self.bgp_neighbor[key] = data + self.appl_db = swsscommon.DBConnector(swsscommon.APPL_DB, swsscommon.DBConnector.DEFAULT_UNIXSOCKET, 0) + self.conf_db = swsscommon.DBConnector(swsscommon.CONFIG_DB, swsscommon.DBConnector.DEFAULT_UNIXSOCKET, 0) + self.selector = swsscommon.Select() + self.db_connectors = {} + self.callbacks = {} + self.subscribers = set() + + def get_db_connector(self, db): + if db not in Daemon.SUPPORT_DATABASE_LIST: + raise ValueError("database {} not Daemon support list {}.".format(db, SUPPORT_DATABASE_LIST)) + # if this database connector has been initialized + if db not in self.db_connectors: + self.db_connectors[db] = swsscommon.DBConnector(db, swsscommon.DBConnector.DEFAULT_UNIXSOCKET, 0) + return self.db_connectors[db] + + def add_manager(self, db, table_name, callback): + if db not in self.callbacks: + self.callbacks[db] = {} + if table_name not in self.callbacks[db]: + self.callbacks[db][table_name] = [] + conn = self.get_db_connector(db) + subscriber = swsscommon.SubscriberStateTable(conn, table_name) + self.subscribers.add(subscriber) + self.selector.addSelectable(subscriber) + self.callbacks[db][table_name].append(callback) def start(self): - self.config_db.subscribe('BGP_NEIGHBOR', - lambda table, key, data: self.bgp_handler(key, data)) - self.config_db.subscribe('DEVICE_METADATA', - lambda table, key, data: self.metadata_handler(key, data)) - self.config_db.listen() + while True: + state, selectable = self.selector.select(Daemon.SELECT_TIMEOUT) + if not selectable: + continue + for subscriber in self.subscribers: + key, op, fvs = subscriber.pop() + # if no new message + if not key: + continue + data = dict(fvs) + syslog.syslog(syslog.LOG_DEBUG, "Receive message : {}".format((key, op, fvs))) + for callback in self.callbacks[subscriber.getDbConnector().getDbId()][subscriber.getTableName()]: + callback(key, op, data) def main(): - daemon = BGPConfigDaemon() + syslog.openlog("bgpcfgd") + daemon = Daemon() + bgp_manager = BGPConfigManager(daemon) daemon.start() + syslog.closelog() if __name__ == "__main__": main() diff --git a/dockers/docker-fpm-frr/start.sh b/dockers/docker-fpm-frr/start.sh index 555c1ce2491..fd092919e00 100755 --- a/dockers/docker-fpm-frr/start.sh +++ b/dockers/docker-fpm-frr/start.sh @@ -7,12 +7,13 @@ CONFIG_TYPE=`sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["docker_routing_co if [ -z "$CONFIG_TYPE" ] || [ "$CONFIG_TYPE" == "separated" ]; then sonic-cfggen -d -y /etc/sonic/deployment_id_asn_map.yml -t /usr/share/sonic/templates/bgpd.conf.j2 > /etc/frr/bgpd.conf sonic-cfggen -d -t /usr/share/sonic/templates/zebra.conf.j2 > /etc/frr/zebra.conf + sonic-cfggen -d -t /usr/share/sonic/templates/staticd.conf.j2 > /etc/frr/staticd.conf echo "no service integrated-vtysh-config" > /etc/frr/vtysh.conf rm -f /etc/frr/frr.conf elif [ "$CONFIG_TYPE" == "unified" ]; then sonic-cfggen -d -y /etc/sonic/deployment_id_asn_map.yml -t /usr/share/sonic/templates/frr.conf.j2 >/etc/frr/frr.conf echo "service integrated-vtysh-config" > /etc/frr/vtysh.conf - rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf + rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf /etc/frr/staticd.conf fi sonic-cfggen -d -t /usr/share/sonic/templates/isolate.j2 > /usr/sbin/bgp-isolate diff --git a/dockers/docker-fpm-frr/staticd.conf.j2 b/dockers/docker-fpm-frr/staticd.conf.j2 new file mode 100644 index 00000000000..b3de8c424f1 --- /dev/null +++ b/dockers/docker-fpm-frr/staticd.conf.j2 @@ -0,0 +1,29 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/staticd.conf.j2 using config DB data +! file: staticd.conf +! +{% endblock banner %} +! +{% block sys_init %} +hostname {{ DEVICE_METADATA['localhost']['hostname'] }} +password zebra +enable password zebra +{% endblock sys_init %} +! +{% block default_route %} +! set static default route to mgmt gateway as a backup to learned default +{% for (name, prefix) in MGMT_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +ip route 0.0.0.0/0 {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} 200 +{% endif %} +{% endfor %} +{% endblock default_route %} +! +{% block logging %} +log syslog informational +log facility local4 +{% endblock logging %} +! + diff --git a/dockers/docker-fpm-frr/zebra.conf.j2 b/dockers/docker-fpm-frr/zebra.conf.j2 index 7200d81fda4..3135a056a65 100644 --- a/dockers/docker-fpm-frr/zebra.conf.j2 +++ b/dockers/docker-fpm-frr/zebra.conf.j2 @@ -36,15 +36,6 @@ link-detect {% endfor %} {% endblock interfaces %} ! -{% block default_route %} -! set static default route to mgmt gateway as a backup to learned default -{% for (name, prefix) in MGMT_INTERFACE|pfx_filter %} -{% if prefix | ipv4 %} -ip route 0.0.0.0/0 {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} 200 -{% endif %} -{% endfor %} -{% endblock default_route %} -! {% block source_loopback %} {% set lo_ipv4_addrs = [] %} {% set lo_ipv6_addrs = [] %} diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh index a94916d351f..5e01cd480f5 100755 --- a/dockers/docker-orchagent/orchagent.sh +++ b/dockers/docker-orchagent/orchagent.sh @@ -31,6 +31,8 @@ elif [ "$platform" == "vs" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" elif [ "$platform" == "mellanox" ]; then ORCHAGENT_ARGS+="" +elif [ "$platform" == "innovium" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" else MAC_ADDRESS=`sonic-cfggen -d -v 'DEVICE_METADATA.localhost.mac'` ORCHAGENT_ARGS+="-m $MAC_ADDRESS" diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2 index a7dafd40f26..f8beffbc9ad 100644 --- a/dockers/docker-orchagent/switch.json.j2 +++ b/dockers/docker-orchagent/switch.json.j2 @@ -6,6 +6,8 @@ {% set hash_seed = 0 %} {% elif DEVICE_METADATA.localhost.type == "LeafRouter" %} {% set hash_seed = 10 %} +{% elif DEVICE_METADATA.localhost.type == "SpineRouter" %} +{% set hash_seed = 15 %} {% endif %} {% endif %} [ diff --git a/dockers/docker-snmp-sv2/Dockerfile.j2 b/dockers/docker-snmp-sv2/Dockerfile.j2 index 371bd17e255..fd379c56d5c 100644 --- a/dockers/docker-snmp-sv2/Dockerfile.j2 +++ b/dockers/docker-snmp-sv2/Dockerfile.j2 @@ -22,7 +22,8 @@ RUN apt-get update && \ ca-certificates \ gcc \ make \ - libdpkg-perl + libdpkg-perl \ + ipmitool {% if docker_snmp_sv2_debs.strip() -%} # Copy locally-built Debian package dependencies diff --git a/files/build_templates/database.service.j2 b/files/build_templates/database.service.j2 index efa98b168be..472b9d328b7 100644 --- a/files/build_templates/database.service.j2 +++ b/files/build_templates/database.service.j2 @@ -2,6 +2,7 @@ Description=Database container Requires=docker.service After=docker.service +After=rc-local.service [Service] User=root diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2 index 9966728988b..756ce16a2bc 100644 --- a/files/build_templates/docker_image_ctl.j2 +++ b/files/build_templates/docker_image_ctl.j2 @@ -71,10 +71,7 @@ function postStartAction() { {%- if docker_container_name == "database" %} # Wait until redis starts - REDIS_SOCK="/var/run/redis/redis.sock" - until [[ $(/usr/bin/docker exec database redis-cli -s $REDIS_SOCK ping | grep -c PONG) -gt 0 ]]; do - sleep 1; - done + /usr/bin/docker exec database ping_pong_db_insts if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast") && -f $WARM_DIR/dump.rdb ]]; then rm -f $WARM_DIR/dump.rdb else @@ -163,6 +160,11 @@ start() { {%- if docker_container_name == "database" %} echo "Creating new {{docker_container_name}} container" + # if database_config exists in old_config, use it; otherwise use the default one in new image + if [ -f /etc/sonic/old_config/database_config.json ]; then + echo "Use database_config.json from old system..." + mv /etc/sonic/old_config/database_config.json /etc/sonic/ + fi {%- else %} echo "Creating new {{docker_container_name}} container with HWSKU $HWSKU" {%- endif %} diff --git a/files/build_templates/radv.service.j2 b/files/build_templates/radv.service.j2 index 4f1c67e661b..3dadc56e46a 100644 --- a/files/build_templates/radv.service.j2 +++ b/files/build_templates/radv.service.j2 @@ -1,6 +1,6 @@ [Unit] Description=Router advertiser container -Requires=updategraph.service swss.service +Requires=updategraph.service After=updategraph.service swss.service Before=ntp-config.service @@ -11,4 +11,4 @@ ExecStart=/usr/bin/{{ docker_container_name }}.sh wait ExecStop=/usr/bin/{{ docker_container_name }}.sh stop [Install] -WantedBy=multi-user.target swss.service +WantedBy=multi-user.target diff --git a/files/image_config/hostcfgd/hostcfgd b/files/image_config/hostcfgd/hostcfgd index 739c0baa4d6..b1ec2644e12 100755 --- a/files/image_config/hostcfgd/hostcfgd +++ b/files/image_config/hostcfgd/hostcfgd @@ -114,7 +114,7 @@ class AaaCfg(object): server['ip'] = addr server.update(self.tacplus_servers[addr]) servers_conf.append(server) - sorted(servers_conf, key=lambda t: t['priority'], reverse=True) + servers_conf = sorted(servers_conf, key=lambda t: int(t['priority']), reverse=True) template_file = os.path.abspath(PAM_AUTH_CONF_TEMPLATE) env = jinja2.Environment(loader=jinja2.FileSystemLoader('/'), trim_blocks=True) diff --git a/files/image_config/warmboot-finalizer/finalize-warmboot.sh b/files/image_config/warmboot-finalizer/finalize-warmboot.sh index 00e4e1b7f3f..32c9c8444cc 100755 --- a/files/image_config/warmboot-finalizer/finalize-warmboot.sh +++ b/files/image_config/warmboot-finalizer/finalize-warmboot.sh @@ -68,6 +68,14 @@ function finalize_warm_boot() sudo config warm_restart disable } +function stop_control_plane_assistant() +{ + if [[ -x ${ASSISTANT_SCRIPT} ]]; then + debug "Tearing down control plane assistant ..." + ${ASSISTANT_SCRIPT} -m reset + fi +} + wait_for_database_service @@ -78,11 +86,6 @@ if [[ x"${WARM_BOOT}" != x"true" ]]; then exit 0 fi -# No need to wait for the reconciliation process. Database has been loaded -# and migrated. This is good enough to save a copy. -debug "Save in-memory database after warm reboot ..." -config save -y - list=${COMP_LIST} # Wait up to 5 minutes @@ -94,6 +97,12 @@ for i in `seq 60`; do sleep 5 done +stop_control_plane_assistant + +# Save DB after stopped control plane assistant to avoid extra entries +debug "Save in-memory database after warm reboot ..." +config save -y + if [[ -n "${list}" ]]; then debug "Some components didn't finish reconcile: ${list} ..." fi diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh index 7b6ae6b5dbf..5b2f582ef4c 100755 --- a/files/scripts/swss.sh +++ b/files/scripts/swss.sh @@ -2,7 +2,7 @@ SERVICE="swss" PEER="syncd" -DEPENDENT="teamd" +DEPENDENT="teamd radv" DEBUGLOG="/tmp/swss-syncd-debug.log" LOCKFILE="/tmp/swss-syncd-lock" diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh index d4536b4d8b9..0c3be805e7d 100755 --- a/files/scripts/syncd.sh +++ b/files/scripts/syncd.sh @@ -64,7 +64,7 @@ function getBootType() TYPE='fastfast' ;; *SONIC_BOOT_TYPE=fast*|*fast-reboot*) - TYPE='fast' + TYPE=$(awk '{ if ($1 <= 180) print "fast"; else print "cold" }' /proc/uptime) ;; *) TYPE='cold' diff --git a/platform/barefoot/bfn-platform.mk b/platform/barefoot/bfn-platform.mk index 837f86c335e..22fc9e6d7c4 100644 --- a/platform/barefoot/bfn-platform.mk +++ b/platform/barefoot/bfn-platform.mk @@ -1,5 +1,5 @@ -BFN_PLATFORM = bfnplatform_8_9_1.x.ab1e16f.deb -$(BFN_PLATFORM)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/rel_8_9_1/bfnplatform_8_9_1.x.ab1e16f.deb" +BFN_PLATFORM = bfnplatform_9.0.0.cc6ccbe_pr_deb9.deb +$(BFN_PLATFORM)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/rel_9_0/bfnplatform_9.0.0.cc6ccbe_pr_deb9.deb" -SONIC_ONLINE_DEBS += $(BFN_PLATFORM) # $(BFN_SAI_DEV) +SONIC_ONLINE_DEBS += $(BFN_PLATFORM) $(BFN_SAI_DEV)_DEPENDS += $(BFN_PLATFORM) diff --git a/platform/barefoot/bfn-sai.mk b/platform/barefoot/bfn-sai.mk index e3253348e72..584c8915752 100644 --- a/platform/barefoot/bfn-sai.mk +++ b/platform/barefoot/bfn-sai.mk @@ -1,5 +1,5 @@ -BFN_SAI = bfnsdk_8_9_1.x.ab1e16f.deb -$(BFN_SAI)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/rel_8_9_1/bfnsdk_8_9_1.x.ab1e16f.deb" +BFN_SAI = bfnsdk_9.0.0.cc6ccbe_pr_deb9.deb +$(BFN_SAI)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/rel_9_0/bfnsdk_9.0.0.cc6ccbe_pr_deb9.deb" -SONIC_ONLINE_DEBS += $(BFN_SAI) # $(BFN_SAI_DEV) +SONIC_ONLINE_DEBS += $(BFN_SAI) $(BFN_SAI_DEV)_DEPENDS += $(BFN_SAI) diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index 530f9707a2c..7b39cf3400d 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit 530f9707a2c3d06bb50a9b60b24a4bf4eb8a9735 +Subproject commit 7b39cf3400dd728494b91810db9cc82542a22584 diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/sfputil b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/bf-sfputil similarity index 100% rename from platform/barefoot/sonic-platform-modules-bfn-montara/scripts/sfputil rename to platform/barefoot/sonic-platform-modules-bfn-montara/scripts/bf-sfputil diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/sfputil b/platform/barefoot/sonic-platform-modules-bfn/scripts/bf-sfputil similarity index 100% rename from platform/barefoot/sonic-platform-modules-bfn/scripts/sfputil rename to platform/barefoot/sonic-platform-modules-bfn/scripts/bf-sfputil diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk index bb31e82ef61..ed7fc1b5265 100644 --- a/platform/broadcom/docker-syncd-brcm-rpc.mk +++ b/platform/broadcom/docker-syncd-brcm-rpc.mk @@ -20,5 +20,6 @@ endif $(DOCKER_SYNCD_BRCM_RPC)_CONTAINER_NAME = syncd $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += --net=host --privileged -t $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index 0edb6ebc4f9..0d69d63c02e 100644 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -35,6 +35,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(INVENTEC_D7032Q28B_PLATFORM_MODULE) \ $(INVENTEC_D7054Q28B_PLATFORM_MODULE) \ $(INVENTEC_D7264Q28B_PLATFORM_MODULE) \ + $(INVENTEC_D6356_PLATFORM_MODULE) \ $(CEL_DX010_PLATFORM_MODULE) \ $(CEL_HALIBURTON_PLATFORM_MODULE) \ $(DELTA_AG9032V1_PLATFORM_MODULE) \ @@ -45,6 +46,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(QUANTA_IX7_32X_PLATFORM_MODULE) \ $(QUANTA_IX8_56X_PLATFORM_MODULE) \ $(QUANTA_IX8C_56X_PLATFORM_MODULE) \ + $(QUANTA_IX9_32X_PLATFORM_MODULE) \ $(MITAC_LY1200_32X_PLATFORM_MODULE) \ $(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE) \ $(ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE) \ diff --git a/platform/broadcom/platform-modules-dell.mk b/platform/broadcom/platform-modules-dell.mk index 1d0c41956bc..34e404cfae4 100644 --- a/platform/broadcom/platform-modules-dell.mk +++ b/platform/broadcom/platform-modules-dell.mk @@ -36,3 +36,6 @@ $(DELL_S5232F_PLATFORM_MODULE)_PLATFORM = x86_64-dellemc_s5232f_c3538-r0 $(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_S5232F_PLATFORM_MODULE))) SONIC_STRETCH_DEBS += $(DELL_Z9100_PLATFORM_MODULE) + +#flashrom tool +$(shell ./$(PLATFORM_PATH)/sonic-platform-modules-dell/tools/flashrom.sh > /dev/null 2>&1) diff --git a/platform/broadcom/platform-modules-inventec.mk b/platform/broadcom/platform-modules-inventec.mk index ead32e75a81..871604ce91d 100644 --- a/platform/broadcom/platform-modules-inventec.mk +++ b/platform/broadcom/platform-modules-inventec.mk @@ -4,12 +4,14 @@ INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION = 1.1.0 INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION = 1.1.0 INVENTEC_D6254QS_PLATFORM_MODULE_VERSION = 1.1.0 INVENTEC_D6556_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6356_PLATFORM_MODULE_VERSION = 1.1.0 INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION = 1.1.0 export INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION export INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION export INVENTEC_D6254QS_PLATFORM_MODULE_VERSION export INVENTEC_D6556_PLATFORM_MODULE_VERSION +export INVENTEC_D6356_PLATFORM_MODULE_VERSION export INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION INVENTEC_D7032Q28B_PLATFORM_MODULE = platform-modules-d7032q28b_$(INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION)_amd64.deb @@ -30,8 +32,12 @@ INVENTEC_D6556_PLATFORM_MODULE = platform-modules-d6556_$(INVENTEC_D6556_PLATFOR $(INVENTEC_D6556_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6556-r0 $(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6556_PLATFORM_MODULE))) +INVENTEC_D6356_PLATFORM_MODULE = platform-modules-d6356_$(INVENTEC_D6356_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6356_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6356-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6356_PLATFORM_MODULE))) + INVENTEC_D7264Q28B_PLATFORM_MODULE = platform-modules-d7264q28b_$(INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION)_amd64.deb $(INVENTEC_D7264Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7264q28b-r0 $(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7264Q28B_PLATFORM_MODULE))) -SONIC_STRETCH_DEBS += $(INVENTEC_D7032Q28B_PLATFORM_MODULE) \ No newline at end of file +SONIC_STRETCH_DEBS += $(INVENTEC_D7032Q28B_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-quanta.mk b/platform/broadcom/platform-modules-quanta.mk index 93cf7b4d9d7..456af3019e3 100644 --- a/platform/broadcom/platform-modules-quanta.mk +++ b/platform/broadcom/platform-modules-quanta.mk @@ -4,11 +4,13 @@ QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION = 1.0 QUANTA_IX7_32X_PLATFORM_MODULE_VERSION = 1.0 QUANTA_IX8_56X_PLATFORM_MODULE_VERSION = 1.0 QUANTA_IX8C_56X_PLATFORM_MODULE_VERSION = 1.0 +QUANTA_IX9_32X_PLATFORM_MODULE_VERSION = 1.0 export QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION export QUANTA_IX7_32X_PLATFORM_MODULE_VERSION export QUANTA_IX8_56X_PLATFORM_MODULE_VERSION export QUANTA_IX8C_56X_PLATFORM_MODULE_VERSION +export QUANTA_IX9_32X_PLATFORM_MODULE_VERSION QUANTA_IX1B_32X_PLATFORM_MODULE = sonic-platform-quanta-ix1b-32x_$(QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION)_amd64.deb $(QUANTA_IX1B_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-quanta @@ -28,4 +30,8 @@ QUANTA_IX8C_56X_PLATFORM_MODULE = sonic-platform-quanta-ix8c-56x_$(QUANTA_IX8C_5 $(QUANTA_IX8C_56X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix8c_bwde-r0 $(eval $(call add_extra_package,$(QUANTA_IX1B_32X_PLATFORM_MODULE),$(QUANTA_IX8C_56X_PLATFORM_MODULE))) +QUANTA_IX9_32X_PLATFORM_MODULE = sonic-platform-quanta-ix9-32x_$(QUANTA_IX9_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(QUANTA_IX9_32X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix9_bwde-r0 +$(eval $(call add_extra_package,$(QUANTA_IX1B_32X_PLATFORM_MODULE),$(QUANTA_IX9_32X_PLATFORM_MODULE))) + SONIC_STRETCH_DEBS += $(QUANTA_IX1B_32X_PLATFORM_MODULE) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c old mode 100755 new mode 100644 index db81a1a8ca9..3f74e3f375a --- a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c @@ -33,6 +33,8 @@ #include #include +#define DRVNAME "as5712_54x_fan" + #define FAN_MAX_NUMBER 5 #define FAN_SPEED_CPLD_TO_RPM_STEP 150 #define FAN_SPEED_PRECENT_TO_CPLD_STEP 5 @@ -130,47 +132,58 @@ static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da,const char *buf, size_t count); static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); - +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf); extern int as5712_54x_cpld_read(unsigned short cpld_addr, u8 reg); extern int as5712_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); /*******************/ -#define _MAKE_SENSOR_DEVICE_ATTR(prj, id) \ - static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ +#define _MAKE_SENSOR_DEVICE_ATTR(prj, id, id2) \ static SENSOR_DEVICE_ATTR(prj##fan##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ static SENSOR_DEVICE_ATTR(prj##fan##id##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, \ fan_set_duty_cycle, FAN##id##_DUTY_CYCLE); \ static SENSOR_DEVICE_ATTR(prj##fan##id##_direction, S_IRUGO, fan_show_value, NULL, FAN##id##_DIRECTION); \ static SENSOR_DEVICE_ATTR(prj##fanr##id##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); \ - static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); + static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED);\ + static SENSOR_DEVICE_ATTR(prj##fan##id##_input, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_input, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED);\ + static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); + +#define MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) _MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) -#define MAKE_SENSOR_DEVICE_ATTR(prj,id) _MAKE_SENSOR_DEVICE_ATTR(prj,id) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 1, 11) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 2, 12) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 3, 13) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 4, 14) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 5, 15) -MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 1) -MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 2) -MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 3) -MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 4) -MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 5) +static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0); /*******************/ -#define _MAKE_FAN_ATTR(prj, id) \ - &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ +#define _MAKE_FAN_ATTR(prj, id, id2) \ &sensor_dev_attr_##prj##fan##id##_speed_rpm.dev_attr.attr, \ &sensor_dev_attr_##prj##fan##id##_duty_cycle_percentage.dev_attr.attr,\ &sensor_dev_attr_##prj##fan##id##_direction.dev_attr.attr, \ &sensor_dev_attr_##prj##fanr##id##_fault.dev_attr.attr, \ - &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr, + &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr,\ + &sensor_dev_attr_##prj##fan##id##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_fault.dev_attr.attr, + -#define MAKE_FAN_ATTR(prj, id) _MAKE_FAN_ATTR(prj, id) +#define MAKE_FAN_ATTR(prj, id, id2) _MAKE_FAN_ATTR(prj, id, id2) static struct attribute *accton_as5712_54x_fan_attributes[] = { /* fan related attributes */ - MAKE_FAN_ATTR(PROJECT_NAME,1) - MAKE_FAN_ATTR(PROJECT_NAME,2) - MAKE_FAN_ATTR(PROJECT_NAME,3) - MAKE_FAN_ATTR(PROJECT_NAME,4) - MAKE_FAN_ATTR(PROJECT_NAME,5) + MAKE_FAN_ATTR(PROJECT_NAME,1, 11) + MAKE_FAN_ATTR(PROJECT_NAME,2, 12) + MAKE_FAN_ATTR(PROJECT_NAME,3, 13) + MAKE_FAN_ATTR(PROJECT_NAME,4, 14) + MAKE_FAN_ATTR(PROJECT_NAME,5, 15) + &sensor_dev_attr_name.dev_attr.attr, NULL }; /*******************/ @@ -232,6 +245,12 @@ static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, return ret; } + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%s\n", DRVNAME); +} /*******************/ static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count) { @@ -379,7 +398,7 @@ static int accton_as5712_54x_fan_remove(struct platform_device *pdev) return 0; } -#define DRVNAME "as5712_54x_fan" + static struct platform_driver accton_as5712_54x_fan_driver = { .probe = accton_as5712_54x_fan_probe, diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c deleted file mode 100755 index 30bea914d58..00000000000 --- a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c +++ /dev/null @@ -1,400 +0,0 @@ -/* - * An hwmon driver for the CPR-4011-4Mxx Redundant Power Module - * - * Copyright (C) Brandon Chuang - * - * Based on ad7414.c - * Copyright 2006 Stefan Roese , DENX Software Engineering - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#if 0 -#define DEBUG -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MAX_FAN_DUTY_CYCLE 100 - -/* Addresses scanned - */ -static const unsigned short normal_i2c[] = { 0x3c, 0x3d, 0x3e, 0x3f, I2C_CLIENT_END }; - -/* Each client has this additional data - */ -struct cpr_4011_4mxx_data { - struct device *hwmon_dev; - struct mutex update_lock; - char valid; /* !=0 if registers are valid */ - unsigned long last_updated; /* In jiffies */ - u8 vout_mode; /* Register value */ - u16 v_in; /* Register value */ - u16 v_out; /* Register value */ - u16 i_in; /* Register value */ - u16 i_out; /* Register value */ - u16 p_in; /* Register value */ - u16 p_out; /* Register value */ - u16 temp_input[2]; /* Register value */ - u8 fan_fault; /* Register value */ - u16 fan_duty_cycle[2]; /* Register value */ - u16 fan_speed[2]; /* Register value */ -}; - -static ssize_t show_linear(struct device *dev, struct device_attribute *da, char *buf); -static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf); -static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); -static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count); -static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value); -static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev); - -enum cpr_4011_4mxx_sysfs_attributes { - PSU_V_IN, - PSU_V_OUT, - PSU_I_IN, - PSU_I_OUT, - PSU_P_IN, - PSU_P_OUT, - PSU_TEMP1_INPUT, - PSU_FAN1_FAULT, - PSU_FAN1_DUTY_CYCLE, - PSU_FAN1_SPEED, -}; - -/* sysfs attributes for hwmon - */ -static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, show_linear, NULL, PSU_V_IN); -static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); -static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, show_linear, NULL, PSU_I_IN); -static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); -static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, show_linear, NULL, PSU_P_IN); -static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); -static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); -static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); -static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); -static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); - -static struct attribute *cpr_4011_4mxx_attributes[] = { - &sensor_dev_attr_psu_v_in.dev_attr.attr, - &sensor_dev_attr_psu_v_out.dev_attr.attr, - &sensor_dev_attr_psu_i_in.dev_attr.attr, - &sensor_dev_attr_psu_i_out.dev_attr.attr, - &sensor_dev_attr_psu_p_in.dev_attr.attr, - &sensor_dev_attr_psu_p_out.dev_attr.attr, - &sensor_dev_attr_psu_temp1_input.dev_attr.attr, - &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, - &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, - &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, - NULL -}; - -static int two_complement_to_int(u16 data, u8 valid_bit, int mask) -{ - u16 valid_data = data & mask; - bool is_negative = valid_data >> (valid_bit - 1); - - return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; -} - -static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, - const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); - int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; - long speed; - int error; - - error = kstrtol(buf, 10, &speed); - if (error) - return error; - - if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) - return -EINVAL; - - mutex_lock(&data->update_lock); - data->fan_duty_cycle[nr] = speed; - cpr_4011_4mxx_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); - mutex_unlock(&data->update_lock); - - return count; -} - -static ssize_t show_linear(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); - - u16 value = 0; - int exponent, mantissa; - int multiplier = 1000; - - switch (attr->index) { - case PSU_V_IN: - value = data->v_in; - break; - case PSU_I_IN: - value = data->i_in; - break; - case PSU_I_OUT: - value = data->i_out; - break; - case PSU_P_IN: - value = data->p_in; - break; - case PSU_P_OUT: - value = data->p_out; - break; - case PSU_TEMP1_INPUT: - value = data->temp_input[0]; - break; - case PSU_FAN1_DUTY_CYCLE: - multiplier = 1; - value = data->fan_duty_cycle[0]; - break; - case PSU_FAN1_SPEED: - multiplier = 1; - value = data->fan_speed[0]; - break; - default: - break; - } - - exponent = two_complement_to_int(value >> 11, 5, 0x1f); - mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); - - return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : - sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); -} - -static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); - - u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; - - return sprintf(buf, "%d\n", data->fan_fault >> shift); -} - -static ssize_t show_vout(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); - int exponent, mantissa; - int multiplier = 1000; - - exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); - mantissa = data->v_out; - - return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : - sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); -} - -static const struct attribute_group cpr_4011_4mxx_group = { - .attrs = cpr_4011_4mxx_attributes, -}; - -static int cpr_4011_4mxx_probe(struct i2c_client *client, - const struct i2c_device_id *dev_id) -{ - struct cpr_4011_4mxx_data *data; - int status; - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { - status = -EIO; - goto exit; - } - - data = kzalloc(sizeof(struct cpr_4011_4mxx_data), GFP_KERNEL); - if (!data) { - status = -ENOMEM; - goto exit; - } - - i2c_set_clientdata(client, data); - data->valid = 0; - mutex_init(&data->update_lock); - - dev_info(&client->dev, "chip found\n"); - - /* Register sysfs hooks */ - status = sysfs_create_group(&client->dev.kobj, &cpr_4011_4mxx_group); - if (status) { - goto exit_free; - } - - data->hwmon_dev = hwmon_device_register(&client->dev); - if (IS_ERR(data->hwmon_dev)) { - status = PTR_ERR(data->hwmon_dev); - goto exit_remove; - } - - dev_info(&client->dev, "%s: psu '%s'\n", - dev_name(data->hwmon_dev), client->name); - - return 0; - -exit_remove: - sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); -exit_free: - kfree(data); -exit: - - return status; -} - -static int cpr_4011_4mxx_remove(struct i2c_client *client) -{ - struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); - - hwmon_device_unregister(data->hwmon_dev); - sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); - kfree(data); - - return 0; -} - -static const struct i2c_device_id cpr_4011_4mxx_id[] = { - { "cpr_4011_4mxx", 0 }, - {} -}; -MODULE_DEVICE_TABLE(i2c, cpr_4011_4mxx_id); - -static struct i2c_driver cpr_4011_4mxx_driver = { - .class = I2C_CLASS_HWMON, - .driver = { - .name = "cpr_4011_4mxx", - }, - .probe = cpr_4011_4mxx_probe, - .remove = cpr_4011_4mxx_remove, - .id_table = cpr_4011_4mxx_id, - .address_list = normal_i2c, -}; - -static int cpr_4011_4mxx_read_byte(struct i2c_client *client, u8 reg) -{ - return i2c_smbus_read_byte_data(client, reg); -} - -static int cpr_4011_4mxx_read_word(struct i2c_client *client, u8 reg) -{ - return i2c_smbus_read_word_data(client, reg); -} - -static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value) -{ - return i2c_smbus_write_word_data(client, reg, value); -} - -struct reg_data_byte { - u8 reg; - u8 *value; -}; - -struct reg_data_word { - u8 reg; - u16 *value; -}; - -static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); - - mutex_lock(&data->update_lock); - - if (time_after(jiffies, data->last_updated + HZ + HZ / 2) - || !data->valid) { - int i, status; - struct reg_data_byte regs_byte[] = { {0x20, &data->vout_mode}, - {0x81, &data->fan_fault}}; - struct reg_data_word regs_word[] = { {0x88, &data->v_in}, - {0x8b, &data->v_out}, - {0x89, &data->i_in}, - {0x8c, &data->i_out}, - {0x96, &data->p_out}, - {0x97, &data->p_in}, - {0x8d, &(data->temp_input[0])}, - {0x8e, &(data->temp_input[1])}, - {0x3b, &(data->fan_duty_cycle[0])}, - {0x3c, &(data->fan_duty_cycle[1])}, - {0x90, &(data->fan_speed[0])}, - {0x91, &(data->fan_speed[1])}}; - - dev_dbg(&client->dev, "Starting cpr_4011_4mxx update\n"); - - /* Read byte data */ - for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { - status = cpr_4011_4mxx_read_byte(client, regs_byte[i].reg); - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", - regs_byte[i].reg, status); - } - else { - *(regs_byte[i].value) = status; - } - } - - /* Read word data */ - for (i = 0; i < ARRAY_SIZE(regs_word); i++) { - status = cpr_4011_4mxx_read_word(client, regs_word[i].reg); - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", - regs_word[i].reg, status); - } - else { - *(regs_word[i].value) = status; - } - } - - data->last_updated = jiffies; - data->valid = 1; - } - - mutex_unlock(&data->update_lock); - - return data; -} - -static int __init cpr_4011_4mxx_init(void) -{ - return i2c_add_driver(&cpr_4011_4mxx_driver); -} - -static void __exit cpr_4011_4mxx_exit(void) -{ - i2c_del_driver(&cpr_4011_4mxx_driver); -} - -MODULE_AUTHOR("Brandon Chuang "); -MODULE_DESCRIPTION("CPR_4011_4MXX driver"); -MODULE_LICENSE("GPL"); - -module_init(cpr_4011_4mxx_init); -module_exit(cpr_4011_4mxx_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c new file mode 120000 index 00000000000..fd43cc1f1c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c @@ -0,0 +1 @@ +../../common/modules/cpr_4011_4mxx.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c deleted file mode 100755 index 519530387e2..00000000000 --- a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c +++ /dev/null @@ -1,683 +0,0 @@ -/* - * An hwmon driver for the 3Y Power YM-2651Y Power Module - * - * Copyright (C) 2014 Accton Technology Corporation. - * Brandon Chuang - * - * Based on ad7414.c - * Copyright 2006 Stefan Roese , DENX Software Engineering - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#if 0 -#define DEBUG -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MAX_FAN_DUTY_CYCLE 100 - -/* Addresses scanned - */ -static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; - -enum chips { - YM2651, - YM2401, -}; - -/* Each client has this additional data - */ -struct ym2651y_data { - struct device *hwmon_dev; - struct mutex update_lock; - char valid; /* !=0 if registers are valid */ - unsigned long last_updated; /* In jiffies */ - u8 chip; /* chip id */ - u8 capability; /* Register value */ - u16 status_word; /* Register value */ - u8 fan_fault; /* Register value */ - u8 over_temp; /* Register value */ - u16 v_out; /* Register value */ - u16 i_out; /* Register value */ - u16 p_out; /* Register value */ - u8 vout_mode; /* Register value */ - u16 temp; /* Register value */ - u16 fan_speed; /* Register value */ - u16 fan_duty_cycle[2]; /* Register value */ - u8 fan_dir[5]; /* Register value */ - u8 pmbus_revision; /* Register value */ - u8 mfr_id[10]; /* Register value */ - u8 mfr_model[16]; /* Register value */ - u8 mfr_revsion[3]; /* Register value */ - u16 mfr_vin_min; /* Register value */ - u16 mfr_vin_max; /* Register value */ - u16 mfr_iin_max; /* Register value */ - u16 mfr_iout_max; /* Register value */ - u16 mfr_pin_max; /* Register value */ - u16 mfr_pout_max; /* Register value */ - u16 mfr_vout_min; /* Register value */ - u16 mfr_vout_max; /* Register value */ -}; - -static ssize_t show_byte(struct device *dev, struct device_attribute *da, - char *buf); -static ssize_t show_word(struct device *dev, struct device_attribute *da, - char *buf); -static ssize_t show_linear(struct device *dev, struct device_attribute *da, - char *buf); -static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); -static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, - char *buf); -static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, - char *buf); -static ssize_t show_ascii(struct device *dev, struct device_attribute *da, - char *buf); -static struct ym2651y_data *ym2651y_update_device(struct device *dev); -static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, - const char *buf, size_t count); -static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value); - -enum ym2651y_sysfs_attributes { - PSU_POWER_ON = 0, - PSU_TEMP_FAULT, - PSU_POWER_GOOD, - PSU_FAN1_FAULT, - PSU_FAN_DIRECTION, - PSU_OVER_TEMP, - PSU_V_OUT, - PSU_I_OUT, - PSU_P_OUT, - PSU_TEMP1_INPUT, - PSU_FAN1_SPEED, - PSU_FAN1_DUTY_CYCLE, - PSU_PMBUS_REVISION, - PSU_MFR_ID, - PSU_MFR_MODEL, - PSU_MFR_REVISION, - PSU_MFR_VIN_MIN, - PSU_MFR_VIN_MAX, - PSU_MFR_VOUT_MIN, - PSU_MFR_VOUT_MAX, - PSU_MFR_IIN_MAX, - PSU_MFR_IOUT_MAX, - PSU_MFR_PIN_MAX, - PSU_MFR_POUT_MAX -}; - -/* sysfs attributes for hwmon - */ -static SENSOR_DEVICE_ATTR(psu_power_on, S_IRUGO, show_word, NULL, PSU_POWER_ON); -static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); -static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_word, NULL, PSU_POWER_GOOD); -static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); -static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, show_over_temp, NULL, PSU_OVER_TEMP); -static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); -static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); -static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); -static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); -static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); -static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); -static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_ascii, NULL, PSU_FAN_DIRECTION); -static SENSOR_DEVICE_ATTR(psu_pmbus_revision,S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); -static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); -static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); -static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); -static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MIN); -static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MAX); -static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MIN); -static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MAX); -static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IRUGO, show_linear, NULL, PSU_MFR_IIN_MAX); -static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IRUGO, show_linear, NULL, PSU_MFR_IOUT_MAX); -static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IRUGO, show_linear, NULL, PSU_MFR_PIN_MAX); -static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IRUGO, show_linear, NULL, PSU_MFR_POUT_MAX); - -static struct attribute *ym2651y_attributes[] = { - &sensor_dev_attr_psu_power_on.dev_attr.attr, - &sensor_dev_attr_psu_temp_fault.dev_attr.attr, - &sensor_dev_attr_psu_power_good.dev_attr.attr, - &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, - &sensor_dev_attr_psu_over_temp.dev_attr.attr, - &sensor_dev_attr_psu_v_out.dev_attr.attr, - &sensor_dev_attr_psu_i_out.dev_attr.attr, - &sensor_dev_attr_psu_p_out.dev_attr.attr, - &sensor_dev_attr_psu_temp1_input.dev_attr.attr, - &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, - &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, - &sensor_dev_attr_psu_fan_dir.dev_attr.attr, - &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, - &sensor_dev_attr_psu_mfr_id.dev_attr.attr, - &sensor_dev_attr_psu_mfr_model.dev_attr.attr, - &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, - &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, - &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, - &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, - &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, - &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, - &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, - &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, - &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, - NULL -}; - -static ssize_t show_byte(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct ym2651y_data *data = ym2651y_update_device(dev); - - if (!data->valid) { - return 0; - } - - return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : - sprintf(buf, "0\n"); -} - -static ssize_t show_word(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct ym2651y_data *data = ym2651y_update_device(dev); - u16 status = 0; - - if (!data->valid) { - return 0; - } - - switch (attr->index) { - case PSU_POWER_ON: /* psu_power_on, low byte bit 6 of status_word, 0=>ON, 1=>OFF */ - status = (data->status_word & 0x40) ? 0 : 1; - break; - case PSU_TEMP_FAULT: /* psu_temp_fault, low byte bit 2 of status_word, 0=>Normal, 1=>temp fault */ - status = (data->status_word & 0x4) >> 2; - break; - case PSU_POWER_GOOD: /* psu_power_good, high byte bit 3 of status_word, 0=>OK, 1=>FAIL */ - status = (data->status_word & 0x800) ? 0 : 1; - break; - } - - return sprintf(buf, "%d\n", status); -} - -static int two_complement_to_int(u16 data, u8 valid_bit, int mask) -{ - u16 valid_data = data & mask; - bool is_negative = valid_data >> (valid_bit - 1); - - return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; -} - -static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, - const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct ym2651y_data *data = i2c_get_clientdata(client); - int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; - long speed; - int error; - - error = kstrtol(buf, 10, &speed); - if (error) - return error; - - if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) - return -EINVAL; - - mutex_lock(&data->update_lock); - data->fan_duty_cycle[nr] = speed; - ym2651y_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); - mutex_unlock(&data->update_lock); - - return count; -} - -static ssize_t show_linear(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct ym2651y_data *data = ym2651y_update_device(dev); - - u16 value = 0; - int exponent, mantissa; - int multiplier = 1000; - - if (!data->valid) { - return 0; - } - - switch (attr->index) { - case PSU_V_OUT: - value = data->v_out; - break; - case PSU_I_OUT: - value = data->i_out; - break; - case PSU_P_OUT: - value = data->p_out; - break; - case PSU_TEMP1_INPUT: - value = data->temp; - break; - case PSU_FAN1_SPEED: - value = data->fan_speed; - multiplier = 1; - break; - case PSU_FAN1_DUTY_CYCLE: - value = data->fan_duty_cycle[0]; - multiplier = 1; - break; - case PSU_MFR_VIN_MIN: - value = data->mfr_vin_min; - break; - case PSU_MFR_VIN_MAX: - value = data->mfr_vin_max; - break; - case PSU_MFR_VOUT_MIN: - value = data->mfr_vout_min; - break; - case PSU_MFR_VOUT_MAX: - value = data->mfr_vout_max; - break; - case PSU_MFR_PIN_MAX: - value = data->mfr_pin_max; - break; - case PSU_MFR_POUT_MAX: - value = data->mfr_pout_max; - break; - case PSU_MFR_IOUT_MAX: - value = data->mfr_iout_max; - break; - case PSU_MFR_IIN_MAX: - value = data->mfr_iin_max; - break; - } - - exponent = two_complement_to_int(value >> 11, 5, 0x1f); - mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); - - return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : - sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); -} - -static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct ym2651y_data *data = ym2651y_update_device(dev); - u8 shift; - - if (!data->valid) { - return 0; - } - - shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; - - return sprintf(buf, "%d\n", data->fan_fault >> shift); -} - -static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct ym2651y_data *data = ym2651y_update_device(dev); - - if (!data->valid) { - return 0; - } - - return sprintf(buf, "%d\n", data->over_temp >> 7); -} - -static ssize_t show_ascii(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct ym2651y_data *data = ym2651y_update_device(dev); - u8 *ptr = NULL; - - if (!data->valid) { - return 0; - } - - switch (attr->index) { - case PSU_FAN_DIRECTION: /* psu_fan_dir */ - ptr = data->fan_dir + 1; /* Skip the first byte since it is the length of string. */ - break; - case PSU_MFR_ID: /* psu_mfr_id */ - ptr = data->mfr_id + 1; /* The first byte is the count byte of string. */; - break; - case PSU_MFR_MODEL: /* psu_mfr_model */ - ptr = data->mfr_model + 1; /* The first byte is the count byte of string. */ - break; - case PSU_MFR_REVISION: /* psu_mfr_revision */ - ptr = data->mfr_revsion + 1; /* The first byte is the count byte of string. */ - break; - default: - return 0; - } - - return sprintf(buf, "%s\n", ptr); -} - -static ssize_t show_vout_by_mode(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct ym2651y_data *data = ym2651y_update_device(dev); - int exponent, mantissa; - int multiplier = 1000; - - if (!data->valid) { - return 0; - } - - exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); - mantissa = data->v_out; - - return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : - sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); -} - -static ssize_t show_vout(struct device *dev, struct device_attribute *da, - char *buf) -{ - struct i2c_client *client = to_i2c_client(dev); - struct ym2651y_data *data = i2c_get_clientdata(client); - - if (data->chip == YM2401) { - return show_vout_by_mode(dev, da, buf); - } - - return show_linear(dev, da, buf); -} - -static const struct attribute_group ym2651y_group = { - .attrs = ym2651y_attributes, -}; - -static int ym2651y_probe(struct i2c_client *client, - const struct i2c_device_id *dev_id) -{ - struct ym2651y_data *data; - int status; - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE_DATA | - I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_I2C_BLOCK)) { - status = -EIO; - goto exit; - } - - data = kzalloc(sizeof(struct ym2651y_data), GFP_KERNEL); - if (!data) { - status = -ENOMEM; - goto exit; - } - - i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); - data->chip = dev_id->driver_data; - dev_info(&client->dev, "chip found\n"); - - /* Register sysfs hooks */ - status = sysfs_create_group(&client->dev.kobj, &ym2651y_group); - if (status) { - goto exit_free; - } - - data->hwmon_dev = hwmon_device_register(&client->dev); - if (IS_ERR(data->hwmon_dev)) { - status = PTR_ERR(data->hwmon_dev); - goto exit_remove; - } - - dev_info(&client->dev, "%s: psu '%s'\n", - dev_name(data->hwmon_dev), client->name); - - return 0; - -exit_remove: - sysfs_remove_group(&client->dev.kobj, &ym2651y_group); -exit_free: - kfree(data); -exit: - - return status; -} - -static int ym2651y_remove(struct i2c_client *client) -{ - struct ym2651y_data *data = i2c_get_clientdata(client); - - hwmon_device_unregister(data->hwmon_dev); - sysfs_remove_group(&client->dev.kobj, &ym2651y_group); - kfree(data); - - return 0; -} - -static const struct i2c_device_id ym2651y_id[] = { - { "ym2651", YM2651 }, - { "ym2401", YM2401 }, - {} -}; -MODULE_DEVICE_TABLE(i2c, ym2651y_id); - -static struct i2c_driver ym2651y_driver = { - .class = I2C_CLASS_HWMON, - .driver = { - .name = "ym2651", - }, - .probe = ym2651y_probe, - .remove = ym2651y_remove, - .id_table = ym2651y_id, - .address_list = normal_i2c, -}; - -static int ym2651y_read_byte(struct i2c_client *client, u8 reg) -{ - return i2c_smbus_read_byte_data(client, reg); -} - -static int ym2651y_read_word(struct i2c_client *client, u8 reg) -{ - return i2c_smbus_read_word_data(client, reg); -} - -static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value) -{ - return i2c_smbus_write_word_data(client, reg, value); -} - -static int ym2651y_read_block(struct i2c_client *client, u8 command, u8 *data, - int data_len) -{ - int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); - - if (unlikely(result < 0)) - goto abort; - if (unlikely(result != data_len)) { - result = -EIO; - goto abort; - } - - result = 0; - -abort: - return result; -} - -struct reg_data_byte { - u8 reg; - u8 *value; -}; - -struct reg_data_word { - u8 reg; - u16 *value; -}; - -static struct ym2651y_data *ym2651y_update_device(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - struct ym2651y_data *data = i2c_get_clientdata(client); - - mutex_lock(&data->update_lock); - - if (time_after(jiffies, data->last_updated + HZ + HZ / 2) - || !data->valid) { - int i, status, length; - u8 command, buf; - struct reg_data_byte regs_byte[] = { {0x19, &data->capability}, - {0x20, &data->vout_mode}, - {0x7d, &data->over_temp}, - {0x81, &data->fan_fault}, - {0x98, &data->pmbus_revision}}; - struct reg_data_word regs_word[] = { {0x79, &data->status_word}, - {0x8b, &data->v_out}, - {0x8c, &data->i_out}, - {0x96, &data->p_out}, - {0x8d, &data->temp}, - {0x3b, &(data->fan_duty_cycle[0])}, - {0x3c, &(data->fan_duty_cycle[1])}, - {0x90, &data->fan_speed}, - {0xa0, &data->mfr_vin_min}, - {0xa1, &data->mfr_vin_max}, - {0xa2, &data->mfr_iin_max}, - {0xa3, &data->mfr_pin_max}, - {0xa4, &data->mfr_vout_min}, - {0xa5, &data->mfr_vout_max}, - {0xa6, &data->mfr_iout_max}, - {0xa7, &data->mfr_pout_max}}; - - dev_dbg(&client->dev, "Starting ym2651 update\n"); - data->valid = 0; - - /* Read byte data */ - for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { - status = ym2651y_read_byte(client, regs_byte[i].reg); - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", - regs_byte[i].reg, status); - goto exit; - } - else { - *(regs_byte[i].value) = status; - } - } - - /* Read word data */ - for (i = 0; i < ARRAY_SIZE(regs_word); i++) { - status = ym2651y_read_word(client, regs_word[i].reg); - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", - regs_word[i].reg, status); - goto exit; - } - else { - *(regs_word[i].value) = status; - } - } - - /* Read fan_direction */ - command = 0xC3; - status = ym2651y_read_block(client, command, data->fan_dir, - ARRAY_SIZE(data->fan_dir)-1); - data->fan_dir[ARRAY_SIZE(data->fan_dir)-1] = '\0'; - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", command, status); - goto exit; - } - - /* Read mfr_id */ - command = 0x99; - status = ym2651y_read_block(client, command, data->mfr_id, - ARRAY_SIZE(data->mfr_id)-1); - data->mfr_id[ARRAY_SIZE(data->mfr_id)-1] = '\0'; - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", command, status); - goto exit; - } - - /* Read mfr_model */ - command = 0x9a; - length = 1; - - /* Read first byte to determine the length of data */ - status = ym2651y_read_block(client, command, &buf, length); - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", command, status); - goto exit; - } - - status = ym2651y_read_block(client, command, data->mfr_model, buf+1); - data->mfr_model[buf+1] = '\0'; - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", command, status); - goto exit; - } - - /* Read mfr_revsion */ - command = 0x9b; - status = ym2651y_read_block(client, command, data->mfr_revsion, - ARRAY_SIZE(data->mfr_revsion)-1); - data->mfr_revsion[ARRAY_SIZE(data->mfr_revsion)-1] = '\0'; - - if (status < 0) { - dev_dbg(&client->dev, "reg %d, err %d\n", command, status); - goto exit; - } - - data->last_updated = jiffies; - data->valid = 1; - } - -exit: - mutex_unlock(&data->update_lock); - - return data; -} - -static int __init ym2651y_init(void) -{ - return i2c_add_driver(&ym2651y_driver); -} - -static void __exit ym2651y_exit(void) -{ - i2c_del_driver(&ym2651y_driver); -} - -MODULE_AUTHOR("Brandon Chuang "); -MODULE_DESCRIPTION("3Y Power YM-2651Y driver"); -MODULE_LICENSE("GPL"); - -module_init(ym2651y_init); -module_exit(ym2651y_exit); - diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c index 2cea5f5e39f..f1790b4515f 100644 --- a/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c +++ b/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c @@ -93,6 +93,21 @@ static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_ static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(pwm1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + + + static struct attribute *cpr_4011_4mxx_attributes[] = { &sensor_dev_attr_psu_v_in.dev_attr.attr, &sensor_dev_attr_psu_v_out.dev_attr.attr, @@ -104,6 +119,17 @@ static struct attribute *cpr_4011_4mxx_attributes[] = { &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_fault.dev_attr.attr, + &sensor_dev_attr_pwm1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, NULL }; diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/classes/pimutil.py b/platform/broadcom/sonic-platform-modules-accton/minipack/classes/pimutil.py new file mode 100755 index 00000000000..778ff76afd1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/classes/pimutil.py @@ -0,0 +1,578 @@ +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/29/2019: Jostar create for minipack +# ----------------------------------------------------------- +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + import fbfpgaio + import re + import time + from select import select + #from ctypes import fbfpgaio + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +# pimutil.py +# +# Platform-specific PIM interface for SONiC +# + +iob = { + "revision": 0x0, + "scratchpad": 0x4, + "interrupt_status": 0x2C, + "pim_status": 0x40, + "pim_present_intr_mask": 0x44, +} + +dom_base = [ + 0xFFFFFFFF, # Padding + 0x40000, + 0x48000, + 0x50000, + 0x58000, + 0x60000, + 0x68000, + 0x70000, + 0x78000, +] + + +dom = { + "revision": 0x0, + "system_led": 0xC, + "intr_status": 0x2C, + "qsfp_present": 0x48, + "qsfp_present_intr": 0x50, + "qsfp_present_intr_mask": 0x58, + "qsfp_intr": 0x60, + "qsfp_intr_mask": 0x68, + "qsfp_reset": 0x70, + "qsfp_lp_mode": 0x78, + "device_power_bad_status": 0x90, + "port_led_color_profile": { + 0: 0x300, + 1: 0x300, + 2: 0x304, + 3: 0x304, + 4: 0x308, + 5: 0x308, + 6: 0x30C, + 7: 0x30C, + }, + "port_led_control": { + 1: 0x310, + 2: 0x314, + 3: 0x318, + 4: 0x31C, + 5: 0x320, + 6: 0x324, + 7: 0x328, + 8: 0x32C, + 9: 0x330, + 10: 0x334, + 11: 0x338, + 12: 0x33C, + 13: 0x340, + 14: 0x344, + 15: 0x348, + 16: 0x34C, + }, + "dom_control_config": 0x410, + "dom_global_status": 0x414, + "dom_data": 0x4000, + + + "mdio": { + "config": 0x0200, + "command": 0x0204, + "write": 0x0208, + "read": 0x020C, + "status": 0x0210, + "intr_mask": 0x0214, + "source_sel": 0x0218, + }, # mdio +} + +mdio_read_cmd = 0x1 +mdio_write_cmd = 0x0 +mdio_device_type = 0x1F + + +#fbfpgaio=cdll.LoadLibrary('./fbfpgaio.so') + +def init_resources(): + fbfpgaio.hw_init() + return + +def release_resources(): + fbfpgaio.hw_release() + return + +def fpga_io(offset, data=None): + if data is None: + return fbfpgaio.hw_io(offset) + else: + fbfpgaio.hw_io(offset, data) + return + +def pim_io(pim, offset, data=None): + global dom_base + target_offset = dom_base[pim]+offset + if data is None: + retval = fpga_io(target_offset) + #print ("0x%04X" % retval) # idebug + return retval + else: + retval = fpga_io(target_offset, data) + return retval + + +def show_pim_present(): + pim_status = fpga_io(iob["pim_status"]) + + header = "PIM # " + status_str = " " + for shift in range(0,8): + status = pim_status & (0x10000 << shift) #[23:16] from pim_0 to pim_7 + header += " %d " % (shift+1) + if status: + status_str += (" | ") + else: + status_str += (" X ") + print(header) + print(status_str) + +def show_qsfp_present_status(pim_num): + status = fpga_io(dom_base[pim_num]+dom["qsfp_present"]) + interrupt = fpga_io(dom_base[pim_num]+dom["qsfp_present_intr"]) + mask = fpga_io(dom_base[pim_num]+dom["qsfp_present_intr_mask"]) + + print + print(" (0x48) (0x50) (0x58)") + print(" 0x%08X 0x%08X 0x%08X" %(status, interrupt, mask)) + print(" Status Interrupt Mask") + for row in range(8): + output_str = str() + status_left = bool(status & (0x1 << row*2)) + status_right = bool(status & (0x2 << row*2)) + interrupt_left = bool(interrupt & (0x1 << row*2)) + interrupt_right = bool(interrupt & (0x2 << row*2)) + mask_left = bool(mask & (0x1 << row*2)) + mask_right = bool(mask & (0x2 << row*2)) + print("%2d: %d %d %d %d %d %d" % \ + (row*2+1, status_left, status_right, \ + interrupt_left, interrupt_right, \ + mask_left, mask_right)) + print + + + +#pim_index start from 0 to 7 +#port_index start from 0 to 127. Each 16-port is to one pim card. +class PimUtil(object): + + PORT_START = 0 + PORT_END = 127 + + def __init__(self): + self.value=1 + + def __del__(self): + self.value=0 + + def init_pim_fpga(self): + init_resources() + + def release_pim_fpga(self): + release_resources() + + def get_pim_by_port(self, port_num): + if port_num < self.PORT_START or port_num > self.PORT_END: + return False + pim_num=port_num/16 + return True, pim_num+1 + + def get_onepimport_by_port(self, port_num): + if port_num < self.PORT_START or port_num > self.PORT_END: + return False + if port_num < 16: + return True, port_num + else: + return True, port_num%16 + + def get_pim_presence(self, pim_num): + if pim_num <0 or pim_num > 7: + return 0 + pim_status = fpga_io(iob["pim_status"]) + status = pim_status & (0x10000 << pim_num) + if status: + return 1 #present + else: + return 0 #not present + + #return code=0:100G. return code=1:400G + def get_pim_board_id(self, pim_num): + if pim_num <0 or pim_num > 7: + return False + board_id = fpga_io(dom_base[pim_num+1]+dom["revision"]) + board_id = board_id & 0x1 + if board_id==0x0: + return 0 + else: + return 1 + + + def get_pim_status(self, pim_num): + if pim_num <0 or pim_num > 7: + return 0xFF + power_status =0 + #device_power_bad_status + status=fpga_io(dom_base[pim_num+1]+dom["device_power_bad_status"]) + + for x in range(0, 5): + if status & ( (0xf) << (4*x) ) : + power_status = power_status | (0x1 << x) + + if ( status & 0x1000000): + power_status=power_status | (0x1 << 5) + if ( status & 0x2000000): + power_status=power_status | (0x1 << 6) + if ( status & 0x8000000): + power_status=power_status | (0x1 << 7) + if ( status & 0x10000000): + power_status=power_status | (0x1 << 8) + if ( status & 0x40000000): + power_status=power_status | (0x1 << 9) + if ( status & 0x80000000): + power_status=power_status | (0x1 << 10) + + return power_status + #path=0:MDIO path is set on TH3. path=1:MDIO path is set on FPGA. + def set_pim_mdio_source_sel(self, pim_num, path): + if pim_num <0 or pim_num > 7: + return False + status= pim_io(pim_num+1, dom["mdio"]["source_sel"]) + + if path==1: + status = status | 0x2 + else: + status = status & 0xfffffffd + + pim_io(pim_num+1, dom["mdio"]["source_sel"], status) + return True + #retrun code=0, path is TH3. retrun code=1, path is FPGA + def get_pim_mdio_source_sel(sefl, pim_num): + if pim_num <0 or pim_num > 7: + return False + path= pim_io(pim_num+1, dom["mdio"]["source_sel"]) + path = path & 0x2 + if path: + return 1 + else: + return 0 + + #This api will set mdio path to MAC side.(At default, mdio path is set to FPGA side). + def pim_init(self, pim_num): + if pim_num <0 or pim_num > 7: + return False + status=self.set_pim_mdio_source_sel(pim_num, 0) + #put init phy cmd here + + + #return code="pim_dict[pim_num]='1' ":insert evt. return code="pim_dict[pim_num]='0' ":remove evt + def get_pim_change_event(self, timeout=0): + start_time = time.time() + pim_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + pim_mask_status = fpga_io(iob["pim_present_intr_mask"], 0xffff00000) + + while timeout >= 0: + new_pim_status=0 + pim_status = fpga_io(iob["pim_status"]) + present_status= pim_status & 0xff0000 + change_status=pim_status & 0xff + interrupt_status = fpga_io(iob["interrupt_status"]) + + for pim_num in range(0,8): + if change_status & (0x1 << pim_num) : + status = present_status & (0x10000 << pim_num) + new_pim_status = new_pim_status | (0x1 << pim_num) #prepare to W1C to clear + if status: + pim_dict[pim_num]='1' + else: + pim_dict[pim_num]='0' + + if change_status: + new_pim_status = pim_status | new_pim_status #Write one to clear interrupt bit + fpga_io(iob["pim_status"], new_pim_status) + return True, pim_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_evt_change_event: Should not reach here." + return False, {} + + + def get_pim_max_number(self): + return 8 + + #pim_num start from 0 to 7 + #color:0=amber, 1=blue + #contrl:off(0),on(1), flash(2) + def set_pim_led(self, pim_num, color, control): + if pim_num <0 or pim_num > 7: + return False + + led_val=fpga_io(dom_base[pim_num+1]+dom["system_led"]) + + if color==1: + led_val = led_val | (0x8000 | 0x4000) #blue + elif color==0: + led_val = (led_val & ( ~ 0x8000)) | 0x4000 #amber + else: + print "Set RGB control to Green1" + led_val = led_val & (~ 0x4000) + led_val = led_val & (~ 0xfff) + led_val = led_val | 0x0f0 #B.G.R Birghtness, set to Green + + if control==0: + led_val = led_val & ( ~ 0x3000) #Off + elif control==1: + led_val = led_val & ( ~ 0x3000) #Off + led_val = led_val | 0x1000 #On + else: + led_val = led_val | 0x3000 #Flash + + fpga_io(dom_base[pim_num+1]+dom["system_led"], led_val) + + def get_qsfp_presence(self, port_num): + #xlate port to get pim_num + status, pim_num=self.get_pim_by_port(port_num) + + if status==0: + return False + else: + present = fpga_io(dom_base[pim_num]+dom["qsfp_present"]) + status, shift = self.get_onepimport_by_port(port_num) + if status==0: + return False + else: + if bool(present & (0x1 << shift)): + return 1 #present + else: + return 0 #not present + + #return code: low_power(1) or high_power(0) + def get_low_power_mode(self, port_num): + status, pim_num=self.get_pim_by_port(port_num) + + if status==0: + return False + else: + lp_mode = fpga_io(dom_base[pim_num]+dom["qsfp_lp_mode"]) + + status, shift=self.get_onepimport_by_port(port_num) + if status==0: + return False + else: + if (lp_mode & (0x1 << shift)): + return 1 #low + else: + return 0 #high + + #lpmode=1 to hold QSFP in low power mode. lpmode=0 to release QSFP from low power mode. + def set_low_power_mode(self, port_num, mode): + status, pim_num=self.get_pim_by_port(port_num) + if status==0: + return False + val = fpga_io(dom_base[pim_num]+dom["qsfp_lp_mode"]) + status, shift=self.get_onepimport_by_port(port_num) + if status==0: + return False + else: + if mode==0: + new_val = val & (~(0x1 << shift)) + else: + new_val=val|(0x1 << shift) + status=fpga_io(dom_base[pim_num]+dom["qsfp_lp_mode"], new_val) + return status + + #port_dict[idx]=1 means get interrupt(change evt), port_dict[idx]=0 means no get interrupt + def get_qsfp_interrupt(self): + port_dict={} + #show_qsfp_present_status(1) + for pim_num in range(0, 8): + fpga_io(dom_base[pim_num+1]+dom["qsfp_present_intr_mask"], 0xffff0000) + fpga_io(dom_base[pim_num+1]+dom["qsfp_intr_mask"], 0xffff0000) + for pim_num in range(0, 8): + clear_bit=0 + qsfp_present_intr_status = fpga_io(dom_base[pim_num+1]+dom["qsfp_present_intr"]) + interrupt_status = qsfp_present_intr_status & 0xffff + #time.sleep(2) + if interrupt_status: + for idx in range (0,16): + port_idx=idx + (pim_num*16) + if interrupt_status & (0x1< +#include +#include +#include +#include + +//#define IDEBUG(...) printf(__VA_ARGS__) +#define IDEBUG(...) + +#define FPGA_RESOURCE_NODE "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0/resource0" +#define FPGA_RESOURCE_LENGTH 0x80000 + + +static int hw_handle = -1; +static void *io_base = NULL; + +static PyObject *fbfpgaio_hw_init(PyObject *self) +{ + const char fpga_resource_node[] = FPGA_RESOURCE_NODE; + + /* Open hardware resource node */ + hw_handle = open(fpga_resource_node, O_RDWR|O_SYNC); + if (hw_handle == -1) { + IDEBUG("[ERROR] %s: open hw resource node\n", __func__); + return Py_False; + } + + IDEBUG("[PASS] %s: open hw resource node\n", __func__); + + /* Mapping hardware resource */ + io_base = mmap(NULL, FPGA_RESOURCE_LENGTH, PROT_READ|PROT_WRITE, MAP_SHARED|MAP_NORESERVE, hw_handle, 0); + if (io_base == MAP_FAILED) { + IDEBUG("[ERROR] %s: mapping resource node\n", __func__); + perror("map_failed"); + fprintf(stderr,"%d %s\\n",errno,strerror(errno)); + return Py_False; + } + + IDEBUG("[PASS] %s: mapping resource node\n", __func__); + + return Py_True; +} + +static PyObject *fbfpgaio_hw_release(PyObject *self) +{ + int retval = 0; + + if ((io_base != NULL) && (io_base != MAP_FAILED)) { + retval = munmap(io_base, FPGA_RESOURCE_LENGTH); + if (retval == 0) { + IDEBUG("[PASS] %s: Unmapping hardware resources\n", __func__); + close(hw_handle); + return Py_True; + } + } + + IDEBUG("[ERROR] %s: unmapping resource node\n", __func__); + return Py_False; +} + +static PyObject *fbfpgaio_hw_io(PyObject *self, PyObject *args) +{ + void *offset = NULL; + /* We are not able to diffrentiate the input data between an unsigned value or a + 'None' object. We assume that the input data (if any) will be an unsigned integer. + The default value of 'data' is larger than the max. number of unsigned integer. + This value signify that the caller of this function does not input a data argument. */ + unsigned long input_data = 0x1FFFFFFFF; + + if (!PyArg_ParseTuple(args, "I|k", &offset, &input_data)) { + return NULL; + } + + if (input_data == 0x1FFFFFFFF) { + // Read operation + IDEBUG("Read operation\n"); + unsigned int *address = (unsigned int *) ((unsigned long) io_base + (unsigned long) offset); + return Py_BuildValue("k", *address); + } else { + // Write operation + IDEBUG("Write operation\n"); + unsigned int *address = (unsigned int *) ((unsigned long) io_base + (unsigned long) offset); + unsigned int data = (unsigned int) (input_data & 0xFFFFFFFF); + *address = data; + + Py_INCREF(Py_None); + return Py_None; + } +} + +static PyMethodDef FbfpgaMethods[] = { + { "hw_init", (PyCFunction) fbfpgaio_hw_init, METH_NOARGS, "Initialize resources for accessing FPGA" }, + { "hw_release", (PyCFunction) fbfpgaio_hw_release, METH_NOARGS, "Release resources for accessing FPGA" }, + { "hw_io", fbfpgaio_hw_io, METH_VARARGS, "Access FPGA" }, + { NULL, NULL, 0, NULL }, +}; + +PyMODINIT_FUNC +initfbfpgaio(void) +{ + char docstr[] = "\ +1. hw_init():\n\ + return value: True/False\n\ +2. hw_release():\n\ + return value: True/False\n\ +3. hw_io(offset,[data])\n\ + return value:\n\ + In reading operation: data which is read from FPGA\n\ + In writing operation: None\n"; + + (void) Py_InitModule3("fbfpgaio", FbfpgaMethods, docstr); +} diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-setup-qsfp-oom.service b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-setup-qsfp-oom.service new file mode 100644 index 00000000000..df1c961bf18 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-setup-qsfp-oom.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton MiniPack Platform setup qsfp oom service +Before=pmon.service +After=minipack-platform-init.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/setup_qsfp_eeprom.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py b/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py old mode 100644 new mode 100755 index aca53ea1279..b5d08c090ba --- a/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py @@ -2,9 +2,11 @@ import os import sys -from setuptools import setup +from setuptools import setup, Extension os.listdir +module1 = Extension("fbfpgaio", sources = ["minipack/lib/fbfpgaiomodule.c"]) + setup( name='minipack', version='1.0', @@ -12,5 +14,7 @@ packages=['minipack'], package_dir={'minipack': 'minipack/classes'}, + ext_modules=[module1], + ) diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py index 6f3485579c5..261074c5d99 100755 --- a/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py @@ -238,7 +238,7 @@ def device_install(): for i in range(0,len(mknod)): #for pca932x need times to built new i2c buses if mknod[i].find('pca954') != -1: - time.sleep(1) + time.sleep(2) status, output = log_os_system(mknod[i], 1) if status: @@ -246,49 +246,14 @@ def device_install(): if FORCE == 0: return status - # initialize multiplexer for 8 PIMs - cmdl = "echo pca9548 0x%x > /sys/bus/i2c/devices/i2c-%d/new_device" - for pim in range(2, 10): - cmdm = cmdl % (0x72, pim) - status, output =log_os_system(cmdm, 1) - cmdm = cmdl % (0x71, pim) - status, output =log_os_system(cmdm, 1) - - for i in range(0, NO_QSFP): - bus = sfp_map(i) - status, output =log_os_system( - "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(bus)+"/new_device", 1) - if status: - print output - if FORCE == 0: - return status - status, output =log_os_system( - "echo port"+str(i+1)+" > /sys/bus/i2c/devices/"+str(bus)+"-0050/port_name", 1) - if status: - print output - if FORCE == 0: - return status + rm_cmd="rm -rf /usr/local/bin/minipack_qsfp > /dev/null 2>&1" + log_os_system(rm_cmd, 1) + mk_cmd= "mkdir /usr/local/bin/minipack_qsfp" + log_os_system(mk_cmd, 1) return def device_uninstall(): - for i in range(0,NO_QSFP): - bus = sfp_map(i) - target = "/sys/bus/i2c/devices/i2c-"+str(bus)+"/delete_device" - status, output =log_os_system("echo 0x50 > "+ target, 1) - if status: - print output - if FORCE == 0: - return status - - # Multiplexer for 8 PIMs - cmdl = "echo 0x%x > /sys/bus/i2c/devices/i2c-%d/delete_device" - for pim in range(2, 10): - cmdm = cmdl % (0x72, pim) - status, output =log_os_system(cmdm, 1) - cmdm = cmdl % (0x71, pim) - status, output =log_os_system(cmdm, 1) - nodelist = mknod for i in range(len(nodelist)): target = nodelist[-(i+1)] diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/utils/setup_qsfp_eeprom.py b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/setup_qsfp_eeprom.py new file mode 100755 index 00000000000..84388520b90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/setup_qsfp_eeprom.py @@ -0,0 +1,317 @@ +#!/usr/bin/env python +# +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/22/2019: Jostar create for minipack +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import subprocess + import click + import imp + import commands + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from minipack.pimutil import PimUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +#2:idle state. 1:insert state, 0:remove state. +pim_state=[2,2,2,2,2,2,2,2] + +# port_use_i2c_bus[idx], idx means port_idx. Idx start from 0 to 127 +# port_use_i2c_bus[0] means port0 use i2c-device number +# port_use_i2c_bus[1] means port1 use i2c-device number +#At default , port_use_i2c_bus are 0. When PIM insert, it will no be 0 +port_use_i2c_bus= [0] * 128 + +#pim_port_use_bus[idx] are for 8 channel use. At default, pim_port_use_bus[idx]=0 +#pim_port_use_bus[idx] will save pim_idx(0 to 7). +#setup service will check when pim insert at first time. +#It will find +# 1. Does this pim card insert or not in the past. So it will check pim_port_use_bus[idx] +# 2. If make sure that pim_port_use_bus[idx]==0. Assgin oom start i2c dev numer to pim_port_use_bus[idx]. +#Never set pim_port_use_bus[idx] to 0 +#So if pim next insert, it need to check whether pim_port_use_bus[idx] is 0 or not. +#if pim_port_use_bus[idx]!=0, means this pim card has setup oom sysfs +pim_port_use_bus=[0] * 8 + +oom_i2c_bus_table=1 + +pim_dev=PimUtil() + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/setup_qsfp_eeprom' +DEBUG = False +PIM_MIN=0 +PIM_MAX=8 + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + if status: + logging.info('Failed :'+cmd) + return status, output + +def qsfp_map_bus(idx): + port = idx + 1 + base = ((port-1)/8*8) + 10 + idx = (port - 1) % 8 + idx = 7 - idx + if (idx%2): + idx = idx -1 + else: + idx = idx +1 + bus = base + idx + return bus + +def pca9548_sysfs(i2c_bus, create): + if create==1: + cmdl = "echo pca9548 0x%x > /sys/bus/i2c/devices/i2c-%d/new_device" + else: + cmdl = "echo 0x%x > /sys/bus/i2c/devices/i2c-%d/delete_device" + + cmdm = cmdl % (0x72, i2c_bus) + status1, output =log_os_system(cmdm) + cmdm = cmdl % (0x71, i2c_bus) + status2, output =log_os_system(cmdm) + return (status1 | status2) + + +def qsfp_eeprom_sys(pim_idx, i2c_bus_order, create): + # initialize multiplexer for 8 PIMs + global port_use_i2c_bus + start_port=pim_idx*16 + end_port = (pim_idx+1)*16 + start_bus=(i2c_bus_order-1)*16 + end_bus = i2c_bus_order*16 + k=start_port + for i in range(start_bus, end_bus): + bus = qsfp_map_bus(i) + if create==1: + status, output =log_os_system( + "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(bus)+"/new_device") + if status: + print output + return 1 + status, output =log_os_system( + "echo port"+str(k+1)+" > /sys/bus/i2c/devices/"+str(bus)+"-0050/port_name") + + status, output =log_os_system( + "ln -s -f /sys/bus/i2c/devices/"+str(bus)+"-0050/eeprom" + " /usr/local/bin/minipack_qsfp/port" + str(k) + "_eeprom") + if status: + print output + return 1 + else: + status, output =log_os_system( + "echo 0x50 > /sys/bus/i2c/devices/i2c-"+str(bus)+"/delete_device") + if status: + print output + + k=k+1 + + return 0 + +def check_pca_active( i2c_addr, bus): + cmd = "i2cget -y -f %d 0x%x 0x0" + cmd = cmd %(bus, i2c_addr) + status, output = commands.getstatusoutput(cmd) + return status + +def set_pim_port_use_bus(pim_idx): + + global pim_port_use_bus + global oom_i2c_bus_table + + if pim_port_use_bus[pim_idx]!=0: + return 0 + + pim_port_use_bus[pim_idx]=oom_i2c_bus_table + oom_i2c_bus_table=oom_i2c_bus_table+1 + + return pim_port_use_bus[pim_idx] + + +def del_pim_port_use_bus(pim_idx): + global oom_i2c_bus_table + + oom_i2c_bus_table=oom_i2c_bus_table-1 + pim_port_use_bus[pim_idx]=0 + + +def device_remove(): + cmd1 = "echo 0x%x > /sys/bus/i2c/devices/i2c-%d/delete_device" + + for bus in range(2, 10): + #ret=check_pca_active(0x72, bus) + #if ret==0: + + cmdm= cmd1 % (0x72, bus) + status, output = commands.getstatusoutput(cmdm) + print "Remove %d-0072 i2c device"%bus + cmdm= cmd1 % (0x71, bus) + status, output = commands.getstatusoutput(cmdm) + print "Remove %d-0071 i2c device"%bus + + cmd="rm -f /usr/local/bin/minipack_qsfp/port*" + status, output=log_os_system(cmd) + return status + +class device_monitor(object): + + PIM_STATE_REMOVE = 0 + PIM_STATE_INSERT = 1 + PIM_STATE_IDLE=2 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setLevel(logging.WARNING) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_pim(self): + global pim_dev + global pim_state + + for pim_idx in range(PIM_MIN, PIM_MAX): + presence=pim_dev.get_pim_presence(pim_idx) + if presence==1: + if pim_state[pim_idx]!=self.PIM_STATE_INSERT: + #find which i2c_device can use. It start from 2 + i2c_bus_order=set_pim_port_use_bus(pim_idx) + if i2c_bus_order==0: + logging.info("pim_state[%d] PIM_STATE_INSERT", pim_idx); + pim_state[pim_idx]=self.PIM_STATE_INSERT + continue + + logging.info ("pim_idx=%d oom use i2c_bus_order=%d", pim_idx, i2c_bus_order) + ready=0 + retry_limit=100 + retry_count=0 + while retry_count < retry_limit: + ret=check_pca_active(0x72, pim_idx+2) + if ret==0: + ready=1 + break + retry_count=retry_count+1 + time.sleep(0.2) + + if ready==1: + status=pca9548_sysfs(pim_idx+2, 1) + if status: + status=pca9548_sysfs(pim_idx+2, 0) #del pca i2c device, give up set oom at this time. + del_pim_port_use_bus(pim_idx) + continue + status=qsfp_eeprom_sys(pim_idx,i2c_bus_order, 1) + if status: + status=pca9548_sysfs(pim_idx+2, 0) #del pca i2c device, give up set oom at this time. + del_pim_port_use_bus(pim_idx) + continue + #ret_2=check_pca_active(0x72, pim_idx+2) + #ret_1=check_pca_active(0x71, pim_idx+2) + + pim_state[pim_idx]=self.PIM_STATE_INSERT + logging.info("pim_state[%d] PIM_STATE_INSERT", pim_idx); + else: + print "retry check 100 times for check pca addr" + del_pim_port_use_bus(pim_idx) + else: + if pim_state[pim_idx]==self.PIM_STATE_INSERT: + #pca9548_sysfs(pim_idx+2, 0) + pim_state[pim_idx]=self.PIM_STATE_REMOVE + logging.info("pim_state[%d] PIM_STATE_REMOVE", pim_idx); + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + remove_dev=0 + cpu_pca_i2c_ready=0 + + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdlr',['lfile=']) + except getopt.GetoptError: + print 'A:Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'B:Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + elif opt in ('-r', '--remove'): + remove_dev=1 + + if remove_dev==1: + device_remove() + return 0 + monitor = device_monitor(log_file, log_level) + global pim_dev + pim_dev.init_pim_fpga() + + while cpu_pca_i2c_ready==0: + status=check_pca_active(0x70, 1) + time.sleep(0.5) + if status==0: + cpu_pca_i2c_ready=1 + print "Make sure CPU pca i2c device is ready" + break + + while True: + monitor.manage_pim() + time.sleep(2) + + +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index 530f9707a2c..7b39cf3400d 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit 530f9707a2c3d06bb50a9b60b24a4bf4eb8a9735 +Subproject commit 7b39cf3400dd728494b91810db9cc82542a22584 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init index aa13d572be7..1e124565a41 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init @@ -137,10 +137,12 @@ start) # Attach 32 instances of EEPROM driver QSFP ports for ((n=26;n<=58;n++)); do - echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device + echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device sleep 0.1 done + /bin/sh /usr/local/bin/platform_api_mgnt.sh init + echo "done." ;; diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install index b25d47022b0..8570fa1eae8 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install @@ -1,3 +1,5 @@ dx010/scripts/dx010_check_qsfp.sh usr/local/bin dx010/cfg/dx010-modules.conf etc/modules-load.d dx010/systemd/platform-modules-dx010.service lib/systemd/system +dx010/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-cel_seastone-r0 +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst index baff704171c..15243c935ca 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst @@ -1,3 +1,6 @@ depmod -a systemctl enable platform-modules-dx010.service systemctl start platform-modules-dx010.service + +/usr/local/bin/platform_api_mgnt.sh install + diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init index 6c2d4483ac9..1dc0ea5cfee 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init @@ -69,6 +69,8 @@ start) echo "both" > /sys/devices/platform/e1031.smc/SFP/modabs_trig echo 0 > /sys/devices/platform/e1031.smc/SFP/modabs_mask + /bin/sh /usr/local/bin/platform_api_mgnt.sh init + echo "done." ;; diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install index 312e9c78a5e..df78b7a34ea 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install @@ -3,3 +3,5 @@ haliburton/systemd/platform-modules-haliburton.service lib/systemd/system haliburton/script/fancontrol.sh etc/init.d services/fancontrol/fancontrol.service lib/systemd/system services/fancontrol/fancontrol usr/local/bin +haliburton/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-cel_e1031-r0 +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst index ac05d40d702..e62799bd591 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst @@ -3,4 +3,6 @@ systemctl enable platform-modules-haliburton.service systemctl enable fancontrol.service systemctl start platform-modules-haliburton.service -systemctl start fancontrol.service \ No newline at end of file +systemctl start fancontrol.service + +/usr/local/bin/platform_api_mgnt.sh install diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/rules b/platform/broadcom/sonic-platform-modules-cel/debian/rules index 5086302b70b..6f35290bce2 100755 --- a/platform/broadcom/sonic-platform-modules-cel/debian/rules +++ b/platform/broadcom/sonic-platform-modules-cel/debian/rules @@ -13,6 +13,9 @@ MODULE_DIRS:= dx010 haliburton override_dh_auto_build: (for mod in $(MODULE_DIRS); do \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2.7 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ done) override_dh_auto_install: diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/setup.py b/platform/broadcom/sonic-platform-modules-cel/dx010/setup.py new file mode 100644 index 00000000000..8183788184a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/setup.py @@ -0,0 +1,34 @@ +from setuptools import setup + +DEVICE_NAME = 'celestica' +HW_SKU = 'x86_64-cel_seastone-r0' + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/setup.py b/platform/broadcom/sonic-platform-modules-cel/haliburton/setup.py new file mode 100644 index 00000000000..17056855106 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/setup.py @@ -0,0 +1,34 @@ +from setuptools import setup + +DEVICE_NAME = 'celestica' +HW_SKU = 'x86_64-cel_e1031-r0' + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/services/platform_api/platform_api_mgnt.sh b/platform/broadcom/sonic-platform-modules-cel/services/platform_api/platform_api_mgnt.sh new file mode 100755 index 00000000000..e1d33035789 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/services/platform_api/platform_api_mgnt.sh @@ -0,0 +1,41 @@ +#!/bin/bash + +PREV_REBOOT_CAUSE="/host/reboot-cause/" +DEVICE="/usr/share/sonic/device" +PLATFORM=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) +FILES=$DEVICE/$PLATFORM/api_files + +install() { + # Install sonic-platform package + if [ -e $DEVICE/$PLATFORM/sonic_platform-1.0-py2-none-any.whl ]; then + pip install $DEVICE/$PLATFORM/sonic_platform-1.0-py2-none-any.whl + fi +} + +init() { + # mount needed files for sonic-platform package + mkdir -p $FILES + + mkdir -p $FILES/reboot-cause + mount -B $PREV_REBOOT_CAUSE $FILES/reboot-cause +} + +deinit() { + # deinit sonic-platform package + umount -f $PREV_REBOOT_CAUSE $FILES/reboot-cause >/dev/null 2>/dev/null +} + +uninstall() { + # Uninstall sonic-platform package + pip uninstall -y sonic-platform >/dev/null 2>/dev/null +} + +case "$1" in +install | uninstall | init | deinit) + $1 + ;; +*) + echo "Usage: $0 {install|uninstall|init|deinit}" + exit 1 + ;; +esac diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install index b9b6abbb35e..b0c27702cb4 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install @@ -12,3 +12,4 @@ s6100/scripts/platform_watchdog_disable.sh usr/local/bin s6100/scripts/sensors usr/bin s6100/systemd/platform-modules-s6100.service etc/systemd/system s6100/systemd/s6100-lpc-monitor.service etc/systemd/system +tools/flashrom/flashrom usr/local/bin/ diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init index cc83662e774..fb0b6811797 100755 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init @@ -22,7 +22,7 @@ start) ;; stop) - /usr/local/bin/z9100_platform.sh deinit + /usr/local/bin/z9264f_platform.sh deinit echo "done." ;; diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py index d82f3749319..1e26181263a 100755 --- a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py @@ -1,2 +1,2 @@ -__all__ = ["platform", "chassis"] +__all__ = ["platform", "chassis", "sfp"] from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py index b1046d9310f..a625a796ef5 100755 --- a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py @@ -10,6 +10,7 @@ try: import os from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp except ImportError as e: raise ImportError(str(e) + "- required module not found") @@ -26,7 +27,23 @@ class Chassis(ChassisBase): reset_reason_dict[0x6] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE def __init__(self): - ChassisBase.__init__(self) + # Initialize SFP list + PORT_START = 0 + PORT_END = 31 + EEPROM_OFFSET = 20 + PORTS_IN_BLOCK = (PORT_END + 1) + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + sfp_control = "/sys/devices/platform/dell-s6000-cpld.0/" + for index in range(0, PORTS_IN_BLOCK): + eeprom_path = eeprom_base.format(index + EEPROM_OFFSET) + sfp_node = Sfp(index, 'QSFP', eeprom_path, sfp_control, index) + self._sfp_list.append(sfp_node) def get_register(self, reg_name): rv = 'ERR' diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/sfp.py new file mode 120000 index 00000000000..84af7963bb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/sfp.py @@ -0,0 +1 @@ +../../s6100/sonic_platform/sfp.py \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py index 497c1429ad8..61b486d775b 100755 --- a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py @@ -1,3 +1,3 @@ -__all__ = ["platform", "chassis", "fan", "psu"] +__all__ = ["platform", "chassis", "fan", "psu", "sfp"] from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py index bef591a6c52..d03eee255d3 100755 --- a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py @@ -10,7 +10,15 @@ try: import os + import sys + import click + import subprocess + import glob + import sonic_device_util + from commands import getstatusoutput + from sonic_platform_base.platform_base import PlatformBase from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp from sonic_platform.psu import Psu from sonic_platform.fan import Fan from eeprom import Eeprom @@ -30,6 +38,39 @@ class Chassis(ChassisBase): HWMON_NODE = os.listdir(HWMON_DIR)[0] MAILBOX_DIR = HWMON_DIR + HWMON_NODE + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = (PORT_END + 1) + IOM1_PORT_START = 0 + IOM2_PORT_START = 16 + IOM3_PORT_START = 32 + IOM4_PORT_START = 48 + + PORT_I2C_MAPPING = {} + # 0th Index = i2cLine, 1st Index = EepromIdx in i2cLine + EEPROM_I2C_MAPPING = { + # IOM 1 + 0: [6, 66], 1: [6, 67], 2: [6, 68], 3: [6, 69], + 4: [6, 70], 5: [6, 71], 6: [6, 72], 7: [6, 73], + 8: [6, 74], 9: [6, 75], 10: [6, 76], 11: [6, 77], + 12: [6, 78], 13: [6, 79], 14: [6, 80], 15: [6, 81], + # IOM 2 + 16: [8, 50], 17: [8, 51], 18: [8, 52], 19: [8, 53], + 20: [8, 54], 21: [8, 55], 22: [8, 56], 23: [8, 57], + 24: [8, 58], 25: [8, 59], 26: [8, 60], 27: [8, 61], + 28: [8, 62], 29: [8, 63], 30: [8, 64], 31: [8, 65], + # IOM 3 + 32: [7, 34], 33: [7, 35], 34: [7, 36], 35: [7, 37], + 36: [7, 38], 37: [7, 39], 38: [7, 40], 39: [7, 41], + 40: [7, 42], 41: [7, 43], 42: [7, 44], 43: [7, 45], + 44: [7, 46], 45: [7, 47], 46: [7, 48], 47: [7, 49], + # IOM 4 + 48: [9, 18], 49: [9, 19], 50: [9, 20], 51: [9, 21], + 52: [9, 22], 53: [9, 23], 54: [9, 24], 55: [9, 25], + 56: [9, 26], 57: [9, 27], 58: [9, 28], 59: [9, 29], + 60: [9, 30], 61: [9, 31], 62: [9, 32], 63: [9, 33] + } + reset_reason_dict = {} reset_reason_dict[11] = ChassisBase.REBOOT_CAUSE_POWER_LOSS reset_reason_dict[33] = ChassisBase.REBOOT_CAUSE_WATCHDOG @@ -42,6 +83,8 @@ class Chassis(ChassisBase): power_reason_dict[33] = ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC power_reason_dict[44] = ChassisBase.REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED + _component_name_list = ["BIOS", "CPLD1", "CPLD2", "FPGA"] + def __init__(self): ChassisBase.__init__(self) @@ -55,6 +98,39 @@ def __init__(self): psu = Psu(i) self._psu_list.append(psu) + self._populate_port_i2c_mapping() + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom" + sfp_ctrl_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/" + for index in range(0, self.PORTS_IN_BLOCK): + eeprom_path = eeprom_base.format(self.EEPROM_I2C_MAPPING[index][0], + self.EEPROM_I2C_MAPPING[index][1]) + sfp_control = sfp_ctrl_base.format(self.PORT_I2C_MAPPING[index]) + sfp_node = Sfp(index, 'QSFP', eeprom_path, sfp_control, index) + self._sfp_list.append(sfp_node) + + def _populate_port_i2c_mapping(self): + # port_num and i2c match + for port_num in range(0, self.PORTS_IN_BLOCK): + if((port_num >= self.IOM1_PORT_START) and + (port_num < self.IOM2_PORT_START)): + i2c_line = 14 + elif((port_num >= self.IOM2_PORT_START) and + (port_num < self.IOM3_PORT_START)): + i2c_line = 16 + elif((port_num >= self.IOM3_PORT_START) and + (port_num = self.IOM4_PORT_START) and + (port_num < self.PORTS_IN_BLOCK)): + i2c_line = 17 + self.PORT_I2C_MAPPING[port_num] = i2c_line + def _get_pmc_register(self, reg_name): # On successful read, returns the value read from given # reg_name and on failure returns 'ERR' @@ -74,6 +150,19 @@ def _get_pmc_register(self, reg_name): rv = rv.lstrip(" ") return rv + # Run bash command and print output to stdout + def run_command(self, command): + click.echo(click.style("Command: ", fg='cyan') + + click.style(command, fg='green')) + + proc = subprocess.Popen(command, shell=True, stdout=subprocess.PIPE) + (out, err) = proc.communicate() + + click.echo(out) + + if proc.returncode != 0: + sys.exit(proc.returncode) + def get_name(self): """ Retrieves the name of the device @@ -163,3 +252,127 @@ def get_reboot_cause(self): return (self.reset_reason_dict[reset_reason], None) return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Invalid Reason") + + def get_component_name_list(self): + """ + Retrieves chassis components list such as BIOS, CPLD, FPGA, etc. + + Returns: + A list containing component name. + """ + return self._component_name_list + + def get_firmware_version(self, component_name): + + version = None + + if component_name in self._component_name_list: + + if component_name == self._component_name_list[0]: # BIOS + status, version = getstatusoutput( + "dmidecode -s system-version") + + elif component_name == self._component_name_list[1]: # CPLD1 + version = None + + elif component_name == self._component_name_list[2]: # CPLD2 + version = None + + elif component_name == self._component_name_list[3]: # SMF + version = None + + return version + + def install_component_firmware(self, component_name, image_path): + + bios_image = None + bios_version = "3.25.0." + bios_file_name = "S6100*BIOS*" + flashrom = "/usr/local/bin/flashrom" + PLATFORM_ROOT_PATH = '/usr/share/sonic/device' + machine_info = sonic_device_util.get_machine_info() + platform = sonic_device_util.get_platform_info(machine_info) + platform_path = "/".join([PLATFORM_ROOT_PATH, platform, "bin"]) + + warning = """ + ******************************************************************** + * Warning - Upgrading BIOS is inherently risky and should only be * + * attempted when necessary. A failure at this upgrade may cause * + * a board RMA. Proceed with caution ! * + ******************************************************************** + """ + + if component_name in self._component_name_list: + if component_name == self._component_name_list[0]: # BIOS + + # current BIOS version + current_bios_version = self.get_firmware_version("BIOS") + + # Construct BIOS image path + if image_path is not None: + image_path = image_path + platform_path + for name in glob.glob( + os.path.join(image_path, bios_file_name)): + bios_image = image_path = name + + if not bios_image: + print "BIOS image file not found:", image_path + return False + + # Extract BIOS image version + bios_image = os.path.basename(bios_image) + bios_image = bios_image.strip('S6100-BIOS-') + bios_image_version = bios_image.strip('.bin') + + if bios_image_version.startswith(bios_version): + bios_image_minor = bios_image_version.replace( + bios_image_version[:7], '') + if bios_image_minor.startswith("2"): + bios_image_minor = bios_image_minor.split("-")[1] + + if current_bios_version.startswith(bios_version): + current_bios_minor = current_bios_version.replace( + current_bios_version[:7], '') + if current_bios_minor.startswith("2"): + current_bios_minor = current_bios_minor.split("-")[1] + + # BIOS version check + if bios_image_minor > current_bios_minor: + + print warning + prompt_text = "New BIOS image " + bios_image_version + \ + " available to install, continue?" + yes = click.confirm(prompt_text) + + elif current_bios_minor > bios_image_minor: + + print warning + prompt_text = "Do you want to downgrade BIOS image from " \ + + current_bios_version + " to " + \ + bios_image_version + " continue?" + + yes = click.confirm(prompt_text) + + else: + print("BIOS is already with {} latest version".format( + current_bios_version)) + return True + + if yes: + command = flashrom + " -p" + " internal" + " -w " + \ + image_path + self.run_command(command) + + elif component_name == self._component_name_list[1]: # CPLD1 + return False + + elif component_name == self._component_name_list[2]: # CPLD2 + return False + + elif component_name == self._component_name_list[3]: # SMF + return False + else: + print "Invalid component Name:", component_name + + return True + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/sfp.py new file mode 100755 index 00000000000..b312a52c7b4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/sfp.py @@ -0,0 +1,851 @@ +#!/usr/bin/env python + +############################################################################# +# DELLEMC +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import time + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +PAGE_OFFSET = 0 +KEY_OFFSET = 1 +KEY_WIDTH = 2 +FUNC_NAME = 3 + +INFO_OFFSET = 128 +DOM_OFFSET = 0 +DOM_OFFSET1 = 384 + +cable_length_tup = ('Length(km)', 'Length OM3(2m)', 'Length OM2(m)', + 'Length OM1(m)', 'Length Cable Assembly(m)') + +compliance_code_tup = ( + '10/40G Ethernet Compliance Code', + 'SONET Compliance codes', + 'SAS/SATA compliance codes', + 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', + 'Fibre Channel Speed') + +info_dict_keys = ['type', 'hardwarerev', 'serialnum', + 'manufacturename', 'modelname', 'Connector', + 'encoding', 'ext_identifier', 'ext_rateselect_compliance', + 'cable_type', 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', 'vendor_oui'] + +dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', + 'power_lpmode', 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', 'rx1power', + 'rx2power', 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', 'tx3bias', + 'tx4bias', 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + +threshold_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning'] + +sff8436_parser = { + 'reset_status': [DOM_OFFSET, 2, 1, 'parse_dom_status_indicator'], + 'rx_los': [DOM_OFFSET, 3, 1, 'parse_dom_tx_rx_los'], + 'tx_fault': [DOM_OFFSET, 4, 1, 'parse_dom_tx_fault'], + 'tx_disable': [DOM_OFFSET, 86, 1, 'parse_dom_tx_disable'], + 'power_lpmode': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'power_override': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'Temperature': [DOM_OFFSET, 22, 2, 'parse_temperature'], + 'Voltage': [DOM_OFFSET, 26, 2, 'parse_voltage'], + 'ChannelMonitor': [DOM_OFFSET, 34, 16, 'parse_channel_monitor_params'], + + 'cable_type': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'cable_length': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'Connector': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'type': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'encoding': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_identifier': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_rateselect_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'nominal_bit_rate': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'specification_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'manufacturename': [INFO_OFFSET, 20, 16, 'parse_vendor_name'], + 'vendor_oui': [INFO_OFFSET, 37, 3, 'parse_vendor_oui'], + 'modelname': [INFO_OFFSET, 40, 16, 'parse_vendor_pn'], + 'hardwarerev': [INFO_OFFSET, 56, 2, 'parse_vendor_rev'], + 'serialnum': [INFO_OFFSET, 68, 16, 'parse_vendor_sn'], + 'vendor_date': [INFO_OFFSET, 84, 8, 'parse_vendor_date'], + 'ModuleThreshold': [DOM_OFFSET1, 128, 24, 'parse_module_threshold_values'], + 'ChannelThreshold': [DOM_OFFSET1, 176, 16, 'parse_channel_threshold_values'], +} + + +class Sfp(SfpBase): + """ + DELLEMC Platform-specific Sfp class + """ + + def __init__(self, index, sfp_type, eeprom_path, + sfp_control, sfp_ctrl_idx): + SfpBase.__init__(self) + self.sfp_type = sfp_type + self.index = index + self.eeprom_path = eeprom_path + self.sfp_control = sfp_control + self.sfp_ctrl_idx = sfp_ctrl_idx + self.sfpInfo = sff8436InterfaceId() + self.sfpDomInfo = sff8436Dom() + + def _read_eeprom_bytes(self, eeprom_path, offset, num_bytes): + eeprom_raw = [] + try: + eeprom = open(eeprom_path, mode="rb", buffering=0) + except IOError: + return None + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + eeprom.seek(offset) + raw = eeprom.read(num_bytes) + except IOError: + eeprom.close() + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except BaseException: + eeprom.close() + return None + + eeprom.close() + return eeprom_raw + + def _get_eeprom_data(self, eeprom_key): + eeprom_data = None + page_offset = None + + if (self.sfpInfo is None): + return None + + page_offset = sff8436_parser[eeprom_key][PAGE_OFFSET] + eeprom_data_raw = self._read_eeprom_bytes( + self.eeprom_path, + (sff8436_parser[eeprom_key][PAGE_OFFSET] + + sff8436_parser[eeprom_key][KEY_OFFSET]), + sff8436_parser[eeprom_key][KEY_WIDTH]) + if (eeprom_data_raw is not None): + # Offset 128 is used to retrieve sff8436InterfaceId Info + # Offset 0 is used to retrieve sff8436Dom Info + if (page_offset == 128): + eeprom_data = getattr( + self.sfpInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + else: + eeprom_data = getattr( + self.sfpDomInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + + return eeprom_data + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + """ + transceiver_info_dict = {} + compliance_code_dict = {} + transceiver_info_dict = dict.fromkeys(info_dict_keys, 'N/A') + + # BaseInformation + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + connector = iface_data['data']['Connector']['value'] + encoding = iface_data['data']['EncodingCodes']['value'] + ext_id = iface_data['data']['Extended Identifier']['value'] + rate_identifier = iface_data['data']['RateIdentifier']['value'] + identifier = iface_data['data']['type']['value'] + bit_rate = str( + iface_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + for key in compliance_code_tup: + if key in iface_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = iface_data['data']['Specification compliance']['value'][key]['value'] + for key in cable_length_tup: + if key in iface_data['data']: + cable_type = key + cable_length = str(iface_data['data'][key]['value']) + else: + return None + + # Vendor Date + vendor_date_data = self._get_eeprom_data('vendor_date') + if (vendor_date_data is not None): + vendor_date = vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + else: + return None + + # Vendor Name + vendor_name_data = self._get_eeprom_data('manufacturename') + if (vendor_name_data is not None): + vendor_name = vendor_name_data['data']['Vendor Name']['value'] + else: + return None + + # Vendor OUI + vendor_oui_data = self._get_eeprom_data('vendor_oui') + if (vendor_oui_data is not None): + vendor_oui = vendor_oui_data['data']['Vendor OUI']['value'] + else: + return None + + # Vendor PN + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return None + + # Vendor Revision + vendor_rev_data = self._get_eeprom_data('hardwarerev') + if (vendor_rev_data is not None): + vendor_rev = vendor_rev_data['data']['Vendor Rev']['value'] + else: + return None + + # Vendor Serial Number + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return None + + # Fill The Dictionary and return + transceiver_info_dict['type'] = identifier + transceiver_info_dict['hardwarerev'] = vendor_rev + transceiver_info_dict['serialnum'] = vendor_sn + transceiver_info_dict['manufacturename'] = vendor_name + transceiver_info_dict['modelname'] = vendor_pn + transceiver_info_dict['Connector'] = connector + transceiver_info_dict['encoding'] = encoding + transceiver_info_dict['ext_identifier'] = ext_id + transceiver_info_dict['ext_rateselect_compliance'] = rate_identifier + transceiver_info_dict['cable_type'] = cable_type + transceiver_info_dict['cable_length'] = cable_length + transceiver_info_dict['nominal_bit_rate'] = bit_rate + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['vendor_date'] = vendor_date + transceiver_info_dict['vendor_oui'] = vendor_oui + + return transceiver_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + """ + transceiver_dom_threshold_dict = {} + transceiver_dom_threshold_dict = dict.fromkeys( + threshold_dict_keys, 'N/A') + + # Module Threshold + module_threshold_data = self._get_eeprom_data('ModuleThreshold') + if (module_threshold_data is not None): + tempHighAlarm = module_threshold_data['data']['TempHighAlarm']['value'] + tempLowAlarm = module_threshold_data['data']['TempLowAlarm']['value'] + tempHighWarn = module_threshold_data['data']['TempHighWarning']['value'] + tempLowWarn = module_threshold_data['data']['TempLowWarning']['value'] + vccHighAlarm = module_threshold_data['data']['VccHighAlarm']['value'] + vccLowAlarm = module_threshold_data['data']['VccLowAlarm']['value'] + vccHighWarn = module_threshold_data['data']['VccHighWarning']['value'] + vccLowWarn = module_threshold_data['data']['VccLowWarning']['value'] + else: + return None + + # Channel Threshold + channel_threshold_data = self._get_eeprom_data('ChannelThreshold') + if (channel_threshold_data is not None): + rxPowerHighAlarm = channel_threshold_data['data']['RxPowerHighAlarm']['value'] + rxPowerLowAlarm = channel_threshold_data['data']['RxPowerLowAlarm']['value'] + rxPowerHighWarn = channel_threshold_data['data']['RxPowerHighWarning']['value'] + rxPowerLowWarn = channel_threshold_data['data']['RxPowerLowWarning']['value'] + txBiasHighAlarm = channel_threshold_data['data']['TxBiasHighAlarm']['value'] + txBiasLowAlarm = channel_threshold_data['data']['TxBiasLowAlarm']['value'] + txBiasHighWarn = channel_threshold_data['data']['TxBiasHighWarning']['value'] + txBiasLowWarn = channel_threshold_data['data']['TxBiasLowWarning']['value'] + else: + return None + + transceiver_dom_threshold_dict['temphighalarm'] = tempHighAlarm + transceiver_dom_threshold_dict['templowalarm'] = tempLowAlarm + transceiver_dom_threshold_dict['temphighwarning'] = tempHighWarn + transceiver_dom_threshold_dict['templowwarning'] = tempLowWarn + transceiver_dom_threshold_dict['vcchighalarm'] = vccHighAlarm + transceiver_dom_threshold_dict['vcclowalarm'] = vccLowAlarm + transceiver_dom_threshold_dict['vcchighwarning'] = vccHighWarn + transceiver_dom_threshold_dict['vcclowwarning'] = vccLowWarn + transceiver_dom_threshold_dict['rxpowerhighalarm'] = rxPowerHighAlarm + transceiver_dom_threshold_dict['rxpowerlowalarm'] = rxPowerLowAlarm + transceiver_dom_threshold_dict['rxpowerhighwarning'] = rxPowerHighWarn + transceiver_dom_threshold_dict['rxpowerlowwarning'] = rxPowerLowWarn + transceiver_dom_threshold_dict['txbiashighalarm'] = txBiasHighAlarm + transceiver_dom_threshold_dict['txbiaslowalarm'] = txBiasLowAlarm + transceiver_dom_threshold_dict['txbiashighwarning'] = txBiasHighWarn + transceiver_dom_threshold_dict['txbiaslowwarning'] = txBiasLowWarn + + return transceiver_dom_threshold_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + """ + tx_bias_list = [] + rx_power_list = [] + transceiver_dom_dict = {} + transceiver_dom_dict = dict.fromkeys(dom_dict_keys, 'N/A') + + # RxLos + rx_los = self.get_rx_los() + + # TxFault + tx_fault = self.get_tx_fault() + + # ResetStatus + reset_state = self.get_reset_status() + + # LowPower Mode + lp_mode = self.get_lpmode() + + # TxDisable + tx_disable = self.get_tx_disable() + + # TxDisable Channel + tx_disable_channel = self.get_tx_disable_channel() + + # Temperature + temperature = self.get_temperature() + + # Voltage + voltage = self.get_voltage() + + # Channel Monitor + channel_monitor_data = self._get_eeprom_data('ChannelMonitor') + if (channel_monitor_data is not None): + tx_bias = channel_monitor_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + rx_power = channel_monitor_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + else: + return None + + transceiver_dom_dict['rx_los'] = rx_los + transceiver_dom_dict['tx_fault'] = tx_fault + transceiver_dom_dict['reset_status'] = reset_state + transceiver_dom_dict['power_lpmode'] = lp_mode + transceiver_dom_dict['tx_disable'] = tx_disable + transceiver_dom_dict['tx_disable_channel'] = tx_disable_channel + transceiver_dom_dict['temperature'] = temperature + transceiver_dom_dict['voltage'] = voltage + transceiver_dom_dict['tx1bias'] = tx_bias_list[0] + transceiver_dom_dict['tx2bias'] = tx_bias_list[1] + transceiver_dom_dict['tx3bias'] = tx_bias_list[2] + transceiver_dom_dict['tx4bias'] = tx_bias_list[3] + transceiver_dom_dict['rx1power'] = rx_power_list[0] + transceiver_dom_dict['rx2power'] = rx_power_list[1] + transceiver_dom_dict['rx3power'] = rx_power_list[2] + transceiver_dom_dict['rx4power'] = rx_power_list[3] + + return transceiver_dom_dict + + def get_name(self): + """ + Retrieves the name of the sfp + Returns : QSFP or QSFP+ or QSFP28 + """ + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + identifier = iface_data['data']['type']['value'] + else: + return None + + return identifier + + def get_presence(self): + """ + Retrieves the presence of the sfp + """ + presence_ctrl = self.sfp_control + 'qsfp_modprs' + try: + reg_file = open(presence_ctrl) + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + mask = (1 << self.sfp_ctrl_idx) + + # ModPrsL is active low + if ((reg_value & mask) == 0): + return True + + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the sfp + """ + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return None + + return vendor_pn + + def get_serial(self): + """ + Retrieves the serial number of the sfp + """ + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return None + + return vendor_sn + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + """ + reset_status = None + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + reset_status = True + else: + reset_status = False + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + """ + rx_los = None + rx_los_list = [] + + rx_los_data = self._get_eeprom_data('rx_los') + if (rx_los_data is not None): + rx_los = rx_los_data['data']['Rx1LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx2LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx3LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx4LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + + if (rx_los_list[0] and rx_los_list[1] + and rx_los_list[2] and rx_los_list[3]): + rx_los = True + else: + rx_los = False + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + """ + tx_fault = None + tx_fault_list = [] + + tx_fault_data = self._get_eeprom_data('tx_fault') + if (tx_fault_data is not None): + tx_fault = tx_fault_data['data']['Tx1Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx2Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx3Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx4Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + + if (tx_fault_list[0] and tx_fault_list[1] + and tx_fault_list[2] and tx_fault_list[3]): + tx_fault = True + else: + tx_fault = False + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + + if (tx_disable_list[0] and tx_disable_list[1] + and tx_disable_list[2] and tx_disable_list[3]): + tx_disable = True + else: + tx_disable = False + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + + bit4 = int(tx_disable_list[3]) * 8 + bit3 = int(tx_disable_list[2]) * 4 + bit2 = int(tx_disable_list[1]) * 2 + bit1 = int(tx_disable_list[0]) * 1 + + tx_disable_channel = hex(bit4 + bit3 + bit2 + bit1) + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + lpmode_state = False + else: + lpmode_state = True + + return lpmode_state + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + """ + power_override_state = None + + # Reset Status + power_override_data = self._get_eeprom_data('power_override') + if (power_override_data is not None): + power_override = power_override_data['data']['PowerOverRide']['value'] + if (power_override is 'On'): + power_override_state = True + else: + power_override_state = False + + return power_override_state + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + """ + temperature = None + + temperature_data = self._get_eeprom_data('Temperature') + if (temperature_data is not None): + temperature = temperature_data['data']['Temperature']['value'] + + return temperature + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + """ + voltage = None + + voltage_data = self._get_eeprom_data('Voltage') + if (voltage_data is not None): + voltage = voltage_data['data']['Vcc']['value'] + + return voltage + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + """ + tx_bias = None + tx_bias_list = [] + + tx_bias_data = self._get_eeprom_data('ChannelMonitor') + if (tx_bias_data is not None): + tx_bias = tx_bias_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + + return tx_bias_list + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + """ + rx_power = None + rx_power_list = [] + + rx_power_data = self._get_eeprom_data('ChannelMonitor') + if (rx_power_data is not None): + rx_power = rx_power_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + + return rx_power_list + + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + """ + tx_power = None + tx_power_list = [] + + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + + return tx_power_list + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + """ + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + # Open reset_ctrl in both read & write mode + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + # Mask off the bit corresponding to our port + mask = (1 << index) + + # ResetL is active low + reg_value = (reg_value & ~mask) + + # Convert our register value back to a + # hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the + # register to take port out of reset + try: + reg_file = open(reset_ctrl, "w") + except IOError as e: + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + mask = (1 << index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = (reg_value | mask) + else: + reg_value = (reg_value & ~mask) + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True diff --git a/platform/broadcom/sonic-platform-modules-dell/tools/0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch b/platform/broadcom/sonic-platform-modules-dell/tools/0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch new file mode 100644 index 00000000000..ab77df9c4d3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/tools/0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch @@ -0,0 +1,8510 @@ +From 482e06109190eb918208820fd94c8f4a6963f77e Mon Sep 17 00:00:00 2001 +From: paavaanan +Date: Tue, 21 May 2019 10:40:59 -0400 +Subject: [PATCH] Intel-Rangeley-stripped-code-changes + +--- + 82802ab.c | 1 + + Makefile | 109 +++- + README | 26 +- + at45db.c | 562 ++++++++++++++++ + atahpt.c | 2 + + board_enable.c | 19 +- + buspirate_spi.c | 7 +- + cbtable.c | 7 +- + chipdrivers.h | 21 +- + chipset_enable.c | 610 +++++++++++------ + cli_classic.c | 40 +- + dmi.c | 332 ++++++++-- + dnv_smi_spi.c | 185 ++++++ + drkaiser.c | 14 +- + flash.h | 56 +- + flashchips.c | 791 +++++++++++++++++++---- + flashchips.h | 27 +- + flashrom.c | 162 ++++- + ft2232_spi.c | 6 + + gfxnvidia.c | 14 +- + hwaccess.h | 6 + + ich_descriptors.c | 104 +++ + ich_descriptors.h | 104 +++ + ichspi.c | 557 ++++++++++++++-- + internal.c | 5 +- + it85spi.c | 3 + + it87spi.c | 47 +- + layout.c | 126 +++- + linux_spi.c | 12 +- + mcp6x_spi.c | 15 +- + nic3com.c | 2 + + nicintel.c | 29 +- + nicintel_spi.c | 26 +- + nicnatsemi.c | 2 + + nicrealtek.c | 2 + + ogp_spi.c | 14 +- + pcidev.c | 2 +- + physmap.c | 170 +++-- + pony_spi.c | 1 + + print.c | 15 +- + programmer.h | 28 +- + rayer_spi.c | 196 ++++-- + satamv.c | 19 +- + satasii.c | 18 +- + sb600spi.c | 208 +++++- + serial.c | 113 ++-- + serprog.c | 165 +++-- + spi25.c | 35 +- + spi25_statusreg.c | 2 +- + stm50.c | 115 ++++ + udelay.c | 10 +- + util/getrevision.sh | 311 +++++++++ + util/ich_descriptors_tool/ich_descriptors_tool.c | 8 +- + util/z60_flashrom.rules | 4 + + 54 files changed, 4553 insertions(+), 912 deletions(-) + create mode 100644 at45db.c + create mode 100644 dnv_smi_spi.c + create mode 100644 stm50.c + create mode 100755 util/getrevision.sh + +diff --git a/82802ab.c b/82802ab.c +index 608995d..2a43813 100644 +--- a/82802ab.c ++++ b/82802ab.c +@@ -89,6 +89,7 @@ int probe_82802ab(struct flashctx *flash) + return 1; + } + ++/* FIXME: needs timeout */ + uint8_t wait_82802ab(struct flashctx *flash) + { + uint8_t status; +diff --git a/Makefile b/Makefile +index 6e41e5d..d66039a 100644 +--- a/Makefile ++++ b/Makefile +@@ -39,6 +39,7 @@ CFLAGS ?= -Os -Wall -Wshadow + EXPORTDIR ?= . + AR ?= ar + RANLIB ?= ranlib ++DOSLIBS_BASE ?= .. + # The following parameter changes the default programmer that will be used if there is no -p/--programmer + # argument given when running flashrom. The predefined setting does not enable any default so that every + # user has to declare the programmer he wants to use on every run. The rationale for this to be not set +@@ -50,7 +51,8 @@ RANLIB ?= ranlib + # values are those specified in enum programmer in programmer.h (which depend on other CONFIG_* options + # evaluated below, namely those that enable/disable the various programmers). + # Compilation will fail for unspecified values. +-CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID ++#CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID ++CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INTERNAL + + # If your compiler spits out excessive warnings, run make WARNERROR=no + # You shouldn't have to change this flag. +@@ -61,10 +63,13 @@ CFLAGS += -Werror + endif + + ############################################################################### +-# General OS/architecture specific settings. ++# General OS-specific settings. ++# 1. Prepare for later by gathering information about host and target OS ++# 2. Set compiler flags and parameters according to OSes ++# 3. Likewise verify user-supplied CONFIG_* variables. + + # HOST_OS is only used to work around local toolchain issues. +-HOST_OS ?= $(shell uname) ++HOST_OS ?= $(shell uname) + ifeq ($(HOST_OS), MINGW32_NT-5.1) + # Explicitly set CC = gcc on MinGW, otherwise: "cc: command not found". + CC = gcc +@@ -94,13 +99,24 @@ CPPFLAGS += -I/usr/local/include + LDFLAGS += -L/usr/local/lib + endif + ++ifeq ($(TARGET_OS), NetBSD) ++CPPFLAGS += -I/usr/pkg/include ++LDFLAGS += -L/usr/pkg/lib ++endif ++ ++ifeq ($(TARGET_OS), DragonFlyBSD) ++CPPFLAGS += -I/usr/pkg/include ++LDFLAGS += -L/usr/pkg/lib ++endif ++ + ifeq ($(TARGET_OS), DOS) + EXEC_SUFFIX := .exe +-CPPFLAGS += -I../libgetopt ++CPPFLAGS += -I$(DOSLIBS_BASE)/libgetopt + # DJGPP has odd uint*_t definitions which cause lots of format string warnings. + CFLAGS += -Wno-format + # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt +-LIBS += ../libgetopt/libgetopt.a ++LIBS += -lgetopt ++LDFLAGS += -L$(DOSLIBS_BASE)/libgetopt/ + # Bus Pirate, Serprog and PonyProg are not supported under DOS (missing serial support). + ifeq ($(CONFIG_BUSPIRATE_SPI), yes) + UNSUPPORTED_FEATURES += CONFIG_BUSPIRATE_SPI=yes +@@ -215,6 +231,10 @@ endif + endif + + ifeq ($(TARGET_OS), libpayload) ++ifeq ($(MAKECMDGOALS),) ++.DEFAULT_GOAL := libflashrom.a ++$(info Setting default goal to libflashrom.a) ++endif + FLASHROM_CFLAGS += -DSTANDALONE + ifeq ($(CONFIG_DUMMY), yes) + UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes +@@ -263,6 +283,10 @@ override CONFIG_LINUX_SPI = no + endif + endif + ++############################################################################### ++# General architecture-specific settings. ++# Like above for the OS, below we verify user-supplied options depending on the target architecture. ++ + # Determine the destination processor architecture. + # IMPORTANT: The following line must be placed before ARCH is ever used + # (of course), but should come after any lines setting CC because the line +@@ -307,10 +331,10 @@ endif + ############################################################################### + # Flash chip drivers and bus support infrastructure. + +-CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ ++CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ + sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ +- opaque.o sfdp.o en29lv640b.o ++ opaque.o sfdp.o en29lv640b.o at45db.o + + ############################################################################### + # Library code. +@@ -322,18 +346,22 @@ LIB_OBJS = layout.o flashrom.o udelay.o programmer.o + + CLI_OBJS = cli_classic.o cli_output.o print.o + +-# Set the flashrom version string from the highest revision number +-# of the checked out flashrom files. ++# Set the flashrom version string from the highest revision number of the checked out flashrom files. + # Note to packagers: Any tree exported with "make export" or "make tarball" + # will not require subversion. The downloadable snapshots are already exported. +-SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) ++SVNVERSION := r1781 + + RELEASE := 0.9.7 +-VERSION := $(RELEASE)-r$(SVNVERSION) ++VERSION := $(RELEASE)-$(SVNVERSION) + RELEASENAME ?= $(VERSION) + + SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' + ++F10FLAGS := -DFORCE10_SPI_CHANGE ++ ++############################################################################### ++# Default settings of CONFIG_* variables. ++ + # Always enable internal/onboard support for now. + CONFIG_INTERNAL ?= yes + +@@ -425,16 +453,39 @@ endif + endif + + ############################################################################### ++# Handle CONFIG_* variables that depend on others set (and verified) above. ++ ++# The external DMI decoder (dmidecode) does not work in libpayload. Bail out if the internal one got disabled. ++ifeq ($(TARGET_OS), libpayload) ++ifeq ($(CONFIG_INTERNAL), yes) ++ifeq ($(CONFIG_INTERNAL_DMI), no) ++UNSUPPORTED_FEATURES += CONFIG_INTERNAL_DMI=no ++else ++override CONFIG_INTERNAL_DMI = yes ++endif ++endif ++endif ++ ++# Use internal DMI/SMBIOS decoder by default instead of relying on dmidecode. ++CONFIG_INTERNAL_DMI ?= yes ++ ++############################################################################### + # Programmer drivers and programmer support infrastructure. ++# Depending on the CONFIG_* variables set and verified above we set compiler flags and parameters below. ++ ++FEATURE_CFLAGS += -DDELL_DENVERTON_SUPPORT -DDELL_AVOTON_SUPPORT + + FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER=$(CONFIG_DEFAULT_PROGRAMMER)' + + ifeq ($(CONFIG_INTERNAL), yes) + FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' +-PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o ++PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o + ifeq ($(ARCH), x86) + PROGRAMMER_OBJS += it87spi.o it85spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o +-PROGRAMMER_OBJS += ichspi.o ich_descriptors.o ++PROGRAMMER_OBJS += ichspi.o ich_descriptors.o dmi.o dnv_smi_spi.o ++ifeq ($(CONFIG_INTERNAL_DMI), yes) ++FEATURE_CFLAGS += -D'CONFIG_INTERNAL_DMI=1' ++endif + else + endif + NEED_PCI := yes +@@ -597,9 +648,9 @@ PCILIBS += -lpciutils -lpci + PCILIBS += -l$(shell uname -p) + else + ifeq ($(TARGET_OS), DOS) +-# FIXME There needs to be a better way to do this +-CPPFLAGS += -I../libpci/include +-PCILIBS += ../libpci/lib/libpci.a ++CPPFLAGS += -I$(DOSLIBS_BASE)/libpci/include ++LDFLAGS += -L$(DOSLIBS_BASE)/libpci/lib/ ++PCILIBS += -lpci + else + PCILIBS += -lpci + ifeq ($(TARGET_OS), OpenBSD) +@@ -635,10 +686,11 @@ FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "% + LIBFLASHROM_OBJS = $(CHIP_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) + OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) + +-all: hwlibs features $(PROGRAM)$(EXEC_SUFFIX) ++all: hwlibs features $(PROGRAM)$(EXEC_SUFFIX) $(PROGRAM).8 + ifeq ($(ARCH), x86) + @+$(MAKE) -C util/ich_descriptors_tool/ TARGET_OS=$(TARGET_OS) EXEC_SUFFIX=$(EXEC_SUFFIX) + endif ++default: all + + $(PROGRAM)$(EXEC_SUFFIX): $(OBJS) + $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(LIBS) $(PCILIBS) $(FEATURE_LIBS) $(USBLIBS) +@@ -653,13 +705,13 @@ libflashrom.a: $(LIBFLASHROM_OBJS) + TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") + + %.o: %.c .features +- $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< ++ $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) $(F10FLAGS) -o $@ -c $< + + # Make sure to add all names of generated binaries here. + # This includes all frontends and libflashrom. + # We don't use EXEC_SUFFIX here because we want to clean everything. + clean: +- rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d ++ rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 + @+$(MAKE) -C util/ich_descriptors_tool/ clean + + distclean: clean +@@ -698,11 +750,20 @@ compiler: featuresavailable + @echo $(TARGET_OS)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' || \ + ( echo "unknown. Aborting."; exit 1) + @printf "%s\n" '$(TARGET_OS)' ++ifeq ($(TARGET_OS), libpayload) ++ @$(CC) --version 2>&1 | grep -q coreboot || \ ++ ( echo "Warning: It seems you are not using coreboot's reference compiler."; \ ++ echo "This might work but usually does not, please beware." ) ++endif + + define LIBPCI_TEST + /* Avoid a failing test due to libpci header symbol shadowing breakage */ + #define index shadow_workaround_index ++#if !defined __NetBSD__ && !defined __DragonFly__ + #include ++#else ++#include ++#endif + struct pci_access *pacc; + int main(int argc, char **argv) + { +@@ -853,16 +914,20 @@ endif + @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features + @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) + +-install: $(PROGRAM)$(EXEC_SUFFIX) ++$(PROGRAM).8: $(PROGRAM).8.tmpl ++ @sed -e '1 s#".*".*#"$(shell ./util/getrevision.sh -d $(PROGRAM).8.tmpl)" "$(VERSION)"#' <$< >$@ ++ ++install: $(PROGRAM)$(EXEC_SUFFIX) $(PROGRAM).8 + mkdir -p $(DESTDIR)$(PREFIX)/sbin + mkdir -p $(DESTDIR)$(MANDIR)/man8 + $(INSTALL) -m 0755 $(PROGRAM)$(EXEC_SUFFIX) $(DESTDIR)$(PREFIX)/sbin + $(INSTALL) -m 0644 $(PROGRAM).8 $(DESTDIR)$(MANDIR)/man8 + +-export: ++export: $(PROGRAM).8 + @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) + @svn export -r BASE . $(EXPORTDIR)/flashrom-$(RELEASENAME) + @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(RELEASENAME)/Makefile ++ @cp $(PROGRAM).8 "$(EXPORTDIR)/flashrom-$(RELEASENAME)/$(PROGRAM).8" + @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(RELEASENAME)/ChangeLog + @echo Exported $(EXPORTDIR)/flashrom-$(RELEASENAME)/ + +@@ -876,6 +941,6 @@ djgpp-dos: clean + libpayload: clean + make CC="CC=i386-elf-gcc lpgcc" AR=i386-elf-ar RANLIB=i386-elf-ranlib + +-.PHONY: all clean distclean compiler hwlibs features export tarball dos featuresavailable ++.PHONY: all install clean distclean compiler hwlibs features export tarball dos featuresavailable + + -include $(OBJS:.o=.d) +diff --git a/README b/README +index 7f24cca..b3e50a6 100644 +--- a/README ++++ b/README +@@ -80,11 +80,9 @@ To compile on Solaris, use: + + gmake LDFLAGS="-L$pathtolibpci" CC="gcc -I$pathtopciheaders" CFLAGS=-O2 + +-To compile on NetBSD or DragonFly BSD, use: ++To compile on NetBSD or DragonFly BSD (with pciutils, libftdi, libusb installed in /usr/pkg/), use: + +- ln -s /usr/pkg/include/pciutils pci +- gmake CPPFLAGS="-I. -I/usr/pkg/include" \ +- LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" ++ gmake + + To compile on OpenBSD, use: + +@@ -105,20 +103,24 @@ To cross-compile on Linux for DOS: + djcrx-2.04pre_20090725-13ap.i386.rpm + The cross toolchain packages for your distribution may have slightly different + names (look for packages named *djgpp*). +- Download pciutils 3.1.5 and apply http://assembler.cz/flashrom/pciutils.patch +- Download and compile http://assembler.cz/flashrom/libgetopt/ ++ ++ You will need the following library source trees containing their compiled ++ static libraries either in the parent directory of the flashrom source or ++ specify the base folder on compile time with the DOSLIBS_BASE parameter. ++ The default as described above is equal to calling ++ 'make djgpp-dos DOSLIBS_BASE=..' ++ ++ To get and build said libraries... ++ Download pciutils 3.1.5 and apply http://flashrom.org/File:Pciutils.patch.gz + Compile pciutils, see README.DJGPP for instructions. ++ Download and compile http://flashrom.org/File:Libgetopt.tar.gz + Enter the flashrom directory. +- ../libpci should contain pciutils source and binaries. +- ../libgetopt should contain getopt.a from libgetopt. + Run either (change settings where appropriate) + make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip + or (above settings hardcoded) + make djgpp-dos +- You might have to add WARNERROR=no to the make command line. +- To run flashrom.exe, download and unpack +- http://homer.rice.edu/~sandmann/cwsdpmi/csdpmi7b.zip and make sure +- CWSDPMI.EXE is in the current directory. ++ To run flashrom.exe, download http://flashrom.org/File:Csdpmi7b.zip and ++ unpack CWSDPMI.EXE into the current directory or one in PATH. + + To cross-compile on Linux for Windows: + +diff --git a/at45db.c b/at45db.c +new file mode 100644 +index 0000000..5c90418 +--- /dev/null ++++ b/at45db.c +@@ -0,0 +1,562 @@ ++/* ++ * Support for Atmel AT45DB series DataFlash chips. ++ * This file is part of the flashrom project. ++ * ++ * Copyright (C) 2012 Aidan Thornton ++ * Copyright (C) 2013 Stefan Tauner ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++#include ++#include "flash.h" ++#include "chipdrivers.h" ++#include "programmer.h" ++#include "spi.h" ++ ++/* Status register bits */ ++#define AT45DB_READY (1<<7) ++#define AT45DB_CMP (1<<6) ++#define AT45DB_PROT (1<<1) ++#define AT45DB_POWEROF2 (1<<0) ++ ++/* Opcodes */ ++#define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */ ++#define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A ++#define AT45DB_READ_ARRAY 0xE8 ++#define AT45DB_READ_PROTECT 0x32 ++#define AT45DB_READ_LOCKDOWN 0x35 ++#define AT45DB_PAGE_ERASE 0x81 ++#define AT45DB_BLOCK_ERASE 0x50 ++#define AT45DB_SECTOR_ERASE 0x7C ++#define AT45DB_CHIP_ERASE 0xC7 ++#define AT45DB_CHIP_ERASE_ADDR 0x94809A /* Magic address. See usage. */ ++#define AT45DB_BUFFER1_WRITE 0x84 ++#define AT45DB_BUFFER1_PAGE_PROGRAM 0x88 ++/* Buffer 2 is unused yet. ++#define AT45DB_BUFFER2_WRITE 0x87 ++#define AT45DB_BUFFER2_PAGE_PROGRAM 0x89 ++*/ ++ ++static uint8_t at45db_read_status_register(struct flashctx *flash, uint8_t *status) ++{ ++ static const uint8_t cmd[] = { AT45DB_STATUS }; ++ ++ int ret = spi_send_command(flash, sizeof(cmd), 1, cmd, status); ++ if (ret != 0) ++ msg_cerr("Reading the status register failed!\n"); ++ else ++ msg_cspew("Status register: 0x%02x.\n", *status); ++ return ret; ++} ++ ++int spi_disable_blockprotect_at45db(struct flashctx *flash) ++{ ++ static const uint8_t cmd[4] = { AT45DB_DISABLE_PROTECT }; /* NB: 4 bytes magic number */ ++ int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); ++ if (ret != 0) { ++ msg_cerr("Sending disable lockdown failed!\n"); ++ return ret; ++ } ++ uint8_t status; ++ ret = at45db_read_status_register(flash, &status); ++ if (ret != 0 || ((status & AT45DB_PROT) != 0)) { ++ msg_cerr("Disabling lockdown failed!\n"); ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static unsigned int at45db_get_sector_count(struct flashctx *flash) ++{ ++ unsigned int i, j; ++ unsigned int cnt = 0; ++ for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { ++ if (flash->chip->block_erasers[i].block_erase == &spi_erase_at45db_sector) { ++ for (j = 0; j < NUM_ERASEREGIONS; j++) { ++ cnt += flash->chip->block_erasers[i].eraseblocks[j].count; ++ } ++ } ++ } ++ msg_cspew("%s: number of sectors=%u\n", __func__, cnt); ++ return cnt; ++} ++ ++/* Reads and prettyprints protection/lockdown registers. ++ * Some elegance of the printouts had to be cut down a bit to share this code. */ ++static uint8_t at45db_prettyprint_protection_register(struct flashctx *flash, uint8_t opcode, const char *regname) ++{ ++ const uint8_t cmd[] = { opcode, 0, 0, 0 }; ++ /* The first two sectors share the first result byte. */ ++ uint8_t buf[at45db_get_sector_count(flash) - 1]; ++ ++ int ret = spi_send_command(flash, sizeof(cmd), sizeof(buf), cmd, buf); ++ if (ret != 0) { ++ msg_cerr("Reading the %s register failed!\n", regname); ++ return ret; ++ } ++ ++ unsigned int i; ++ for (i = 0; i < sizeof(buf); i++) { ++ if (buf[i] != 0x00) ++ break; ++ if (i == sizeof(buf) - 1) { ++ msg_cdbg("No Sector is %sed.\n", regname); ++ return 0; ++ } ++ } ++ ++ /* TODO: print which addresses are mapped to (un)locked sectors. */ ++ msg_cdbg("Sector 0a is %s%sed.\n", ((buf[0] & 0xC0) == 0x00) ? "un" : "", regname); ++ msg_cdbg("Sector 0b is %s%sed.\n", ((buf[0] & 0x30) == 0x00) ? "un" : "", regname); ++ for (i = 1; i < sizeof(buf); i++) ++ msg_cdbg("Sector %2u is %s%sed.\n", i, (buf[i] == 0x00) ? "un" : "", regname); ++ ++ return 0; ++} ++ ++/* bit 7: busy flag ++ * bit 6: memory/buffer compare result ++ * bit 5-2: density (encoding see below) ++ * bit 1: protection enabled (soft or hard) ++ * bit 0: "power of 2" page size indicator (e.g. 1 means 256B; 0 means 264B) ++ * ++ * 5-2 encoding: bit 2 is always 1, bits 3-5 encode the density as "2^(bits - 1)" in Mb e.g.: ++ * AT45DB161D 1011 16Mb */ ++int spi_prettyprint_status_register_at45db(struct flashctx *flash) ++{ ++ uint8_t status; ++ if (at45db_read_status_register(flash, &status) != 0) { ++ return 1; ++ } ++ ++ /* AT45DB321C does not support lockdown or a page size of a power of 2... */ ++ const bool isAT45DB321C = (strcmp(flash->chip->name, "AT45DB321C") == 0); ++ msg_cdbg("Chip status register is 0x%02x\n", status); ++ msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not "); ++ msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not "); ++ spi_prettyprint_status_register_bit(status, 5); ++ spi_prettyprint_status_register_bit(status, 4); ++ spi_prettyprint_status_register_bit(status, 3); ++ spi_prettyprint_status_register_bit(status, 2); ++ const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */ ++ msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1)); ++ msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not "); ++ ++ if (isAT45DB321C) ++ spi_prettyprint_status_register_bit(status, 0); ++ else ++ msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n", ++ (status & AT45DB_POWEROF2) ? "" : "not "); ++ ++ if (status & AT45DB_PROT) ++ at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect"); ++ ++ if (!isAT45DB321C) ++ at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); ++ ++ return 0; ++} ++ ++/* Probe function for AT45DB* chips that support multiple page sizes. */ ++int probe_spi_at45db(struct flashctx *flash) ++{ ++ uint8_t status; ++ struct flashchip *chip = flash->chip; ++ ++ if (!probe_spi_rdid(flash)) ++ return 0; ++ ++ /* Some AT45DB* chips support two different page sizes each (e.g. 264 and 256 B). In order to tell which ++ * page size this chip has we need to read the status register. */ ++ if (at45db_read_status_register(flash, &status) != 0) ++ return 0; ++ ++ /* We assume sane power-of-2 page sizes and adjust the chip attributes in case this is not the case. */ ++ if ((status & AT45DB_POWEROF2) == 0) { ++ chip->total_size = (chip->total_size / 32) * 33; ++ chip->page_size = (chip->page_size / 32) * 33; ++ ++ unsigned int i, j; ++ for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { ++ struct block_eraser *eraser = &chip->block_erasers[i]; ++ for (j = 0; j < NUM_ERASEREGIONS; j++) { ++ eraser->eraseblocks[j].size = (eraser->eraseblocks[j].size / 32) * 33; ++ } ++ } ++ } ++ ++ switch (chip->page_size) { ++ case 256: chip->gran = write_gran_256bytes; break; ++ case 264: chip->gran = write_gran_264bytes; break; ++ case 512: chip->gran = write_gran_512bytes; break; ++ case 528: chip->gran = write_gran_528bytes; break; ++ case 1024: chip->gran = write_gran_1024bytes; break; ++ case 1056: chip->gran = write_gran_1056bytes; break; ++ default: ++ msg_cerr("%s: unknown page size %d.\n", __func__, chip->page_size); ++ return 0; ++ } ++ ++ msg_cdbg2("%s: total size %i kB, page size %i B\n", __func__, chip->total_size * 1024, chip->page_size); ++ ++ return 1; ++} ++ ++/* Returns the minimum number of bits needed to represent the given address. ++ * FIXME: use mind-blowing implementation. ++ * FIXME: move to utility module. */ ++static uint32_t address_to_bits(uint32_t addr) ++{ ++ unsigned int lzb = 0; ++ while (((1 << (31 - lzb)) & ~addr) != 0) ++ lzb++; ++ return 32 - lzb; ++} ++ ++/* In case of non-power-of-two page sizes we need to convert the address flashrom uses to the address the ++ * DataFlash chips use. The latter uses a segmented address space where the page address is encoded in the ++ * more significant bits and the offset within the page is encoded in the less significant bits. The exact ++ * partition depends on the page size. ++ */ ++static unsigned int at45db_convert_addr(unsigned int addr, unsigned int page_size) ++{ ++ unsigned int page_bits = address_to_bits(page_size - 1); ++ unsigned int at45db_addr = ((addr / page_size) << page_bits) | (addr % page_size); ++ msg_cspew("%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x\n", ++ __func__, addr, page_size, page_bits, at45db_addr); ++ return at45db_addr; ++} ++ ++int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ if ((addr + len) > total_size) { ++ msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", ++ __func__, addr, len, total_size); ++ return 1; ++ } ++ ++ /* We have to split this up into chunks to fit within the programmer's read size limit, but those ++ * chunks can cross page boundaries. */ ++ const unsigned int max_data_read = flash->pgm->spi.max_data_read; ++ const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; ++ while (addr < len) { ++ unsigned int chunk = min(max_chunk, len); ++ int ret = spi_nbyte_read(flash, at45db_convert_addr(addr, page_size), buf + addr, chunk); ++ if (ret) { ++ msg_cerr("%s: error sending read command!\n", __func__); ++ return ret; ++ } ++ addr += chunk; ++ } ++ ++ return 0; ++} ++ ++/* Legacy continuous read, used where spi_read_at45db() is not available. ++ * The first 4 (dummy) bytes read need to be discarded. */ ++int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ if ((addr + len) > total_size) { ++ msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", ++ __func__, addr, len, total_size); ++ return 1; ++ } ++ ++ /* We have to split this up into chunks to fit within the programmer's read size limit, but those ++ * chunks can cross page boundaries. */ ++ const unsigned int max_data_read = flash->pgm->spi.max_data_read; ++ const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; ++ while (addr < len) { ++ const unsigned int addr_at45 = at45db_convert_addr(addr, page_size); ++ const unsigned char cmd[] = { ++ AT45DB_READ_ARRAY, ++ (addr_at45 >> 16) & 0xff, ++ (addr_at45 >> 8) & 0xff, ++ (addr_at45 >> 0) & 0xff ++ }; ++ /* We need to leave place for 4 dummy bytes and handle them explicitly. */ ++ unsigned int chunk = min(max_chunk, len + 4); ++ uint8_t tmp[chunk]; ++ int ret = spi_send_command(flash, sizeof(cmd), chunk, cmd, tmp); ++ if (ret) { ++ msg_cerr("%s: error sending read command!\n", __func__); ++ return ret; ++ } ++ /* Copy result without dummy bytes into buf and advance address counter respectively. */ ++ memcpy(buf + addr, tmp + 4, chunk - 4); ++ addr += chunk - 4; ++ } ++ return 0; ++} ++ ++/* Returns 0 when ready, 1 on errors and timeouts. */ ++static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries) ++{ ++ while (true) { ++ uint8_t status; ++ int ret = at45db_read_status_register(flash, &status); ++ if ((status & AT45DB_READY) == AT45DB_READY) ++ return 0; ++ if (ret != 0 || retries-- == 0) ++ return 1; ++ programmer_delay(us); ++ } ++} ++ ++static int at45db_erase(struct flashctx *flash, uint8_t opcode, unsigned int at45db_addr, unsigned int stepsize, unsigned int retries) ++{ ++ const uint8_t cmd[] = { ++ opcode, ++ (at45db_addr >> 16) & 0xff, ++ (at45db_addr >> 8) & 0xff, ++ (at45db_addr >> 0) & 0xff ++ }; ++ ++ /* Send erase command. */ ++ int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); ++ if (ret != 0) { ++ msg_cerr("%s: error sending erase command!\n", __func__); ++ return ret; ++ } ++ ++ /* Wait for completion. */ ++ ret = at45db_wait_ready(flash, stepsize, retries); ++ if (ret != 0) ++ msg_cerr("%s: chip did not became ready again after sending the erase command!\n", __func__); ++ ++ return ret; ++} ++ ++int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { ++ msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically about 35 ms for completion, so let's wait 100 ms in 500 us steps. */ ++ return at45db_erase(flash, AT45DB_PAGE_ERASE, at45db_convert_addr(addr, page_size), 500, 200); ++} ++ ++int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check blocks not pages ++ msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically between 20 and 100 ms for completion, so let's wait 300 ms in 1 ms steps. */ ++ return at45db_erase(flash, AT45DB_BLOCK_ERASE, at45db_convert_addr(addr, page_size), 1000, 300); ++} ++ ++int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check sectors not pages ++ msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically about 5 s for completion, so let's wait 20 seconds in 200 ms steps. */ ++ return at45db_erase(flash, AT45DB_SECTOR_ERASE, at45db_convert_addr(addr, page_size), 200000, 100); ++} ++ ++int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically from about 5 to over 60 s for completion, so let's wait 100 s in 500 ms steps. ++ * NB: the address is not a real address but a magic number. This hack allows to share code. */ ++ return at45db_erase(flash, AT45DB_CHIP_ERASE, AT45DB_CHIP_ERASE_ADDR, 500000, 200); ++} ++ ++/* This one is really special and works only for AT45CS1282. It uses two different opcodes depending on the ++ * address and has an asymmetric layout. */ ++int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ const struct block_eraser be = flash->chip->block_erasers[0]; ++ const unsigned int sec_0a_top = be.eraseblocks[0].size; ++ const unsigned int sec_0b_top = be.eraseblocks[0].size + be.eraseblocks[1].size; ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ bool partial_range = false; ++ uint8_t opcode = 0x7C; /* Used for all but sector 0a. */ ++ if (addr < sec_0a_top) { ++ opcode = 0x50; ++ /* One single sector of 8 pages at address 0. */ ++ if (addr != 0 || blocklen != (8 * page_size)) ++ partial_range = true; ++ } else if (addr < sec_0b_top) { ++ /* One single sector of 248 pages adjacent to the first. */ ++ if (addr != sec_0a_top || blocklen != (248 * page_size)) ++ partial_range = true; ++ } else { ++ /* The rest is filled by 63 aligned sectors of 256 pages. */ ++ if ((addr % (256 * page_size)) != 0 || (blocklen % (256 * page_size)) != 0) ++ partial_range = true; ++ } ++ if (partial_range) { ++ msg_cerr("%s: cannot erase partial sectors: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ /* Needs up to 4 s for completion, so let's wait 20 seconds in 200 ms steps. */ ++ return at45db_erase(flash, opcode, at45db_convert_addr(addr, page_size), 200000, 100); ++} ++ ++static int at45db_fill_buffer1(struct flashctx *flash, uint8_t *bytes, unsigned int off, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ if ((off + len) > page_size) { ++ msg_cerr("Tried to write %u bytes at offset %u into a buffer of only %u B.\n", ++ len, off, page_size); ++ return 1; ++ } ++ ++ /* Create a suitable buffer to store opcode, address and data chunks for buffer1. */ ++ const unsigned int max_data_write = flash->pgm->spi.max_data_write; ++ const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ? ++ max_data_write : page_size; ++ uint8_t buf[4 + max_chunk]; ++ ++ buf[0] = AT45DB_BUFFER1_WRITE; ++ while (off < page_size) { ++ unsigned int cur_chunk = min(max_chunk, page_size - off); ++ buf[1] = (off >> 16) & 0xff; ++ buf[2] = (off >> 8) & 0xff; ++ buf[3] = (off >> 0) & 0xff; ++ memcpy(&buf[4], bytes + off, cur_chunk); ++ int ret = spi_send_command(flash, 4 + cur_chunk, 0, buf, NULL); ++ if (ret != 0) { ++ msg_cerr("%s: error sending buffer write!\n", __func__); ++ return ret; ++ } ++ off += cur_chunk; ++ } ++ return 0; ++} ++ ++static int at45db_commit_buffer1(struct flashctx *flash, unsigned int at45db_addr) ++{ ++ const uint8_t cmd[] = { ++ AT45DB_BUFFER1_PAGE_PROGRAM, ++ (at45db_addr >> 16) & 0xff, ++ (at45db_addr >> 8) & 0xff, ++ (at45db_addr >> 0) & 0xff ++ }; ++ ++ /* Send buffer to device. */ ++ int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); ++ if (ret != 0) { ++ msg_cerr("%s: error sending buffer to main memory command!\n", __func__); ++ return ret; ++ } ++ ++ /* Wait for completion (typically a few ms). */ ++ ret = at45db_wait_ready(flash, 250, 200); // 50 ms ++ if (ret != 0) { ++ msg_cerr("%s: chip did not became ready again!\n", __func__); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int at45db_program_page(struct flashctx *flash, uint8_t *buf, unsigned int at45db_addr) ++{ ++ int ret = at45db_fill_buffer1(flash, buf, 0, flash->chip->page_size); ++ if (ret != 0) { ++ msg_cerr("%s: filling the buffer failed!\n", __func__); ++ return ret; ++ } ++ ++ ret = at45db_commit_buffer1(flash, at45db_addr); ++ if (ret != 0) { ++ msg_cerr("%s: committing page failed!\n", __func__); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size; ++ ++ if ((start % page_size) != 0 || (len % page_size) != 0) { ++ msg_cerr("%s: cannot write partial pages: start=%u, len=%u\n", __func__, start, len); ++ return 1; ++ } ++ ++ if ((start + len) > (total_size * 1024)) { ++ msg_cerr("%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u\n", ++ __func__, start, len, total_size); ++ return 1; ++ } ++ ++ unsigned int i; ++ for (i = 0; i < len; i += page_size) { ++ if (at45db_program_page(flash, buf + i, at45db_convert_addr(start + i, page_size)) != 0) { ++ msg_cerr("Writing page %u failed!\n", i); ++ return 1; ++ } ++ } ++ return 0; ++} +diff --git a/atahpt.c b/atahpt.c +index f8be8c4..242e14a 100644 +--- a/atahpt.c ++++ b/atahpt.c +@@ -69,6 +69,8 @@ int atahpt_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4); ++ if (!io_base_addr) ++ return 1; + + /* Enable flash access. */ + reg32 = pci_read_long(dev, REG_FLASH_ACCESS); +diff --git a/board_enable.c b/board_enable.c +index 074cabb..e2a5fe2 100644 +--- a/board_enable.c ++++ b/board_enable.c +@@ -1488,6 +1488,7 @@ static int intel_ich_gpio_set(int gpio, int raise) + {0x24D0, 0x58, 0x1BFF0000, 0x00030305, 0}, /* 82801EB/ER (ICH5/ICH5R) */ + {0x2640, 0x48, 0x1BFF0000, 0x00030307, 0}, /* 82801FB/FR (ICH6/ICH6R) */ + {0x2641, 0x48, 0x1BFF0000, 0x00030307, 0}, /* 82801FBM (ICH6M) */ ++ {0x27B0, 0x48, 0xFFFFFFFF, 0x000300FF, 0}, /* 82801GDH (ICH7 DH) */ + {0x27B8, 0x48, 0xFFFFFFFF, 0x000300FF, 0}, /* 82801GB/GR (ICH7 Family) */ + {0x27B9, 0x48, 0xFFEBFFFE, 0x000300FE, 0}, /* 82801GBM (ICH7-M) */ + {0x27BD, 0x48, 0xFFEBFFFE, 0x000300FE, 0}, /* 82801GHM (ICH7-M DH) */ +@@ -1665,6 +1666,7 @@ static int intel_ich_gpio_set(int gpio, int raise) + * - abit IP35 Pro: Intel P35 + ICH9R + * - ASUS P5LD2 + * - ASUS P5LD2-VM ++ * - ASUS P5LD2-VM DH + */ + static int intel_ich_gpio16_raise(void) + { +@@ -2266,13 +2268,13 @@ static int p2_whitelist_laptop(void) + * NOTE: Please add boards that _don't_ need such enables or don't work yet + * to the respective tables in print.c. Thanks! + * +- * We use 2 sets of IDs here, you're free to choose which is which. This ++ * We use 2 sets of PCI IDs here, you're free to choose which is which. This + * is to provide a very high degree of certainty when matching a board on + * the basis of subsystem/card IDs. As not every vendor handles + * subsystem/card IDs in a sane manner. + * + * Keep the second set NULLed if it should be ignored. Keep the subsystem IDs +- * NULLed if they don't identify the board fully and if you can't use DMI. ++ * and the dmi identifier NULLed if they don't identify the board fully to disable autodetection. + * But please take care to provide an as complete set of pci ids as possible; + * autodetection is the preferred behaviour and we would like to make sure that + * matches are unique. +@@ -2306,6 +2308,7 @@ const struct board_match board_matches[] = { + #if defined(__i386__) || defined(__x86_64__) + {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, P3, "abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, + {0x1106, 0x0282, 0x147B, 0x1415, 0x1106, 0x3227, 0x147B, 0x1415, "^AV8 ", NULL, NULL, P3, "abit", "AV8", 0, OK, board_abit_av8}, ++ {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, NULL /* "^I440BX-W977$" */, "abit", "bf6", P3, "abit", "BF6", 0, OK, intel_piix4_gpo26_lower}, + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^i440BX-W977 (BM6)$", NULL, NULL, P3, "abit", "BM6", 0, OK, intel_piix4_gpo26_lower}, + {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, P3, "abit", "IC7", 0, NT, intel_ich_gpio23_raise}, + {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, P3, "abit", "IP35", 0, OK, intel_ich_gpio16_raise}, +@@ -2330,6 +2333,7 @@ const struct board_match board_matches[] = { + {0x8086, 0x2570, 0x1849, 0x2570, 0x8086, 0x24d3, 0x1849, 0x24d0, NULL, NULL, NULL, P3, "ASRock", "775i65G", 0, OK, intel_ich_gpio23_raise}, + {0x10DE, 0x0060, 0x1043, 0x80AD, 0x10DE, 0x01E0, 0x1043, 0x80C0, NULL, NULL, NULL, P3, "ASUS", "A7N8X-VM/400", 0, OK, it8712f_gpio12_raise}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, P3, "ASUS", "A7V600-X", 0, OK, it8712f_gpio31_raise}, ++ {0x1106, 0x3177, 0x1043, 0x80F9, 0x1106, 0x3205, 0x1043, 0x80F9, NULL, NULL, NULL, P3, "ASUS", "A7V8X-MX", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, P3, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, P3, "ASUS", "A7V8X", 0, OK, it8703f_gpio51_raise}, + {0x1106, 0x3099, 0x1043, 0x807F, 0x1106, 0x3147, 0x1043, 0x808C, NULL, NULL, NULL, P3, "ASUS", "A7V333", 0, OK, it8703f_gpio51_raise}, +@@ -2372,12 +2376,14 @@ const struct board_match board_matches[] = { + {0x8086, 0x27b8, 0x1043, 0x2a22, 0x8086, 0x2770, 0x1043, 0x2a22, "^P5LP-LE$", NULL, NULL, P3, "ASUS", "P5LP-LE (Epson OEM)", 0, OK, intel_ich_gpio34_raise}, + {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2$", NULL, NULL, P3, "ASUS", "P5LD2", 0, NT, intel_ich_gpio16_raise}, + {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2-VM$", NULL, NULL, P3, "ASUS", "P5LD2-VM", 0, NT, intel_ich_gpio16_raise}, ++ {0x8086, 0x27b0, 0x1043, 0x8179, 0x8086, 0x2770, 0x1043, 0x817a, "^P5LD2-VM DH$", NULL, NULL, P3, "ASUS", "P5LD2-VM DH", 0, OK, intel_ich_gpio16_raise}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, P3, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, + {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x829E, "^P5N-D$", NULL, NULL, P3, "ASUS", "P5N-D", 0, OK, it8718f_gpio63_raise}, + {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, + {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^CUSL2-C", NULL, NULL, P3, "ASUS", "CUSL2-C", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^TUSL2-C", NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, ++ {0x1106, 0x3059, 0x1106, 0x4161, 0x1106, 0x3065, 0x1106, 0x0102, NULL, NULL, NULL, P3, "Bcom/Clientron", "WinNET P680", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, + {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, +@@ -2452,6 +2458,12 @@ const struct board_match board_matches[] = { + {0x1106, 0x0259, 0x1106, 0xAA07, 0x1106, 0x3227, 0x1106, 0xAA07, NULL, NULL, NULL, P3, "VIA", "EPIA EK", 0, NT, via_vt823x_gpio9_raise}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, P3, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, P3, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise}, ++#ifdef DELL_AVOTON_SUPPORT ++ {0x8086, 0x1f38, 0x8086, 0x7270, 0, 0, 0, 0, NULL, NULL, NULL, P2, "DELL", "AVOTON", 0, OK, p2_not_a_laptop}, ++#endif ++#if DELL_DENVERTON_SUPPORT == 1 ++ {0x8086, 0x19dc, 0x8086, 0x7270, 0, 0, 0, 0, NULL, NULL, NULL, P2, "DELL", "DENVERTON", 0, OK, p2_not_a_laptop}, ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + #endif + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ + }; +@@ -2559,6 +2571,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas + } + } + ++#if defined(__i386__) || defined(__x86_64__) + if (board->dmi_pattern) { + if (!has_dmi_support) { + msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n", +@@ -2571,7 +2584,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas + continue; + } + } +- ++#endif // defined(__i386__) || defined(__x86_64__) + return board; + } + +diff --git a/buspirate_spi.c b/buspirate_spi.c +index 9d229f4..f0e84bc 100644 +--- a/buspirate_spi.c ++++ b/buspirate_spi.c +@@ -250,6 +250,7 @@ int buspirate_spi_init(void) + if (!bp_commbuf) { + bp_commbufsize = 0; + msg_perr("Out of memory!\n"); ++ free(dev); + return ERROR_OOM; + } + bp_commbufsize = DEFAULT_BUFSIZE; +@@ -263,8 +264,12 @@ int buspirate_spi_init(void) + return ret; + } + +- if (register_shutdown(buspirate_spi_shutdown, NULL)) ++ if (register_shutdown(buspirate_spi_shutdown, NULL) != 0) { ++ bp_commbufsize = 0; ++ free(bp_commbuf); ++ bp_commbuf = NULL; + return 1; ++ } + + /* This is the brute force version, but it should work. + * It is likely to fail if a previous flashrom run was aborted during a write with the new SPI commands +diff --git a/cbtable.c b/cbtable.c +index e262a84..c100bbb 100644 +--- a/cbtable.c ++++ b/cbtable.c +@@ -261,7 +261,7 @@ int cb_parse_table(const char **vendor, const char **model) + #else + start = 0x0; + #endif +- table_area = physmap_try_ro("low megabyte", start, BYTES_TO_MAP - start); ++ table_area = physmap_ro_unaligned("low megabyte", start, BYTES_TO_MAP - start); + if (ERROR_PTR == table_area) { + msg_perr("Failed getting access to coreboot low tables.\n"); + return -1; +@@ -276,8 +276,9 @@ int cb_parse_table(const char **vendor, const char **model) + if (forward->tag == LB_TAG_FORWARD) { + start = forward->forward; + start &= ~(getpagesize() - 1); +- physunmap(table_area, BYTES_TO_MAP); +- table_area = physmap_try_ro("high tables", start, BYTES_TO_MAP); ++ physunmap_unaligned(table_area, BYTES_TO_MAP); ++ // FIXME: table_area is never unmapped below, nor is it unmapped above in the no-forward case ++ table_area = physmap_ro_unaligned("high tables", start, BYTES_TO_MAP); + if (ERROR_PTR == table_area) { + msg_perr("Failed getting access to coreboot high tables.\n"); + return -1; +diff --git a/chipdrivers.h b/chipdrivers.h +index 091d14c..851e90a 100644 +--- a/chipdrivers.h ++++ b/chipdrivers.h +@@ -64,6 +64,7 @@ int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, + /* spi25_statusreg.c */ + uint8_t spi_read_status_register(struct flashctx *flash); + int spi_write_status_register(struct flashctx *flash, int status); ++void spi_prettyprint_status_register_bit(uint8_t status, int bit); + int spi_prettyprint_status_register_plain(struct flashctx *flash); + int spi_prettyprint_status_register_default_welwip(struct flashctx *flash); + int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); +@@ -109,6 +110,19 @@ int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsign + int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); + ++/* at45db.c */ ++int probe_spi_at45db(struct flashctx *flash); ++int spi_prettyprint_status_register_at45db(struct flashctx *flash); ++int spi_disable_blockprotect_at45db(struct flashctx *flash); ++int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); ++int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); ++int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); ++int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++ + /* 82802ab.c */ + uint8_t wait_82802ab(struct flashctx *flash); + int probe_82802ab(struct flashctx *flash); +@@ -179,9 +193,10 @@ int printlock_at49f(struct flashctx *flash); + /* w29ee011.c */ + int probe_w29ee011(struct flashctx *flash); + +-/* stm50flw0x0x.c */ +-int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int block, unsigned int blocksize); +-int unlock_stm50flw0x0x(struct flashctx *flash); ++/* stm50.c */ ++int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int blocksize); ++int unlock_stm50_uniform(struct flashctx *flash); ++int unlock_stm50_nonuniform(struct flashctx *flash); + + /* en29lv640b.c */ + int probe_en29lv640b(struct flashctx *flash); +diff --git a/chipset_enable.c b/chipset_enable.c +index a2df263..8a8ab66 100644 +--- a/chipset_enable.c ++++ b/chipset_enable.c +@@ -41,6 +41,17 @@ + + #if defined(__i386__) || defined(__x86_64__) + ++#if DELL_AVOTON_SUPPORT == 1 ++uint8_t is_avoton = 0; ++#endif /* DELL_AVOTON_SUPPORT == 1 */ ++ ++#if DELL_DENVERTON_SUPPORT == 1 ++uint8_t is_dnv = 0; ++uint32_t dnv_bios_region_start = 0x00; ++uint32_t dnv_bios_region_size = 0x00; ++uint32_t dnv_bios_region_limit = 0x00; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name) + { + uint8_t tmp; +@@ -260,20 +271,44 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name) + return 0; + } + +-/* +- * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet" +- * http://download.intel.com/design/chipsets/datashts/30701303.pdf +- */ +-static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_cntl) ++/* Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Poulsbo, Tunnel Creek and other Atom ++ * chipsets/SoCs it is even 32b, but just treating it as 8 bit wide seems to work fine in practice. */ ++static int enable_flash_ich_bios_cntl(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) + { + uint8_t old, new, wanted; + +- /* +- * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Tunnel Creek it is even 32b, but +- * just treating it as 8 bit wide seems to work fine in practice. +- */ +- wanted = old = pci_read_byte(dev, bios_cntl); ++ switch (ich_generation) { ++ case CHIPSET_ICH_UNKNOWN: ++ return ERROR_FATAL; ++ /* Non-SPI-capable */ ++ case CHIPSET_ICH: ++ case CHIPSET_ICH2345: ++ break; ++ /* Atom chipsets are special: The second byte of BIOS_CNTL (D9h) contains a prefetch bit similar to what ++ * other SPI-capable chipsets have at DCh. ++ * The Tunnel Creek datasheet contains a lot of details about the SPI controller, among other things it ++ * mentions that the prefetching and caching does only happen for direct memory reads. ++ * Therefore - at least for Tunnel Creek - it should not matter to flashrom because we use the ++ * programmed access only and not memory mapping. */ ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_POULSBO: ++ case CHIPSET_CENTERTON: ++ old = pci_read_byte(dev, bios_cntl + 1); ++ msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis"); ++ break; ++ case CHIPSET_ICH7: ++ default: /* Future version might behave the same */ ++ old = (pci_read_byte(dev, bios_cntl) >> 2) & 0x3; ++ msg_pdbg("SPI Read Configuration: "); ++ if (old == 3) ++ msg_pdbg("invalid prefetching/caching settings, "); ++ else ++ msg_pdbg("prefetching %sabled, caching %sabled, ", ++ (old & 0x2) ? "en" : "dis", ++ (old & 0x1) ? "dis" : "en"); ++ } + ++ wanted = old = pci_read_byte(dev, bios_cntl); + /* + * Quote from the 6 Series datasheet (Document Number: 324645-004): + * "Bit 5: SMM BIOS Write Protect Disable (SMM_BWP) +@@ -283,11 +318,23 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ + * + * Try to unset it in any case. + * It won't hurt and makes sense in some cases according to Stefan Reinauer. ++ * ++ * At least in Centerton aforementioned bit is located at bit 7. It is unspecified in all other Atom ++ * and Desktop chipsets before Ibex Peak/5 Series, but we reset bit 5 anyway. + */ +- wanted &= ~(1 << 5); ++ int smm_bwp_bit; ++ if (ich_generation == CHIPSET_CENTERTON) ++ smm_bwp_bit = 7; ++ else ++ smm_bwp_bit = 5; ++ wanted &= ~(1 << smm_bwp_bit); + +- /* Set BIOS Write Enable */ +- wanted |= (1 << 0); ++ /* Tunnel Creek has a cache disable at bit 2 of the lowest BIOS_CNTL byte. */ ++ if (ich_generation == CHIPSET_TUNNEL_CREEK) ++ wanted |= (1 << 2); ++ ++ wanted |= (1 << 0); /* Set BIOS Write Enable */ ++ wanted &= ~(1 << 1); /* Disable lock (futile) */ + + /* Only write the register if it's necessary */ + if (wanted != old) { +@@ -299,64 +346,79 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ + msg_pdbg("\nBIOS_CNTL = 0x%02x: ", new); + msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); + msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); +- if (new & (1 << 5)) ++ if (new & (1 << smm_bwp_bit)) + msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); + +- + if (new != wanted) +- msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" +- "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); ++ msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n" ++ "New value is 0x%02x.\n", bios_cntl, old, wanted, new); + +- /* Return an error if we could not set the write enable */ ++ /* Return an error if we could not set the write enable only. */ + if (!(new & (1 << 0))) + return -1; + + return 0; + } + +-static int enable_flash_ich_4e(struct pci_dev *dev, const char *name) ++static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich_generation) + { +- /* +- * Note: ICH5 has registers similar to FWH_SEL1, FWH_SEL2 and +- * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and +- * FB_DEC_EN2. +- */ +- internal_buses_supported = BUS_FWH; +- return enable_flash_ich(dev, name, 0x4e); +-} +- +-static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) +-{ +- uint32_t fwh_conf; +- int i, tmp; +- char *idsel = NULL; +- int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; +- int contiguous = 1; ++ uint8_t fwh_sel1 = 0, fwh_sel2 = 0, fwh_dec_en_lo = 0, fwh_dec_en_hi = 0; /* silence compilers */ ++ bool implemented = 0; ++ switch (ich_generation) { ++ case CHIPSET_ICH: ++ /* FIXME: Unlike later chipsets, ICH and ICH-0 do only support mapping of the top-most 4MB ++ * and therefore do only feature FWH_DEC_EN (E3h, different default too) and FWH_SEL (E8h). */ ++ break; ++ case CHIPSET_ICH2345: ++ fwh_sel1 = 0xe8; ++ fwh_sel2 = 0xee; ++ fwh_dec_en_lo = 0xf0; ++ fwh_dec_en_hi = 0xe3; ++ implemented = 1; ++ break; ++ case CHIPSET_POULSBO: ++ case CHIPSET_TUNNEL_CREEK: ++ /* FIXME: Similar to ICH and ICH-0, Tunnel Creek and Poulsbo do only feature one register each, ++ * FWH_DEC_EN (D7h) and FWH_SEL (D0h). */ ++ break; ++ case CHIPSET_CENTERTON: ++ /* FIXME: Similar to above FWH_DEC_EN (D4h) and FWH_SEL (D0h). */ ++ break; ++ case CHIPSET_ICH6: ++ case CHIPSET_ICH7: ++ default: /* Future version might behave the same */ ++ fwh_sel1 = 0xd0; ++ fwh_sel2 = 0xd4; ++ fwh_dec_en_lo = 0xd8; ++ fwh_dec_en_hi = 0xd9; ++ implemented = 1; ++ break; ++ } + +- idsel = extract_programmer_param("fwh_idsel"); ++ char *idsel = extract_programmer_param("fwh_idsel"); + if (idsel && strlen(idsel)) { +- uint64_t fwh_idsel_old, fwh_idsel; ++ if (!implemented) { ++ msg_perr("Error: fwh_idsel= specified, but (yet) unsupported on this chipset.\n"); ++ goto idsel_garbage_out; ++ } + errno = 0; + /* Base 16, nothing else makes sense. */ +- fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); ++ uint64_t fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); + if (errno) { +- msg_perr("Error: fwh_idsel= specified, but value could " +- "not be converted.\n"); ++ msg_perr("Error: fwh_idsel= specified, but value could not be converted.\n"); + goto idsel_garbage_out; + } + if (fwh_idsel & 0xffff000000000000ULL) { +- msg_perr("Error: fwh_idsel= specified, but value had " +- "unused bits set.\n"); ++ msg_perr("Error: fwh_idsel= specified, but value had unused bits set.\n"); + goto idsel_garbage_out; + } +- fwh_idsel_old = pci_read_long(dev, 0xd0); ++ uint64_t fwh_idsel_old = pci_read_long(dev, fwh_sel1); + fwh_idsel_old <<= 16; +- fwh_idsel_old |= pci_read_word(dev, 0xd4); +- msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to " +- "0x%012" PRIx64 " for top 16 MB.", fwh_idsel_old, +- fwh_idsel); +- rpci_write_long(dev, 0xd0, (fwh_idsel >> 16) & 0xffffffff); +- rpci_write_word(dev, 0xd4, fwh_idsel & 0xffff); ++ fwh_idsel_old |= pci_read_word(dev, fwh_sel2); ++ msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.", ++ fwh_idsel_old, fwh_idsel); ++ rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff); ++ rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff); + /* FIXME: Decode settings are not changed. */ + } else if (idsel) { + msg_perr("Error: fwh_idsel= specified, but no value given.\n"); +@@ -366,15 +428,23 @@ idsel_garbage_out: + } + free(idsel); + ++ if (!implemented) { ++ msg_pdbg2("FWH IDSEL handling is not implemented on this chipset."); ++ return 0; ++ } ++ + /* Ignore all legacy ranges below 1 MB. + * We currently only support flashing the chip which responds to + * IDSEL=0. To support IDSEL!=0, flashbase and decode size calculations + * have to be adjusted. + */ ++ int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; ++ bool contiguous = 1; ++ uint32_t fwh_conf = pci_read_long(dev, fwh_sel1); ++ int i; + /* FWH_SEL1 */ +- fwh_conf = pci_read_long(dev, 0xd0); + for (i = 7; i >= 0; i--) { +- tmp = (fwh_conf >> (i * 4)) & 0xf; ++ int tmp = (fwh_conf >> (i * 4)) & 0xf; + msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + (0x1ff8 + i) * 0x80000, + (0x1ff0 + i) * 0x80000, +@@ -386,9 +456,9 @@ idsel_garbage_out: + } + } + /* FWH_SEL2 */ +- fwh_conf = pci_read_word(dev, 0xd4); ++ fwh_conf = pci_read_word(dev, fwh_sel2); + for (i = 3; i >= 0; i--) { +- tmp = (fwh_conf >> (i * 4)) & 0xf; ++ int tmp = (fwh_conf >> (i * 4)) & 0xf; + msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + (0xff4 + i) * 0x100000, + (0xff0 + i) * 0x100000, +@@ -401,9 +471,11 @@ idsel_garbage_out: + } + contiguous = 1; + /* FWH_DEC_EN1 */ +- fwh_conf = pci_read_word(dev, 0xd8); ++ fwh_conf = pci_read_byte(dev, fwh_dec_en_hi); ++ fwh_conf <<= 8; ++ fwh_conf |= pci_read_byte(dev, fwh_dec_en_lo); + for (i = 7; i >= 0; i--) { +- tmp = (fwh_conf >> (i + 0x8)) & 0x1; ++ int tmp = (fwh_conf >> (i + 0x8)) & 0x1; + msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + (0x1ff8 + i) * 0x80000, + (0x1ff0 + i) * 0x80000, +@@ -415,7 +487,7 @@ idsel_garbage_out: + } + } + for (i = 3; i >= 0; i--) { +- tmp = (fwh_conf >> i) & 0x1; ++ int tmp = (fwh_conf >> i) & 0x1; + msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + (0xff4 + i) * 0x100000, + (0xff0 + i) * 0x100000, +@@ -429,99 +501,66 @@ idsel_garbage_out: + max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode); + msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh); + +- /* If we're called by enable_flash_ich_dc_spi, it will override +- * internal_buses_supported anyway. +- */ +- internal_buses_supported = BUS_FWH; +- return enable_flash_ich(dev, name, 0xdc); ++ return 0; + } + +-static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) ++static int enable_flash_ich_fwh(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) + { +- uint16_t old, new; + int err; + +- if ((err = enable_flash_ich(dev, name, 0xd8)) != 0) ++ /* Configure FWH IDSEL decoder maps. */ ++ if ((err = enable_flash_ich_fwh_decode(dev, ich_generation)) != 0) + return err; + +- old = pci_read_byte(dev, 0xd9); +- msg_pdbg("BIOS Prefetch Enable: %sabled, ", +- (old & 1) ? "en" : "dis"); +- new = old & ~1; +- +- if (new != old) +- rpci_write_byte(dev, 0xd9, new); +- + internal_buses_supported = BUS_FWH; +- return 0; ++ return enable_flash_ich_bios_cntl(dev, ich_generation, bios_cntl); + } + +-static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) ++static int enable_flash_ich0(struct pci_dev *dev, const char *name) + { +- uint16_t old, new; +- uint32_t tmp, bnt; +- void *rcrb; +- int ret; +- +- /* Enable Flash Writes */ +- ret = enable_flash_ich(dev, name, 0xd8); +- if (ret == ERROR_FATAL) +- return ret; +- +- /* Make sure BIOS prefetch mechanism is disabled */ +- old = pci_read_byte(dev, 0xd9); +- msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis"); +- new = old & ~1; +- if (new != old) +- rpci_write_byte(dev, 0xd9, new); +- +- /* Get physical address of Root Complex Register Block */ +- tmp = pci_read_long(dev, 0xf0) & 0xffffc000; +- msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); +- +- /* Map RCBA to virtual memory */ +- rcrb = physmap("ICH RCRB", tmp, 0x4000); +- +- /* Test Boot BIOS Strap Status */ +- bnt = mmio_readl(rcrb + 0x3410); +- if (bnt & 0x02) { +- /* If strapped to LPC, no SPI initialization is required */ +- internal_buses_supported = BUS_FWH; +- return 0; +- } ++ return enable_flash_ich_fwh(dev, CHIPSET_ICH, 0x4e); ++} + +- /* This adds BUS_SPI */ +- if (ich_init_spi(dev, tmp, rcrb, 7) != 0) { +- if (!ret) +- ret = ERROR_NONFATAL; +- } ++static int enable_flash_ich2345(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_fwh(dev, CHIPSET_ICH2345, 0x4e); ++} + +- return ret; ++static int enable_flash_ich6(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_fwh(dev, CHIPSET_ICH6, 0xdc); + } + +-static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, +- enum ich_chipset ich_generation) ++static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) + { +- int ret, ret_spi; +- uint8_t bbs, buc; +- uint32_t tmp, gcs; +- void *rcrb; +- const char *const *straps_names; ++ return enable_flash_ich_fwh(dev, CHIPSET_POULSBO, 0xd8); ++} + ++static int enable_flash_ich_spi(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) ++{ + static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; + static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; ++ static const char *const straps_names_tunnel_creek[] = { "SPI", "LPC" }; + static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; + static const char *const straps_names_pch567[] = { "LPC", "reserved", "PCI", "SPI" }; + static const char *const straps_names_pch8[] = { "LPC", "reserved", "reserved", "SPI" }; +- static const char *const straps_names_pch8_lp[] = { "SPI", "LPC", "unknown", "unknown" }; ++ static const char *const straps_names_pch8_lp[] = { "SPI", "LPC" }; + static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; ++#ifdef DELL_AVOTON_SUPPORT ++ static const char *const straps_names_avoton[] = { "LPC", "reserved", "reserved", "SPI" }; ++ uint32_t tmp; ++ int ret_fwh = 0; ++ uint32_t new, old; ++ void *spibar; ++#endif + ++ const char *const *straps_names; + switch (ich_generation) { + case CHIPSET_ICH7: + /* EP80579 may need further changes, but this is the least + * intrusive way to get correct BOOT Strap printing without + * changing the rest of its code path). */ +- if (strcmp(name, "EP80579") == 0) ++ if (dev->device_id == 0x5031) + straps_names = straps_names_EP80579; + else + straps_names = straps_names_ich7_nm10; +@@ -531,6 +570,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, + case CHIPSET_ICH10: + straps_names = straps_names_ich8910; + break; ++ case CHIPSET_TUNNEL_CREEK: ++ straps_names = straps_names_tunnel_creek; ++ break; + case CHIPSET_5_SERIES_IBEX_PEAK: + case CHIPSET_6_SERIES_COUGAR_POINT: + case CHIPSET_7_SERIES_PANTHER_POINT: +@@ -543,33 +585,41 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, + straps_names = straps_names_pch8_lp; + break; + case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet ++ case CHIPSET_CENTERTON: // FIXME: Datasheet does not mention GCS at all + straps_names = straps_names_unknown; + break; ++#ifdef DELL_AVOTON_SUPPORT ++ case CHIPSET_AVOTON: ++ straps_names = straps_names_avoton; ++ break; ++#endif + default: +- msg_gerr("%s: unknown ICH generation. Please report!\n", +- __func__); ++ msg_gerr("%s: unknown ICH generation. Please report!\n", __func__); + straps_names = straps_names_unknown; + break; + } + +- /* Enable Flash Writes */ +- ret = enable_flash_ich_dc(dev, name); +- if (ret == ERROR_FATAL) +- return ret; +- + /* Get physical address of Root Complex Register Block */ +- tmp = pci_read_long(dev, 0xf0) & 0xffffc000; +- msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); ++ uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000; ++ msg_pdbg("Root Complex Register Block address = 0x%x\n", rcra); + + /* Map RCBA to virtual memory */ +- rcrb = physmap("ICH RCRB", tmp, 0x4000); ++ void *rcrb = rphysmap("ICH RCRB", rcra, 0x4000); ++ if (rcrb == ERROR_PTR) ++ return ERROR_FATAL; + +- gcs = mmio_readl(rcrb + 0x3410); ++#ifdef DELL_AVOTON_SUPPORT ++ if (ich_generation != CHIPSET_AVOTON) { ++#endif ++ uint32_t gcs = mmio_readl(rcrb + 0x3410); + msg_pdbg("GCS = 0x%x: ", gcs); +- msg_pdbg("BIOS Interface Lock-Down: %sabled, ", +- (gcs & 0x1) ? "en" : "dis"); ++ msg_pdbg("BIOS Interface Lock-Down: %sabled, ", (gcs & 0x1) ? "en" : "dis"); + ++ uint8_t bbs; + switch (ich_generation) { ++ case CHIPSET_TUNNEL_CREEK: ++ bbs = (gcs >> 1) & 0x1; ++ break; + case CHIPSET_8_SERIES_LYNX_POINT_LP: + case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet + /* Lynx Point LP uses a single bit for GCS */ +@@ -582,91 +632,187 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, + } + msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); + +- buc = mmio_readb(rcrb + 0x3414); +- msg_pdbg("Top Swap : %s\n", +- (buc & 1) ? "enabled (A16 inverted)" : "not enabled"); ++ if (ich_generation != CHIPSET_TUNNEL_CREEK && ich_generation != CHIPSET_CENTERTON) { ++ uint8_t buc = mmio_readb(rcrb + 0x3414); ++ msg_pdbg("Top Swap : %s\n", (buc & 1) ? "enabled (A16(+) inverted)" : "not enabled"); ++ } + +- /* It seems the ICH7 does not support SPI and LPC chips at the same +- * time. At least not with our current code. So we prevent searching +- * on ICH7 when the southbridge is strapped to LPC +- */ +- internal_buses_supported = BUS_FWH; +- if (ich_generation == CHIPSET_ICH7) { +- if (bbs == 0x03) { +- /* If strapped to LPC, no further SPI initialization is +- * required. */ +- return ret; +- } else { +- /* Disable LPC/FWH if strapped to PCI or SPI */ +- internal_buses_supported = BUS_NONE; +- } ++ /* Handle FWH-related parameters and initialization */ ++#ifdef DELL_AVOTON_SUPPORT ++ ret_fwh = enable_flash_ich_fwh(dev, ich_generation, bios_cntl); ++#else ++ int ret_fwh = enable_flash_ich_fwh(dev, ich_generation, bios_cntl); ++#endif ++ if (ret_fwh == ERROR_FATAL) ++ return ret_fwh; ++ ++ /* SPIBAR is at RCRB+0x3020 for ICH[78], Tunnel Creek and Centerton, and RCRB+0x3800 for ICH9. */ ++ uint16_t spibar_offset; ++ switch (ich_generation) { ++ case CHIPSET_ICH_UNKNOWN: ++ return ERROR_FATAL; ++ case CHIPSET_ICH7: ++ case CHIPSET_ICH8: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: ++ spibar_offset = 0x3020; ++ break; ++ case CHIPSET_ICH9: ++ default: /* Future version might behave the same */ ++ spibar_offset = 0x3800; ++ break; + } ++ msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " + 0x%04x\n", PRIxPTR_WIDTH, (uintptr_t)rcrb, spibar_offset); ++#ifndef DELL_AVOTON_SUPPORT ++ void *spibar = rcrb + spibar_offset; ++#else ++ spibar = rcrb + spibar_offset; ++ } else { ++ tmp = pci_read_long(dev, 0x54) & 0xFFFFFE00; ++ spibar = rphysmap("ICH SPIBAR", tmp, 0x4000); ++ msg_pdbg("SPIBAR = 0x%x\n", tmp); ++ ++ /* BIOS Control Register */ ++ tmp = mmio_readl(spibar + bios_cntl); ++ msg_pdbg("0xFC: 0x%08x (BIOS_CONTROL_REGISTER_BIOS : BCR)\n", tmp); ++ msg_pdbg("BIOS Write Protect Disable : %sabled, \n", ++ (tmp & (1 << 0)) ? "en" : "dis"); ++ msg_pdbg("\nBIOS Lock Enable: %sabled, \n", ++ (tmp & (1 << 1)) ? "en" : "dis"); ++ if (tmp != 1) { ++ mmio_writel(0x1, (spibar + bios_cntl)); ++ } ++ tmp = mmio_readl(spibar + bios_cntl); ++ msg_pdbg("0xFC: 0x%08x (BIOS_CONTROL_REGISTER_BIOS : BCR)\n", tmp); ++ msg_pdbg("BIOS Write Protect Disable : %sabled, \n", ++ (tmp & (1 << 0)) ? "en" : "dis"); ++ if (tmp != 1) { ++ msg_perr("Reboot and change BIOS-> IntelRCSetup -> Relax Security Config -> Disabled to Enabled\n"); ++ return ERROR_FATAL; /* Signal error */ ++ } ++ old = mmio_readb(spibar + 0xFC); ++ msg_pdbg("SPI Read Configuration: \n"); ++ new = (old >> 2) & 0x3; ++ switch (new) { ++ case 0: ++ case 1: ++ case 2: ++ msg_pdbg("prefetching %sabled, caching %sabled, \n", ++ (new & 0x2) ? "en" : "dis", ++ (new & 0x1) ? "dis" : "en"); ++ break; ++ default: ++ msg_pdbg("invalid prefetching/caching settings, \n"); ++ break; ++ } ++ } ++#endif ++ + + /* This adds BUS_SPI */ +- ret_spi = ich_init_spi(dev, tmp, rcrb, ich_generation); ++ int ret_spi = ich_init_spi(dev, spibar, ich_generation); + if (ret_spi == ERROR_FATAL) + return ret_spi; + +- if (ret || ret_spi) +- ret = ERROR_NONFATAL; ++ if (ret_fwh || ret_spi) ++ return ERROR_NONFATAL; + +- return ret; ++ return 0; ++} ++ ++static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_spi(dev, CHIPSET_TUNNEL_CREEK, 0xd8); ++} ++ ++static int enable_flash_s12x0(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_spi(dev, CHIPSET_CENTERTON, 0xd8); + } + + static int enable_flash_ich7(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH7); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH7, 0xdc); + } + + static int enable_flash_ich8(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH8); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH8, 0xdc); + } + + static int enable_flash_ich9(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH9); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH9, 0xdc); + } + + static int enable_flash_ich10(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH10); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH10, 0xdc); + } + ++#ifdef DELL_AVOTON_SUPPORT ++static int enable_flash_c2000(struct pci_dev *dev, const char *name) ++{ ++ is_avoton = 1; ++ return enable_flash_ich_spi(dev, CHIPSET_AVOTON, 0xfc); ++} ++#endif ++ ++#if DELL_DENVERTON_SUPPORT == 1 ++static int enable_flash_denverton(struct pci_dev *dev, const char *name) ++{ ++ void *spibar; ++ int32_t ret_spi; ++ uint32_t sbase; ++ enum ich_chipset ich_generation = CHIPSET_DENVERTON; ++ ++ is_dnv = 1; ++ internal_buses_supported = BUS_FWH; ++ ++ /* GET physical address of SPI Base Address and map it */ ++ sbase = pci_read_long(dev, 0x10) & 0xfffffe00; ++ msg_pdbg("SPI_BASE_ADDRESS = 0x%x\n", sbase); ++ spibar = rphysmap("DENVERTON SBASE", sbase, 512); ++ enable_flash_ich_bios_cntl(dev, ich_generation, 0xdc); ++ ret_spi = ich_init_spi(dev, spibar, ich_generation); ++ return ret_spi; ++} ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + /* Ibex Peak aka. 5 series & 3400 series */ + static int enable_flash_pch5(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_5_SERIES_IBEX_PEAK); ++ return enable_flash_ich_spi(dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc); + } + + /* Cougar Point aka. 6 series & c200 series */ + static int enable_flash_pch6(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_6_SERIES_COUGAR_POINT); ++ return enable_flash_ich_spi(dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc); + } + + /* Panther Point aka. 7 series */ + static int enable_flash_pch7(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_7_SERIES_PANTHER_POINT); ++ return enable_flash_ich_spi(dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc); + } + + /* Lynx Point aka. 8 series */ + static int enable_flash_pch8(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT); ++ return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc); + } + +-/* Lynx Point aka. 8 series low-power */ ++/* Lynx Point LP aka. 8 series low-power */ + static int enable_flash_pch8_lp(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT_LP); ++ return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc); + } + + /* Wellsburg (for Haswell-EP Xeons) */ + static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_WELLSBURG); ++ return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc); + } + + static int via_no_byte_merge(struct pci_dev *dev, const char *name) +@@ -737,10 +883,8 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) + case 0x8410: /* VX900 */ + mmio_base = pci_read_long(dev, 0xbc) << 8; + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); +- if (mmio_base_physmapped == ERROR_PTR) { +- physunmap(mmio_base_physmapped, SPI_CNTL_LEN); ++ if (mmio_base_physmapped == ERROR_PTR) + return ERROR_FATAL; +- } + + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; +@@ -882,22 +1026,29 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name) + return 0; + } + +-/* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ +-static int enable_flash_amd8111(struct pci_dev *dev, const char *name) ++/* Works for AMD-768, AMD-8111, VIA VT82C586A/B, VIA VT82C596, VIA VT82C686A/B. ++ * ++ * ROM decode control register matrix ++ * AMD-768 AMD-8111 VT82C586A/B VT82C596 VT82C686A/B ++ * 7 FFC0_0000h–FFFF_FFFFh <- FFFE0000h-FFFEFFFFh <- <- ++ * 6 FFB0_0000h–FFBF_FFFFh <- FFF80000h-FFFDFFFFh <- <- ++ * 5 00E8... <- <- FFF00000h-FFF7FFFFh <- ++ */ ++static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t decode_val) + { + #define AMD_MAPREG 0x43 + #define AMD_ENREG 0x40 + uint8_t old, new; + +- /* Enable decoding at 0xffb00000 to 0xffffffff. */ + old = pci_read_byte(dev, AMD_MAPREG); +- new = old | 0xC0; ++ new = old | decode_val; + if (new != old) { + rpci_write_byte(dev, AMD_MAPREG, new); + if (pci_read_byte(dev, AMD_MAPREG) != new) { +- msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", ++ msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + AMD_MAPREG, new, name); +- } ++ } else ++ msg_pdbg("Changed ROM decode range to 0x%02x successfully.\n", new); + } + + /* Enable 'ROM write' bit. */ +@@ -908,14 +1059,37 @@ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) + rpci_write_byte(dev, AMD_ENREG, new); + + if (pci_read_byte(dev, AMD_ENREG) != new) { +- msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", ++ msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + AMD_ENREG, new, name); +- return -1; ++ return ERROR_NONFATAL; + } ++ msg_pdbg2("Set ROM enable bit successfully.\n"); + + return 0; + } + ++static int enable_flash_amd_768_8111(struct pci_dev *dev, const char *name) ++{ ++ /* Enable decoding of 0xFFB00000 to 0xFFFFFFFF (5 MB). */ ++ max_rom_decode.lpc = 5 * 1024 * 1024; ++ return enable_flash_amd_via(dev, name, 0xC0); ++} ++ ++static int enable_flash_vt82c586(struct pci_dev *dev, const char *name) ++{ ++ /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (512 kB) */ ++ max_rom_decode.parallel = 512 * 1024; ++ return enable_flash_amd_via(dev, name, 0xC0); ++} ++ ++/* Works for VT82C686A/B too. */ ++static int enable_flash_vt82c596(struct pci_dev *dev, const char *name) ++{ ++ /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (1 MB) */ ++ max_rom_decode.parallel = 1024 * 1024; ++ return enable_flash_amd_via(dev, name, 0xE0); ++} ++ + static int enable_flash_sb600(struct pci_dev *dev, const char *name) + { + uint32_t prot; +@@ -1257,6 +1431,8 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name) + + /* 1. Map MMCR */ + mmcr = physmap("Elan SC520 MMCR", 0xfffef000, getpagesize()); ++ if (mmcr == ERROR_PTR) ++ return ERROR_FATAL; + + /* 2. Scan PAR0 (0x88) - PAR15 (0xc4) for + * BOOTCS region (PARx[31:29] = 100b)e +@@ -1302,8 +1478,8 @@ const struct penable chipset_enables[] = { + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, +- {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, +- {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, ++ {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, ++ {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, + {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, +@@ -1388,9 +1564,9 @@ const struct penable chipset_enables[] = { + {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, + {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, + /* VIA southbridges */ +- {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, +- {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, +- {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, ++ {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_vt82c586}, ++ {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_vt82c596}, ++ {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_vt82c596}, + {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, + {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, + {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, +@@ -1405,6 +1581,7 @@ const struct penable chipset_enables[] = { + {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, ++ {0x8086, 0x0c60, NT, "Intel", "S12x0", enable_flash_s12x0}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, OK, "Intel", "Z68", enable_flash_pch6}, +@@ -1441,21 +1618,21 @@ const struct penable chipset_enables[] = { + {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, + {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, + {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, +- {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, +- {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, +- {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, +- {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, +- {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, +- {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, +- {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, +- {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, +- {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, +- {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, +- {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, +- {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, +- {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, +- {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, +- {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, ++ {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, ++ {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich0}, ++ {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich2345}, ++ {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich2345}, ++ {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich2345}, ++ {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich2345}, ++ {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich2345}, ++ {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich2345}, ++ {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich2345}, ++ {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich2345}, ++ {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich2345}, ++ {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich6}, ++ {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich6}, ++ {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich6}, ++ {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich6}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, +@@ -1570,6 +1747,12 @@ const struct penable chipset_enables[] = { + {0x8086, 0x8d5d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, ++#ifdef DELL_AVOTON_SUPPORT ++ {0x8086, 0x1f38, OK, "Intel", "C2000", enable_flash_c2000}, ++#endif ++#if DELL_DENVERTON_SUPPORT == 1 ++ {0x8086, 0x19e0, OK, "Intel", "Denverton", enable_flash_denverton}, ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + #endif + {0}, + }; +@@ -1597,14 +1780,23 @@ int chipset_flash_enable(void) + chipset_enables[i].device_name); + continue; + } ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Found chipset \"%s %s\"", ++ chipset_enables[i].vendor_name, ++ chipset_enables[i].device_name); ++#else + msg_pinfo("Found chipset \"%s %s\"", + chipset_enables[i].vendor_name, + chipset_enables[i].device_name); ++#endif + msg_pdbg(" with PCI ID %04x:%04x", + chipset_enables[i].vendor_id, + chipset_enables[i].device_id); ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg(". "); ++#else + msg_pinfo(". "); +- ++#endif + if (chipset_enables[i].status == NT) { + msg_pinfo("\nThis chipset is marked as untested. If " + "you are using an up-to-date version\nof " +@@ -1614,20 +1806,44 @@ int chipset_flash_enable(void) + "flashrom@flashrom.org including a verbose " + "(-V) log.\nThank you!\n"); + } ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Enabling flash write... "); ++#else + msg_pinfo("Enabling flash write... "); ++#endif + ret = chipset_enables[i].doit(dev, + chipset_enables[i].device_name); + if (ret == NOT_DONE_YET) { + ret = -2; ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("OK - searching further chips.\n"); ++#else + msg_pinfo("OK - searching further chips.\n"); ++#endif + } else if (ret < 0) ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("FAILED!\n"); ++#else + msg_pinfo("FAILED!\n"); ++#endif + else if (ret == 0) ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("OK.\n"); ++#else + msg_pinfo("OK.\n"); ++#endif + else if (ret == ERROR_NONFATAL) ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("PROBLEMS, continuing anyway\n"); ++#else + msg_pinfo("PROBLEMS, continuing anyway\n"); ++#endif + if (ret == ERROR_FATAL) { ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("FATAL ERROR!\n"); ++#else + msg_perr("FATAL ERROR!\n"); ++#endif + return ret; + } + } +diff --git a/cli_classic.c b/cli_classic.c +index 4c71d07..09565f4 100644 +--- a/cli_classic.c ++++ b/cli_classic.c +@@ -31,6 +31,10 @@ + #include "flashchips.h" + #include "programmer.h" + ++#if DELL_DENVERTON_SUPPORT == 1 ++extern int8_t is_dnv; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + static void cli_classic_usage(const char *name) + { + printf("Please note that the command line interface for flashrom has changed between\n" +@@ -136,9 +140,10 @@ int main(int argc, char *argv[]) + char *tempstr = NULL; + char *pparam = NULL; + ++#ifndef FORCE10_SPI_CHANGE + print_version(); + print_banner(); +- ++#endif + if (selfcheck()) + exit(1); + +@@ -221,8 +226,6 @@ int main(int argc, char *argv[]) + free(tempstr); + cli_classic_abort_usage(); + } +- /* FIXME: A pointer to the image name is saved in a static array (of size MAX_ROMLAYOUT) +- * by register_include_arg() and needs to be freed after processing them. */ + break; + case 'L': + if (++operation_specified > 1) { +@@ -295,6 +298,9 @@ int main(int argc, char *argv[]) + "specified. Aborting.\n"); + cli_classic_abort_usage(); + } ++#ifdef FORCE10_SPI_CHANGE ++ print_version(); ++#endif + exit(0); + break; + case 'h': +@@ -372,6 +378,12 @@ int main(int argc, char *argv[]) + ret = 1; + goto out; + } ++ if (layoutfile != NULL && !write_it) { ++ msg_gerr("Layout files are currently supported for write operations only.\n"); ++ ret = 1; ++ goto out; ++ } ++ + if (process_include_args()) { + ret = 1; + goto out; +@@ -393,8 +405,13 @@ int main(int argc, char *argv[]) + if (prog == PROGRAMMER_INVALID) { + if (CONFIG_DEFAULT_PROGRAMMER != PROGRAMMER_INVALID) { + prog = CONFIG_DEFAULT_PROGRAMMER; ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Using default programmer \"%s\".\n", ++ programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); ++#else + msg_pinfo("Using default programmer \"%s\".\n", + programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); ++#endif + } else { + msg_perr("Please select a programmer with the --programmer parameter.\n" + "Previously this was not necessary because there was a default set.\n" +@@ -489,6 +506,10 @@ int main(int argc, char *argv[]) + tempstr = flashbuses_to_text(flashes[0].chip->bustype); + msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n", + flashes[0].chip->vendor, flashes[0].chip->name, flashes[0].chip->total_size, tempstr); ++ if ((flashes[0].chip->total_size > flashes[0].bios_size) && (flashes[0].bios_size != 0)) { ++ msg_gdbg("BIOS Size in flash chip: %d kB\n", flashes[0].bios_size); ++ flashes[0].chip->total_size = flashes[0].bios_size; ++ } + free(tempstr); + } + +@@ -517,7 +538,19 @@ int main(int argc, char *argv[]) + * Give the chip time to settle. + */ + programmer_delay(100000); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ dnv_smi_open_res(); ++ dnv_smi_doit(0, NULL, SMI_ENABLE_SPI); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + ret |= doit(fill_flash, force, filename, read_it, write_it, erase_it, verify_it); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ dnv_smi_doit(0, NULL, SMI_DISABLE_SPI); ++ dnv_smi_release_res(); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + /* Note: doit() already calls programmer_shutdown(). */ + goto out; + +@@ -527,6 +560,7 @@ out: + for (i = 0; i < chipcount; i++) + free(flashes[i].chip); + ++ layout_cleanup(); + free(filename); + free(layoutfile); + free(pparam); +diff --git a/dmi.c b/dmi.c +index 242889f..25ddd93 100644 +--- a/dmi.c ++++ b/dmi.c +@@ -1,7 +1,10 @@ + /* + * This file is part of the flashrom project. + * ++ * Copyright (C) 2000-2002 Alan Cox ++ * Copyright (C) 2002-2010 Jean Delvare + * Copyright (C) 2009,2010 Michael Karcher ++ * Copyright (C) 2011-2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -26,33 +29,28 @@ + #include "flash.h" + #include "programmer.h" + +-int has_dmi_support = 0; +- +-#if STANDALONE ++#if defined(__i386__) || defined(__x86_64__) + +-/* Stub to indicate missing DMI functionality. +- * has_dmi_support is 0 by default, so nothing to do here. +- * Because dmidecode is not available on all systems, the goal is to implement +- * the DMI subset we need directly in this file. +- */ +-void dmi_init(void) +-{ +-} ++/* Enable SMBIOS decoding. Currently legacy DMI decoding is enough. */ ++#define SM_SUPPORT 0 + +-int dmi_match(const char *pattern) +-{ +- return 0; +-} ++/* Strings longer than 4096 in DMI are just insane. */ ++#define DMI_MAX_ANSWER_LEN 4096 + +-#else /* STANDALONE */ ++int has_dmi_support = 0; + +-static const char *dmidecode_names[] = { +- "system-manufacturer", +- "system-product-name", +- "system-version", +- "baseboard-manufacturer", +- "baseboard-product-name", +- "baseboard-version", ++static struct { ++ const char *const keyword; ++ const uint8_t type; ++ const uint8_t offset; ++ char *value; ++} dmi_strings[] = { ++ { "system-manufacturer", 1, 0x04, NULL }, ++ { "system-product-name", 1, 0x05, NULL }, ++ { "system-version", 1, 0x06, NULL }, ++ { "baseboard-manufacturer", 2, 0x04, NULL }, ++ { "baseboard-product-name", 2, 0x05, NULL }, ++ { "baseboard-version", 2, 0x06, NULL }, + }; + + /* This list is used to identify supposed laptops. The is_laptop field has the +@@ -66,9 +64,9 @@ static const char *dmidecode_names[] = { + * The types below are the most common ones. + */ + static const struct { +- unsigned char type; +- unsigned char is_laptop; +- const char *name; ++ uint8_t type; ++ uint8_t is_laptop; ++ char *name; + } dmi_chassis_types[] = { + {0x01, 2, "Other"}, + {0x02, 2, "Unknown"}, +@@ -86,20 +84,206 @@ static const struct { + {0x18, 0, "Sealed-case PC"}, /* used by Supermicro (X8SIE) */ + }; + +-#define DMI_COMMAND_LEN_MAX 260 +-static const char *dmidecode_command = "dmidecode"; ++#if CONFIG_INTERNAL_DMI == 1 ++#if defined(__DJGPP__) || defined(FORCE10_SPI_CHANGE) /* There is no strnlen in DJGPP. FIXME: Move this to a common utility file. */ ++size_t strnlen(const char *str, size_t n) ++{ ++ size_t i; ++ for (i = 0; i < n && str[i] != '\0'; i++) ++ ; ++ return i; ++} ++#endif + +-static char *dmistrings[ARRAY_SIZE(dmidecode_names)]; ++static bool dmi_checksum(const uint8_t * const buf, size_t len) ++{ ++ uint8_t sum = 0; ++ size_t a; + +-/* Strings longer than 4096 in DMI are just insane. */ +-#define DMI_MAX_ANSWER_LEN 4096 ++ for (a = 0; a < len; a++) ++ sum += buf[a]; ++ return (sum == 0); ++} ++ ++static char *dmi_string(uint8_t *buf, uint8_t string_id, uint8_t *limit) ++{ ++ size_t i, len; ++ ++ if (string_id == 0) ++ return "Not Specified"; ++ ++ while (string_id > 1 && string_id--) { ++ if (buf > limit) { ++ msg_perr("DMI table is broken (string portion out of bounds)!\n"); ++ return ""; ++ } ++ buf += strnlen((char *)buf, limit - buf) + 1; ++ } ++ ++ if (!*buf) /* as long as the current byte we're on isn't null */ ++ return ""; ++ ++ len = strnlen((char *)buf, limit - buf); ++ if (len > DMI_MAX_ANSWER_LEN) ++ len = DMI_MAX_ANSWER_LEN; ++ ++ /* fix junk bytes in the string */ ++ for (i = 0; i < len && buf[i] != '\0'; i++) ++ if (buf[i] < 32 || buf[i] >= 127) ++ buf[i] = ' '; ++ ++ return (char *)buf; ++} ++ ++static void dmi_chassis_type(uint8_t code) ++{ ++ int i; ++ code &= 0x7f; /* bits 6:0 are chassis type, 7th bit is the lock bit */ ++ is_laptop = 2; ++ for (i = 0; i < ARRAY_SIZE(dmi_chassis_types); i++) { ++ if (code == dmi_chassis_types[i].type) { ++ msg_pdbg("DMI string chassis-type: \"%s\"\n", dmi_chassis_types[i].name); ++ is_laptop = dmi_chassis_types[i].is_laptop; ++ break; ++ } ++ } ++} ++ ++static void dmi_table(uint32_t base, uint16_t len, uint16_t num) ++{ ++ int i = 0, j = 0; ++ ++ uint8_t *dmi_table_mem = physmap_ro("DMI Table", base, len); ++ if (dmi_table_mem == NULL) { ++ msg_perr("Unable to access DMI Table\n"); ++ return; ++ } ++ ++ uint8_t *data = dmi_table_mem; ++ uint8_t *limit = dmi_table_mem + len; ++ ++ /* SMBIOS structure header is always 4 B long and contains: ++ * - uint8_t type; // see dmi_chassis_types's type ++ * - uint8_t length; // data section w/ header w/o strings ++ * - uint16_t handle; ++ */ ++ while (i < num && data + 4 <= limit) { ++ /* - If a short entry is found (less than 4 bytes), not only it ++ * is invalid, but we cannot reliably locate the next entry. ++ * - If the length value indicates that this structure spreads ++ * accross the table border, something is fishy too. ++ * Better stop at this point, and let the user know his/her ++ * table is broken. ++ */ ++ if (data[1] < 4 || data + data[1] > limit) { ++ msg_perr("DMI table is broken (bogus header)!\n"); ++ break; ++ } ++ ++ if(data[0] == 3) { ++ if (data + 5 <= limit) ++ dmi_chassis_type(data[5]); ++ /* else the table is broken, but laptop detection is optional, hence continue. */ ++ } else ++ for (j = 0; j < ARRAY_SIZE(dmi_strings); j++) { ++ uint8_t offset = dmi_strings[j].offset; ++ uint8_t type = dmi_strings[j].type; ++ ++ if (data[0] != type) ++ continue; ++ ++ if (data[1] <= offset || data+offset > limit) { ++ msg_perr("DMI table is broken (offset out of bounds)!\n"); ++ goto out; ++ } ++ ++ /* Table will be unmapped, hence fill the struct with duplicated strings. */ ++ dmi_strings[j].value = strdup(dmi_string(data + data[1], data[offset], limit)); ++ } ++ /* Find next structure by skipping data and string sections */ ++ data += data[1]; ++ while (data + 1 <= limit) { ++ if (data[0] == 0 && data[1] == 0) ++ break; ++ data++; ++ } ++ data += 2; ++ i++; ++ } ++out: ++ physunmap(dmi_table_mem, len); ++} ++ ++#if SM_SUPPORT ++static int smbios_decode(uint8_t *buf) ++{ ++ /* TODO: other checks mentioned in the conformance guidelines? */ ++ if (!dmi_checksum(buf, buf[0x05]) || ++ (memcmp(buf + 0x10, "_DMI_", 5) != 0) || ++ !dmi_checksum(buf + 0x10, 0x0F)) ++ return 0; ++ ++ dmi_table(mmio_readl(buf + 0x18), mmio_readw(buf + 0x16), mmio_readw(buf + 0x1C)); ++ ++ return 1; ++} ++#endif ++ ++static int legacy_decode(uint8_t *buf) ++{ ++ if (!dmi_checksum(buf, 0x0F)) ++ return 1; ++ ++ dmi_table(mmio_readl(buf + 0x08), mmio_readw(buf + 0x06), mmio_readw(buf + 0x0C)); ++ ++ return 0; ++} ++ ++int dmi_fill(void) ++{ ++ size_t fp; ++ uint8_t *dmi_mem; ++ int ret = 1; ++ ++ msg_pdbg("Using Internal DMI decoder.\n"); ++ /* There are two ways specified to gain access to the SMBIOS table: ++ * - EFI's configuration table contains a pointer to the SMBIOS table. On linux it can be obtained from ++ * sysfs. EFI's SMBIOS GUID is: {0xeb9d2d31,0x2d88,0x11d3,0x9a,0x16,0x0,0x90,0x27,0x3f,0xc1,0x4d} ++ * - Scanning physical memory address range 0x000F0000h to 0x000FFFFF for the anchor-string(s). */ ++ dmi_mem = physmap_ro("DMI", 0xF0000, 0x10000); ++ if (dmi_mem == ERROR_PTR) ++ return ret; ++ ++ for (fp = 0; fp <= 0xFFF0; fp += 16) { ++#if SM_SUPPORT ++ if (memcmp(dmi_mem + fp, "_SM_", 4) == 0 && fp <= 0xFFE0) { ++ if (smbios_decode(dmi_mem + fp)) // FIXME: length check ++ goto out; ++ } else ++#endif ++ if (memcmp(dmi_mem + fp, "_DMI_", 5) == 0) ++ if (legacy_decode(dmi_mem + fp) == 0) { ++ ret = 0; ++ goto out; ++ } ++ } ++ msg_pinfo("No DMI table found.\n"); ++out: ++ physunmap(dmi_mem, 0x10000); ++ return ret; ++} ++ ++#else /* CONFIG_INTERNAL_DMI */ ++ ++#define DMI_COMMAND_LEN_MAX 300 ++static const char *dmidecode_command = "dmidecode"; + + static char *get_dmi_string(const char *string_name) + { + FILE *dmidecode_pipe; + char *result; +- char answerbuf[DMI_MAX_ANSWER_LEN]; +- char commandline[DMI_COMMAND_LEN_MAX + 40]; ++ char answerbuf[DMI_MAX_ANSWER_LEN + 1] = {'\0'}; ++ char commandline[DMI_COMMAND_LEN_MAX + 1] = {'\0'}; + + snprintf(commandline, sizeof(commandline), + "%s -s %s", dmidecode_command, string_name); +@@ -138,46 +322,31 @@ static char *get_dmi_string(const char *string_name) + /* Chomp trailing newline. */ + if (answerbuf[0] != 0 && answerbuf[strlen(answerbuf) - 1] == '\n') + answerbuf[strlen(answerbuf) - 1] = 0; +- msg_pdbg("DMI string %s: \"%s\"\n", string_name, answerbuf); + + result = strdup(answerbuf); +- if (!result) ++ if (result == NULL) + msg_pwarn("Warning: Out of memory - DMI support fails"); + + return result; + } + +-static int dmi_shutdown(void *data) +-{ +- int i; +- for (i = 0; i < ARRAY_SIZE(dmistrings); i++) { +- free(dmistrings[i]); +- dmistrings[i] = NULL; +- } +- return 0; +-} +- +-void dmi_init(void) ++int dmi_fill(void) + { + int i; + char *chassis_type; + +- if (register_shutdown(dmi_shutdown, NULL)) +- return; +- +- has_dmi_support = 1; +- for (i = 0; i < ARRAY_SIZE(dmidecode_names); i++) { +- dmistrings[i] = get_dmi_string(dmidecode_names[i]); +- if (!dmistrings[i]) { +- has_dmi_support = 0; +- return; +- } ++ msg_pdbg("Using External DMI decoder.\n"); ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ dmi_strings[i].value = get_dmi_string(dmi_strings[i].keyword); ++ if (dmi_strings[i].value == NULL) ++ return 1; + } + + chassis_type = get_dmi_string("chassis-type"); + if (chassis_type == NULL) +- return; ++ return 0; /* chassis-type handling is optional anyway */ + ++ msg_pdbg("DMI string chassis-type: \"%s\"\n", chassis_type); + is_laptop = 2; + for (i = 0; i < ARRAY_SIZE(dmi_chassis_types); i++) { + if (strcasecmp(chassis_type, dmi_chassis_types[i].name) == 0) { +@@ -185,6 +354,33 @@ void dmi_init(void) + break; + } + } ++ free(chassis_type); ++ return 0; ++} ++ ++#endif /* CONFIG_INTERNAL_DMI */ ++ ++static int dmi_shutdown(void *data) ++{ ++ int i; ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ free(dmi_strings[i].value); ++ dmi_strings[i].value = NULL; ++ } ++ return 0; ++} ++ ++void dmi_init(void) ++{ ++ /* Register shutdown function before we allocate anything. */ ++ if (register_shutdown(dmi_shutdown, NULL)) { ++ msg_pwarn("Warning: Could not register DMI shutdown function - continuing without DMI info.\n"); ++ return; ++ } ++ ++ /* dmi_fill fills the dmi_strings array, and if possible sets the global is_laptop variable. */ ++ if (dmi_fill() != 0) ++ return; + + switch (is_laptop) { + case 1: +@@ -194,7 +390,13 @@ void dmi_init(void) + msg_pdbg("DMI chassis-type is not specific enough.\n"); + break; + } +- free(chassis_type); ++ ++ has_dmi_support = 1; ++ int i; ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ msg_pdbg("DMI string %s: \"%s\"\n", dmi_strings[i].keyword, ++ (dmi_strings[i].value == NULL) ? "" : dmi_strings[i].value); ++ } + } + + /** +@@ -204,8 +406,8 @@ void dmi_init(void) + * at the beginning and '$' at the end. So you can look for "^prefix", + * "suffix$", "substring" or "^complete string$". + * +- * @param value The string to check. +- * @param pattern The pattern. ++ * @param value The non-NULL string to check. ++ * @param pattern The non-NULL pattern. + * @return Nonzero if pattern matches. + */ + static int dmi_compare(const char *value, const char *pattern) +@@ -252,11 +454,15 @@ int dmi_match(const char *pattern) + if (!has_dmi_support) + return 0; + +- for (i = 0; i < ARRAY_SIZE(dmidecode_names); i++) +- if (dmi_compare(dmistrings[i], pattern)) ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ if (dmi_strings[i].value == NULL) ++ continue; ++ ++ if (dmi_compare(dmi_strings[i].value, pattern)) + return 1; ++ } + + return 0; + } + +-#endif /* STANDALONE */ ++#endif // defined(__i386__) || defined(__x86_64__) +diff --git a/dnv_smi_spi.c b/dnv_smi_spi.c +new file mode 100644 +index 0000000..0317cc7 +--- /dev/null ++++ b/dnv_smi_spi.c +@@ -0,0 +1,185 @@ ++ ++/************************************************************************ ++* LEGALESE: "Copyright (c) 2018, Dell Inc. All rights reserved." ++* ++* This source code is confidential, proprietary, and contains trade ++* secrets that are the sole property of Dell Inc. ++* Copy and/or distribution of this source code or disassembly or reverse ++* engineering of the resultant object code are strictly forbidden without ++* the written consent of Dell Inc. ++* ++************************************************************************/ ++#if DELL_DENVERTON_SUPPORT == 1 ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "flash.h" ++ ++#define MEM_MODULE "/dev/mem" ++ ++DELL_SPI_MAILBOX *mailbox; ++uint64_t phy_addr; ++ ++/** ++* @brief unmap a pagesize of physical memory into virtual memory. ++* @param[in] addr - virtual memory address that is unmaped. ++*/ ++static void free_virt_mapping(void *addr) ++{ ++ munmap(addr, getpagesize()); ++} ++ ++/** ++* @brief map a pagesize of physical memory into virtual memory. ++* @param[in] addr - physical memory address. ++* @param[out] buf - pointer to buffer which storages data. ++* @return = 0 for success, otherwise for error. ++*/ ++static uint32_t getData_phy_to_virt(uint32_t addr, void** buf) ++{ ++ uint8_t *tmp; ++ uint32_t pagesize, offset, index, fd; ++ ++ pagesize = getpagesize(); ++ if ( (fd = open(MEM_MODULE, O_RDWR)) < 0 ) { ++ printf("open() %s error\n", MEM_MODULE); ++ return 1; ++ } ++ ++ offset = addr & ~(pagesize - 1); ++ index = addr & (pagesize - 1); ++ if ( (tmp = mmap(0, pagesize*2, PROT_READ|PROT_WRITE, MAP_SHARED, fd, offset)) == MAP_FAILED ) { ++ printf("mmap() error\n"); ++ close(fd); ++ return 1; ++ } ++ *buf = tmp + index; ++ close(fd); ++ return 0; ++} ++ ++/** ++* @brief send "get communication buffer" requirement to SMM ++*/ ++uint32_t dnv_smi_open_res() ++{ ++ uint32_t mailboxAddress; ++ ++ ioperm(0xB2, 3, 1); ++ __asm__ __volatile__ ("push %%rcx" : :); ++ outb(0x27, 0xB2); ++ __asm__ __volatile__ ("movl %%ecx, %0" : "=r" (mailboxAddress)); ++ __asm__ __volatile__ ("pop %%rcx" : :); ++ ioperm(0xB2, 3, 0); ++ ++ getData_phy_to_virt(mailboxAddress, (void **)&mailbox); ++ phy_addr = mailboxAddress; ++ return 0; ++} ++ ++/** ++* @brief send "release communication buffer" requirement to SMM ++*/ ++void dnv_smi_release_res() ++{ ++ free_virt_mapping((void *)mailbox); ++} ++ ++/** ++* @brief disable SPI write protection. ++*/ ++static void dnv_trigger_smi_spi_unlock() ++{ ++ ioperm(0xB2, 3, 1); ++ __asm__ __volatile__ ("push %%rcx" : :); ++ __asm__ __volatile__ ("push %%rbx" : :); ++ __asm__ __volatile__ ("movl %0, %%ecx" : : "a" ((uint32_t)0)); ++ __asm__ __volatile__ ("movl %0, %%ebx" : : "a" ((uint32_t)phy_addr)); ++ outb(0x20, 0xB2); ++ __asm__ __volatile__ ("pop %%rbx" : :); ++ __asm__ __volatile__ ("pop %%rcx" : :); ++ ioperm(0xB2, 3, 0); ++} ++ ++/** ++* @brief enable SPI write protection. ++*/ ++static void dnv_trigger_smi_spi_lock() ++{ ++ ioperm(0xB2, 3, 1); ++ __asm__ __volatile__ ("push %%rcx" : :); ++ __asm__ __volatile__ ("push %%rbx" : :); ++ __asm__ __volatile__ ("movl %0, %%ecx" : : "a" ((uint32_t)0)); ++ __asm__ __volatile__ ("movl %0, %%ebx" : : "a" ((uint32_t)phy_addr)); ++ outb(0x24, 0xB2); ++ __asm__ __volatile__ ("pop %%rbx" : :); ++ __asm__ __volatile__ ("pop %%rcx" : :); ++ ioperm(0xB2, 3, 0); ++} ++ ++/** ++* @brief trigger smi ++*/ ++void run() ++{ ++ ioperm(0xB2, 3, 1); ++ outb(0x28, 0xB2); ++ ioperm(0xB2, 3, 0); ++} ++ ++/** ++* @brief This function is used to read/write and erase BIOS. ++* trigger SMI and send information to SMM(like requirement, address,and data) ++* @param[in] bios_offset - offset of bios region [0~size of bios region] ++* @param[in] buf - pointer to write data if cmd is "SMI_READ_SPI" ++* @param[in] cmd - enum SPI_SMI_CMD ++* @param[out] buf - pointer to read data if cmd is "SMI_WRITE_SPI" ++* @returns ret. This ret is returned from SMM. ++*/ ++int32_t dnv_smi_doit(uint32_t bios_offset, uint8_t *buf, SPI_SMI_CMD cmd) ++{ ++ ++ if (cmd == SMI_READ_SPI) { ++ mailbox->cmd = 0x1; ++ mailbox->offset = bios_offset; ++ mailbox->dlen = DELL_DENVERTON_BLOCK_SIZE; ++ run(); ++ memcpy (buf, mailbox->data, DELL_DENVERTON_BLOCK_SIZE); ++ return mailbox->ret; ++ } else if (cmd == SMI_ERASE_SPI) { ++ mailbox->cmd = 0x2; ++ mailbox->offset = bios_offset; ++ mailbox->dlen = DELL_DENVERTON_BLOCK_SIZE; ++ run(); ++ return mailbox->ret; ++ } else if (cmd == SMI_WRITE_SPI) { ++ memcpy (mailbox->data, buf, DELL_DENVERTON_BLOCK_SIZE); ++ mailbox->cmd = 0x3; ++ mailbox->offset = bios_offset; ++ mailbox->dlen = DELL_DENVERTON_BLOCK_SIZE; ++ run(); ++ return mailbox->ret; ++ } ++ ++ switch (cmd) ++ { ++ case SMI_ENABLE_SPI: ++ dnv_trigger_smi_spi_unlock(); ++ break; ++ case SMI_DISABLE_SPI: ++ dnv_trigger_smi_spi_lock(); ++ break; ++ default: ++ return -1; ++ } ++ ++ return 0; ++} ++ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ +diff --git a/drkaiser.c b/drkaiser.c +index b94d6dd..0cf1fdb 100644 +--- a/drkaiser.c ++++ b/drkaiser.c +@@ -56,12 +56,6 @@ static const struct par_programmer par_programmer_drkaiser = { + .chip_writen = fallback_chip_writen, + }; + +-static int drkaiser_shutdown(void *data) +-{ +- physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); +- return 0; +-} +- + int drkaiser_init(void) + { + struct pci_dev *dev = NULL; +@@ -75,15 +69,15 @@ int drkaiser_init(void) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); ++ if (!addr) ++ return 1; + + /* Write magic register to enable flash write. */ + rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); + + /* Map 128kB flash memory window. */ +- drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", +- addr, DRKAISER_MEMMAP_SIZE); +- +- if (register_shutdown(drkaiser_shutdown, NULL)) ++ drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE); ++ if (drkaiser_bar == ERROR_PTR) + return 1; + + max_rom_decode.parallel = 128 * 1024; +diff --git a/flash.h b/flash.h +index 63701ed..79fe8f4 100644 +--- a/flash.h ++++ b/flash.h +@@ -45,6 +45,14 @@ + typedef uintptr_t chipaddr; + #define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) + ++/* Types and macros regarding the maximum flash space size supported by generic code. */ ++typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */ ++typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */ ++#define FL_MAX_CHIPADDR_BITS (24) ++#define FL_MAX_CHIPADDR ((chipoff_t)(1ULL< 0) ++ programmer_table[programmer].delay(usecs); + } + + void map_flash_registers(struct flashctx *flash) +@@ -619,12 +629,29 @@ static unsigned int count_usable_erasers(const struct flashctx *flash) + return usable_erasefunctions; + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++int8_t is_erase = 0; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + int compare_range(uint8_t *wantbuf, uint8_t *havebuf, unsigned int start, unsigned int len) + { + int ret = 0, failcount = 0; + unsigned int i; + for (i = 0; i < len; i++) { + if (wantbuf[i] != havebuf[i]) { ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv && is_erase) { ++ // _FVH ++ // At offset 0x28~0x2b of NVRAM, Main Bios and Boot Bios ++ // We can't read correct data after "erasing". ++ // But, We verified bios through SF100. The erase feature is work. ++ if (i == _FVH_OFFSET && ++ memcmp(&havebuf[i], _FVH_SIGNATURE, sizeof(_FVH_SIGNATURE) - 1) == 0) { ++ i += sizeof(_FVH_SIGNATURE) - 1; ++ continue; ++ } ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + /* Only print the first failure. */ + if (!failcount++) + msg_cerr("FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x,", +@@ -651,7 +678,15 @@ int check_erased_range(struct flashctx *flash, unsigned int start, + exit(1); + } + memset(cmpbuf, 0xff, len); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) ++ is_erase = 1; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + ret = verify_range(flash, cmpbuf, start, len); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) ++ is_erase = 0; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + free(cmpbuf); + return ret; + } +@@ -695,6 +730,22 @@ int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, un + return ret; + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++ // NVRAM will be recovery even if use afulnx. ++ // skip NVRAM region. ++ if (is_dnv) { ++ // Do not hard-code the NVRAM region start address. It is located at different addresses for 16MB and 32MB BIOS image. ++ // For Denverton platform, NVRAM region start address is always located at dnv_bios_region_start. ++ // NVRAM backup region is located at (dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH). ++ if ((start >= dnv_bios_region_start && ++ start < (dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH)) || ++ (start >= (dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH) && ++ start < ((dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH) + DELL_DENVERTON_BACKUP_NVRAM_LENGTH))) { ++ return ret; ++ } ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + ret = compare_range(cmpbuf, readbuf, start, len); + out_free: + free(readbuf); +@@ -770,6 +821,11 @@ int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granul + case write_gran_1056bytes: + result = need_erase_gran_bytes(have, want, len, 1056); + break; ++#if DELL_DENVERTON_SUPPORT == 1 ++ case write_gran_4096bytes: ++ result = need_erase_gran_bytes(have, want, len, 4096); ++ break; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + default: + msg_cerr("%s: Unsupported granularity! Please report a bug at " + "flashrom@flashrom.org\n", __func__); +@@ -831,6 +887,11 @@ static unsigned int get_next_write(uint8_t *have, uint8_t *want, unsigned int le + case write_gran_1056bytes: + stride = 1056; + break; ++#if DELL_DENVERTON_SUPPORT == 1 ++ case write_gran_4096bytes: ++ stride = 4096; ++ break; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + default: + msg_cerr("%s: Unsupported granularity! Please report a bug at " + "flashrom@flashrom.org\n", __func__); +@@ -1140,6 +1201,12 @@ notfound: + if (!flash->chip) + return -1; + ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ flash->chip->gran = write_gran_4096bytes; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + #if CONFIG_INTERNAL == 1 + if (programmer_table[programmer].map_flash_region == physmap) + snprintf(location, sizeof(location), "at physical address 0x%lx", base); +@@ -1148,8 +1215,13 @@ notfound: + snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); + + tmp = flashbuses_to_text(flash->chip->bustype); ++#ifdef FORCE10_SPI_CHANGE ++ msg_cdbg("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", ++ flash->chip->vendor, flash->chip->name, flash->chip->total_size, tmp, location); ++#else + msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", + flash->chip->vendor, flash->chip->name, flash->chip->total_size, tmp, location); ++#endif + free(tmp); + + /* Flash registers will not be mapped if the chip was forced. Lock info +@@ -1166,6 +1238,10 @@ notfound: + int read_buf_from_file(unsigned char *buf, unsigned long size, + const char *filename) + { ++#ifdef __LIBPAYLOAD__ ++ msg_gerr("Error: No file I/O support in libpayload\n"); ++ return 1; ++#else + unsigned long numbytes; + FILE *image; + struct stat image_stat; +@@ -1196,11 +1272,16 @@ int read_buf_from_file(unsigned char *buf, unsigned long size, + return 1; + } + return 0; ++#endif + } + + int write_buf_to_file(unsigned char *buf, unsigned long size, + const char *filename) + { ++#ifdef __LIBPAYLOAD__ ++ msg_gerr("Error: No file I/O support in libpayload\n"); ++ return 1; ++#else + unsigned long numbytes; + FILE *image; + +@@ -1221,6 +1302,7 @@ int write_buf_to_file(unsigned char *buf, unsigned long size, + return 1; + } + return 0; ++#endif + } + + int read_flash_to_file(struct flashctx *flash, const char *filename) +@@ -1229,6 +1311,16 @@ int read_flash_to_file(struct flashctx *flash, const char *filename) + unsigned char *buf = calloc(size, sizeof(char)); + int ret = 0; + ++#if DELL_DENVERTON_SUPPORT == 1 ++ uint64_t bios_start = 0; ++ uint64_t bios_size = size; ++ ++ if (is_dnv) { ++ bios_size = dnv_bios_region_size; ++ bios_start = dnv_bios_region_start; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + msg_cinfo("Reading flash... "); + if (!buf) { + msg_gerr("Memory allocation failed!\n"); +@@ -1240,7 +1332,11 @@ int read_flash_to_file(struct flashctx *flash, const char *filename) + ret = 1; + goto out_free; + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (flash->chip->read(flash, (buf + bios_start), bios_start, bios_size)) { ++#else + if (flash->chip->read(flash, buf, 0, size)) { ++#endif /* #if DELL_DENVERTON__SUPPORT == 1 */ + msg_cerr("Read operation failed!\n"); + ret = 1; + goto out_free; +@@ -1388,6 +1484,11 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction, + { + int i, j; + unsigned int start = 0; ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ start = dnv_bios_region_start; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + unsigned int len; + struct block_eraser eraser = flash->chip->block_erasers[erasefunction]; + +@@ -1897,6 +1998,10 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + uint8_t *newcontents; + int ret = 0; + unsigned long size = flash->chip->total_size * 1024; ++#if DELL_DENVERTON_SUPPORT == 1 ++ uint32_t bios_size = size; ++ uint32_t bios_start = 0; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + + if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) { + msg_cerr("Aborting.\n"); +@@ -1904,6 +2009,12 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + goto out_nofree; + } + ++ if (normalize_romentries(flash)) { ++ msg_cerr("Requested regions can not be handled. Aborting.\n"); ++ ret = 1; ++ goto out_nofree; ++ } ++ + /* Given the existence of read locks, we want to unlock for read, + * erase and write. + */ +@@ -1936,6 +2047,13 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + */ + + if (erase_it) { ++ ++#if 0 // Since we dont have a layout, why set newcontents to 0?? ++#ifdef FORCE10_SPI_CHANGE ++ /* Build a new image taking the given layout into account. */ ++ build_new_image(flash, oldcontents, newcontents); ++#endif ++#endif + /* FIXME: Do we really want the scary warning if erase failed? + * After all, after erase the chip is either blank or partially + * blank or it has the old contents. A blank chip won't boot, +@@ -1975,25 +2093,47 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + * preserved, but in that case we might perform unneeded erase which + * takes time as well. + */ ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ bios_size = dnv_bios_region_size; ++ bios_start = dnv_bios_region_start; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++#ifdef FORCE10_SPI_CHANGE ++ msg_cdbg("Reading old flash chip contents... "); ++#else + msg_cinfo("Reading old flash chip contents... "); ++#endif ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (flash->chip->read(flash, oldcontents + bios_start, bios_start, bios_size)) { ++#else + if (flash->chip->read(flash, oldcontents, 0, size)) { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + ret = 1; + msg_cinfo("FAILED.\n"); + goto out; + } ++#ifdef FORCE10_SPI_CHANGE ++ msg_cdbg("done.\n"); ++#else + msg_cinfo("done.\n"); ++#endif + +- // This should be moved into each flash part's code to do it +- // cleanly. This does the job. +- handle_romentries(flash, oldcontents, newcontents); +- ++#if 0 ++ /* Build a new image taking the given layout into account. */ ++ build_new_image(flash, oldcontents, newcontents); ++#endif + // //////////////////////////////////////////////////////////// + + if (write_it) { + if (erase_and_write_flash(flash, oldcontents, newcontents)) { + msg_cerr("Uh oh. Erase/write failed. Checking if " + "anything changed.\n"); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (!flash->chip->read(flash, newcontents, bios_start, bios_size)) { ++#else + if (!flash->chip->read(flash, newcontents, 0, size)) { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + if (!memcmp(oldcontents, newcontents, size)) { + msg_cinfo("Good. It seems nothing was changed.\n"); + nonfatal_help_message(); +@@ -2014,14 +2154,22 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + if (write_it) { + /* Work around chips which need some time to calm down. */ + programmer_delay(1000*1000); ++#if DELL_DENVERTON_SUPPORT == 1 ++ ret = verify_range(flash, newcontents + bios_start, bios_start, bios_size); ++#else + ret = verify_range(flash, newcontents, 0, size); ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + /* If we tried to write, and verification now fails, we + * might have an emergency situation. + */ + if (ret) + emergency_help_message(); + } else { ++#if DELL_DENVERTON_SUPPORT == 1 ++ ret = compare_range(newcontents + bios_start, oldcontents + bios_start, bios_start, bios_size); ++#else + ret = compare_range(newcontents, oldcontents, 0, size); ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + } + if (!ret) + msg_cinfo("VERIFIED.\n"); +diff --git a/ft2232_spi.c b/ft2232_spi.c +index 81be051..44354fd 100644 +--- a/ft2232_spi.c ++++ b/ft2232_spi.c +@@ -43,6 +43,7 @@ + #define FTDI_FT4232H_PID 0x6011 + #define FTDI_FT232H_PID 0x6014 + #define TIAO_TUMPA_PID 0x8a98 ++#define TIAO_TUMPA_LITE_PID 0x8a99 + #define AMONTEC_JTAGKEY_PID 0xCFF8 + + #define GOEPEL_VID 0x096C +@@ -62,6 +63,7 @@ const struct dev_entry devs_ft2232spi[] = { + {FTDI_VID, FTDI_FT4232H_PID, OK, "FTDI", "FT4232H"}, + {FTDI_VID, FTDI_FT232H_PID, OK, "FTDI", "FT232H"}, + {FTDI_VID, TIAO_TUMPA_PID, OK, "TIAO", "USB Multi-Protocol Adapter"}, ++ {FTDI_VID, TIAO_TUMPA_LITE_PID, OK, "TIAO", "USB Multi-Protocol Adapter Lite"}, + {FTDI_VID, AMONTEC_JTAGKEY_PID, OK, "Amontec", "JTAGkey"}, + {GOEPEL_VID, GOEPEL_PICOTAP_PID, OK, "GOEPEL", "PicoTAP"}, + {FIC_VID, OPENMOKO_DBGBOARD_PID, OK, "FIC", "OpenMoko Neo1973 Debug board (V2+)"}, +@@ -208,6 +210,10 @@ int ft2232_spi_init(void) + /* Interface A is SPI1, B is SPI2. */ + ft2232_type = TIAO_TUMPA_PID; + channel_count = 2; ++ } else if (!strcasecmp(arg, "tumpalite")) { ++ /* Only one channel is used on lite edition */ ++ ft2232_type = TIAO_TUMPA_LITE_PID; ++ channel_count = 1; + } else if (!strcasecmp(arg, "busblaster")) { + /* In its default configuration it is a jtagkey clone */ + ft2232_type = FTDI_FT2232H_PID; +diff --git a/gfxnvidia.c b/gfxnvidia.c +index d0a9feb..d3ee14e 100644 +--- a/gfxnvidia.c ++++ b/gfxnvidia.c +@@ -77,12 +77,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { + .chip_writen = fallback_chip_writen, + }; + +-static int gfxnvidia_shutdown(void *data) +-{ +- physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); +- return 0; +-} +- + int gfxnvidia_init(void) + { + struct pci_dev *dev = NULL; +@@ -96,12 +90,14 @@ int gfxnvidia_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; ++ + io_base_addr += 0x300000; + msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); + +- nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); +- +- if (register_shutdown(gfxnvidia_shutdown, NULL)) ++ nvidia_bar = rphysmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); ++ if (nvidia_bar == ERROR_PTR) + return 1; + + /* Allow access to flash interface (will disable screen). */ +diff --git a/hwaccess.h b/hwaccess.h +index fd6eb12..83f349e 100644 +--- a/hwaccess.h ++++ b/hwaccess.h +@@ -37,7 +37,13 @@ + * or as builtin. + */ + #define index shadow_workaround_index ++ ++#if !defined (__NetBSD__) && !defined (__DragonFly__) + #include ++#else ++#include ++#endif ++ + #undef index + #endif + +diff --git a/ich_descriptors.c b/ich_descriptors.c +index 528717b..c007867 100644 +--- a/ich_descriptors.c ++++ b/ich_descriptors.c +@@ -45,6 +45,11 @@ + #define min(a, b) (a < b) ? a : b + #endif + ++#if DELL_DENVERTON_SUPPORT == 1 ++#define DELL_DENVERTON_MAX_DENSITY 7 ++extern int8_t is_dnv; // if 1 chipset is denverton serial, 0 otherwise ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + void prettyprint_ich_reg_vscc(uint32_t reg_val, int verbosity) + { + print(verbosity, "BES=0x%x, ", (reg_val & VSCC_BES) >> VSCC_BES_OFF); +@@ -100,6 +105,36 @@ void prettyprint_ich_descriptor_content(const struct ich_desc_content *cont) + + void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc) + { ++#if DELL_DENVERTON_SUPPORT == 1 ++ static const char * const dnv_freq_str[8] = { ++ "reserved", /* 000 */ ++ "reserved", /* 001 */ ++ "48 MHz", /* 010 */ ++ "reserved", /* 011 */ ++ "30MHz", /* 100 */ ++ "reserved", /* 101 */ ++ "17 MHz", /* 110 */ ++ "reserved", /* 111 */ ++ }; ++ static const char * const dnv_size_str[16] = { ++ "512 kB", /* 0000 */ ++ " 1 MB", /* 0001 */ ++ " 2 MB", /* 0010 */ ++ " 4 MB", /* 0011 */ ++ " 8 MB", /* 0100 */ ++ " 16 MB", /* 0101 */ ++ " 32 MB", /* 0110 */ ++ " 64 MB", /* 0111 */ ++ "reserved", /* 1000 */ ++ "reserved", /* 1001 */ ++ "reserved", /* 1010 */ ++ "reserved", /* 1011 */ ++ "reserved", /* 1100 */ ++ "reserved", /* 1101 */ ++ "reserved", /* 1110 */ ++ "reserved", /* 1111 */ ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + static const char * const freq_str[8] = { + "20 MHz", /* 000 */ + "33 MHz", /* 001 */ +@@ -121,6 +156,47 @@ void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc) + "reserved", /* 111 */ + }; + ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ msg_pdbg2("=== Component Section ===\n"); ++ msg_pdbg2("FLCOMP 0x%08x\n", desc->component.FLCOMP); ++ msg_pdbg2("FLILL 0x%08x\n", desc->component.FLILL ); ++ msg_pdbg2("\n"); ++ ++ msg_pdbg2("--- Details ---\n"); ++ msg_pdbg2("Component 1 density: %s\n", ++ dnv_size_str[desc->component.dnv_comp1_density]); ++ if (desc->content.NC) ++ msg_pdbg2("Component 2 density: %s\n", ++ dnv_size_str[desc->component.dnv_comp2_density]); ++ else ++ msg_pdbg2("Component 2 is not used.\n"); ++ msg_pdbg2("Read Clock Frequency: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_read]); ++ msg_pdbg2("Read ID and Status Clock Freq.: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_read_id]); ++ msg_pdbg2("Write and Erase Clock Freq.: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_write]); ++ msg_pdbg2("Fast Read is %ssupported.\n", ++ desc->component.dnv_fastread ? "" : "not "); ++ if (desc->component.dnv_fastread) ++ msg_pdbg2("Fast Read Clock Frequency: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_fastread]); ++ if (desc->component.FLILL == 0) ++ msg_pdbg2("No forbidden opcodes.\n"); ++ else { ++ msg_pdbg2("Invalid instruction 0: 0x%02x\n", ++ desc->component.invalid_instr0); ++ msg_pdbg2("Invalid instruction 1: 0x%02x\n", ++ desc->component.invalid_instr1); ++ msg_pdbg2("Invalid instruction 2: 0x%02x\n", ++ desc->component.invalid_instr2); ++ msg_pdbg2("Invalid instruction 3: 0x%02x\n", ++ desc->component.invalid_instr3); ++ } ++ } else { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + msg_pdbg2("=== Component Section ===\n"); + msg_pdbg2("FLCOMP 0x%08x\n", desc->component.FLCOMP); + msg_pdbg2("FLILL 0x%08x\n", desc->component.FLILL ); +@@ -157,6 +233,9 @@ void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc) + msg_pdbg2("Invalid instruction 3: 0x%02x\n", + desc->component.invalid_instr3); + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + msg_pdbg2("\n"); + } + +@@ -171,6 +250,12 @@ static void pprint_freg(const struct ich_desc_region *reg, uint32_t i) + } + uint32_t base = ICH_FREG_BASE(reg->FLREGs[i]); + uint32_t limit = ICH_FREG_LIMIT(reg->FLREGs[i]); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ base = DELL_DENVERTON_FREG_BASE(reg->FLREGs[i]); ++ limit = DELL_DENVERTON_FREG_LIMIT(reg->FLREGs[i]); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + msg_pdbg2("Region %d (%-6s) ", i, region_names[i]); + if (base > limit) + msg_pdbg2("is unused.\n"); +@@ -741,17 +826,36 @@ int getFCBA_component_density(const struct ich_descriptors *desc, uint8_t idx) + msg_perr("Only ICH SPI component index 0 or 1 are supported yet.\n"); + return 0; + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ if (size_enc > DELL_DENVERTON_MAX_DENSITY) { ++ msg_perr("Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x.\n", idx, size_enc); ++ return 0; ++ } ++ } else { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + if (size_enc > 5) { + msg_perr("Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x.\n", + idx, size_enc); + return 0; + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + return (1 << (19 + size_enc)); + } + + static uint32_t read_descriptor_reg(uint8_t section, uint16_t offset, void *spibar) + { + uint32_t control = 0; ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ control |= (section << DENVERTON_FDOC_FDSS_OFF) & DENVERTON_FDOC_FDSS; ++ control |= (offset << DENVERTON_FDOC_FDSI_OFF) & DENVERTON_FDOC_FDSI; ++ mmio_le_writel(control, spibar + DENVERTON_REG_FDOC); ++ return mmio_le_readl(spibar + DENVERTON_REG_FDOD); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + control |= (section << FDOC_FDSS_OFF) & FDOC_FDSS; + control |= (offset << FDOC_FDSI_OFF) & FDOC_FDSI; + mmio_le_writel(control, spibar + ICH9_REG_FDOC); +diff --git a/ich_descriptors.h b/ich_descriptors.h +index 3a44740..914a3cd 100644 +--- a/ich_descriptors.h ++++ b/ich_descriptors.h +@@ -64,6 +64,19 @@ + #define ICH_FREG_BASE(flreg) (((flreg) << 12) & 0x01fff000) + #define ICH_FREG_LIMIT(flreg) (((flreg) >> 4) & 0x01fff000) + ++#if DELL_DENVERTON_SUPPORT == 1 ++#define DENVERTON_REG_FDOC 0xB4 ++#define DENVERTON_FDOC_FDSI_OFF 2 ++#define DENVERTON_FDOC_FDSI (0x3ff << DENVERTON_FDOC_FDSI_OFF) ++#define DENVERTON_FDOC_FDSS_OFF 12 ++#define DENVERTON_FDOC_FDSS (0x3 << DENVERTON_FDOC_FDSS_OFF) ++ ++#define DENVERTON_REG_FDOD 0xB8 ++ ++#define DELL_DENVERTON_FREG_BASE(flreg) (((flreg) << 12) & 0x03fff000) ++#define DELL_DENVERTON_FREG_LIMIT(flreg) (((flreg) >> 4) & 0x03fff000) ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + void prettyprint_ich_reg_vscc(uint32_t reg_val, int verbosity); + + struct ich_desc_content { +@@ -78,6 +91,15 @@ struct ich_desc_content { + NR :3, /* Number Of Regions */ + :5; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ struct { ++ int32_t dnv_FCBA :8, /* Flash Component Base Address */ ++ dnv_NC :2, /* Number Of Components */ ++ :6, ++ dnv_FRBA :8, /* Flash Region Base Address */ ++ :8; ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + union { /* 0x08 */ + uint32_t FLMAP1; +@@ -113,6 +135,20 @@ struct ich_desc_component { + freq_read_id :3, + :2; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ struct { ++ uint32_t dnv_comp1_density :4, ++ dnv_comp2_density :4, ++ :9, ++ dnv_freq_read :3, ++ dnv_fastread :1, ++ dnv_freq_fastread :3, ++ dnv_freq_write :3, ++ dnv_freq_read_id :3, ++ dnv_dualfastread :1, ++ :1; ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + union { /* 0x04 */ + uint32_t FLILL; /* Flash Invalid Instructions Register */ +@@ -129,6 +165,15 @@ struct ich_desc_component { + uint32_t FPBA :13, /* Flash Partition Boundary Addr */ + :19; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ uint32_t FLILL1; /* Flash Partition Boundary Register for dnv */ ++ struct { ++ uint32_t invalid_instr4 :8, ++ invalid_instr5 :8, ++ invalid_instr6 :8, ++ invalid_instr7 :8; ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + }; + +@@ -167,6 +212,65 @@ struct ich_desc_region { + :3; + }; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ struct { /* FLREG0 Flash Descriptor */ ++ uint32_t dnv_reg0_base :15, ++ :1, ++ dnv_reg0_limit :15, ++ :1; ++ }; ++ struct { /* FLREG1 BIOS */ ++ uint32_t dnv_reg1_base :15, ++ :1, ++ dnv_reg1_limit :15, ++ :1; ++ }; ++ struct { /* FLREG2 ME */ ++ uint32_t dnv_reg2_base :15, ++ :1, ++ dnv_reg2_limit :15, ++ :1; ++ }; ++ ++ /* FLREG3 - Reserved */ ++ ++ struct { /* FLREG4 Platform */ ++ uint32_t dnv_reg4_base :15, ++ :1, ++ dnv_reg4_limit :15, ++ :1; ++ }; ++ ++ /* FLREG5 - Reserved */ ++ /* FLREG6 - Reserved */ ++ /* FLREG7 - Reserved */ ++ /* FLREG8 - Reserved */ ++ /* FLREG9 - Reserved */ ++ ++ struct { /* FLREG10 IE */ ++ uint32_t dnv_reg10_base :15, ++ :1, ++ dnv_reg10_limit :15, ++ :1; ++ }; ++ struct { /* FLREG11 LAN CTRL0 */ ++ uint32_t dnv_reg11_base :15, ++ :1, ++ dnv_reg11_limit :15, ++ :1; ++ }; ++ struct { /* FLREG12 LAN CTRL1 */ ++ uint32_t dnv_reg12_base :15, ++ :1, ++ dnv_reg12_limit :15, ++ :1; ++ }; ++ ++ /* FLREG13 - Reserved */ ++ /* FLREG14 - Reserved */ ++ /* FLREG15 - Reserved */ ++ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + }; + +diff --git a/ichspi.c b/ichspi.c +index 6d1bd1a..742d424 100644 +--- a/ichspi.c ++++ b/ichspi.c +@@ -170,6 +170,52 @@ + #define ICH7_REG_OPTYPE 0x56 /* 16 Bits */ + #define ICH7_REG_OPMENU 0x58 /* 64 Bits */ + ++/* denverton controller register definition */ ++#if DELL_DENVERTON_SUPPORT == 1 ++#define DENVERTON_REG_BFPREG 0x00 /* 32 Bits SPI BIOS MMIO PRI */ ++#define DENVERTON_BFPREG_PRB_OFF 0 /* 0-14: BIOS Flash Promary Region Base */ ++#define DENVERTON_BFPREG_PRB (0x7FFF << DENVERTON_BFPREG_PRB_OFF) ++#define DENVERTON_BFPREG_PRL_OFF 16 /* 16-30: BIOS Flash Primary Region Limit */ ++#define DENVERTON_BFPREG_PRL (0xFFFF << DENVERTON_BFPREG_PRL_OFF) ++#define DENVERTON_REG_HSFS 0x04 /* 16 Bits Hardware Sequencing Flash Status */ ++#define DENVERTON_HSFS_FDONE_OFF 0 /* 0: Flash Cycle Done */ ++#define DENVERTON_HSFS_FDONE (0x1 << DENVERTON_HSFS_FDONE_OFF) ++#define DENVERTON_HSFS_FCERR_OFF 1 /* 1: Flash Cycle Error */ ++#define DENVERTON_HSFS_FCERR (0x1 << DENVERTON_HSFS_FCERR_OFF) ++#define DENVERTON_HSFS_FDOPSS_OFF 13 /* 13: Flash Descriptor Override Pin-Strap Status */ ++#define DENVERTON_HSFS_FDOPSS (0x1 << DENVERTON_HSFS_FDOPSS_OFF) ++#define DENVERTON_HSFS_FDV_OFF 14 /* 14: Flash Descriptor Valid */ ++#define DENVERTON_HSFS_FDV (0x1 << DENVERTON_HSFS_FDV_OFF) ++#define DENVERTON_HSFS_FLOCKDN_OFF 15 /* 15: Flash Configuration Lock-Down */ ++#define DENVERTON_HSFS_FLOCKDN (0x1 << DENVERTON_HSFS_FLOCKDN_OFF) ++#define DENVERTON_REG_HSFC 0x06 /* 16 Bits Hardware Sequencing Flash Control */ ++#define DENVERTON_HSFC_FGO_OFF 0 /* 0: Flash Cycle Go */ ++#define DENVERTON_HSFC_FGO (0x1 << DENVERTON_HSFC_FGO_OFF) ++#define DENVERTON_HSFC_FCYCLE_OFF 1 /* 1- 4: FLASH Cycle */ ++#define DENVERTON_HSFC_FCYCLE (0xF << DENVERTON_HSFC_FCYCLE_OFF) ++#define DENVERTON_HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ ++#define DENVERTON_HSFC_FDBC (0x3F << DENVERTON_HSFC_FDBC_OFF) ++#define DENVERTON_REG_FADDR 0x08 /* 32 Bits */ ++#define DENVERTON_REG_FDATA0 0x10 /* 32 Bits */ ++#define DENVERTON_REG_FRAP 0x50 /* 32 Bytes Flash Region Access Permissions */ ++#define DENVERTON_REG_FREG0 0x54 /* 32 Bytes Flash Region 0 */ ++#define DENVERTON_REG_PR0 0x84 /* 32 Bytes Protected Range 0 */ ++#define DENVERTON_PR_WP_OFF 31 /* 31: write protection enable */ ++#define DENVERTON_PR_RP_OFF 15 /* 15: read protection enable */ ++#define DENVERTON_REG_VSCC0 0xC4 /* 32 Bits Host Vendor Specific Component Capabilities for Component 0 */ ++#define DENVERTON_REG_VSCC1 0xC8 /* 32 Bits Host Vendor Specific Component Capabilities for Component 1 */ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ ++#ifdef DELL_AVOTON_SUPPORT ++extern int8_t is_avoton; ++#endif /* DELL_AVOTON_SUPPORT */ ++ ++#if DELL_DENVERTON_SUPPORT == 1 ++extern uint32_t dnv_bios_region_start; ++extern uint32_t dnv_bios_region_size; ++extern uint32_t dnv_bios_region_limit; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + /* ICH SPI configuration lock-down. May be set during chipset enabling. */ + static int ichspi_lock = 0; + +@@ -466,6 +512,8 @@ static int generate_opcodes(OPCODES * op) + + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + preop = REGREAD16(ICH7_REG_PREOP); + optype = REGREAD16(ICH7_REG_OPTYPE); + opmenu[0] = REGREAD32(ICH7_REG_OPMENU); +@@ -529,7 +577,7 @@ static int program_opcodes(OPCODES *op, int enable_undo) + opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8); + } + +- /*Program Allowable Opcodes 4 - 7 */ ++ /* Program Allowable Opcodes 4 - 7 */ + opmenu[1] = 0; + for (a = 4; a < 8; a++) { + opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); +@@ -538,6 +586,8 @@ static int program_opcodes(OPCODES *op, int enable_undo) + msg_pdbg2("\n%s: preop=%04x optype=%04x opmenu=%08x%08x\n", __func__, preop, optype, opmenu[0], opmenu[1]); + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + /* Register undo only for enable_undo=1, i.e. first call. */ + if (enable_undo) { + rmmio_valw(ich_spibar + ICH7_REG_PREOP); +@@ -603,10 +653,19 @@ static void ich_set_bbar(uint32_t min_addr) + int bbar_off; + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + bbar_off = 0x50; + break; + case CHIPSET_ICH8: ++#ifdef DELL_AVOTON_SUPPORT ++ case CHIPSET_AVOTON: ++#endif ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("BBAR offset is unknown on ICH8!\n"); ++#else + msg_perr("BBAR offset is unknown on ICH8!\n"); ++#endif + return; + case CHIPSET_ICH9: + default: /* Future version might behave the same */ +@@ -817,11 +876,17 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, + /* FIXME: make sure we do not needlessly cause transaction errors. */ + temp16 = REGREAD16(ICH7_REG_SPIS); + if (temp16 & SPIS_FCERR) { ++#ifndef FORCE10_SPI_CHANGE + msg_perr("Transaction error!\n"); ++#endif + /* keep reserved bits */ + temp16 &= SPIS_RESERVED_MASK; + REGWRITE16(ICH7_REG_SPIS, temp16 | SPIS_FCERR); ++#ifndef FORCE10_SPI_CHANGE + return 1; ++#else ++ return 0; ++#endif + } + + if ((!write_cmd) && (datalength != 0)) +@@ -838,6 +903,22 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, + uint32_t temp32; + uint64_t opmenu; + int opcode_index; ++/* skip unused region for Rangeley */ ++ if (offset >= 0x10000 && offset <= 0x9fffff) { ++ uint32_t i = 0; ++ for (i = 0; i < datalength; i++) ++ *(data + i) = 0xff; ++ return 0; ++ } ++#ifdef DELL_AVOTON_SUPPORT ++ /* skip unused region for Rangeley */ ++ if (is_avoton && offset >= 0x10000 && offset <= 0x9fffff) { ++ uint32_t i = 0; ++ for (i = 0; i < datalength; i++) ++ *(data + i) = 0xff; ++ return 0; ++ } ++#endif /* AVOTON */ + + /* Is it a write command? */ + if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) +@@ -939,14 +1020,20 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, + /* FIXME make sure we do not needlessly cause transaction errors. */ + temp32 = REGREAD32(ICH9_REG_SSFS); + if (temp32 & SSFS_FCERR) { ++#ifndef FORCE10_SPI_CHANGE + msg_perr("Transaction error!\n"); ++#endif + prettyprint_ich9_reg_ssfs(temp32); + prettyprint_ich9_reg_ssfc(temp32); + /* keep reserved bits */ + temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; + /* Clear the transaction error. */ + REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR); ++#ifndef FORCE10_SPI_CHANGE + return 1; ++#else ++ return 0; ++#endif + } + + if ((!write_cmd) && (datalength != 0)) +@@ -975,6 +1062,8 @@ static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, + + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + return ich7_run_opcode(op, offset, datalength, data, maxlength); + case CHIPSET_ICH8: + default: /* Future version might behave the same */ +@@ -1418,6 +1507,191 @@ static int ich_spi_send_multicommand(struct flashctx *flash, + return ret; + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++/* Sets FLA in FADDR to (addr & 0x01FFFFFF) without touching other bits. */ ++static void dnv_hwseq_set_addr(uint32_t addr) ++{ ++ uint32_t addr_old = REGREAD32(DENVERTON_REG_FADDR) & ~0x01FFFFFF; ++ REGWRITE32(DENVERTON_REG_FADDR, (addr & 0x01FFFFFF) | addr_old); ++} ++ ++/* Polls for Cycle Done Status, Flash Cycle Error or timeout in 8 us intervals. ++ Resets all error flags in HSFS. ++ Returns 0 if the cycle completes successfully without errors within ++ timeout us, 1 on errors. */ ++static int dnv_hwseq_wait_for_cycle_complete(uint32_t timeout, ++ uint32_t len) ++{ ++ uint16_t hsfs; ++ uint32_t addr; ++ ++ timeout /= 8; /* scale timeout duration to counter */ ++ while ((((hsfs = REGREAD16(DENVERTON_REG_HSFS)) & ++ (DENVERTON_HSFS_FDONE | DENVERTON_HSFS_FCERR)) == 0) && ++ --timeout) { ++ programmer_delay(8); ++ } ++ REGWRITE16(DENVERTON_REG_HSFS, REGREAD16(DENVERTON_REG_HSFS)); ++ if (!timeout) { ++ addr = REGREAD32(DENVERTON_REG_FADDR) & 0x01FFFFFF; ++ msg_perr("Timeout error between offset 0x%08x and " ++ "0x%08x (= 0x%08x + %d)!\n", ++ addr, addr + len - 1, addr, len - 1); ++ return 1; ++ } ++ ++ if (hsfs & DENVERTON_HSFS_FCERR) { ++ addr = REGREAD32(DENVERTON_REG_FADDR) & 0x01FFFFFF; ++ msg_perr("Transaction error between offset 0x%08x and " ++ "0x%08x (= 0x%08x + %d)!\n", ++ addr, addr + len - 1, addr, len - 1); ++ return 1; ++ } ++ return 0; ++} ++ ++int dnv_read_JEDEC_ID(uint8_t *buf) ++{ ++ uint16_t hsfc; ++ uint16_t timeout = 100 * 60; ++ uint8_t len = 3; ++ ++ /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ ++ REGWRITE16(DENVERTON_REG_HSFS, REGREAD16(DENVERTON_REG_HSFS)); ++ ++ dnv_hwseq_set_addr(0); ++ hsfc = REGREAD16(DENVERTON_REG_HSFC); ++ hsfc &= ~DENVERTON_HSFC_FCYCLE; /* clear operation */ ++ hsfc |= (0x6 << DENVERTON_HSFC_FCYCLE_OFF); /* set read JEDEC ID operation */ ++ hsfc &= ~DENVERTON_HSFC_FDBC; /* clear byte count */ ++ /* set byte count */ ++ hsfc |= (((len - 1) << DENVERTON_HSFC_FDBC_OFF) & DENVERTON_HSFC_FDBC); ++ hsfc |= DENVERTON_HSFC_FGO; /* start */ ++ REGWRITE16(DENVERTON_REG_HSFC, hsfc); ++ ++ if (dnv_hwseq_wait_for_cycle_complete(timeout, len)) ++ return 1; ++ ich_read_data(buf, len, DENVERTON_REG_FDATA0); ++ return 0; ++} ++ ++static int dnv_hwseq_probe(struct flashctx *flash) ++{ ++ uint8_t jedec_id[3]; ++ uint32_t tmp, manufacture_id, model_id; ++ struct block_eraser *eraser; ++ const struct flashchip *chip; ++ ++ msg_gdbg("Using HW Sequency to read JEDEC ID and find SPI flash.\n"); ++ if (dnv_read_JEDEC_ID(jedec_id)) { ++ msg_cerr("Can't get JEDEC ID through HW Sequency\n"); ++ return -1; ++ } ++ ++ manufacture_id = (uint32_t)jedec_id[0]; ++ model_id = (uint32_t)(jedec_id[1] << 8 | jedec_id[2]); ++ ++ for (chip = flashchips; chip && chip->name; chip++) { ++ if (chip->manufacture_id == manufacture_id && chip->model_id == model_id) { ++ break; ++ } ++ } ++ ++ flash->bios_size = (hwseq_data.size_comp0 + hwseq_data.size_comp1) / 1024; ++ ++ /* We only replace base information. The functions still use hw sequency, like read and write */ ++ flash->chip->vendor = chip->vendor; ++ flash->chip->name = chip->name; ++ flash->chip->manufacture_id = chip->manufacture_id; ++ flash->chip->model_id = chip->model_id; ++ flash->chip->total_size = chip->total_size; ++ flash->chip->page_size = chip->page_size; ++ ++ msg_cdbg("Hardware sequencing reports %d attached SPI flash chip", ++ (hwseq_data.size_comp1 != 0) ? 2 : 1); ++ if (hwseq_data.size_comp1 != 0) ++ msg_cdbg("s with a combined"); ++ else ++ msg_cdbg(" with a"); ++ msg_cdbg(" density of %d kB.\n", flash->chip->total_size); ++ ++ eraser = &(flash->chip->block_erasers[0]); ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_BFPREG); ++ dnv_bios_region_start = ((tmp & DENVERTON_BFPREG_PRB) >> DENVERTON_BFPREG_PRB_OFF) << 12; ++ dnv_bios_region_limit = ((tmp & DENVERTON_BFPREG_PRL) >> ++ DENVERTON_BFPREG_PRL_OFF) << 12 | ((1 << 12) -1); ++ dnv_bios_region_size = dnv_bios_region_limit - dnv_bios_region_start + 1; ++ eraser->eraseblocks[0].size = 4 * 1024; // 4K ++ eraser->eraseblocks[0].count = dnv_bios_region_size / ++ eraser->eraseblocks[0].size; ++ ++ flash->chip->tested = TEST_OK_PREW; ++ return 1; ++} ++ ++static int dnv_block_check(struct flashctx *flash, uint32_t addr, uint32_t len, SPI_SMI_CMD cmd) ++{ ++ char msg[3][4][32] = { ++ {"Read", "read", "", "Reading"}, ++ {"Erase", "erase", "Not erasing anthing.", "Erasing"}, ++ {"Write", "write", "", "Writing"}}; ++ ++ /* Although the hardware supports this (it would erase the whole block ++ * containing the address) we play safe here. */ ++ if (addr % DELL_DENVERTON_BLOCK_SIZE != 0) { ++ msg_cerr("%s address 0x%06x is not aligned to the %s " ++ "block boundary (any multiple of %d). %s\n", ++ msg[cmd][0], addr, msg[cmd][1], DELL_DENVERTON_BLOCK_SIZE, msg[cmd][2]); ++ return -1; ++ } ++ ++ if (addr + len > flash->chip->total_size * 1024) { ++ msg_perr("Request to %s some inaccessible memory address(es)" ++ " (addr=0x%x, len=%d). %s\n", msg[cmd][1], ++ addr, len, msg[cmd][2]); ++ return -1; ++ } ++ ++ msg_pdbg("%s %d bytes starting at 0x%06x.\n", msg[cmd][3], len, addr); ++ return 0; ++} ++ ++static int dnv_smi_spi(struct flashctx *flash, uint8_t *buf, uint32_t addr, ++ uint32_t len, SPI_SMI_CMD cmd) ++{ ++ int32_t ret = 0; ++ uint32_t block_index = 0; ++ ++ ret = dnv_block_check(flash, addr, len, cmd); ++ if (ret == 0) { ++ for (block_index = 0; block_index * DELL_DENVERTON_BLOCK_SIZE < len; block_index++ ) { ++ if ((ret = dnv_smi_doit(addr - dnv_bios_region_start, buf, cmd)) != 0) { ++ break; ++ } ++ buf += DELL_DENVERTON_BLOCK_SIZE; ++ addr += DELL_DENVERTON_BLOCK_SIZE; ++ } ++ } ++ return ret; ++} ++ ++static int dnv_smi_erase_spi(struct flashctx *flash, uint32_t addr, uint32_t len) ++{ ++ return dnv_smi_spi(flash, NULL, addr, len, SMI_ERASE_SPI); ++} ++ ++static int dnv_smi_read_spi(struct flashctx *flash, uint8_t *buf, uint32_t addr, uint32_t len) ++{ ++ return dnv_smi_spi(flash, buf, addr, len, SMI_READ_SPI); ++} ++ ++static int dnv_smi_write_spi(struct flashctx *flash, uint8_t *buf, uint32_t addr, uint32_t len) ++{ ++ return dnv_smi_spi(flash, buf, addr, len, SMI_WRITE_SPI); ++} ++ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + #define ICH_BMWAG(x) ((x >> 24) & 0xff) + #define ICH_BMRAG(x) ((x >> 16) & 0xff) + #define ICH_BRWA(x) ((x >> 8) & 0xff) +@@ -1452,6 +1726,9 @@ static int ich9_handle_frap(uint32_t frap, int i) + msg_pdbg("FREG%i: %s region (0x%08x-0x%08x) is %s.\n", i, + region_names[i], base, (limit | 0x0fff), + access_names[rwperms]); ++#ifdef FORCE10_SPI_CHANGE ++ add_romentry(base, (limit | 0x0fff), region_names[i]); ++#endif + return 0; + } + +@@ -1514,6 +1791,90 @@ static void ich9_set_pr(int i, int read_prot, int write_prot) + msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr)); + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++/* returns 0 if region is unused or r/w */ ++static int dnv_handle_frap(uint32_t frap, int32_t i) ++{ ++ static const char *const access_names[4] = { ++ "locked", "read-only", "write-only", "read-write" ++ }; ++ static const char *const region_names[5] = { ++ "Flash Descriptor", "BIOS", "Management Engine", ++ "Gigabit Ethernet", "Platform Data" ++ }; ++ uint32_t base, limit; ++ int32_t rwperms = (((ICH_BRWA(frap) >> i) & 1) << 1) | ++ (((ICH_BRRA(frap) >> i) & 1) << 0); ++ int32_t offset = DENVERTON_REG_FREG0 + i * 4; ++ uint32_t freg = mmio_readl(ich_spibar + offset); ++ ++ base = ICH_FREG_BASE(freg); ++ limit = ICH_FREG_LIMIT(freg); ++ if (base > limit || (freg == 0 && i > 0)) { ++ /* this FREG is disabled */ ++ msg_pdbg2("0x%02X: 0x%08x FREG%i: %s region is unused.\n", ++ offset, freg, i, region_names[i]); ++ return 0; ++ } ++ msg_pdbg("0x%02X: 0x%08x ", offset, freg); ++ if (rwperms == 0x3) { ++ msg_pdbg("FREG%i: %s region (0x%08x-0x%08x) is %s.\n", i, ++ region_names[i], base, (limit | 0x0fff), ++ access_names[rwperms]); ++ return 0; ++ } ++ ++ msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i, ++ region_names[i], base, (limit | 0x0fff), ++ access_names[rwperms]); ++ return 1; ++} ++ ++/* returns 0 if range is unused (i.e. r/w) */ ++static int dnv_handle_pr(int32_t i) ++{ ++ static const char *const access_names[3] = { ++ "locked", "read-only", "write-only" ++ }; ++ uint8_t off = DENVERTON_REG_PR0 + (i * 4); ++ uint32_t pr = mmio_readl(ich_spibar + off); ++ uint32_t rwperms = ICH_PR_PERMS(pr); ++ ++ if (rwperms == 0x3) { ++ msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i); ++ return 0; ++ } ++ ++ msg_pdbg("0x%02X: 0x%08x ", off, pr); ++ msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), ++ ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); ++ return 1; ++} ++ ++/* Set/Clear the read and write protection enable bits of PR register @i ++ * according to @read_prot and @write_prot. */ ++static void dnv_set_pr(int32_t i, int32_t read_prot, int32_t write_prot) ++{ ++ void *addr = ich_spibar + DENVERTON_REG_PR0 + (i * 4); ++ uint32_t old = mmio_readl(addr); ++ uint32_t new; ++ ++ msg_gspew("PR%u is 0x%08x", i, old); ++ new = old & ~((1 << DENVERTON_PR_RP_OFF) | (1 << DENVERTON_PR_WP_OFF)); ++ if (read_prot) ++ new |= (1 << DENVERTON_PR_RP_OFF); ++ if (write_prot) ++ new |= (1 << DENVERTON_PR_WP_OFF); ++ if (old == new) { ++ msg_gspew(" already.\n"); ++ return; ++ } ++ msg_gspew(", trying to set it to 0x%08x ", new); ++ rmmio_writel(new, addr); ++ msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr)); ++} ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + static const struct spi_programmer spi_programmer_ich7 = { + .type = SPI_CONTROLLER_ICH7, + .max_data_read = 64, +@@ -1545,12 +1906,21 @@ static const struct opaque_programmer opaque_programmer_ich_hwseq = { + .erase = ich_hwseq_block_erase, + }; + +-int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, +- enum ich_chipset ich_gen) ++#if DELL_DENVERTON_SUPPORT == 1 ++static const struct opaque_programmer opaque_master_dnv_hwseq = { ++ .max_data_read = 64, ++ .max_data_write = 64, ++ .probe = dnv_hwseq_probe, ++ .read = dnv_smi_read_spi, ++ .write = dnv_smi_write_spi, ++ .erase = dnv_smi_erase_spi, ++}; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ ++int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen) + { + int i; +- uint8_t old, new; +- uint16_t spibar_offset, tmp2; ++ uint16_t tmp2; + uint32_t tmp; + char *arg; + int ich_spi_force = 0; +@@ -1564,42 +1934,18 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + } ich_spi_mode = ich_auto; + + ich_generation = ich_gen; +- +- switch (ich_generation) { +- case CHIPSET_ICH_UNKNOWN: +- return ERROR_FATAL; +- case CHIPSET_ICH7: +- case CHIPSET_ICH8: +- spibar_offset = 0x3020; +- break; +- case CHIPSET_ICH9: +- default: /* Future version might behave the same */ +- spibar_offset = 0x3800; +- break; +- } +- +- /* SPIBAR is at RCRB+0x3020 for ICH[78] and RCRB+0x3800 for ICH9. */ +- msg_pdbg("SPIBAR = 0x%x + 0x%04x\n", base, spibar_offset); +- +- /* Assign Virtual Address */ +- ich_spibar = rcrb + spibar_offset; ++ ich_spibar = spibar; + + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + msg_pdbg("0x00: 0x%04x (SPIS)\n", + mmio_readw(ich_spibar + 0)); + msg_pdbg("0x02: 0x%04x (SPIC)\n", + mmio_readw(ich_spibar + 2)); + msg_pdbg("0x04: 0x%08x (SPIA)\n", + mmio_readl(ich_spibar + 4)); +- for (i = 0; i < 8; i++) { +- int offs; +- offs = 8 + (i * 8); +- msg_pdbg("0x%02x: 0x%08x (SPID%d)\n", offs, +- mmio_readl(ich_spibar + offs), i); +- msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4, +- mmio_readl(ich_spibar + offs + 4), i); +- } + ichspi_bbar = mmio_readl(ich_spibar + 0x50); + msg_pdbg("0x50: 0x%08x (BBAR)\n", + ichspi_bbar); +@@ -1625,7 +1971,123 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + ich_set_bbar(0); + register_spi_programmer(&spi_programmer_ich7); + break; ++#if DELL_DENVERTON_SUPPORT == 1 ++ case CHIPSET_DENVERTON: ++ ++ tmp2 = mmio_readw(ich_spibar + DENVERTON_REG_HSFS); ++ msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); ++ if (tmp2 & DENVERTON_HSFS_FLOCKDN) { ++ msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ++ ichspi_lock = 1; ++ } ++ if (tmp2 & DENVERTON_HSFS_FDV) ++ desc_valid = 1; ++ if (!(tmp2 & DENVERTON_HSFS_FDOPSS) && desc_valid) ++ msg_pinfo("The Flash Descriptor Override Strap-Pin is set. " ++ "Restrictions implied by\n" ++ "the Master Section of the flash descriptor are " ++ "NOT in effect. Please note\n" ++ "that Protected Range (PR) restrictions still apply.\n"); ++ if (desc_valid) { ++ tmp2 = mmio_readw(ich_spibar + DENVERTON_REG_HSFC); ++ msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); ++ } ++ ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_FADDR); ++ msg_pdbg2("0x08: 0x%08x (FADDR)\n", tmp); ++ ++ if (desc_valid) { ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_FRAP); ++ msg_pdbg("0x50: 0x%08x (FRAP)", tmp); ++ ++ /* Handle FREGx and FRAP registers */ ++ for (i=0; i < 5; i++) ++ ich_spi_rw_restricted |= dnv_handle_frap(tmp, i); ++ if (ich_spi_rw_restricted) ++ msg_pwarn("Not all flash regions are freely accessible " ++ "by flashrom. This is most likely\n" ++ "due to an active ME. " ++ "Please see http://flashrom.org/ME for details.\n"); ++ } ++ ++ /* Handle PR registers */ ++ for (i = 0; i < 5; i++) { ++ if (!ichspi_lock) ++ dnv_set_pr(i, 0, 0); ++ ich_spi_rw_restricted |= dnv_handle_pr(i); ++ } ++ ++ if (ich_spi_force) ++ msg_pinfo("Continuing with write support because " ++ "the user forced us to!\n"); ++ ++ if (desc_valid) { ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_VSCC0); ++ msg_pdbg("0xC4: 0x%08x (VSCC0)\n", tmp); ++ ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_VSCC1); ++ msg_pdbg("0xC8: 0x%08x (VSCC1)\n", tmp); ++ ++ if (read_ich_descriptors_via_fdo(ich_spibar, &desc) == ICH_RET_OK) ++ prettyprint_ich_descriptors(ich_gen, &desc); ++ ++ /* If the descriptor is valid and indicates multiple ++ * flash devices we need to use hwseq to be able to ++ * access the second flash device. ++ */ ++ if (ich_spi_mode == ich_auto && desc.content.NC != 0) { ++ msg_pinfo("Enabling hardware sequencing due to " ++ "multiple flash chips detected.\n"); ++ ich_spi_mode = ich_hwseq; ++ } ++ } ++ ++ if (ich_spi_mode == ich_auto && ichspi_lock) { ++ msg_pinfo("Enabling hardware sequencing because " ++ "some important opcode is locked.\n"); ++ ich_spi_mode = ich_hwseq; ++ } ++ ++ if (ich_spi_mode == ich_auto && ichspi_lock) { ++ msg_pinfo("Enabling hardware sequencing because " ++ "some important opcode is locked.\n"); ++ ich_spi_mode = ich_hwseq; ++ } ++ ++ if (ich_spi_mode == ich_hwseq) { ++ if (!desc_valid) { ++ msg_perr("Hardware sequencing was requested " ++ "but the flash descriptor is not valid. Aborting.\n"); ++ return ERROR_FATAL; ++ } ++ ++ uint32_t tmpi = getFCBA_component_density(&desc, 0); ++ if (tmpi < 0) { ++ msg_perr("Could not determine density of " ++ "flash component %d.\n", 0); ++ return ERROR_FATAL; ++ } ++ hwseq_data.size_comp0 = tmpi; ++ ++ tmpi = getFCBA_component_density(&desc, 1); ++ if (tmpi < 0) { ++ msg_perr("Could not determine density of flash component %d.\n", 1); ++ return ERROR_FATAL; ++ } ++ hwseq_data.size_comp1 = tmpi; ++ ++ register_opaque_programmer(&opaque_master_dnv_hwseq); ++ } else { ++ msg_perr("[%s:%d] Error!!!\n", __func__, __LINE__); ++ return -1; ++ } ++ ++ break; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + case CHIPSET_ICH8: ++#ifdef DELL_AVOTON_SUPPORT ++ case CHIPSET_AVOTON: ++#endif + default: /* Future version might behave the same */ + arg = extract_programmer_param("ich_spi_mode"); + if (arg && !strcmp(arg, "hwseq")) { +@@ -1669,7 +2131,11 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); + prettyprint_ich9_reg_hsfs(tmp2); + if (tmp2 & HSFS_FLOCKDN) { ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Warning: SPI Configuration Lockdown activated.\n"); ++#else + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ++#endif + ichspi_lock = 1; + } + if (tmp2 & HSFS_FDV) +@@ -1690,6 +2156,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + msg_pdbg2("0x08: 0x%08x (FADDR)\n", tmp); + + if (desc_valid) { ++ + tmp = mmio_readl(ich_spibar + ICH9_REG_FRAP); + msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp); + msg_pdbg("BMWAG 0x%02x, ", ICH_BMWAG(tmp)); +@@ -1750,10 +2217,15 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + msg_pdbg("VSCC: "); + prettyprint_ich_reg_vscc(tmp, MSG_DEBUG); + } else { ++#ifdef DELL_AVOTON_SUPPORT ++ if (ich_generation != CHIPSET_AVOTON) { ++#endif + ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); + msg_pdbg("0xA0: 0x%08x (BBAR)\n", + ichspi_bbar); +- ++#ifdef DELL_AVOTON_SUPPORT ++ } ++#endif + if (desc_valid) { + tmp = mmio_readl(ich_spibar + ICH9_REG_LVSCC); + msg_pdbg("0xC4: 0x%08x (LVSCC)\n", tmp); +@@ -1811,21 +2283,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + break; + } + +- old = pci_read_byte(dev, 0xdc); +- msg_pdbg("SPI Read Configuration: "); +- new = (old >> 2) & 0x3; +- switch (new) { +- case 0: +- case 1: +- case 2: +- msg_pdbg("prefetching %sabled, caching %sabled, ", +- (new & 0x2) ? "en" : "dis", +- (new & 0x1) ? "dis" : "en"); +- break; +- default: +- msg_pdbg("invalid prefetching/caching settings, "); +- break; +- } + return 0; + } + +@@ -1844,7 +2301,9 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) + { + int i; + +- ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); ++ ich_spibar = rphysmap("VIA SPI MMIO registers", mmio_base, 0x70); ++ if (ich_spibar == ERROR_PTR) ++ return ERROR_FATAL; + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ + + /* Not sure if it speaks all these bus protocols. */ +diff --git a/internal.c b/internal.c +index ab3c81f..30b184f 100644 +--- a/internal.c ++++ b/internal.c +@@ -331,9 +331,8 @@ int internal_init(void) + return ret; + + #if defined(__i386__) || defined(__x86_64__) +- /* Probe unconditionally for IT87* LPC->SPI translation and for +- * IT87* Parallel write enable. +- */ ++ /* Probe unconditionally for ITE Super I/O chips. This enables LPC->SPI translation on IT87* and ++ * parallel writes on IT8705F. Also, this handles the manual chip select for Gigabyte's DualBIOS. */ + init_superio_ite(); + #endif + +diff --git a/it85spi.c b/it85spi.c +index 0b074eb..7efc680 100644 +--- a/it85spi.c ++++ b/it85spi.c +@@ -262,6 +262,9 @@ static int it85xx_spi_common_init(struct superio s) + * Major TODO here, and it will be a lot of work. + */ + base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); ++ if (base == (chipaddr)ERROR_PTR) ++ return 1; ++ + msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, + (unsigned int)base); + ce_high = (unsigned char *)(base + 0xE00); /* 0xFFFFFE00 */ +diff --git a/it87spi.c b/it87spi.c +index 8e4e0ad..be7f234 100644 +--- a/it87spi.c ++++ b/it87spi.c +@@ -27,6 +27,7 @@ + + #include + #include ++#include + #include "flash.h" + #include "chipdrivers.h" + #include "programmer.h" +@@ -36,7 +37,7 @@ + #define ITE_SUPERIO_PORT1 0x2e + #define ITE_SUPERIO_PORT2 0x4e + +-uint16_t it8716f_flashport = 0; ++static uint16_t it8716f_flashport = 0; + /* use fast 33MHz SPI (<>0) or slow 16MHz (0) */ + static int fast_spi = 1; + +@@ -124,10 +125,40 @@ static const struct spi_programmer spi_programmer_it87xx = { + static uint16_t it87spi_probe(uint16_t port) + { + uint8_t tmp = 0; +- char *portpos = NULL; + uint16_t flashport = 0; + + enter_conf_mode_ite(port); ++ ++ char *param = extract_programmer_param("dualbiosindex"); ++ if (param != NULL) { ++ sio_write(port, 0x07, 0x07); /* Select GPIO LDN */ ++ tmp = sio_read(port, 0xEF); ++ if (*param == '\0') { /* Print current setting only. */ ++ free(param); ++ } else { ++ char *dualbiosindex_suffix; ++ errno = 0; ++ long chip_index = strtol(param, &dualbiosindex_suffix, 0); ++ free(param); ++ if (errno != 0 || *dualbiosindex_suffix != '\0' || chip_index < 0 || chip_index > 1) { ++ msg_perr("DualBIOS: Invalid chip index requested - choose 0 or 1.\n"); ++ exit_conf_mode_ite(port); ++ return 1; ++ } ++ if (chip_index != (tmp & 1)) { ++ msg_pdbg("DualBIOS: Previous chip index: %d\n", tmp & 1); ++ sio_write(port, 0xEF, (tmp & 0xFE) | chip_index); ++ tmp = sio_read(port, 0xEF); ++ if ((tmp & 1) != chip_index) { ++ msg_perr("DualBIOS: Chip selection failed.\n"); ++ exit_conf_mode_ite(port); ++ return 1; ++ } ++ } ++ } ++ msg_pinfo("DualBIOS: Selected chip: %d\n", tmp & 1); ++ } ++ + /* NOLDN, reg 0x24, mask out lowest bit (suspend) */ + tmp = sio_read(port, 0x24) & 0xFE; + /* Check if LPC->SPI translation is active. */ +@@ -163,11 +194,11 @@ static uint16_t it87spi_probe(uint16_t port) + flashport |= sio_read(port, 0x65); + msg_pdbg("Serial flash port 0x%04x\n", flashport); + /* Non-default port requested? */ +- portpos = extract_programmer_param("it87spiport"); +- if (portpos) { ++ param = extract_programmer_param("it87spiport"); ++ if (param) { + char *endptr = NULL; + unsigned long forced_flashport; +- forced_flashport = strtoul(portpos, &endptr, 0); ++ forced_flashport = strtoul(param, &endptr, 0); + /* Port 0, port >0x1000, unaligned ports and garbage strings + * are rejected. + */ +@@ -180,7 +211,8 @@ static uint16_t it87spi_probe(uint16_t port) + msg_perr("Error: it87spiport specified, but no valid " + "port specified.\nPort must be a multiple of " + "0x8 and lie between 0x100 and 0xff8.\n"); +- free(portpos); ++ exit_conf_mode_ite(port); ++ free(param); + return 1; + } else { + flashport = (uint16_t)forced_flashport; +@@ -190,7 +222,7 @@ static uint16_t it87spi_probe(uint16_t port) + sio_write(port, 0x65, (flashport & 0xff)); + } + } +- free(portpos); ++ free(param); + exit_conf_mode_ite(port); + it8716f_flashport = flashport; + if (internal_buses_supported & BUS_SPI) +@@ -228,6 +260,7 @@ int init_superio_ite(void) + case 0x8716: + case 0x8718: + case 0x8720: ++ case 0x8728: + ret |= it87spi_probe(superios[i].port); + break; + default: +diff --git a/layout.c b/layout.c +index 1bd3152..d00c16c 100644 +--- a/layout.c ++++ b/layout.c +@@ -3,6 +3,7 @@ + * + * Copyright (C) 2005-2008 coresystems GmbH + * (Written by Stefan Reinauer for coresystems GmbH) ++ * Copyright (C) 2011-2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -25,24 +26,23 @@ + #include "flash.h" + #include "programmer.h" + +-static int romimages = 0; +- + #define MAX_ROMLAYOUT 32 + + typedef struct { +- unsigned int start; +- unsigned int end; ++ chipoff_t start; ++ chipoff_t end; + unsigned int included; + char name[256]; +-} romlayout_t; ++} romentry_t; + +-/* include_args lists arguments specified at the command line with -i. They +- * must be processed at some point so that desired regions are marked as +- * "included" in the rom_entries list. +- */ ++/* rom_entries store the entries specified in a layout file and associated run-time data */ ++static romentry_t rom_entries[MAX_ROMLAYOUT]; ++static int num_rom_entries = 0; /* the number of successfully parsed rom_entries */ ++ ++/* include_args holds the arguments specified at the command line with -i. They must be processed at some point ++ * so that desired regions are marked as "included" in the rom_entries list. */ + static char *include_args[MAX_ROMLAYOUT]; +-static int num_include_args = 0; /* the number of valid entries. */ +-static romlayout_t rom_entries[MAX_ROMLAYOUT]; ++static int num_include_args = 0; /* the number of valid include_args. */ + + #ifndef __LIBPAYLOAD__ + int read_romlayout(char *name) +@@ -62,12 +62,13 @@ int read_romlayout(char *name) + while (!feof(romlayout)) { + char *tstr1, *tstr2; + +- if (romimages >= MAX_ROMLAYOUT) { ++ if (num_rom_entries >= MAX_ROMLAYOUT) { + msg_gerr("Maximum number of ROM images (%i) in layout " + "file reached.\n", MAX_ROMLAYOUT); ++ fclose(romlayout); + return 1; + } +- if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name)) ++ if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) + continue; + #if 0 + // fscanf does not like arbitrary comments like that :( later +@@ -82,13 +83,13 @@ int read_romlayout(char *name) + fclose(romlayout); + return 1; + } +- rom_entries[romimages].start = strtol(tstr1, (char **)NULL, 16); +- rom_entries[romimages].end = strtol(tstr2, (char **)NULL, 16); +- rom_entries[romimages].included = 0; +- romimages++; ++ rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); ++ rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); ++ rom_entries[num_rom_entries].included = 0; ++ num_rom_entries++; + } + +- for (i = 0; i < romimages; i++) { ++ for (i = 0; i < num_rom_entries; i++) { + msg_gdbg("romlayout %08x - %08x named %s\n", + rom_entries[i].start, + rom_entries[i].end, rom_entries[i].name); +@@ -100,6 +101,33 @@ int read_romlayout(char *name) + } + #endif + ++ ++#ifdef FORCE10_SPI_CHANGE ++int add_romentry(chipoff_t start, chipoff_t end, const char *name) ++{ ++ int len = 0; ++ ++ if (num_rom_entries >= MAX_ROMLAYOUT) { ++ msg_gerr("Maximum number of ROM images (%i) in layout " ++ "file reached.\n", MAX_ROMLAYOUT); ++ return 1; ++ } ++ rom_entries[num_rom_entries].start = start; ++ rom_entries[num_rom_entries].end = end; ++ rom_entries[num_rom_entries].included = 1; ++ len = strlen(name); ++ if (len > 256) { ++ msg_gdbg("terminating rom entry name to 256 as it exceeds max length\n"); ++ len = 255; ++ } ++ strncpy(rom_entries[num_rom_entries].name, name, len); ++ msg_gdbg("Adding rom entry: %08x - %08x named %s\n", rom_entries[num_rom_entries].start, ++ rom_entries[num_rom_entries].end, rom_entries[num_rom_entries].name); ++ num_rom_entries++; ++ return 0; ++} ++#endif ++ + /* returns the index of the entry (or a negative value if it is not found) */ + int find_include_arg(const char *const name) + { +@@ -139,11 +167,11 @@ static int find_romentry(char *name) + { + int i; + +- if (!romimages) ++ if (num_rom_entries == 0) + return -1; + + msg_gspew("Looking for region \"%s\"... ", name); +- for (i = 0; i < romimages; i++) { ++ for (i = 0; i < num_rom_entries; i++) { + if (!strcmp(rom_entries[i].name, name)) { + rom_entries[i].included = 1; + msg_gspew("found.\n"); +@@ -166,7 +194,7 @@ int process_include_args(void) + return 0; + + /* User has specified an area, but no layout file is loaded. */ +- if (!romimages) { ++ if (num_rom_entries == 0) { + msg_gerr("Region requested (with -i \"%s\"), " + "but no layout data is available.\n", + include_args[0]); +@@ -190,15 +218,30 @@ int process_include_args(void) + return 0; + } + +-romlayout_t *get_next_included_romentry(unsigned int start) ++void layout_cleanup(void) ++{ ++ int i; ++ for (i = 0; i < num_include_args; i++) { ++ free(include_args[i]); ++ include_args[i] = NULL; ++ } ++ num_include_args = 0; ++ ++ for (i = 0; i < num_rom_entries; i++) { ++ rom_entries[i].included = 0; ++ } ++ num_rom_entries = 0; ++} ++ ++romentry_t *get_next_included_romentry(unsigned int start) + { + int i; + unsigned int best_start = UINT_MAX; +- romlayout_t *best_entry = NULL; +- romlayout_t *cur; ++ romentry_t *best_entry = NULL; ++ romentry_t *cur; + + /* First come, first serve for overlapping regions. */ +- for (i = 0; i < romimages; i++) { ++ for (i = 0; i < num_rom_entries; i++) { + cur = &rom_entries[i]; + if (!cur->included) + continue; +@@ -217,18 +260,43 @@ romlayout_t *get_next_included_romentry(unsigned int start) + return best_entry; + } + +-int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) ++/* Validate and - if needed - normalize layout entries. */ ++int normalize_romentries(const struct flashctx *flash) ++{ ++ chipsize_t total_size = flash->chip->total_size * 1024; ++ int ret = 0; ++ ++ int i; ++ for (i = 0; i < num_rom_entries; i++) { ++ if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { ++ msg_gwarn("Warning: Address range of region \"%s\" exceeds the current chip's " ++ "address space.\n", rom_entries[i].name); ++ if (rom_entries[i].included) ++ ret = 1; ++ } ++ if (rom_entries[i].start > rom_entries[i].end) { ++ msg_gerr("Error: Size of the address range of region \"%s\" is not positive.\n", ++ rom_entries[i].name); ++ ret = 1; ++ } ++ } ++ ++ return ret; ++} ++ ++int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) + { + unsigned int start = 0; +- romlayout_t *entry; ++ romentry_t *entry; + unsigned int size = flash->chip->total_size * 1024; + + /* If no regions were specified for inclusion, assume + * that the user wants to write the complete new image. + */ ++#ifndef FORCE10_SPI_CHANGE + if (num_include_args == 0) + return 0; +- ++#endif + /* Non-included romentries are ignored. + * The union of all included romentries is used from the new image. + */ +@@ -239,7 +307,7 @@ int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_ + memcpy(newcontents + start, oldcontents + start, + size - start); + break; +- } ++ } + /* For non-included region, copy from old content. */ + if (entry->start > start) + memcpy(newcontents + start, oldcontents + start, +diff --git a/linux_spi.c b/linux_spi.c +index d12fceb..f0c6404 100644 +--- a/linux_spi.c ++++ b/linux_spi.c +@@ -60,7 +60,7 @@ static const struct spi_programmer spi_programmer_linux = { + int linux_spi_init(void) + { + char *p, *endp, *dev; +- uint32_t speed = 0; ++ uint32_t speed_hz = 0; + /* FIXME: make the following configurable by CLI options. */ + /* SPI mode 0 (beware this also includes: MSB first, CS active low and others */ + const uint8_t mode = SPI_MODE_0; +@@ -68,7 +68,7 @@ int linux_spi_init(void) + + p = extract_programmer_param("spispeed"); + if (p && strlen(p)) { +- speed = (uint32_t)strtoul(p, &endp, 10) * 1024; ++ speed_hz = (uint32_t)strtoul(p, &endp, 10) * 1000; + if (p == endp) { + msg_perr("%s: invalid clock: %s kHz\n", __func__, p); + free(p); +@@ -98,14 +98,14 @@ int linux_spi_init(void) + return 1; + /* We rely on the shutdown function for cleanup from here on. */ + +- if (speed > 0) { +- if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) == -1) { ++ if (speed_hz > 0) { ++ if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed_hz) == -1) { + msg_perr("%s: failed to set speed to %d Hz: %s\n", +- __func__, speed, strerror(errno)); ++ __func__, speed_hz, strerror(errno)); + return 1; + } + +- msg_pdbg("Using %d kHz clock\n", speed); ++ msg_pdbg("Using %d kHz clock\n", speed_hz/1000); + } + + if (ioctl(fd, SPI_IOC_WR_MODE, &mode) == -1) { +diff --git a/mcp6x_spi.c b/mcp6x_spi.c +index ac40557..20e9bd8 100644 +--- a/mcp6x_spi.c ++++ b/mcp6x_spi.c +@@ -135,25 +135,20 @@ int mcp6x_spi_init(int want_spi) + + /* Accessing a NULL pointer BAR is evil. Don't do it. */ + if (!mcp6x_spibaraddr && want_spi) { +- msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " +- "is invalid.\n"); ++ msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.\n"); + return 1; + } else if (!mcp6x_spibaraddr && !want_spi) { + msg_pdbg("MCP SPI is not used.\n"); + return 0; + } else if (mcp6x_spibaraddr && !want_spi) { +- msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" +- " doesn't have SPI enabled.\n"); ++ msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.\n"); + /* FIXME: Should we enable SPI anyway? */ + return 0; + } + /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ +- mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); +- +-#if 0 +- /* FIXME: Run the physunmap in a shutdown function. */ +- physunmap(mcp6x_spibar, 0x544); +-#endif ++ mcp6x_spibar = rphysmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); ++ if (mcp6x_spibar == ERROR_PTR) ++ return 1; + + status = mmio_readw(mcp6x_spibar + 0x530); + msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", +diff --git a/nic3com.c b/nic3com.c +index 8d67b54..27e28c7 100644 +--- a/nic3com.c ++++ b/nic3com.c +@@ -96,6 +96,8 @@ int nic3com_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; + + id = dev->device_id; + +diff --git a/nicintel.c b/nicintel.c +index 56678e7..98ba29f 100644 +--- a/nicintel.c ++++ b/nicintel.c +@@ -59,13 +59,6 @@ static const struct par_programmer par_programmer_nicintel = { + .chip_writen = fallback_chip_writen, + }; + +-static int nicintel_shutdown(void *data) +-{ +- physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); +- physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); +- return 0; +-} +- + int nicintel_init(void) + { + struct pci_dev *dev = NULL; +@@ -83,18 +76,19 @@ int nicintel_init(void) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); +- nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); ++ if (!addr) ++ return 1; ++ ++ nicintel_bar = rphysmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + if (nicintel_bar == ERROR_PTR) +- goto error_out_unmap; ++ return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- /* FIXME: This is not an aligned mapping. Use 4k? */ +- nicintel_control_bar = physmap("Intel NIC control/status reg", +- addr, NICINTEL_CONTROL_MEMMAP_SIZE); +- if (nicintel_control_bar == ERROR_PTR) +- goto error_out; ++ if (!addr) ++ return 1; + +- if (register_shutdown(nicintel_shutdown, NULL)) ++ nicintel_control_bar = rphysmap("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); ++ if (nicintel_control_bar == ERROR_PTR) + return 1; + + /* FIXME: This register is pretty undocumented in all publicly available +@@ -112,11 +106,6 @@ int nicintel_init(void) + register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); + + return 0; +- +-error_out_unmap: +- physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); +-error_out: +- return 1; + } + + static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, +diff --git a/nicintel_spi.c b/nicintel_spi.c +index 0045c09..1522c9b 100644 +--- a/nicintel_spi.c ++++ b/nicintel_spi.c +@@ -19,10 +19,16 @@ + */ + + /* +- * Datasheet: ++ * Datasheets: + * PCI/PCI-X Family of Gigabit Ethernet Controllers Software Developer's Manual + * 82540EP/EM, 82541xx, 82544GC/EI, 82545GM/EM, 82546GB/EB, and 82547xx +- * http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf ++ * http://www.intel.com/content/www/us/en/ethernet-controllers/pci-pci-x-family-gbe-controllers-software-dev-manual.html ++ * ++ * PCIe GbE Controllers Open Source Software Developer's Manual ++ * http://www.intel.com/content/www/us/en/ethernet-controllers/pcie-gbe-controllers-open-source-manual.html ++ * ++ * Intel 82574 Gigabit Ethernet Controller Family Datasheet ++ * http://www.intel.com/content/www/us/en/ethernet-controllers/82574l-gbe-controller-datasheet.html + */ + + #include +@@ -72,6 +78,7 @@ const struct dev_entry nics_intel_spi[] = { + {PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"}, ++ {PCI_VENDOR_ID_INTEL, 0x10d3, OK, "Intel", "82574L Gigabit Ethernet Controller"}, + + {0}, + }; +@@ -151,16 +158,12 @@ static int nicintel_spi_shutdown(void *data) + { + uint32_t tmp; + +- /* Disable writes manually. See the comment about EECD in +- * nicintel_spi_init() for details. +- */ ++ /* Disable writes manually. See the comment about EECD in nicintel_spi_init() for details. */ + tmp = pci_mmio_readl(nicintel_spibar + EECD); + tmp &= ~FLASH_WRITES_ENABLED; + tmp |= FLASH_WRITES_DISABLED; + pci_mmio_writel(tmp, nicintel_spibar + EECD); + +- physunmap(nicintel_spibar, MEMMAP_SIZE); +- + return 0; + } + +@@ -177,8 +180,13 @@ int nicintel_spi_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", +- io_base_addr, MEMMAP_SIZE); ++ if (!io_base_addr) ++ return 1; ++ ++ nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); ++ if (nicintel_spibar == ERROR_PTR) ++ return 1; ++ + /* Automatic restore of EECD on shutdown is not possible because EECD + * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, + * but other bits with side effects as well. Those other bits must be +diff --git a/nicnatsemi.c b/nicnatsemi.c +index d62a73f..cb8da6d 100644 +--- a/nicnatsemi.c ++++ b/nicnatsemi.c +@@ -64,6 +64,8 @@ int nicnatsemi_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; + + /* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15 + * in another. My NIC has MA16 connected to A16 on the boot ROM socket +diff --git a/nicrealtek.c b/nicrealtek.c +index fb8e9e1..02fbd39 100644 +--- a/nicrealtek.c ++++ b/nicrealtek.c +@@ -69,6 +69,8 @@ int nicrealtek_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; + + /* Beware, this ignores the vendor ID! */ + switch (dev->device_id) { +diff --git a/ogp_spi.c b/ogp_spi.c +index 0c09d6a..23431d1 100644 +--- a/ogp_spi.c ++++ b/ogp_spi.c +@@ -97,12 +97,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { + .half_period = 0, + }; + +-static int ogp_spi_shutdown(void *data) +-{ +- physunmap(ogp_spibar, 4096); +- return 0; +-} +- + int ogp_spi_init(void) + { + struct pci_dev *dev = NULL; +@@ -126,8 +120,10 @@ int ogp_spi_init(void) + ogp_reg_sck = OGA1_XP10_CPROM_SCK; + } else { + msg_perr("Invalid or missing rom= parameter.\n"); ++ free(type); + return 1; + } ++ free(type); + + if (rget_io_perms()) + return 1; +@@ -137,9 +133,11 @@ int ogp_spi_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- ogp_spibar = physmap("OGP registers", io_base_addr, 4096); ++ if (!io_base_addr) ++ return 1; + +- if (register_shutdown(ogp_spi_shutdown, NULL)) ++ ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096); ++ if (ogp_spibar == ERROR_PTR) + return 1; + + if (bitbang_spi_init(&bitbang_spi_master_ogp)) +diff --git a/pcidev.c b/pcidev.c +index c7e9d78..3a3f77c 100644 +--- a/pcidev.c ++++ b/pcidev.c +@@ -94,7 +94,7 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) + + supported_cycles = pci_read_word(dev, PCI_COMMAND); + +- msg_pdbg("Requested BAR is "); ++ msg_pdbg("Requested BAR is of type "); + switch (bartype) { + case TYPE_MEMBAR: + msg_pdbg("MEM"); +diff --git a/physmap.c b/physmap.c +index 932fe75..150c44a 100644 +--- a/physmap.c ++++ b/physmap.c +@@ -21,11 +21,13 @@ + */ + + #include ++#include + #include + #include + #include + #include + #include "flash.h" ++#include "programmer.h" + #include "hwaccess.h" + + #if !defined(__DJGPP__) && !defined(__LIBPAYLOAD__) +@@ -88,7 +90,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len) + #define sys_physmap_rw_uncached sys_physmap + #define sys_physmap_ro_cached sys_physmap + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { + __dpmi_meminfo mi; + +@@ -117,7 +119,7 @@ void *sys_physmap(uintptr_t phys_addr, size_t len) + #define sys_physmap_rw_uncached sys_physmap + #define sys_physmap_ro_cached sys_physmap + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { + } + #elif defined(__MACH__) && defined(__APPLE__) +@@ -138,7 +140,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len) + #define sys_physmap_rw_uncached sys_physmap + #define sys_physmap_ro_cached sys_physmap + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { + unmap_physical(virt_addr, len); + } +@@ -164,12 +166,11 @@ static void *sys_physmap_rw_uncached(uintptr_t phys_addr, size_t len) + /* Open the memory device UNCACHED. Important for MMIO. */ + if (-1 == (fd_mem = open(MEM_DEV, O_RDWR | O_SYNC))) { + msg_perr("Critical error: open(" MEM_DEV "): %s\n", strerror(errno)); +- exit(2); ++ return ERROR_PTR; + } + } + +- virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, +- fd_mem, (off_t)phys_addr); ++ virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, fd_mem, (off_t)phys_addr); + return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; + } + +@@ -184,50 +185,77 @@ static void *sys_physmap_ro_cached(uintptr_t phys_addr, size_t len) + /* Open the memory device CACHED. */ + if (-1 == (fd_mem_cached = open(MEM_DEV, O_RDWR))) { + msg_perr("Critical error: open(" MEM_DEV "): %s\n", strerror(errno)); +- exit(2); ++ return ERROR_PTR; + } + } + +- virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, +- fd_mem_cached, (off_t)phys_addr); ++ virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, fd_mem_cached, (off_t)phys_addr); + return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; + } + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { +- if (len == 0) { +- msg_pspew("Not unmapping zero size at %p\n", virt_addr); +- return; +- } +- + munmap(virt_addr, len); + } + #endif + +-#define PHYSMAP_NOFAIL 0 +-#define PHYSMAP_MAYFAIL 1 +-#define PHYSMAP_RW 0 +-#define PHYSMAP_RO 1 ++#define PHYSM_RW 0 ++#define PHYSM_RO 1 ++#define PHYSM_NOCLEANUP 0 ++#define PHYSM_CLEANUP 1 ++#define PHYSM_EXACT 0 ++#define PHYSM_ROUND 1 ++ ++/* Round start to nearest page boundary below and set len so that the resulting address range ends at the lowest ++ * possible page boundary where the original address range is still entirely contained. It returns the ++ * difference between the rounded start address and the original start address. */ ++static uintptr_t round_to_page_boundaries(uintptr_t *start, size_t *len) ++{ ++ uintptr_t page_size = getpagesize(); ++ uintptr_t page_mask = ~(page_size-1); ++ uintptr_t end = *start + *len; ++ uintptr_t old_start = *start; ++ msg_gspew("page_size=%" PRIxPTR "\n", page_size); ++ msg_gspew("pre-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", ++ PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, end); ++ *start = *start & page_mask; ++ end = (end + page_size - 1) & page_mask; ++ *len = end - *start; ++ msg_gspew("post-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", ++ PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, *start + *len); ++ return old_start - *start; ++} ++ ++struct undo_physmap_data { ++ void *virt_addr; ++ size_t len; ++}; ++ ++static int undo_physmap(void *data) ++{ ++ if (data == NULL) { ++ msg_perr("%s: tried to physunmap without valid data!\n", __func__); ++ return 1; ++ } ++ struct undo_physmap_data *d = data; ++ physunmap_unaligned(d->virt_addr, d->len); ++ free(data); ++ return 0; ++} + +-static void *physmap_common(const char *descr, uintptr_t phys_addr, +- size_t len, int mayfail, int readonly) ++static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool readonly, bool autocleanup, ++ bool round) + { + void *virt_addr; ++ uintptr_t offset = 0; + + if (len == 0) { + msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr); + return ERROR_PTR; + } + +- if ((getpagesize() - 1) & len) { +- msg_perr("Mapping %s at 0x%0*" PRIxPTR ", unaligned size 0x%zx.\n", +- descr, PRIxPTR_WIDTH, phys_addr, len); +- } +- +- if ((getpagesize() - 1) & phys_addr) { +- msg_perr("Mapping %s, 0x%zx bytes at unaligned 0x%0*" PRIxPTR ".\n", +- descr, len, PRIxPTR_WIDTH, phys_addr); +- } ++ if (round) ++ offset = round_to_page_boundaries(&phys_addr, &len); + + if (readonly) + virt_addr = sys_physmap_ro_cached(phys_addr, len); +@@ -253,23 +281,89 @@ static void *physmap_common(const char *descr, uintptr_t phys_addr, + "and reboot, or reboot into\n" + "single user mode.\n"); + #endif +- if (!mayfail) +- exit(3); ++ return ERROR_PTR; + } + +- return virt_addr; ++ if (autocleanup) { ++ struct undo_physmap_data *d = malloc(sizeof(struct undo_physmap_data)); ++ if (d == NULL) { ++ msg_perr("%s: Out of memory!\n", __func__); ++ physunmap_unaligned(virt_addr, len); ++ return ERROR_PTR; ++ } ++ ++ d->virt_addr = virt_addr; ++ d->len = len; ++ if (register_shutdown(undo_physmap, d) != 0) { ++ msg_perr("%s: Could not register shutdown function!\n", __func__); ++ physunmap_unaligned(virt_addr, len); ++ return ERROR_PTR; ++ } ++ } ++ ++ return virt_addr + offset; ++} ++ ++void physunmap_unaligned(void *virt_addr, size_t len) ++{ ++ /* No need to check for zero size, such mappings would have yielded ERROR_PTR. */ ++ if (virt_addr == ERROR_PTR) { ++#ifndef FORCE10_SPI_CHANGE ++ msg_perr("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#else ++ msg_pdbg("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#endif ++ return; ++ } ++ ++ sys_physunmap_unaligned(virt_addr, len); ++} ++ ++void physunmap(void *virt_addr, size_t len) ++{ ++ uintptr_t tmp; ++ ++ /* No need to check for zero size, such mappings would have yielded ERROR_PTR. */ ++ if (virt_addr == ERROR_PTR) { ++#ifndef FORCE10_SPI_CHANGE ++ msg_perr("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#else ++ msg_pdbg("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#endif ++ return; ++ } ++ tmp = (uintptr_t)virt_addr; ++ /* We assume that the virtual address of a page-aligned physical address is page-aligned as well. By ++ * extension, rounding a virtual unaligned address as returned by physmap should yield the same offset ++ * between rounded and original virtual address as between rounded and original physical address. ++ */ ++ round_to_page_boundaries(&tmp, &len); ++ virt_addr = (void *)tmp; ++ physunmap_unaligned(virt_addr, len); + } + + void *physmap(const char *descr, uintptr_t phys_addr, size_t len) + { +- return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, +- PHYSMAP_RW); ++ return physmap_common(descr, phys_addr, len, PHYSM_RW, PHYSM_NOCLEANUP, PHYSM_ROUND); ++} ++ ++void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len) ++{ ++ return physmap_common(descr, phys_addr, len, PHYSM_RW, PHYSM_CLEANUP, PHYSM_ROUND); ++} ++ ++void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len) ++{ ++ return physmap_common(descr, phys_addr, len, PHYSM_RO, PHYSM_NOCLEANUP, PHYSM_ROUND); + } + +-void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len) ++void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len) + { +- return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, +- PHYSMAP_RO); ++ return physmap_common(descr, phys_addr, len, PHYSM_RO, PHYSM_NOCLEANUP, PHYSM_EXACT); + } + + /* MSR abstraction implementations for Linux, OpenBSD, FreeBSD/Dragonfly, OSX, libpayload +diff --git a/pony_spi.c b/pony_spi.c +index 101751f..2a3666f 100644 +--- a/pony_spi.c ++++ b/pony_spi.c +@@ -140,6 +140,7 @@ int pony_spi_init(void) + } else if (arg && !strlen(arg)) { + msg_perr("Error: Missing argument for programmer type.\n"); + free(arg); ++ return 1; + } else if (arg){ + msg_perr("Error: Invalid programmer type specified.\n"); + free(arg); +diff --git a/print.c b/print.c +index 6766eeb..6d2921b 100644 +--- a/print.c ++++ b/print.c +@@ -436,12 +436,13 @@ static void print_supported_boards_helper(const struct board_info *boards, + msg_ginfo("%s", b->name); + for (i = 0; i < maxboardlen - strlen(b->name); i++) + msg_ginfo(" "); +- if (b->working == OK) +- msg_ginfo("OK "); +- else if (b->working == NT) +- msg_ginfo("NT "); +- else +- msg_ginfo("BAD "); ++ ++ if (b->working == OK) ++ msg_ginfo("OK "); ++ else if (b->working == NT) ++ msg_ginfo("NT "); ++ else ++ msg_ginfo("BAD "); + + for (e = board_matches; e->vendor_name != NULL; e++) { + if (strcmp(e->vendor_name, b->vendor) +@@ -530,6 +531,7 @@ const struct board_info boards_known[] = { + B("abit", "AN-M2", OK, NULL, NULL), + B("abit", "AV8", OK, NULL, NULL), + B("abit", "AX8", OK, NULL, NULL), ++ B("abit", "BF6", OK, NULL, NULL), + B("abit", "BM6", OK, NULL, NULL), + B("abit", "Fatal1ty F-I90HD", OK, NULL, NULL), + B("abit", "IC7", OK, NULL, NULL), +@@ -695,6 +697,7 @@ const struct board_info boards_known[] = { + B("ASUS", "P5L-VM 1394", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), + B("ASUS", "P5LD2", NT, NULL, "Untested board enable."), + B("ASUS", "P5LD2-VM", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM/", "Untested board enable."), ++ B("ASUS", "P5LD2-VM DH", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM_DH/", NULL), + B("ASUS", "P5LP-LE (Lithium-UL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."), + B("ASUS", "P5LP-LE (Epson OEM)", OK, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."), + B("ASUS", "P5LP-LE", NT, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."), +diff --git a/programmer.h b/programmer.h +index 4db8d58..d3cc557 100644 +--- a/programmer.h ++++ b/programmer.h +@@ -276,8 +276,11 @@ int processor_flash_enable(void); + + /* physmap.c */ + void *physmap(const char *descr, uintptr_t phys_addr, size_t len); +-void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len); ++void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len); ++void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len); ++void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len); + void physunmap(void *virt_addr, size_t len); ++void physunmap_unaligned(void *virt_addr, size_t len); + #if CONFIG_INTERNAL == 1 + int setup_cpu_msr(int cpu); + void cleanup_cpu_msr(void); +@@ -287,9 +290,11 @@ int cb_parse_table(const char **vendor, const char **model); + int cb_check_image(uint8_t *bios, int size); + + /* dmi.c */ ++#if defined(__i386__) || defined(__x86_64__) + extern int has_dmi_support; + void dmi_init(void); + int dmi_match(const char *pattern); ++#endif // defined(__i386__) || defined(__x86_64__) + + /* internal.c */ + struct superio { +@@ -550,10 +555,19 @@ int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int sta + int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + int register_spi_programmer(const struct spi_programmer *programmer); + +-/* The following enum is needed by ich_descriptor_tool and ich* code. */ ++/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */ + enum ich_chipset { + CHIPSET_ICH_UNKNOWN, +- CHIPSET_ICH7 = 7, ++#ifdef DELL_AVOTON_SUPPORT ++ CHIPSET_AVOTON, ++#endif ++ CHIPSET_ICH, ++ CHIPSET_ICH2345, ++ CHIPSET_ICH6, ++ CHIPSET_POULSBO, /* SCH U* */ ++ CHIPSET_TUNNEL_CREEK, /* Atom E6xx */ ++ CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */ ++ CHIPSET_ICH7, + CHIPSET_ICH8, + CHIPSET_ICH9, + CHIPSET_ICH10, +@@ -563,13 +577,15 @@ enum ich_chipset { + CHIPSET_8_SERIES_LYNX_POINT, + CHIPSET_8_SERIES_LYNX_POINT_LP, + CHIPSET_8_SERIES_WELLSBURG, ++#if DELL_DENVERTON_SUPPORT == 1 ++ CHIPSET_DENVERTON, ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + + /* ichspi.c */ + #if CONFIG_INTERNAL == 1 + extern uint32_t ichspi_bbar; +-int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, +- enum ich_chipset ich_generation); ++int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation); + int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); + + /* amd_imc.c */ +@@ -659,7 +675,7 @@ typedef int fdtype; + + void sp_flush_incoming(void); + fdtype sp_openserport(char *dev, unsigned int baud); +-void __attribute__((noreturn)) sp_die(char *msg); ++int serialport_config(fdtype fd, unsigned int baud); + extern fdtype sp_fd; + /* expose serialport_shutdown as it's currently used by buspirate */ + int serialport_shutdown(void *data); +diff --git a/rayer_spi.c b/rayer_spi.c +index b312610..189341a 100644 +--- a/rayer_spi.c ++++ b/rayer_spi.c +@@ -17,11 +17,9 @@ + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +-/* Driver for the SPIPGM hardware by "RayeR" Martin Rehak. +- * See http://rayer.ic.cz/elektro/spipgm.htm for schematics and instructions. +- */ +- +-/* This driver uses non-portable direct I/O port accesses which won't work on ++/* Driver for various LPT adapters. ++ * ++ * This driver uses non-portable direct I/O port accesses which won't work on + * any non-x86 platform, and even on x86 there is a high chance there will be + * collisions with any loaded parallel port drivers. + * The big advantage of direct port I/O is OS independence and speed because +@@ -37,21 +35,87 @@ + #include "programmer.h" + #include "hwaccess.h" + +-enum rayer_type { +- TYPE_RAYER, +- TYPE_XILINX_DLC5, +-}; +- + /* We have two sets of pins, out and in. The numbers for both sets are + * independent and are bitshift values, not real pin numbers. + * Default settings are for the RayeR hardware. + */ +-/* Pins for master->slave direction */ +-static int rayer_cs_bit = 5; +-static int rayer_sck_bit = 6; +-static int rayer_mosi_bit = 7; +-/* Pins for slave->master direction */ +-static int rayer_miso_bit = 6; ++ ++struct rayer_programmer { ++ const char *type; ++ const enum test_state status; ++ const char *description; ++ const void *dev_data; ++}; ++ ++struct rayer_pinout { ++ uint8_t cs_bit; ++ uint8_t sck_bit; ++ uint8_t mosi_bit; ++ uint8_t miso_bit; ++ void (*preinit)(const void *); ++ int (*shutdown)(void *); ++}; ++ ++static const struct rayer_pinout rayer_spipgm = { ++ .cs_bit = 5, ++ .sck_bit = 6, ++ .mosi_bit = 7, ++ .miso_bit = 6, ++}; ++ ++static void dlc5_preinit(const void *); ++static int dlc5_shutdown(void *); ++ ++static const struct rayer_pinout xilinx_dlc5 = { ++ .cs_bit = 2, ++ .sck_bit = 1, ++ .mosi_bit = 0, ++ .miso_bit = 4, ++ .preinit = dlc5_preinit, ++ .shutdown = dlc5_shutdown, ++}; ++ ++static void byteblaster_preinit(const void *); ++static int byteblaster_shutdown(void *); ++ ++static const struct rayer_pinout altera_byteblastermv = { ++ .cs_bit = 1, ++ .sck_bit = 0, ++ .mosi_bit = 6, ++ .miso_bit = 7, ++ .preinit = byteblaster_preinit, ++ .shutdown = byteblaster_shutdown, ++}; ++ ++static void stk200_preinit(const void *); ++static int stk200_shutdown(void *); ++ ++static const struct rayer_pinout atmel_stk200 = { ++ .cs_bit = 7, ++ .sck_bit = 4, ++ .mosi_bit = 5, ++ .miso_bit = 6, ++ .preinit = stk200_preinit, ++ .shutdown = stk200_shutdown, ++}; ++ ++static const struct rayer_pinout wiggler_lpt = { ++ .cs_bit = 1, ++ .sck_bit = 2, ++ .mosi_bit = 3, ++ .miso_bit = 7, ++}; ++ ++static const struct rayer_programmer rayer_spi_types[] = { ++ {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, ++ {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, ++ {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv}, ++ {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200}, ++ {"wiggler", OK, "Wiggler LPT", &wiggler_lpt}, ++ {0}, ++}; ++ ++static const struct rayer_pinout *pinout = NULL; + + static uint16_t lpt_iobase; + +@@ -60,22 +124,22 @@ static uint8_t lpt_outbyte; + + static void rayer_bitbang_set_cs(int val) + { +- lpt_outbyte &= ~(1 << rayer_cs_bit); +- lpt_outbyte |= (val << rayer_cs_bit); ++ lpt_outbyte &= ~(1 << pinout->cs_bit); ++ lpt_outbyte |= (val << pinout->cs_bit); + OUTB(lpt_outbyte, lpt_iobase); + } + + static void rayer_bitbang_set_sck(int val) + { +- lpt_outbyte &= ~(1 << rayer_sck_bit); +- lpt_outbyte |= (val << rayer_sck_bit); ++ lpt_outbyte &= ~(1 << pinout->sck_bit); ++ lpt_outbyte |= (val << pinout->sck_bit); + OUTB(lpt_outbyte, lpt_iobase); + } + + static void rayer_bitbang_set_mosi(int val) + { +- lpt_outbyte &= ~(1 << rayer_mosi_bit); +- lpt_outbyte |= (val << rayer_mosi_bit); ++ lpt_outbyte &= ~(1 << pinout->mosi_bit); ++ lpt_outbyte |= (val << pinout->mosi_bit); + OUTB(lpt_outbyte, lpt_iobase); + } + +@@ -83,8 +147,8 @@ static int rayer_bitbang_get_miso(void) + { + uint8_t tmp; + +- tmp = INB(lpt_iobase + 1); +- tmp = (tmp >> rayer_miso_bit) & 0x1; ++ tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted ++ tmp = (tmp >> pinout->miso_bit) & 0x1; + return tmp; + } + +@@ -99,8 +163,8 @@ static const struct bitbang_spi_master bitbang_spi_master_rayer = { + + int rayer_spi_init(void) + { ++ const struct rayer_programmer *prog = rayer_spi_types; + char *arg = NULL; +- enum rayer_type rayer_type = TYPE_RAYER; + + /* Non-default port requested? */ + arg = extract_programmer_param("iobase"); +@@ -138,36 +202,20 @@ int rayer_spi_init(void) + + arg = extract_programmer_param("type"); + if (arg) { +- if (!strcasecmp(arg, "rayer")) { +- rayer_type = TYPE_RAYER; +- } else if (!strcasecmp(arg, "xilinx")) { +- rayer_type = TYPE_XILINX_DLC5; +- } else { ++ for (; prog->type != NULL; prog++) { ++ if (strcasecmp(arg, prog->type) == 0) { ++ break; ++ } ++ } ++ if (prog->type == NULL) { + msg_perr("Error: Invalid device type specified.\n"); + free(arg); + return 1; + } ++ free(arg); + } +- free(arg); +- switch (rayer_type) { +- case TYPE_RAYER: +- msg_pdbg("Using RayeR SPIPGM pinout.\n"); +- /* Bits for master->slave direction */ +- rayer_cs_bit = 5; +- rayer_sck_bit = 6; +- rayer_mosi_bit = 7; +- /* Bits for slave->master direction */ +- rayer_miso_bit = 6; +- break; +- case TYPE_XILINX_DLC5: +- msg_pdbg("Using Xilinx Parallel Cable III (DLC 5) pinout.\n"); +- /* Bits for master->slave direction */ +- rayer_cs_bit = 2; +- rayer_sck_bit = 1; +- rayer_mosi_bit = 0; +- /* Bits for slave->master direction */ +- rayer_miso_bit = 4; +- } ++ msg_pinfo("Using %s pinout.\n", prog->description); ++ pinout = (struct rayer_pinout *)prog->dev_data; + + if (rget_io_perms()) + return 1; +@@ -175,12 +223,60 @@ int rayer_spi_init(void) + /* Get the initial value before writing to any line. */ + lpt_outbyte = INB(lpt_iobase); + ++ if (pinout->shutdown) ++ register_shutdown(pinout->shutdown, (void*)pinout); ++ if (pinout->preinit) ++ pinout->preinit(pinout); ++ + if (bitbang_spi_init(&bitbang_spi_master_rayer)) + return 1; + + return 0; + } + ++static void byteblaster_preinit(const void *data){ ++ msg_pdbg("byteblaster_preinit\n"); ++ /* Assert #EN signal. */ ++ OUTB(2, lpt_iobase + 2 ); ++} ++ ++static int byteblaster_shutdown(void *data){ ++ msg_pdbg("byteblaster_shutdown\n"); ++ /* De-Assert #EN signal. */ ++ OUTB(0, lpt_iobase + 2 ); ++ return 0; ++} ++ ++static void stk200_preinit(const void *data) { ++ msg_pdbg("stk200_init\n"); ++ /* Assert #EN signals, set LED signal. */ ++ lpt_outbyte = (1 << 6) ; ++ OUTB(lpt_outbyte, lpt_iobase); ++} ++ ++static int stk200_shutdown(void *data) { ++ msg_pdbg("stk200_shutdown\n"); ++ /* Assert #EN signals, clear LED signal. */ ++ lpt_outbyte = (1 << 2) | (1 << 3); ++ OUTB(lpt_outbyte, lpt_iobase); ++ return 0; ++} ++ ++static void dlc5_preinit(const void *data) { ++ msg_pdbg("dlc5_preinit\n"); ++ /* Assert pin 6 to receive MISO. */ ++ lpt_outbyte |= (1<<4); ++ OUTB(lpt_outbyte, lpt_iobase); ++} ++ ++static int dlc5_shutdown(void *data) { ++ msg_pdbg("dlc5_shutdown\n"); ++ /* De-assert pin 6 to force MISO low. */ ++ lpt_outbyte &= ~(1<<4); ++ OUTB(lpt_outbyte, lpt_iobase); ++ return 0; ++} ++ + #else + #error PCI port I/O access is not supported on this architecture yet. + #endif +diff --git a/satamv.c b/satamv.c +index c3f27e7..e03508e 100644 +--- a/satamv.c ++++ b/satamv.c +@@ -57,12 +57,6 @@ static const struct par_programmer par_programmer_satamv = { + .chip_writen = fallback_chip_writen, + }; + +-static int satamv_shutdown(void *data) +-{ +- physunmap(mv_bar, 0x20000); +- return 0; +-} +- + /* + * Random notes: + * FCE# Flash Chip Enable +@@ -94,11 +88,11 @@ int satamv_init(void) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); +- if (mv_bar == ERROR_PTR) ++ if (!addr) + return 1; + +- if (register_shutdown(satamv_shutdown, NULL)) ++ mv_bar = rphysmap("Marvell 88SX7042 registers", addr, 0x20000); ++ if (mv_bar == ERROR_PTR) + return 1; + + tmp = pci_mmio_readl(mv_bar + FLASH_PARAM); +@@ -144,12 +138,15 @@ int satamv_init(void) + pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL); + + /* Get I/O BAR location. */ +- tmp = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); ++ addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); ++ if (!addr) ++ return 1; ++ + /* Truncate to reachable range. + * FIXME: Check if the I/O BAR is actually reachable. + * This is an arch specific check. + */ +- mv_iobar = tmp & 0xffff; ++ mv_iobar = addr & 0xffff; + msg_pspew("Activating I/O BAR at 0x%04x\n", mv_iobar); + + /* 512 kByte with two 8-bit latches, and +diff --git a/satasii.c b/satasii.c +index 72e35e5..83dc62c 100644 +--- a/satasii.c ++++ b/satasii.c +@@ -54,12 +54,6 @@ static const struct par_programmer par_programmer_satasii = { + .chip_writen = fallback_chip_writen, + }; + +-static int satasii_shutdown(void *data) +-{ +- physunmap(sii_bar, SATASII_MEMMAP_SIZE); +- return 0; +-} +- + static uint32_t satasii_wait_done(void) + { + uint32_t ctrl_reg; +@@ -91,21 +85,25 @@ int satasii_init(void) + + if ((id == 0x3132) || (id == 0x3124)) { + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!addr) ++ return 1; + reg_offset = 0x70; + } else { + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5); ++ if (!addr) ++ return 1; + reg_offset = 0x50; + } + +- sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; ++ sii_bar = rphysmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE); ++ if (sii_bar == ERROR_PTR) ++ return 1; ++ sii_bar += reg_offset; + + /* Check if ROM cycle are OK. */ + if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) + msg_pwarn("Warning: Flash seems unconnected.\n"); + +- if (register_shutdown(satasii_shutdown, NULL)) +- return 1; +- + register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); + + return 0; +diff --git a/sb600spi.c b/sb600spi.c +index cb7c4ac..9523591 100644 +--- a/sb600spi.c ++++ b/sb600spi.c +@@ -57,7 +57,28 @@ static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; + static void determine_generation(struct pci_dev *dev) + { + amd_gen = CHIPSET_AMD_UNKNOWN; +- if (dev->device_id == 0x780e) { ++ msg_pdbg2("Trying to determine the generation of the SPI interface... "); ++ if (dev->device_id == 0x438d) { ++ amd_gen = CHIPSET_SB6XX; ++ msg_pdbg("SB6xx detected.\n"); ++ } else if (dev->device_id == 0x439d) { ++ struct pci_dev *smbus_dev = pci_dev_find(0x1002, 0x4385); ++ if (smbus_dev == NULL) ++ return; ++ uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); ++ if (rev >= 0x39 && rev <= 0x3D) { ++ amd_gen = CHIPSET_SB7XX; ++ msg_pdbg("SB7xx/SP5100 detected.\n"); ++ } else if (rev >= 0x40 && rev <= 0x42) { ++ amd_gen = CHIPSET_SB89XX; ++ msg_pdbg("SB8xx/SB9xx/Hudson-1 detected.\n"); ++ } else { ++ msg_pwarn("SB device found but SMBus revision 0x%02x does not match known values.\n" ++ "Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom@flashrom.org\n", ++ rev); ++ amd_gen = CHIPSET_SB89XX; ++ } ++ } else if (dev->device_id == 0x780e) { + /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) + * although they use different SPI interfaces. */ + #ifdef USE_YANGTZE_HEURISTICS +@@ -94,7 +115,11 @@ static void determine_generation(struct pci_dev *dev) + "the output of lspci -nnvx, thanks!.\n", rev); + } + #endif +- } ++ } else ++ msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" ++ "Please report this to flashrom@flashrom.org and include this log and\n" ++ "the output of lspci -nnvx, thanks!\n", ++ __func__, dev->vendor_id, dev->device_id); + } + + static void reset_internal_fifo_pointer(void) +@@ -247,10 +272,66 @@ static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt, + return 0; + } + ++struct spispeed { ++ const char *const name; ++ const uint8_t speed; ++}; ++ ++static const struct spispeed spispeeds[] = { ++ { "66 MHz", 0x00 }, ++ { "33 MHz", 0x01 }, ++ { "22 MHz", 0x02 }, ++ { "16.5 MHz", 0x03 }, ++}; ++ ++static int set_speed(struct pci_dev *dev, const struct spispeed *spispeed) ++{ ++ bool success = false; ++ uint8_t speed = spispeed->speed; ++ ++ msg_pdbg("Setting SPI clock to %s (0x%x).\n", spispeed->name, speed); ++ if (amd_gen != CHIPSET_YANGTZE) { ++ rmmio_writeb((mmio_readb(sb600_spibar + 0xd) & ~(0x3 << 4)) | (speed << 4), sb600_spibar + 0xd); ++ success = (speed == ((mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3)); ++ } ++ ++ if (!success) { ++ msg_perr("Setting SPI clock failed.\n"); ++ return 1; ++ } ++ return 0; ++} ++ ++static int handle_speed(struct pci_dev *dev) ++{ ++ uint32_t tmp; ++ int8_t spispeed_idx = 3; /* Default to 16.5 MHz */ ++ ++ /* See the chipset support matrix for SPI Base_Addr below for an explanation of the symbols used. ++ * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson234 yangtze ++ * 18 rsvd <- fastReadEnable ? <- ? SpiReadMode[0] ++ * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1] ++ */ ++ if (amd_gen != CHIPSET_YANGTZE) { ++ if (amd_gen >= CHIPSET_SB89XX && amd_gen <= CHIPSET_HUDSON234) { ++ bool fast_read = (mmio_readl(sb600_spibar + 0x00) >> 18) & 0x1; ++ msg_pdbg("Fast Reads are %sabled\n", fast_read ? "en" : "dis"); ++ if (fast_read) { ++ msg_pdbg("Disabling them temporarily.\n"); ++ rmmio_writel(mmio_readl(sb600_spibar + 0x00) & ~(0x1 << 18), ++ sb600_spibar + 0x00); ++ } ++ } ++ tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; ++ msg_pdbg("NormSpeed is %s\n", spispeeds[tmp].name); ++ } ++ return set_speed(dev, &spispeeds[spispeed_idx]); ++} ++ + static int sb600_handle_imc(struct pci_dev *dev, bool amd_imc_force) + { + /* Handle IMC everywhere but sb600 which does not have one. */ +- if (dev->device_id == 0x438d) ++ if (amd_gen == CHIPSET_SB6XX) + return 0; + + /* TODO: we should not only look at IntegratedImcPresent (LPC Dev 20, Func 3, 40h) but also at +@@ -297,9 +378,6 @@ int sb600_probe_spi(struct pci_dev *dev) + uint32_t tmp; + uint8_t reg; + bool amd_imc_force = false; +- static const char *const speed_names[4] = { +- "66/reserved", "33", "22", "16.5" +- }; + + char *arg = extract_programmer_param("amd_imc_force"); + if (arg && !strcmp(arg, "yes")) { +@@ -326,14 +404,20 @@ int sb600_probe_spi(struct pci_dev *dev) + return 0; + + /* Physical memory has to be mapped at page (4k) boundaries. */ +- sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, +- 0x1000); ++ sb600_spibar = rphysmap("SB600 SPI registers", tmp & 0xfffff000, 0x1000); ++ if (sb600_spibar == ERROR_PTR) ++ return ERROR_FATAL; ++ + /* The low bits of the SPI base address are used as offset into + * the mapped page. + */ + sb600_spibar += tmp & 0xfff; + + determine_generation(dev); ++ if (amd_gen == CHIPSET_AMD_UNKNOWN) { ++ msg_perr("Could not determine chipset generation."); ++ return ERROR_NONFATAL; ++ } + + if (amd_gen == CHIPSET_YANGTZE) { + msg_perr("SPI on Kabini/Temash and newer chipsets are not yet supported.\n" +@@ -341,34 +425,87 @@ int sb600_probe_spi(struct pci_dev *dev) + return ERROR_NONFATAL; + } + +- tmp = pci_read_long(dev, 0xa0); +- msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, " +- "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, +- (tmp & 0x4) >> 2); +- tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2; +- msg_pdbg("PrefetchEnSPIFromIMC=%i, ", tmp); +- +- tmp = pci_read_byte(dev, 0xbb); +- /* FIXME: Set bit 3,6,7 if not already set. +- * Set bit 5, otherwise SPI accesses are pointless in LPC mode. +- * See doc 42413 AMD SB700/710/750 RPR. ++ /* How to read the following table and similar ones in this file: ++ * "?" means we have no datasheet for this chipset generation or it doesn't have any relevant info. ++ * "<-" means the bit/register meaning is identical to the next non-"?" chipset to the left. "<-" thus ++ * never refers to another "?". ++ * If a "?" chipset is between two chipsets with identical meaning, we assume the meaning didn't change ++ * twice in between, i.e. the meaning is unchanged for the "?" chipset. Usually we assume that ++ * succeeding hardware supports the same functionality as its predecessor unless proven different by ++ * tests or documentation, hence "?" will often be implemented equally to "<-". ++ * ++ * Chipset support matrix for SPI Base_Addr (LPC PCI reg 0xa0) ++ * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson2+ yangtze ++ * 3 rsvd <- <- ? <- ? RouteTpm2Spi ++ * 2 rsvd AbortEnable rsvd ? <- ? <- ++ * 1 rsvd SpiRomEnable <- ? <- ? <- ++ * 0 rsvd AltSpiCSEnable rsvd ? <- ? <- + */ +- msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", +- tmp & 0x1, (tmp & 0x20) >> 5); +- tmp = mmio_readl(sb600_spibar); +- /* FIXME: If SpiAccessMacRomEn or SpiHostAccessRomEn are zero on +- * SB700 or later, reads and writes will be corrupted. Abort in this +- * case. Make sure to avoid this check on SB600. ++ if (amd_gen >= CHIPSET_SB7XX) { ++ tmp = pci_read_long(dev, 0xa0); ++ msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); ++ if (amd_gen == CHIPSET_SB7XX) ++ msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); ++ ++ tmp = pci_read_byte(dev, 0xba); ++ msg_pdbg(", PrefetchEnSPIFromIMC=%i", (tmp & 0x4) >> 2); ++ ++ tmp = pci_read_byte(dev, 0xbb); ++ /* FIXME: Set bit 3,6,7 if not already set. ++ * Set bit 5, otherwise SPI accesses are pointless in LPC mode. ++ * See doc 42413 AMD SB700/710/750 RPR. ++ */ ++ if (amd_gen == CHIPSET_SB7XX) ++ msg_pdbg(", SpiOpEnInLpcMode=%i", (tmp >> 5) & 0x1); ++ msg_pdbg(", PrefetchEnSPIFromHost=%i\n", tmp & 0x1); ++ } ++ ++ /* Chipset support matrix for SPI_Cntrl0 (spibar + 0x0) ++ * See the chipset support matrix for SPI Base_Addr above for an explanation of the symbols used. ++ * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson2+ yangtze ++ * 17 rsvd <- <- ? <- ? <- ++ * 18 rsvd <- fastReadEnable<1> ? <- ? SpiReadMode[0]<1> ++ * 19 SpiArbEnable <- <- ? <- ? <- ++ * 20 (FifoPtrClr) <- <- ? <- ? <- ++ * 21 (FifoPtrInc) <- <- ? <- ? IllegalAccess ++ * 22 SpiAccessMacRomEn <- <- ? <- ? <- ++ * 23 SpiHostAccessRomEn <- <- ? <- ? <- ++ * 24:26 ArbWaitCount <- <- ? <- ? <- ++ * 27 SpiBridgeDisable <- <- ? <- ? rsvd ++ * 28 rsvd DropOneClkOnRd = SPIClkGate ? <- ? <- ++ * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1]<1> ++ * 31 rsvd <- SpiBusy ? <- ? <- ++ * ++ * <1> see handle_speed + */ +- msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " +- "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " +- "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", +- tmp, (tmp >> 18) & 0x1, +- (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, +- (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, +- (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); +- tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; +- msg_pdbg("NormSpeed is %s MHz\n", speed_names[tmp]); ++ tmp = mmio_readl(sb600_spibar + 0x00); ++ msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); ++ ++ msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", ++ (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); ++ ++ if (amd_gen != CHIPSET_YANGTZE) ++ msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1); ++ ++ switch (amd_gen) { ++ case CHIPSET_SB7XX: ++ msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1); ++ case CHIPSET_SB89XX: ++ case CHIPSET_HUDSON234: ++ msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); ++ default: break; ++ } ++ msg_pdbg("\n"); ++ ++ if (((tmp >> 22) & 0x1) == 0 || ((tmp >> 23) & 0x1) == 0) { ++ msg_perr("ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.\n"); ++ return ERROR_NONFATAL; ++ } ++ ++ if (amd_gen >= CHIPSET_SB89XX) { ++ tmp = mmio_readb(sb600_spibar + 0x1D); ++ msg_pdbg("Using SPI_CS%d\n", tmp & 0x3); ++ } + + /* Look for the SMBus device. */ + smbus_dev = pci_dev_find(0x1002, 0x4385); +@@ -409,6 +546,9 @@ int sb600_probe_spi(struct pci_dev *dev) + return 0; + } + ++ if (handle_speed(dev) != 0) ++ return ERROR_FATAL; ++ + if (sb600_handle_imc(dev, amd_imc_force) != 0) + return ERROR_FATAL; + +diff --git a/serial.c b/serial.c +index 1b394cd..126079a 100644 +--- a/serial.c ++++ b/serial.c +@@ -41,12 +41,6 @@ + + fdtype sp_fd = SER_INV_FD; + +-void __attribute__((noreturn)) sp_die(char *msg) +-{ +- perror(msg); +- exit(1); +-} +- + #ifdef _WIN32 + struct baudentry { + DWORD flag; +@@ -158,35 +152,18 @@ static void msg_perr_strerror(const char *msg) + #endif + } + +-fdtype sp_openserport(char *dev, unsigned int baud) ++int serialport_config(fdtype fd, unsigned int baud) + { +-#ifdef _WIN32 +- HANDLE fd; +- char *dev2 = dev; +- if ((strlen(dev) > 3) && +- (tolower((unsigned char)dev[0]) == 'c') && +- (tolower((unsigned char)dev[1]) == 'o') && +- (tolower((unsigned char)dev[2]) == 'm')) { +- dev2 = malloc(strlen(dev) + 5); +- if (!dev2) { +- msg_perr_strerror("Out of memory: "); +- return SER_INV_FD; +- } +- strcpy(dev2, "\\\\.\\"); +- strcpy(dev2 + 4, dev); +- } +- fd = CreateFile(dev2, GENERIC_READ | GENERIC_WRITE, 0, NULL, +- OPEN_EXISTING, 0, NULL); +- if (dev2 != dev) +- free(dev2); +- if (fd == INVALID_HANDLE_VALUE) { +- msg_perr_strerror("Cannot open serial port: "); +- return SER_INV_FD; ++ if (fd == SER_INV_FD) { ++ msg_perr("%s: File descriptor is invalid.\n", __func__); ++ return 1; + } ++ ++#ifdef _WIN32 + DCB dcb; + if (!GetCommState(fd, &dcb)) { + msg_perr_strerror("Could not fetch original serial port configuration: "); +- goto out_close; ++ return 1; + } + const struct baudentry *entry = round_baud(baud); + dcb.BaudRate = entry->flag; +@@ -195,35 +172,25 @@ fdtype sp_openserport(char *dev, unsigned int baud) + dcb.StopBits = ONESTOPBIT; + if (!SetCommState(fd, &dcb)) { + msg_perr_strerror("Could not change serial port configuration: "); +- goto out_close; ++ return 1; + } + if (!GetCommState(fd, &dcb)) { + msg_perr_strerror("Could not fetch new serial port configuration: "); +- goto out_close; ++ return 1; + } + msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); +- return fd; +-out_close: +- CloseHandle(sp_fd); +- return SER_INV_FD; + #else + struct termios wanted, observed; +- int fd; +- fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); +- if (fd < 0) { +- msg_perr_strerror("Cannot open serial port: "); +- return SER_INV_FD; +- } + fcntl(fd, F_SETFL, 0); + if (tcgetattr(fd, &observed) != 0) { + msg_perr_strerror("Could not fetch original serial port configuration: "); +- goto out_close; ++ return 1; + } + wanted = observed; + const struct baudentry *entry = round_baud(baud); + if (cfsetispeed(&wanted, entry->flag) != 0 || cfsetospeed(&wanted, entry->flag) != 0) { + msg_perr_strerror("Could not set serial baud rate: "); +- goto out_close; ++ return 1; + } + wanted.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); + wanted.c_cflag |= (CS8 | CLOCAL | CREAD); +@@ -232,11 +199,11 @@ out_close: + wanted.c_oflag &= ~OPOST; + if (tcsetattr(fd, TCSANOW, &wanted) != 0) { + msg_perr_strerror("Could not change serial port configuration: "); +- goto out_close; ++ return 1; + } + if (tcgetattr(fd, &observed) != 0) { + msg_perr_strerror("Could not fetch new serial port configuration: "); +- goto out_close; ++ return 1; + } + if (observed.c_cflag != wanted.c_cflag || + observed.c_lflag != wanted.c_lflag || +@@ -244,14 +211,54 @@ out_close: + observed.c_oflag != wanted.c_oflag || + cfgetispeed(&observed) != cfgetispeed(&wanted)) { + msg_perr("%s: Some requested options did not stick.\n", __func__); +- goto out_close; ++ return 1; + } +- msg_pdbg("Baud rate is %d.\n", entry->baud); +- return fd; ++ msg_pdbg("Baud rate is %d now.\n", entry->baud); ++#endif ++ return 0; ++} + +-out_close: +- close(sp_fd); +- return SER_INV_FD; ++fdtype sp_openserport(char *dev, unsigned int baud) ++{ ++ fdtype fd; ++#ifdef _WIN32 ++ char *dev2 = dev; ++ if ((strlen(dev) > 3) && ++ (tolower((unsigned char)dev[0]) == 'c') && ++ (tolower((unsigned char)dev[1]) == 'o') && ++ (tolower((unsigned char)dev[2]) == 'm')) { ++ dev2 = malloc(strlen(dev) + 5); ++ if (!dev2) { ++ msg_perr_strerror("Out of memory: "); ++ return SER_INV_FD; ++ } ++ strcpy(dev2, "\\\\.\\"); ++ strcpy(dev2 + 4, dev); ++ } ++ fd = CreateFile(dev2, GENERIC_READ | GENERIC_WRITE, 0, NULL, ++ OPEN_EXISTING, 0, NULL); ++ if (dev2 != dev) ++ free(dev2); ++ if (fd == INVALID_HANDLE_VALUE) { ++ msg_perr_strerror("Cannot open serial port: "); ++ return SER_INV_FD; ++ } ++ if (serialport_config(fd, baud) != 0) { ++ CloseHandle(fd); ++ return SER_INV_FD; ++ } ++ return fd; ++#else ++ fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); ++ if (fd < 0) { ++ msg_perr_strerror("Cannot open serial port: "); ++ return SER_INV_FD; ++ } ++ if (serialport_config(fd, baud) != 0) { ++ close(fd); ++ return SER_INV_FD; ++ } ++ return fd; + #endif + } + +@@ -350,7 +357,7 @@ int serialport_write(unsigned char *buf, unsigned int writecnt) + if (!tmp) { + msg_pdbg2("Empty write\n"); + empty_writes--; +- programmer_delay(500); ++ internal_delay(500); + if (empty_writes == 0) { + msg_perr("Serial port is unresponsive!\n"); + return 1; +diff --git a/serprog.c b/serprog.c +index 3476315..35c4f32 100644 +--- a/serprog.c ++++ b/serprog.c +@@ -100,6 +100,7 @@ static int sp_opensocket(char *ip, unsigned int port) + if (NULL == hostPtr) { + hostPtr = gethostbyaddr(ip, strlen(ip), AF_INET); + if (NULL == hostPtr) { ++ close(sock); + msg_perr("Error: cannot resolve %s\n", ip); + return -1; + } +@@ -114,7 +115,11 @@ static int sp_opensocket(char *ip, unsigned int port) + } + /* We are latency limited, and sometimes do write-write-read * + * (write-n) - so enable TCP_NODELAY. */ +- setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &flag, sizeof(int)); ++ if (setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &flag, sizeof(int))) { ++ close(sock); ++ msg_perr("Error: serprog cannot set socket options: %s\n", strerror(errno)); ++ return -1; ++ } + return sock; + } + #endif +@@ -237,43 +242,58 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, + return 0; + } + +-static void sp_flush_stream(void) ++static int sp_flush_stream(void) + { + if (sp_streamed_transmit_ops) + do { + unsigned char c; + if (serialport_read(&c, 1) != 0) { +- sp_die("Error: cannot read from device (flushing stream)"); ++ msg_perr("Error: cannot read from device (flushing stream)"); ++ return 1; + } + if (c == S_NAK) { + msg_perr("Error: NAK to a stream buffer operation\n"); +- exit(1); ++ return 1; + } + if (c != S_ACK) { + msg_perr("Error: Invalid reply 0x%02X from device\n", c); +- exit(1); ++ return 1; + } + } while (--sp_streamed_transmit_ops); + sp_streamed_transmit_ops = 0; + sp_streamed_transmit_bytes = 0; ++ return 0; + } + +-static int sp_stream_buffer_op(uint8_t cmd, uint32_t parmlen, uint8_t * parms) ++static int sp_stream_buffer_op(uint8_t cmd, uint32_t parmlen, uint8_t *parms) + { + uint8_t *sp; + if (sp_automatic_cmdcheck(cmd)) + return 1; ++ + sp = malloc(1 + parmlen); +- if (!sp) sp_die("Error: cannot malloc command buffer"); ++ if (!sp) { ++ msg_perr("Error: cannot malloc command buffer\n"); ++ return 1; ++ } + sp[0] = cmd; + memcpy(&(sp[1]), parms, parmlen); +- if (sp_streamed_transmit_bytes >= (1 + parmlen + sp_device_serbuf_size)) +- sp_flush_stream(); +- if (serialport_write(sp, 1 + parmlen) != 0) +- sp_die("Error: cannot write command"); +- free(sp); ++ ++ if (sp_streamed_transmit_bytes >= (1 + parmlen + sp_device_serbuf_size)) { ++ if (sp_flush_stream() != 0) { ++ free(sp); ++ return 1; ++ } ++ } ++ if (serialport_write(sp, 1 + parmlen) != 0) { ++ msg_perr("Error: cannot write command\n"); ++ free(sp); ++ return 1; ++ } + sp_streamed_transmit_ops += 1; + sp_streamed_transmit_bytes += 1 + parmlen; ++ ++ free(sp); + return 0; + } + +@@ -656,16 +676,16 @@ int serprog_init(void) + return 0; + } + +-/* Move an in flashrom buffer existing write-n operation to * +- * the on-device operation buffer. */ +-static void sp_pass_writen(void) ++/* Move an in flashrom buffer existing write-n operation to the on-device operation buffer. */ ++static int sp_pass_writen(void) + { + unsigned char header[7]; +- msg_pspew(MSGHEADER "Passing write-n bytes=%d addr=0x%x\n", +- sp_write_n_bytes, sp_write_n_addr); +- if (sp_streamed_transmit_bytes >= +- (7 + sp_write_n_bytes + sp_device_serbuf_size)) +- sp_flush_stream(); ++ msg_pspew(MSGHEADER "Passing write-n bytes=%d addr=0x%x\n", sp_write_n_bytes, sp_write_n_addr); ++ if (sp_streamed_transmit_bytes >= (7 + sp_write_n_bytes + sp_device_serbuf_size)) { ++ if (sp_flush_stream() != 0) { ++ return 1; ++ } ++ } + /* In case it's just a single byte send it as a single write. */ + if (sp_write_n_bytes == 1) { + sp_write_n_bytes = 0; +@@ -673,9 +693,10 @@ static void sp_pass_writen(void) + header[1] = (sp_write_n_addr >> 8) & 0xFF; + header[2] = (sp_write_n_addr >> 16) & 0xFF; + header[3] = sp_write_n_buf[0]; +- sp_stream_buffer_op(S_CMD_O_WRITEB, 4, header); ++ if (sp_stream_buffer_op(S_CMD_O_WRITEB, 4, header) != 0) ++ return 1; + sp_opbuf_usage += 5; +- return; ++ return 0; + } + header[0] = S_CMD_O_WRITEN; + header[1] = (sp_write_n_bytes >> 0) & 0xFF; +@@ -684,39 +705,55 @@ static void sp_pass_writen(void) + header[4] = (sp_write_n_addr >> 0) & 0xFF; + header[5] = (sp_write_n_addr >> 8) & 0xFF; + header[6] = (sp_write_n_addr >> 16) & 0xFF; +- if (serialport_write(header, 7) != 0) +- sp_die("Error: cannot write write-n command\n"); +- if (serialport_write(sp_write_n_buf, sp_write_n_bytes) != 0) +- sp_die("Error: cannot write write-n data"); ++ if (serialport_write(header, 7) != 0) { ++ msg_perr(MSGHEADER "Error: cannot write write-n command\n"); ++ return 1; ++ } ++ if (serialport_write(sp_write_n_buf, sp_write_n_bytes) != 0) { ++ msg_perr(MSGHEADER "Error: cannot write write-n data"); ++ return 1; ++ } + sp_streamed_transmit_bytes += 7 + sp_write_n_bytes; + sp_streamed_transmit_ops += 1; + sp_opbuf_usage += 7 + sp_write_n_bytes; + sp_write_n_bytes = 0; + sp_prev_was_write = 0; ++ return 0; + } + +-static void sp_execute_opbuf_noflush(void) ++static int sp_execute_opbuf_noflush(void) + { +- if ((sp_max_write_n) && (sp_write_n_bytes)) +- sp_pass_writen(); +- sp_stream_buffer_op(S_CMD_O_EXEC, 0, NULL); +- msg_pspew(MSGHEADER "Executed operation buffer of %d bytes\n", +- sp_opbuf_usage); ++ if ((sp_max_write_n) && (sp_write_n_bytes)) { ++ if (sp_pass_writen() != 0) { ++ msg_perr("Error: could not transfer write buffer\n"); ++ return 1; ++ } ++ } ++ if (sp_stream_buffer_op(S_CMD_O_EXEC, 0, NULL) != 0) { ++ msg_perr("Error: could not execute command buffer\n"); ++ return 1; ++ } ++ msg_pspew(MSGHEADER "Executed operation buffer of %d bytes\n", sp_opbuf_usage); + sp_opbuf_usage = 0; + sp_prev_was_write = 0; +- return; ++ return 0; + } + +-static void sp_execute_opbuf(void) ++static int sp_execute_opbuf(void) + { +- sp_execute_opbuf_noflush(); +- sp_flush_stream(); ++ if (sp_execute_opbuf_noflush() != 0) ++ return 1; ++ if (sp_flush_stream() != 0) ++ return 1; ++ ++ return 0; + } + + static int serprog_shutdown(void *data) + { + if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) +- sp_execute_opbuf(); ++ if (sp_execute_opbuf() != 0) ++ msg_pwarn("Could not flush command buffer.\n"); + if (sp_check_commandavail(S_CMD_S_PIN_STATE)) { + uint8_t dis = 0; + if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0) +@@ -731,14 +768,15 @@ static int serprog_shutdown(void *data) + return 0; + } + +-static void sp_check_opbuf_usage(int bytes_to_be_added) ++static int sp_check_opbuf_usage(int bytes_to_be_added) + { + if (sp_device_opbuf_size <= (sp_opbuf_usage + bytes_to_be_added)) { +- sp_execute_opbuf(); +- /* If this happens in the mid of an page load the page load * +- * will probably fail. */ +- msg_pdbg(MSGHEADER "Warning: executed operation buffer due to size reasons\n"); ++ /* If this happens in the middle of a page load the page load will probably fail. */ ++ msg_pwarn(MSGHEADER "Warning: executed operation buffer due to size reasons\n"); ++ if (sp_execute_opbuf() != 0) ++ return 1; + } ++ return 0; + } + + static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, +@@ -768,7 +806,7 @@ static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, + writeb_parm[1] = (addr >> 8) & 0xFF; + writeb_parm[2] = (addr >> 16) & 0xFF; + writeb_parm[3] = val; +- sp_stream_buffer_op(S_CMD_O_WRITEB, 4, writeb_parm); ++ sp_stream_buffer_op(S_CMD_O_WRITEB, 4, writeb_parm); // FIXME: return error + sp_opbuf_usage += 5; + } + } +@@ -785,16 +823,16 @@ static uint8_t serprog_chip_readb(const struct flashctx *flash, + buf[0] = ((addr >> 0) & 0xFF); + buf[1] = ((addr >> 8) & 0xFF); + buf[2] = ((addr >> 16) & 0xFF); +- sp_stream_buffer_op(S_CMD_R_BYTE, 3, buf); +- sp_flush_stream(); ++ sp_stream_buffer_op(S_CMD_R_BYTE, 3, buf); // FIXME: return error ++ sp_flush_stream(); // FIXME: return error + if (serialport_read(&c, 1) != 0) +- sp_die("readb byteread"); ++ msg_perr(MSGHEADER "readb byteread"); // FIXME: return error + msg_pspew("%s addr=0x%" PRIxPTR " returning 0x%02X\n", __func__, addr, c); + return c; + } + + /* Local version that really does the job, doesn't care of max_read_n. */ +-static void sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) ++static int sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) + { + unsigned char sbuf[6]; + msg_pspew("%s: addr=0x%" PRIxPTR " len=%zu\n", __func__, addr, len); +@@ -808,10 +846,13 @@ static void sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) + sbuf[4] = ((len >> 8) & 0xFF); + sbuf[5] = ((len >> 16) & 0xFF); + sp_stream_buffer_op(S_CMD_R_NBYTES, 6, sbuf); +- sp_flush_stream(); +- if (serialport_read(buf, len) != 0) +- sp_die("Error: cannot read read-n data"); +- return; ++ if (sp_flush_stream() != 0) ++ return 1; ++ if (serialport_read(buf, len) != 0) { ++ msg_perr(MSGHEADER "Error: cannot read read-n data"); ++ return 1; ++ } ++ return 0; + } + + /* The externally called version that makes sure that max_read_n is obeyed. */ +@@ -821,12 +862,12 @@ static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf, + size_t lenm = len; + chipaddr addrm = addr; + while ((sp_max_read_n != 0) && (lenm > sp_max_read_n)) { +- sp_do_read_n(&(buf[addrm-addr]), addrm, sp_max_read_n); ++ sp_do_read_n(&(buf[addrm-addr]), addrm, sp_max_read_n); // FIXME: return error + addrm += sp_max_read_n; + lenm -= sp_max_read_n; + } + if (lenm) +- sp_do_read_n(&(buf[addrm-addr]), addrm, lenm); ++ sp_do_read_n(&(buf[addrm-addr]), addrm, lenm); // FIXME: return error + } + + void serprog_delay(int usecs) +@@ -858,11 +899,18 @@ static int serprog_spi_send_command(struct flashctx *flash, + unsigned char *parmbuf; + int ret; + msg_pspew("%s, writecnt=%i, readcnt=%i\n", __func__, writecnt, readcnt); +- if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) +- sp_execute_opbuf(); ++ if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) { ++ if (sp_execute_opbuf() != 0) { ++ msg_perr("Error: could not execute command buffer before sending SPI commands.\n"); ++ return 1; ++ } ++ } ++ + parmbuf = malloc(writecnt + 6); +- if (!parmbuf) +- sp_die("Error: cannot malloc SPI send param buffer"); ++ if (!parmbuf) { ++ msg_perr("Error: could not allocate SPI send param buffer.\n"); ++ return 1; ++ } + parmbuf[0] = (writecnt >> 0) & 0xFF; + parmbuf[1] = (writecnt >> 8) & 0xFF; + parmbuf[2] = (writecnt >> 16) & 0xFF; +@@ -879,8 +927,7 @@ static int serprog_spi_send_command(struct flashctx *flash, + /* FIXME: This function is optimized so that it does not split each transaction + * into chip page_size long blocks unnecessarily like spi_read_chunked. This has + * the advantage that it is much faster for most chips, but breaks those with +- * non-contiguous address space (like AT45DB161D). When spi_read_chunked is +- * fixed this method can be removed. */ ++ * non-continuous reads. When spi_read_chunked is fixed this method can be removed. */ + static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len) + { +diff --git a/spi25.c b/spi25.c +index e001196..862a865 100644 +--- a/spi25.c ++++ b/spi25.c +@@ -679,7 +679,7 @@ int spi_block_erase_20(struct flashctx *flash, unsigned int addr, + + result = spi_send_multicommand(flash, cmds); + if (result) { +- msg_cerr("%s failed during command execution at address 0x%x\n", ++ msg_pdbg("%s failed during command execution at address 0x%x\n", + __func__, addr); + return result; + } +@@ -1128,13 +1128,9 @@ int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int sta + + + result = spi_send_multicommand(flash, cmds); +- if (result) { +- msg_cerr("%s failed during start command execution\n", +- __func__); +- /* FIXME: Should we send WRDI here as well to make sure the chip +- * is not in AAI mode? +- */ +- return result; ++ if (result != 0) { ++ msg_cerr("%s failed during start command execution: %d\n", __func__, result); ++ goto bailout; + } + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(10); +@@ -1146,16 +1142,21 @@ int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int sta + while (pos < start + len - 1) { + cmd[1] = buf[pos++ - start]; + cmd[2] = buf[pos++ - start]; +- spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, +- cmd, NULL); ++ result = spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); ++ if (result != 0) { ++ msg_cerr("%s failed during followup AAI command execution: %d\n", __func__, result); ++ goto bailout; ++ } + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(10); + } + +- /* Use WRDI to exit AAI mode. This needs to be done before issuing any +- * other non-AAI command. +- */ +- spi_write_disable(flash); ++ /* Use WRDI to exit AAI mode. This needs to be done before issuing any other non-AAI command. */ ++ result = spi_write_disable(flash); ++ if (result != 0) { ++ msg_cerr("%s failed to disable AAI mode.\n", __func__); ++ return SPI_GENERIC_ERROR; ++ } + + /* Write remaining byte (if any). */ + if (pos < start + len) { +@@ -1165,4 +1166,10 @@ int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int sta + } + + return 0; ++ ++bailout: ++ result = spi_write_disable(flash); ++ if (result != 0) ++ msg_cerr("%s failed to disable AAI mode.\n", __func__); ++ return SPI_GENERIC_ERROR; + } +diff --git a/spi25_statusreg.c b/spi25_statusreg.c +index 8fb7f2d..48fceb0 100644 +--- a/spi25_statusreg.c ++++ b/spi25_statusreg.c +@@ -270,7 +270,7 @@ static void spi_prettyprint_status_register_bp(uint8_t status, int bp) + } + + /* Unnamed bits. */ +-static void spi_prettyprint_status_register_bit(uint8_t status, int bit) ++void spi_prettyprint_status_register_bit(uint8_t status, int bit) + { + msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); + } +diff --git a/stm50.c b/stm50.c +new file mode 100644 +index 0000000..edcfdd2 +--- /dev/null ++++ b/stm50.c +@@ -0,0 +1,115 @@ ++/* ++ * This file is part of the flashrom project. ++ * ++ * Copyright (C) 2008 Claus Gindhart ++ * Copyright (C) 2009 Sean Nelson ++ * Copyright (C) 2013 Stefan Tauner ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++/* ++ * All ST M50 chips are locked on startup. Most of them have a uniform 64 kB block layout, but some have ++ * a non-uniform block/sector segmentation which has to be handled with more care. Some of the non-uniform ++ * chips support erasing of the 4 kB sectors with another command. ++ */ ++ ++#include "flash.h" ++#include "flashchips.h" ++#include "chipdrivers.h" ++ ++static int stm50_unlock_address(struct flashctx *flash, int offset) ++{ ++ chipaddr wrprotect = flash->virtual_registers + 2; ++ static const uint8_t unlock_sector = 0x00; ++ msg_cdbg("unlocking at 0x%x\n", offset); ++ chip_writeb(flash, unlock_sector, wrprotect + offset); ++ if (chip_readb(flash, wrprotect + offset) != unlock_sector) { ++ msg_cerr("Cannot unlock address 0x%x\n", offset); ++ return -1; ++ } ++ return 0; ++} ++ ++/* Chips known to use a non-uniform block and sector layout for locking (as well as for erasing): ++ * Name Size Address range of lock registers ++ * M50FLW080A 1MB FFB00002 - FFBFF002 ++ * M50FLW080B 1MB FFB00002 - FFBFF002 ++ * M50FW002 256k FFBC0002 - FFBFC002 ++ * M50LPW116 2MB FFA00002 - FFBFC002 ++ */ ++int unlock_stm50_nonuniform(struct flashctx *flash) ++{ ++ int i; ++ struct eraseblock *eraseblocks = flash->chip->block_erasers[0].eraseblocks; ++ unsigned int done = 0; ++ for (i = 0; i < NUM_ERASEREGIONS && eraseblocks[i].count != 0; i++) { ++ unsigned int block_size = eraseblocks[i].size; ++ unsigned int block_count = eraseblocks[i].count; ++ ++ int j; ++ for (j = 0; j < block_count; j++) { ++ if (stm50_unlock_address(flash, done)) { ++ msg_cerr("UNLOCK FAILED!\n"); ++ return -1; ++ } ++ done += block_count * block_size; ++ } ++ } ++ return 0; ++} ++ ++/* Unlocking for uniform 64 kB blocks starting at offset 2 of the feature registers. */ ++int unlock_stm50_uniform(struct flashctx *flash) ++{ ++ int i; ++ for (i = 0; i < flash->chip->total_size * 1024; i+= 64 * 1024) { ++ if (stm50_unlock_address(flash, i)) { ++ msg_cerr("UNLOCK FAILED!\n"); ++ return -1; ++ } ++ } ++ return 0; ++} ++ ++static int stm50_erase_sector(struct flashctx *flash, unsigned int addr) ++{ ++ chipaddr bios = flash->virtual_memory + addr; ++ ++ // clear status register ++ chip_writeb(flash, 0x50, bios); ++ // now start it ++ chip_writeb(flash, 0x32, bios); ++ chip_writeb(flash, 0xd0, bios); ++ programmer_delay(10); ++ ++ uint8_t status = wait_82802ab(flash); ++ print_status_82802ab(status); ++ ++ return status == 0x80; ++} ++ ++/* Some ST M50* chips do support erasing of sectors. This function will derive the erase function to use from ++ * the length of the of the block. For calls that apparently do not address a sector (but a block) we just call ++ * the block erase function instead. FIXME: This duplicates the behavior of the remaining erasers for blocks and ++ * might be fixed when flashrom supports multiple functions per eraser or erasers that do erase parts of the ++ * chip only. */ ++int erase_sector_stm50(struct flashctx *flash, unsigned int addr, unsigned int len) ++{ ++ if (len == 4096) ++ return stm50_erase_sector(flash, addr); ++ else ++ return erase_block_82802ab(flash, addr, len); ++} +diff --git a/udelay.c b/udelay.c +index e3cf3e3..9d3bfc2 100644 +--- a/udelay.c ++++ b/udelay.c +@@ -90,7 +90,11 @@ void myusec_calibrate_delay(void) + unsigned long timeusec, resolution; + int i, tries = 0; + ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Calibrating delay loop... "); ++#else + msg_pinfo("Calibrating delay loop... "); ++#endif + resolution = measure_os_delay_resolution(); + if (resolution) { + msg_pdbg("OS timer resolution is %lu usecs, ", resolution); +@@ -151,7 +155,7 @@ recalibrate: + } + } + } else { +- msg_perr("delay loop is unreliable, trying to continue "); ++ msg_pdbg("delay loop is unreliable, trying to continue "); + } + + /* We're interested in the actual precision. */ +@@ -166,7 +170,11 @@ recalibrate: + timeusec = measure_delay(resolution * 4); + msg_pdbg("%ld myus = %ld us, ", resolution * 4, timeusec); + ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("OK.\n"); ++#else + msg_pinfo("OK.\n"); ++#endif + } + + /* Not very precise sleep. */ +diff --git a/util/getrevision.sh b/util/getrevision.sh +new file mode 100755 +index 0000000..709e45f +--- /dev/null ++++ b/util/getrevision.sh +@@ -0,0 +1,311 @@ ++#!/bin/sh ++# ++# This file is part of the flashrom project. ++# ++# Copyright (C) 2005 coresystems GmbH ++# Copyright (C) 2009,2010 Carl-Daniel Hailfinger ++# Copyright (C) 2010 Chromium OS Authors ++# Copyright (C) 2013 Stefan Tauner ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++# ++ ++EXIT_SUCCESS=0 ++EXIT_FAILURE=1 ++ ++# Make sure we don't get translated output ++export LC_ALL=C ++# nor local times or dates ++export TZ=UTC0 ++ ++# Helper functions ++# First argument is the path to inspect (usually optional; w/o it the whole repository will be considered) ++svn_has_local_changes() { ++ svn status "$1" | egrep '^ *[ADMR] *' >/dev/null ++} ++ ++git_has_local_changes() { ++ git update-index -q --refresh >/dev/null ++ ! git diff-index --quiet HEAD -- "$1" ++} ++ ++git_last_commit() { ++ git log --pretty=format:"%h" -1 -- "$1" ++} ++ ++svn_is_file_tracked() { ++ svn info "$1" >/dev/null 2>&1 ++} ++ ++git_is_file_tracked() { ++ git ls-files --error-unmatch -- "$1" >/dev/null 2>&1 ++} ++ ++is_file_tracked() { ++ svn_is_file_tracked "$1" || git_is_file_tracked "$1" ++} ++ ++# Tries to find a remote source for the changes committed locally. ++# This includes the URL of the remote repository including the last commit and a suitable branch name. ++# Takes one optional argument: the path to inspect ++git_url() { ++ last_commit=$(git_last_commit "$1") ++ # get all remote branches containing the last commit (excluding origin/HEAD and git-svn branches/tags) ++ branches=$(git branch -r --contains $last_commit | sed '/\//!d;/.*->.*/d;s/[\t ]*//') ++ if [ -z "$branches" ] ; then ++ echo "No remote branch contains a suitable commit">&2 ++ return ++ fi ++ ++ # find "nearest" branch ++ local mindiff=9000 ++ local target= ++ for branch in $branches ; do ++ curdiff=$(git rev-list --count $last_commit..$branch) ++ if [ $curdiff -ge $mindiff ] ; then ++ continue ++ fi ++ mindiff=$curdiff ++ target=$branch ++ done ++ ++ echo "$(git ls-remote --exit-code --get-url ${target%/*}) ${target#*/}" ++} ++ ++# Returns a string indicating where others can get the current source code (excluding uncommitted changes) ++# Takes one optional argument: the path to inspect ++scm_url() { ++ local url= ++ ++ # for a primitive VCS like subversion finding the URL is easy: there is only one upstream host ++ if svn_is_file_tracked "$1" ; then ++ url="$(svn info "$1" 2>/dev/null | ++ grep URL: | ++ sed 's/.*URL:[[:blank:]]*//;s/:\/\/.*@/:\/\//' | ++ grep ^.)" ++ elif git_is_file_tracked "$1" ; then ++ url="$(git_url "$1")" ++ else ++ return ${EXIT_FAILURE} ++ fi ++ ++ echo "${url}" ++} ++ ++# Retrieve timestamp since last modification. If the sources are pristine, ++# then the timestamp will match that of the SCM's most recent modification ++# date. ++timestamp() { ++ local t ++ ++ # date syntaxes are manifold: ++ # gnu date [-d input]... [+FORMAT] ++ # netbsd date [-ajnu] [-d date] [-r seconds] [+format] [[[[[[CC]yy]mm]dd]HH]MM[.SS]] ++ # freebsd date [-jnu] [-d dst] [-r seconds] [-f fmt date | [[[[[cc]yy]mm]dd]HH]MM[.ss]] [+format] [...] ++ # dragonflybsd date [-jnu] [-d dst] [-r seconds] [-f fmt date | [[[[[cc]yy]mm]dd]HH]MM[.ss]] [+format] [...] ++ # openbsd date [-aju] [-d dst] [-r seconds] [+format] [[[[[[cc]yy]mm]dd]HH]MM[.SS]] [...] ++ if svn_is_file_tracked "$2" ; then ++ if svn_has_local_changes "$2"; then ++ t=$(date -u "$1") ++ else ++ # No local changes, get date of the last log record. Subversion provides that in ++ # ISO 8601 format when using the --xml switch. The sed call extracts that ignoring any ++ # fractional parts started by a comma or a dot. ++ local last_commit_date="$(svn info --xml "$2"| \ ++ sed -n -e 's/\([^,\.]*\)\([\.,].*\)*Z<\/date>/\1Z/p')" ++ ++ case $(uname) in ++ # Most BSD dates do not support parsing date values from user input with -d but all of ++ # them support parsing the syntax with [[[[[[cc]yy]mm]dd]HH]MM[.ss]]. We have to ++ # transform the ISO8601 date first though. ++ NetBSD|OpenBSD|DragonFly|FreeBSD) ++ last_commit_date="$(echo ${last_commit_date} | \ ++ sed -n -e 's/\(....\)-\(..\)-\(..\)T\(..\):\(..\):\(..\)Z/\1\2\3\4\5\.\6/p')" ++ t=$(date -u -j "${last_commit_date}" "$1" 2>/dev/null);; ++ *) ++ t=$(date -u -d "${last_commit_date}" "$1" 2>/dev/null);; ++ esac ++ fi ++ elif git_is_file_tracked "$2" ; then ++ # are there local changes? ++ if git_has_local_changes "$2" ; then ++ t=$(date -u "${1}") ++ else ++ # No local changes, get date of the last commit ++ case $(uname) in ++ # Most BSD dates do not support parsing date values from user input with -d but all of ++ # them support parsing epoch seconds with -r. Thanks to git we can easily use that: ++ NetBSD|OpenBSD|DragonFly|FreeBSD) ++ t=$(date -u -r "$(git log --pretty=format:%ct -1 -- $2)" "$1" 2>/dev/null);; ++ *) ++ t=$(date -d "$(git log --pretty=format:%cD -1 -- $2)" -u "$1" 2>/dev/null);; ++ esac ++ fi ++ else ++ t=$(date -u "$1") ++ fi ++ ++ if [ -z "$t" ]; then ++ echo "Warning: Could not determine timestamp." 2>/dev/null ++ fi ++ echo "${t}" ++} ++ ++# Retrieve local SCM revision info. This is useful if we're working in a different SCM than upstream and/or ++# have local changes. ++local_revision() { ++ local r= ++ ++ if svn_is_file_tracked "$1" ; then ++ r=$(svn_has_local_changes "$1" && echo "dirty") ++ elif git_is_file_tracked "$1" ; then ++ r=$(git_last_commit "$1") ++ ++ local svn_base=$(git log --grep git-svn-id -1 --format='%h') ++ if [ "$svn_base" != "" ] ; then ++ local diff_to_svn=$(git rev-list --count ${svn_base}..${r}) ++ if [ "$diff_to_svn" -gt 0 ] ; then ++ r="$r-$diff_to_svn" ++ fi ++ fi ++ ++ if git_has_local_changes "$1" ; then ++ r="$r-dirty" ++ fi ++ else ++ return ${EXIT_FAILURE} ++ fi ++ ++ echo "${r}" ++} ++ ++# Get the upstream flashrom revision stored in SVN metadata. ++upstream_revision() { ++ local r= ++ ++ if svn_is_file_tracked "$1" ; then ++ r=$(svn info "$1" 2>/dev/null | \ ++ grep "Last Changed Rev:" | \ ++ sed -e "s/^Last Changed Rev: *//" -e "s/\([0-9]*\).*/r\1/" | \ ++ grep "r[0-9]") ++ elif git_is_file_tracked "$1" ; then ++ # If this is a "native" git-svn clone we could use git svn log: ++ # git svn log --oneline -1 | sed 's/^r//;s/[[:blank:]].*//' or even git svn find-rev ++ # but it is easier to just grep for the git-svn-id unconditionally ++ r=$(git log --grep git-svn-id -1 -- "$1" | \ ++ grep git-svn-id | \ ++ sed 's/.*@/r/;s/[[:blank:]].*//') ++ fi ++ ++ if [ -z "$r" ]; then ++ r="unknown" # default to unknown ++ fi ++ echo "${r}" ++} ++ ++show_help() { ++ echo "Usage: ++ ${0} [path] ++ ++Commands ++ -h or --help ++ this message ++ -l or --local ++ local revision information including an indicator for uncommitted changes ++ -u or --upstream ++ upstream revision ++ -U or --url ++ URL associated with the latest commit ++ -d or --date ++ date of most recent modification ++ -t or --timestamp ++ timestamp of most recent modification ++" ++ return ++} ++ ++check_action() { ++ if [ -n "$action" ]; then ++ echo "Error: Multiple actions given.">&2 ++ exit ${EXIT_FAILURE} ++ fi ++} ++ ++main() { ++ local query_path= ++ local action= ++ ++ # The is the main loop ++ while [ $# -gt 0 ]; ++ do ++ case ${1} in ++ -h|--help) ++ action=show_help; ++ shift;; ++ -l|--local) ++ check_action $1 ++ action=local_revision ++ shift;; ++ -u|--upstream) ++ check_action $1 ++ action=upstream_revision ++ shift;; ++ -U|--url) ++ check_action $1 ++ action=scm_url ++ shift;; ++ -d|--date) ++ check_action $1 ++ action="timestamp +%Y-%m-%d" # refrain from suffixing 'Z' to indicate it's UTC ++ shift;; ++ -t|--timestamp) ++ check_action $1 ++ action="timestamp +%Y-%m-%dT%H:%M:%SZ" # There is only one valid time format! ISO 8601 ++ shift;; ++ -*) ++ show_help; ++ echo "Error: Invalid option: ${1}" ++ exit ${EXIT_FAILURE};; ++ *) ++ if [ -z "$query_path" ] ; then ++ if [ ! -e "$1" ] ; then ++ echo "Error: Path \"${1}\" does not exist.">&2 ++ exit ${EXIT_FAILURE} ++ fi ++ query_path=$1 ++ else ++ echo "Warning: Ignoring over-abundant paramter: \"${1}\"">&2 ++ fi ++ shift;; ++ esac; ++ done ++ ++ # default to current directory (usually equals the whole repository) ++ if [ -z "$query_path" ] ; then ++ query_path=. ++ fi ++ if ! is_file_tracked "$query_path" ; then ++ echo "Warning: Path \"${query_path}\" is not under version control.">&2 ++ fi ++ if [ -z "$action" ] ; then ++ show_help ++ echo "Error: No actions specified" ++ exit ${EXIT_FAILURE} ++ fi ++ ++ $action "$query_path" ++} ++ ++main $@ +diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c +index c359913..dd35860 100644 +--- a/util/ich_descriptors_tool/ich_descriptors_tool.c ++++ b/util/ich_descriptors_tool/ich_descriptors_tool.c +@@ -77,12 +77,13 @@ static void dump_file(const char *prefix, const uint32_t *dump, unsigned int len + printf("Dumping %u bytes of the %s region from 0x%08x-0x%08x to %s... ", + file_len, region_names[i], base, limit, fn); + int fh = open(fn, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); +- free(fn); + if (fh < 0) { + fprintf(stderr, + "ERROR: couldn't open(%s): %s\n", fn, strerror(errno)); ++ free(fn); + exit(1); + } ++ free(fn); + + ret = write(fh, &dump[base >> 2], file_len); + if (ret != file_len) { +@@ -120,6 +121,7 @@ static void usage(char *argv[], char *error) + "\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n" + "\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n" + "\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n" ++"\t- \"avoton\",\n" + "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n" + "the GbE blob that is required to initialize the GbE are also dumped to files.\n", + argv[0], argv[0]); +@@ -197,6 +199,10 @@ int main(int argc, char *argv[]) + else if ((strcmp(csn, "7") == 0) || + (strcmp(csn, "panther") == 0)) + cs = CHIPSET_7_SERIES_PANTHER_POINT; ++#ifdef DELL_AVOTON_SUPPORT ++ else if (strcmp(csn, "avoton") == 0) ++ cs = CHIPSET_AVOTON; ++#endif + } + + ret = read_ich_descriptors_from_dump(buf, len, &desc); +diff --git a/util/z60_flashrom.rules b/util/z60_flashrom.rules +index 8456a04..948563c 100644 +--- a/util/z60_flashrom.rules ++++ b/util/z60_flashrom.rules +@@ -80,4 +80,8 @@ ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev" + # http://www.diygadget.com/tiao-usb-multi-protocol-adapter-jtag-spi-i2c-serial.html + ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="664", GROUP="plugdev" + ++# TIAO/DIYGADGET USB Multi-Protocol Adapter (TUMPA) Lite ++# http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_Lite_User's_Manual ++ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="664", GROUP="plugdev" ++ + LABEL="flashrom_rules_end" +-- +2.7.4 + diff --git a/platform/broadcom/sonic-platform-modules-dell/tools/flashrom.sh b/platform/broadcom/sonic-platform-modules-dell/tools/flashrom.sh new file mode 100755 index 00000000000..c3af65fd6d8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/tools/flashrom.sh @@ -0,0 +1,10 @@ +#!/bin/bash +export DELL_TOOLS_DIR="platform/broadcom/sonic-platform-modules-dell/tools" + +cd $DELL_TOOLS_DIR +rm -rf $DELL_TOOLS_DIR/flashrom +git clone https://github.com/flashrom/flashrom.git +cd flashrom +git checkout tags/0.9.7 +git apply ../0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch +make diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py index 497c1429ad8..2be1c8f2588 100755 --- a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py @@ -1,3 +1,3 @@ -__all__ = ["platform", "chassis", "fan", "psu"] +__all__ = ["platform", "chassis", "sfp"] from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py index 654efa3cd26..f912b806d08 100755 --- a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py @@ -11,6 +11,7 @@ try: import os from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp from sonic_platform.fan import Fan from eeprom import Eeprom except ImportError as e: @@ -29,6 +30,27 @@ class Chassis(ChassisBase): HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" HWMON_NODE = os.listdir(HWMON_DIR)[0] MAILBOX_DIR = HWMON_DIR + HWMON_NODE + EEPROM_I2C_MAPPING = { + 0: [9, 18], 1: [9, 19], 2: [9, 20], 3: [9, 21], + 4: [9, 22], 5: [9, 23], 6: [9, 24], 7: [9, 25], + 8: [8, 26], 9: [8, 27], 10: [8, 28], 11: [8, 29], + 12: [8, 31], 13: [8, 30], 14: [8, 33], 15: [8, 32], # Remapped 4 entries + 16: [7, 34], 17: [7, 35], 18: [7, 36], 19: [7, 37], + 20: [7, 38], 21: [7, 39], 22: [7, 40], 23: [7, 41], + 24: [6, 42], 25: [6, 43], 26: [6, 44], 27: [6, 45], + 28: [6, 46], 29: [6, 47], 30: [6, 48], 31: [6, 49] + } + PORT_I2C_MAPPING = { + # 0th Index = i2cLine, 1st Index = portIdx in i2cLine + 0: [14, 0], 1: [14, 1], 2: [14, 2], 3: [14, 3], + 4: [14, 4], 5: [14, 5], 6: [14, 6], 7: [14, 7], + 8: [14, 8], 9: [14, 9], 10: [14, 10], 11: [14, 11], + 12: [15, 0], 13: [15, 1], 14: [15, 2], 15: [15, 3], + 16: [15, 4], 17: [15, 5], 18: [15, 6], 19: [15, 7], + 20: [15, 8], 21: [15, 9], 22: [16, 0], 23: [16, 1], + 24: [16, 2], 25: [16, 3], 26: [16, 4], 27: [16, 5], + 28: [16, 6], 29: [16, 7], 30: [16, 8], 31: [16, 9] + } reset_reason_dict = {} reset_reason_dict[11] = ChassisBase.REBOOT_CAUSE_POWER_LOSS @@ -43,6 +65,24 @@ class Chassis(ChassisBase): power_reason_dict[44] = ChassisBase.REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED def __init__(self): + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = (PORT_END + 1) + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom" + sfp_ctrl_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/" + for index in range(0, PORTS_IN_BLOCK): + eeprom_path = eeprom_base.format(self.EEPROM_I2C_MAPPING[index][0], + self.EEPROM_I2C_MAPPING[index][1]) + sfp_control = sfp_ctrl_base.format(self.PORT_I2C_MAPPING[index][0]) + sfp_node = Sfp(index, 'QSFP', eeprom_path, sfp_control, + self.PORT_I2C_MAPPING[index][1]) + self._sfp_list.append(sfp_node) ChassisBase.__init__(self) # Initialize EEPROM @@ -152,4 +192,3 @@ def get_reboot_cause(self): return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Invalid Reason") - diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/sfp.py new file mode 120000 index 00000000000..84af7963bb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/sfp.py @@ -0,0 +1 @@ +../../s6100/sonic_platform/sfp.py \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh index 880ba98abb1..9fd925f2b90 100755 --- a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh @@ -85,6 +85,22 @@ switch_board_modsel() { python /usr/bin/pcisysfs.py --set --offset $hex --val 0x10 --res $resource > /dev/null 2>&1 done } + +# Copy led_proc_init.soc file according to the HWSKU +init_switch_port_led() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + hwsku=$(cat /etc/sonic/config_db.json | grep "hwsku" | cut -d ":" -f2 | sed 's/"//g' | sed 's/,//g'| xargs ) + + led_proc_init="$device/$platform/$hwsku/led_proc_init.soc" + # Remove old HWSKU LED file.. + rm -rf $device/$platform/led_proc_init.soc + + if [ -e $led_proc_init ] && [ ! -e $device/$platform/led_proc_init.soc ]; then + cp $led_proc_init $device/$platform/ + fi +} + init_devnum if [ "$1" == "init" ]; then @@ -98,6 +114,7 @@ if [ "$1" == "init" ]; then switch_board_qsfp_mux "new_device" switch_board_qsfp "new_device" switch_board_modsel + init_switch_port_led python /usr/bin/qsfp_irq_enable.py elif [ "$1" == "deinit" ]; then diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h index da917508878..40eba7e241a 100644 --- a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h @@ -148,14 +148,12 @@ enum cpld_attributes { MB_ID, MB_VER, CPU0_PWR_OK, - PSU_OVER_TEMP, PWR_RAIL_OVER_TEMP, CPU_DISOMIC_OVER_TEMP, DDR_OVER_TEMP, CPLD_PWR_ON_RST, CPLD_HARD_RST, CPLD_RST, - MB_PWR, MB_RST, PSU_FAN_INT, OP_MODULE_INT, @@ -167,9 +165,6 @@ enum cpld_attributes { PSU1_INT, PSU2_PWR_OK, PSU2_INT, - SYNCE_INT, - SYNCE_RST, - SYNCE_EEPROM_WP, PSU1_GREEN_LED, PSU1_RED_LED, PSU2_GREEN_LED, @@ -192,18 +187,10 @@ enum cpld_attributes { SB_VER, PLATFORM_TYPE, //SWPLD4 - SWPLD4_MAJOR_VER, - SWPLD4_MINOR_VER, - SWPLD4_SCRTCH_REG, - BMC_RST, - CPLD_LPC_RST, - CPLD_SW_RST, - MB_CPLD_RST, - BCM56970_RST, - CPLD_UPGRADE_RST, - MB_RST_CPLD, - CPU_RST_MB_OOB, - GPIO_PHY_RST, + SW_BOARD_ID1, + SW_BOARD_ID2, + SWBD_VER, + SWPLD4_VER, PSU_FAN_EVENT, CPU_THERMAL_INT, FAN_INT, @@ -334,11 +321,6 @@ static struct cpld_attribute_data attribute_data[] = { .reg = 0x08, .mask = 1 << 3, .note = "“1” =Power rail is good\n“0” = Power rail is failed" }, - [PSU_OVER_TEMP] = { - .bus = BUS0, .addr = CPUPLD_ADDR, - .reg = 0x0b, .mask = 1 << 4, - .note = "“1” = Not over temperature\n“0” = Over temperature" - }, [PWR_RAIL_OVER_TEMP] = { .bus = BUS0, .addr = CPUPLD_ADDR, .reg = 0x0b, .mask = 1 << 3, @@ -369,11 +351,6 @@ static struct cpld_attribute_data attribute_data[] = { .reg = 0x11, .mask = 1 << 0, .note = "“0” = Reset\n“1” = Normal operation" }, - [MB_PWR] = { - .bus = BUS0, .addr = CPUPLD_ADDR, - .reg = 0x12, .mask = 1 << 2, - .note = "“0” = Power rail is failed\n“1” =Power rail is good" - }, [MB_RST] = { .bus = BUS0, .addr = CPUPLD_ADDR, .reg = 0x12, .mask = 1 << 0, @@ -425,21 +402,6 @@ static struct cpld_attribute_data attribute_data[] = { .reg = 0x02, .mask = 1 << 1, .note = "‘0’ = Interrupt doesn’t occur\n‘1’ = Interrupt occurs" }, - [SYNCE_INT] = { - .bus = BUS0, .addr = SWPLD1_ADDR, - .reg = 0x12, .mask = 1 << 7, - .note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [SYNCE_RST] = { - .bus = BUS0, .addr = SWPLD1_ADDR, - .reg = 0x12, .mask = 1 << 6, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [SYNCE_EEPROM_WP] = { - .bus = BUS0, .addr = SWPLD1_ADDR, - .reg = 0x12, .mask = 1 << 5, - .note = "“1” = enables the lock-down mechanism.\n“0” = overrides the lock-down function enabling blocks to be erased or programmed using software commands." - }, [PSU1_GREEN_LED] = { .bus = BUS0, .addr = SWPLD1_ADDR, .reg = 0x13, .mask = 1 << 7, @@ -538,65 +500,25 @@ static struct cpld_attribute_data attribute_data[] = { .note = "“0x0”: 64X100G_2U\n“0x1”~”0xF” Reserved" }, //SWPLD4 - [SWPLD4_MAJOR_VER] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x00, .mask = 0xF0, - .note = "CPLD Major Version, controlled by CPLD editor." - }, - [SWPLD4_MINOR_VER] = { + [SW_BOARD_ID1] = { .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x00, .mask = 0x0F, - .note = "CPLD Minor Version, controlled by CPLD editor." + .reg = 0x00, .mask = 0xFF, + .note = "0x00" }, - [SWPLD4_SCRTCH_REG] = { + [SW_BOARD_ID2] = { .bus = BUS0, .addr = SWPLD4_ADDR, .reg = 0x01, .mask = 0xFF, - .note = "CPLD read/write test register, to provide a way to test CPLD access." - }, - [BMC_RST] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x02, .mask = 1 << 6, - .note = "“0” = Reset\n“1” = Normal operation" + .note = "Configured by PLD Editor\n0x03: AG9064" }, - [CPLD_LPC_RST] = { + [SWBD_VER] = { .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x02, .mask = 1 << 5, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [CPLD_SW_RST] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x02, .mask = 1 << 3, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [MB_CPLD_RST] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x02, .mask = 1 << 2, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [BCM56970_RST] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x02, .mask = 1 << 1, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [CPLD_UPGRADE_RST] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x03, .mask = 1 << 7, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [MB_RST_CPLD] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x03, .mask = 1 << 6, - .note = "“0” = Reset\n“1” = Normal operation" - }, - [CPU_RST_MB_OOB] = { - .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x03, .mask = 1 << 5, - .note = "“0” = Reset\n“1” = Normal operation" + .reg = 0x02, .mask = 0xFF, + .note = "Configured by external resistor\n0x01:EVT1\n0x02:EVT2\n0x03:EVT3\n0x04:EVT4\n0x10:DVT\n0x20:PVT" }, - [GPIO_PHY_RST] = { + [SWPLD4_VER] = { .bus = BUS0, .addr = SWPLD4_ADDR, - .reg = 0x03, .mask = 1 << 4, - .note = "“0” = Reset\n“1” = Normal operation" + .reg = 0x03, .mask = 0xFF, + .note = "-" }, [PSU_FAN_EVENT] = { .bus = BUS0, .addr = SWPLD4_ADDR, diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c index 75bab55d7e2..a1c275209b0 100644 --- a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c @@ -772,14 +772,12 @@ static SENSOR_DEVICE_ATTR(cpu_id, S_IRUGO, get_cpld_reg, NU static SENSOR_DEVICE_ATTR(mb_id, S_IRUGO, get_cpld_reg, NULL, MB_ID); static SENSOR_DEVICE_ATTR(mb_ver, S_IRUGO, get_cpld_reg, NULL, MB_VER); static SENSOR_DEVICE_ATTR(cpu0_pwr_ok, S_IRUGO, get_cpld_reg, NULL, CPU0_PWR_OK); -static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, get_cpld_reg, NULL, PSU_OVER_TEMP); static SENSOR_DEVICE_ATTR(pwr_rail_over_temp, S_IRUGO, get_cpld_reg, NULL, PWR_RAIL_OVER_TEMP); static SENSOR_DEVICE_ATTR(cpu_disomic_over_temp, S_IRUGO, get_cpld_reg, NULL, CPU_DISOMIC_OVER_TEMP); static SENSOR_DEVICE_ATTR(ddr_over_temp, S_IRUGO, get_cpld_reg, NULL, DDR_OVER_TEMP); static SENSOR_DEVICE_ATTR(cpld_pwr_on_rst, S_IRUGO, get_cpld_reg, NULL, CPLD_PWR_ON_RST); static SENSOR_DEVICE_ATTR(cpld_hard_rst, S_IRUGO, get_cpld_reg, NULL, CPLD_HARD_RST); static SENSOR_DEVICE_ATTR(cpld_rst, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_RST); -static SENSOR_DEVICE_ATTR(mb_pwr, S_IRUGO, get_cpld_reg, NULL, MB_PWR); static SENSOR_DEVICE_ATTR(mb_rst, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, MB_RST); static SENSOR_DEVICE_ATTR(psu_fan_int, S_IRUGO, get_cpld_reg, NULL, PSU_FAN_INT); static SENSOR_DEVICE_ATTR(op_module_int, S_IRUGO, get_cpld_reg, NULL, OP_MODULE_INT); @@ -800,14 +798,12 @@ static struct attribute *ag9064_cpld_attrs[] = { &sensor_dev_attr_mb_id.dev_attr.attr, &sensor_dev_attr_mb_ver.dev_attr.attr, &sensor_dev_attr_cpu0_pwr_ok.dev_attr.attr, - &sensor_dev_attr_psu_over_temp.dev_attr.attr, &sensor_dev_attr_pwr_rail_over_temp.dev_attr.attr, &sensor_dev_attr_cpu_disomic_over_temp.dev_attr.attr, &sensor_dev_attr_ddr_over_temp.dev_attr.attr, &sensor_dev_attr_cpld_pwr_on_rst.dev_attr.attr, &sensor_dev_attr_cpld_hard_rst.dev_attr.attr, &sensor_dev_attr_cpld_rst.dev_attr.attr, - &sensor_dev_attr_mb_pwr.dev_attr.attr, &sensor_dev_attr_mb_rst.dev_attr.attr, &sensor_dev_attr_psu_fan_int.dev_attr.attr, &sensor_dev_attr_op_module_int.dev_attr.attr, diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c index 084f0c74f24..fd17a28378a 100644 --- a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c @@ -110,7 +110,7 @@ static ssize_t get_swpld_reg(struct device *dev, struct device_attribute *dev_at case SWPLD3_MAJOR_VER ... PLATFORM_TYPE : cmd_data[1] = SWPLD3_ADDR; break; - case SWPLD4_MAJOR_VER ... FAN_EEPROM_WP : + case SW_BOARD_ID1 ... FAN_EEPROM_WP : cmd_data[1] = SWPLD4_ADDR; break; default: @@ -244,7 +244,7 @@ static ssize_t set_swpld_reg(struct device *dev, struct device_attribute *dev_at case SWPLD3_MAJOR_VER ... PLATFORM_TYPE://SWPLD3 cmd_data[1] = SWPLD3_ADDR; break; - case SWPLD4_MAJOR_VER ... FAN_EEPROM_WP://SWPLD4 + case SW_BOARD_ID1 ... FAN_EEPROM_WP://SWPLD4 cmd_data[1] = SWPLD4_ADDR; break; default: @@ -303,9 +303,6 @@ static SENSOR_DEVICE_ATTR(psu1_pwr_ok, S_IRUGO, get_swpld_reg, N static SENSOR_DEVICE_ATTR(psu1_int, S_IRUGO, get_swpld_reg, NULL, PSU1_INT); static SENSOR_DEVICE_ATTR(psu2_pwr_ok, S_IRUGO, get_swpld_reg, NULL, PSU2_PWR_OK); static SENSOR_DEVICE_ATTR(psu2_int, S_IRUGO, get_swpld_reg, NULL, PSU2_INT); -static SENSOR_DEVICE_ATTR(synce_int, S_IRUGO, get_swpld_reg, NULL, SYNCE_INT); -static SENSOR_DEVICE_ATTR(synce_rst, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SYNCE_RST); -static SENSOR_DEVICE_ATTR(synce_eeprom_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SYNCE_EEPROM_WP); static SENSOR_DEVICE_ATTR(psu1_green_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU1_GREEN_LED); static SENSOR_DEVICE_ATTR(psu1_red_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU1_RED_LED); static SENSOR_DEVICE_ATTR(psu2_green_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU2_GREEN_LED); @@ -329,29 +326,19 @@ static SENSOR_DEVICE_ATTR(sb_ver, S_IRUGO, get_swpld_reg, N static SENSOR_DEVICE_ATTR(platform_type, S_IRUGO, get_swpld_reg, NULL, PLATFORM_TYPE); //SWPLD4 -static SENSOR_DEVICE_ATTR(swpld4_major_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD4_MAJOR_VER); -static SENSOR_DEVICE_ATTR(swpld4_minor_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD4_MINOR_VER); -static SENSOR_DEVICE_ATTR(swpld4_scrtch_reg, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD4_SCRTCH_REG); -static SENSOR_DEVICE_ATTR(bmc_rst, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, BMC_RST); -static SENSOR_DEVICE_ATTR(cpld_lpc_rst, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_LPC_RST); -static SENSOR_DEVICE_ATTR(cpld_sw_rst, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_SW_RST); -static SENSOR_DEVICE_ATTR(mb_cpld_rst, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, MB_CPLD_RST); -static SENSOR_DEVICE_ATTR(bcm56970_rst, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, BCM56970_RST); - -static SENSOR_DEVICE_ATTR(cpld_upgrade_rst, S_IRUGO, get_swpld_reg, NULL, CPLD_UPGRADE_RST); -static SENSOR_DEVICE_ATTR(mb_rst_cpld, S_IRUGO, get_swpld_reg, NULL, MB_RST_CPLD); -static SENSOR_DEVICE_ATTR(cpu_rst_mb_oob, S_IRUGO, get_swpld_reg, NULL, CPU_RST_MB_OOB); -static SENSOR_DEVICE_ATTR(gpio_phy_rst, S_IRUGO, get_swpld_reg, NULL, GPIO_PHY_RST); -static SENSOR_DEVICE_ATTR(psu_fan_event, S_IRUGO, get_swpld_reg, NULL, PSU_FAN_EVENT); -static SENSOR_DEVICE_ATTR(cpu_thermal_int, S_IRUGO, get_swpld_reg, NULL, CPU_THERMAL_INT); -static SENSOR_DEVICE_ATTR(fan_int, S_IRUGO, get_swpld_reg, NULL, FAN_INT); - -static SENSOR_DEVICE_ATTR(cpld_spi_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_SPI_WP); -static SENSOR_DEVICE_ATTR(rj45_console_sel, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, RJ45_CONSOLE_SEL); -static SENSOR_DEVICE_ATTR(system_int, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SYSTEM_INT); -static SENSOR_DEVICE_ATTR(cpld_mb_rst_done, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_MB_RST_DONE); -static SENSOR_DEVICE_ATTR(mb_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, MB_PWR_OK); -static SENSOR_DEVICE_ATTR(fan_eeprom_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_EEPROM_WP); +static SENSOR_DEVICE_ATTR(sw_board_id1, S_IRUGO, get_swpld_reg, NULL, SW_BOARD_ID1); +static SENSOR_DEVICE_ATTR(sw_board_id2, S_IRUGO, get_swpld_reg, NULL, SW_BOARD_ID2); +static SENSOR_DEVICE_ATTR(swbd_ver, S_IRUGO, get_swpld_reg, NULL, SWBD_VER); +static SENSOR_DEVICE_ATTR(swpld4_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD4_VER); +static SENSOR_DEVICE_ATTR(psu_fan_event, S_IRUGO, get_swpld_reg, NULL, PSU_FAN_EVENT); +static SENSOR_DEVICE_ATTR(cpu_thermal_int, S_IRUGO, get_swpld_reg, NULL, CPU_THERMAL_INT); +static SENSOR_DEVICE_ATTR(fan_int, S_IRUGO, get_swpld_reg, NULL, FAN_INT); +static SENSOR_DEVICE_ATTR(cpld_spi_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_SPI_WP); +static SENSOR_DEVICE_ATTR(rj45_console_sel, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, RJ45_CONSOLE_SEL); +static SENSOR_DEVICE_ATTR(system_int, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SYSTEM_INT); +static SENSOR_DEVICE_ATTR(cpld_mb_rst_done, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_MB_RST_DONE); +static SENSOR_DEVICE_ATTR(mb_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, MB_PWR_OK); +static SENSOR_DEVICE_ATTR(fan_eeprom_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_EEPROM_WP); static struct attribute *swpld1_device_attrs[] = { &sensor_dev_attr_swpld1_reg_value.dev_attr.attr, @@ -363,9 +350,6 @@ static struct attribute *swpld1_device_attrs[] = { &sensor_dev_attr_psu1_int.dev_attr.attr, &sensor_dev_attr_psu2_pwr_ok.dev_attr.attr, &sensor_dev_attr_psu2_int.dev_attr.attr, - &sensor_dev_attr_synce_int.dev_attr.attr, - &sensor_dev_attr_synce_rst.dev_attr.attr, - &sensor_dev_attr_synce_eeprom_wp.dev_attr.attr, &sensor_dev_attr_psu1_green_led.dev_attr.attr, &sensor_dev_attr_psu1_red_led.dev_attr.attr, &sensor_dev_attr_psu2_green_led.dev_attr.attr, @@ -401,20 +385,10 @@ static struct attribute *swpld3_device_attrs[] = { }; static struct attribute *swpld4_device_attrs[] = { - &sensor_dev_attr_swpld4_reg_value.dev_attr.attr, - &sensor_dev_attr_swpld4_reg_addr.dev_attr.attr, - &sensor_dev_attr_swpld4_major_ver.dev_attr.attr, - &sensor_dev_attr_swpld4_minor_ver.dev_attr.attr, - &sensor_dev_attr_swpld4_scrtch_reg.dev_attr.attr, - &sensor_dev_attr_bmc_rst.dev_attr.attr, - &sensor_dev_attr_cpld_lpc_rst.dev_attr.attr, - &sensor_dev_attr_cpld_sw_rst.dev_attr.attr, - &sensor_dev_attr_mb_cpld_rst.dev_attr.attr, - &sensor_dev_attr_bcm56970_rst.dev_attr.attr, - &sensor_dev_attr_cpld_upgrade_rst.dev_attr.attr, - &sensor_dev_attr_mb_rst_cpld.dev_attr.attr, - &sensor_dev_attr_cpu_rst_mb_oob.dev_attr.attr, - &sensor_dev_attr_gpio_phy_rst.dev_attr.attr, + &sensor_dev_attr_sw_board_id1.dev_attr.attr, + &sensor_dev_attr_sw_board_id2.dev_attr.attr, + &sensor_dev_attr_swbd_ver.dev_attr.attr, + &sensor_dev_attr_swpld4_ver.dev_attr.attr, &sensor_dev_attr_psu_fan_event.dev_attr.attr, &sensor_dev_attr_cpu_thermal_int.dev_attr.attr, &sensor_dev_attr_fan_int.dev_attr.attr, diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.postinst b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.postinst new file mode 100644 index 00000000000..6044de23277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.postinst @@ -0,0 +1,19 @@ +# postinst script for ag9064 + +# Insert kernel module +depmod -a +modprobe i2c-dev +modprobe i2c-i801 +modprobe i2c-ismt +modprobe ipmi_devintf +modprobe ipmi_si ports=0xca2 +modprobe i2c-mei +modprobe i2c-mux-pca954x +modprobe at24 +modprobe optoe +modprobe delta_ag9064_platform +modprobe delta_ag9064_cpld +modprobe delta_ag9064_swpld + +#DEBHELPER# + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/Makefile new file mode 100755 index 00000000000..23e8295b902 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/Makefile @@ -0,0 +1,5 @@ +obj-m += inv_cpld.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += swps.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_cpld.c new file mode 100644 index 00000000000..8ccaf617b3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_cpld.c @@ -0,0 +1,950 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_BIOSCS_OFFSET 0x04 +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_LED_OFFSET 0x2E +#define CPLD_INT_OFFSET 0x30 +#define CPLD_INTMASK_OFFSET 0x31 +#define CPLD_INT2_OFFSET 0x32 +#define CPLD_INTMASK2_OFFSET 0x33 +#define CPLD_PSU_OFFSET 0x40 +#define CPLD_POWERSTATUS_OFFSET 0x41 +#define CPLD_PWM_OFFSET 0x50 +#define CPLD_RPM_OFFSET 0x55 +#define CPLD_FANSTATUS_OFFSET 0x69 +#define CPLD_FANLED_OFFSET 0x6B +#define CPLD_RESETBUTTONSTATUS_OFFSET 0x75 +#define CPLD_RSTCAUSE_OFFSET 0x76 +#define CPLD_WATCHDOGCOUNTER_OFFSET 0x77 +#define CPLD_WATCHDOGCONFIG_OFFSET 0x78 +#define CPLD_WATCHDOGENABLE_OFFSET 0x79 +#define CPLD_PANICCODE_OFFSET 0x7E +#define CPLD2_ADDRESS 0x33 + +#define FAN_NUM 4 +static u8 hasCPLD2 = 1; +static struct i2c_client *client2; + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + u8 diag; +}; + +/*-----------------------------------------------------------------------*/ +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ + int i; + s32 temp = 0; + + for(i=0; iuser_msg_data; + + if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) { + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + } + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + int timeout; + + //wait previous command finish at least 50msec + timeout=50; + while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); } + if(timeout==0) { return -1; } + mutex_lock(&ipmi_mutex); + mutex_lock(&ipmi2_mutex); + + if(ipmi_mh_user == NULL) { + for (i=0,rv=1; i0) { usleep_range(1000,1100);} + if(timeout==0) { + mutex_unlock(&ipmi2_mutex); + return -1; + } + else { + *result_length=ipmiresult.result_length; + memcpy(result,ipmiresult.result,*result_length); + mutex_unlock(&ipmi2_mutex); + return 0; + } + } + return 0; +} +EXPORT_SYMBOL(start_ipmi_command); + +/*-----------------------------------------------------------------------*/ +/* sysfs attributes for hwmon */ +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + + u8 byte[4] = {0,0,0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", + byte[2] & 0xf, (byte[3] & 0x1f), 2014+(byte[2] >> 4)); /* mm/dd/yyyy*/ + sprintf (buf, "%sThe PCB version is %X\n", buf, byte[0]&0xf); + sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, byte[1]>>4, byte[1]&0xf); + + if(hasCPLD2) { + mutex_lock(&data->update_lock); + cpld_i2c_read(client2, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + sprintf (buf, "%s\nThe CPLD2 release date is %02d/%02d/%d.\n", buf, + byte[2] & 0xf, (byte[3] & 0x1f), 2014+(byte[2] >> 4)); /* mm/dd/yyyy*/ + sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, byte[1]>>4, byte[1]&0xf); + } + + return strlen(buf); +} + +static char* powerstatus_str[] = { + "Failed", //0 + "Good", //1 +}; + +static ssize_t show_powerstatus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_POWERSTATUS_OFFSET, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "PGD_P5V_STBY: %s\n", powerstatus_str[(byte[0]>>7) & 0x01]); + sprintf (buf, "%sPGD_P3V3_STBY: %s\n", buf, powerstatus_str[(byte[0]>>6) & 0x01]);; + sprintf (buf, "%sPGD_P1V8_A: %s\n", buf, powerstatus_str[(byte[0]>>4) & 0x01]); + sprintf (buf, "%sPGD_P3V3_SYS: %s\n", buf, powerstatus_str[(byte[0]>>3) & 0x01]); + sprintf (buf, "%sPGD_P3V3_A: %s\n", buf, powerstatus_str[(byte[0]>>2) & 0x01]); + sprintf (buf, "%sPGD_P3V3_B: %s\n", buf, powerstatus_str[(byte[0]>>1) & 0x01]); + sprintf (buf, "%sPGD_P1V2: %s\n", buf, powerstatus_str[(byte[0]>>0) & 0x01]); + sprintf (buf, "%sPGD_P0V8_A: %s\n", buf,powerstatus_str[(byte[1]>>7) & 0x01]); + sprintf (buf, "%sPGD_P0V89_ROV: %s\n", buf, powerstatus_str[(byte[1]>>6) & 0x01]); + sprintf (buf, "%sSW_PWR_READY: %s\n", buf, powerstatus_str[(byte[1]>>3) & 0x01]); + sprintf (buf, "%sCORE_PWRGD_TO_CPLD: %s\n", buf, powerstatus_str[(byte[1]>>2) & 0x01]); + sprintf (buf, "%sCPU_STBY_PWROK: %s\n", buf, powerstatus_str[(byte[1]>>1) & 0x01]); + + return strlen(buf); +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + uint8_t ipmisend[]= { IPMI_DIAGFLAG_OFFSET, 1}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + start_ipmi_command(NETFN_OEM, CMD_GETDATA,ipmisend, 2, result, &result_len); + data->diag = (result[0] & 0x80) !=0; + return sprintf (buf, "%d\n", data->diag); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + uint8_t ipmisend[]= { IPMI_DIAGFLAG_OFFSET, 0x80}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + u8 diag = simple_strtol(buf, NULL, 10); + data->diag = diag?1:0; + if (data->diag==0) ipmisend[1] = 0x00; + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,ipmisend, 2, result, &result_len); + + return count; +} + +static char* resetbutton_str[] = { + "No press", //0 + "Reserved", //1 + "Press and hold <5s", //2 + "Press and hold >5s", //3 +}; + +static ssize_t show_resetbuttonstatus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_RESETBUTTONSTATUS_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte &=0x03; + + return sprintf (buf, "0x%02X:%s\n", byte,resetbutton_str[byte]); +} + +static char* interrupt_str[] = { + "CPU_SEN_ALERT_N", //0 + "EXT_USB_OC_N", //1 + "PS2_ALERT_N", //2 + "PS1_ALERT_N", //3 + "PLD_SEN5_ALERT_N", //4 + "PLD_SEN4_ALERT_N", //5 + "PLD_SEN3_ALERT_N", //6 + "UCD90160_TEMP_INT_N", //7 + "RSTBTN_INT_N", //8 + "WDT_IRQ_N", //9 + "RSTBTN_5s_INT_N", //10 + "Reserved" //11 +}; + +static ssize_t show_interrupt(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[4] = {0,0,0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_INT_OFFSET, 4); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "0x%02X 0x%02X:", byte[0],byte[2]); + if(byte[0]==0xff && byte[2]==0x07) sprintf (buf, "%sNone",buf); + if(!(byte[0]&0x01)) sprintf (buf, "%s%s ",buf,interrupt_str[0]); + if(!(byte[0]&0x02)) sprintf (buf, "%s%s ",buf,interrupt_str[1]); + if(!(byte[0]&0x04)) sprintf (buf, "%s%s ",buf,interrupt_str[2]); + if(!(byte[0]&0x08)) sprintf (buf, "%s%s ",buf,interrupt_str[3]); + if(!(byte[0]&0x10)) sprintf (buf, "%s%s ",buf,interrupt_str[4]); + if(!(byte[0]&0x20)) sprintf (buf, "%s%s ",buf,interrupt_str[5]); + if(!(byte[0]&0x40)) sprintf (buf, "%s%s ",buf,interrupt_str[6]); + if(!(byte[0]&0x80)) sprintf (buf, "%s%s ",buf,interrupt_str[7]); + if(!(byte[2]&0x01)) sprintf (buf, "%s%s%s ",buf,interrupt_str[8] ,(byte[3]&0x01)?"(Blocked)":""); + if(!(byte[2]&0x02)) sprintf (buf, "%s%s%s ",buf,interrupt_str[9] ,(byte[3]&0x02)?"(Blocked)":""); + if(!(byte[2]&0x04)) sprintf (buf, "%s%s%s ",buf,interrupt_str[10],(byte[3]&0x04)?"(Blocked)":""); + + return sprintf (buf, "%s\n", buf); +} + +static char* bios_str[] = { + "BIOS1", //0 + "BIOS2", //1 +}; + +static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte &= 0x01; + + return sprintf (buf, "%d:%s\n", byte,bios_str[byte]); +} + +static ssize_t set_bios_cs(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte = 0; + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + if(temp) byte |= 0x01; else byte &= ~(0x01); + cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static char* led_str[] = { + "OFF", //000 + "ON", //001 + "1 Hz", //010 + "2 Hz", //011 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + int shift = attr->index; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte = (byte >> shift) & 0x3; + + return sprintf (buf, "%d: %s\n", byte, led_str[byte]); +} + +static ssize_t set_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte = 0; + int shift = attr->index; + temp &= 0x3; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x3<update_lock); + + return count; +} + +static char* psu_str[] = { + "unpowered", //00 + "normal", //01 + "not installed", //10 + "not installed", //11 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + int shift = (attr->index == 0)?0:4; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte = (byte >> shift) & 0x3; + + return sprintf (buf, "%d:%s\n", byte, psu_str[byte]); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + u8 offset = attr->index + CPLD_PWM_OFFSET; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, &byte, offset, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n", byte); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + CPLD_PWM_OFFSET; + u8 byte = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_write(client2, &byte, offset, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 offset = attr->index*2 + CPLD_RPM_OFFSET; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, offset, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n", (byte[0]<<8 | byte[1])); +} + +static char* fantype_str[] = { + "Normal Type", //00 + "REVERSAL Type", //01 + "UNPLUGGED", //10 + "UNPLUGGED", //11 +}; + +static ssize_t show_fantype(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 offset = CPLD_FANSTATUS_OFFSET; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, offset, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + status = (((byte[0] >> attr->index) & 0x01)) | (((byte[1] >> attr->index) & 0x01)<<1); + + return sprintf(buf, "%d:%s\n",status,fantype_str[status]); +} + +static char* fanled_str[] = { + "None", //00 + "Green", //01 + "Red", //10 + "Both", //11 +}; + +static ssize_t show_fanled(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, CPLD_FANLED_OFFSET, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + status = (((byte[0] >> attr->index) & 0x01)) | (((byte[1] >> attr->index) & 0x01)<<1); + + return sprintf(buf, "%d:%s\n",status,fanled_str[status]); +} + +static ssize_t set_fanled(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte[2] = {0,0}; + u8 temp = simple_strtol(buf, NULL, 16); + int shift = attr->index; + + temp &= 0x3; + mutex_lock(&data->update_lock); + cpld_i2c_read(client2, byte, CPLD_FANLED_OFFSET, 2); + byte[0] &= ~(1<> 1) & 0x01)<update_lock); + + return count; +} + +static ssize_t set_watchdog_feed(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte=0; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + byte |= 0x02; + cpld_i2c_write(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t set_watchdog_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte=0x03; + + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_watchdog_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n",(byte&0x01)); +} + +static ssize_t set_watchdog_config(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte = simple_strtol(buf, NULL, 10); + + if (byte<6) byte=6; + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &byte, CPLD_WATCHDOGCONFIG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_watchdog_config(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGCONFIG_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d seconds\n",byte); +} + +static ssize_t show_watchdog_counter(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGCOUNTER_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d seconds\n",byte); +} + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(interrupt, S_IRUGO, show_interrupt, 0, 0); + +static SENSOR_DEVICE_ATTR(stacking_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(fan_led, S_IWUSR|S_IRUGO, show_led, set_led, 2); +static SENSOR_DEVICE_ATTR(power_led, S_IWUSR|S_IRUGO, show_led, set_led, 4); +static SENSOR_DEVICE_ATTR(service_led, S_IWUSR|S_IRUGO, show_led, set_led, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +#endif + +static SENSOR_DEVICE_ATTR(fanmodule1_type, S_IRUGO, show_fantype, 0, 0); +static SENSOR_DEVICE_ATTR(fanmodule2_type, S_IRUGO, show_fantype, 0, 1); +static SENSOR_DEVICE_ATTR(fanmodule3_type, S_IRUGO, show_fantype, 0, 2); +static SENSOR_DEVICE_ATTR(fanmodule4_type, S_IRUGO, show_fantype, 0, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fanmodule5_type, S_IRUGO, show_fantype, 0, 4); +#endif + +static SENSOR_DEVICE_ATTR(fanmodule1_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 0); +static SENSOR_DEVICE_ATTR(fanmodule2_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 1); +static SENSOR_DEVICE_ATTR(fanmodule3_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 2); +static SENSOR_DEVICE_ATTR(fanmodule4_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fanmodule5_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 4); +#endif + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(fan10_input,S_IRUGO, show_rpm, 0, 9); +#endif + +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu2, S_IRUGO, show_psu, 0, 1); +static SENSOR_DEVICE_ATTR(power_status, S_IRUGO, show_powerstatus, 0, 0); +static SENSOR_DEVICE_ATTR(resetbutton_status, S_IRUGO, show_resetbuttonstatus, 0, 0); + +static SENSOR_DEVICE_ATTR(watchdog_feed, S_IWUSR, 0, set_watchdog_feed, 0); +static SENSOR_DEVICE_ATTR(watchdog_enable, S_IWUSR|S_IRUGO, show_watchdog_enable, set_watchdog_enable, 0); +static SENSOR_DEVICE_ATTR(watchdog_config, S_IWUSR|S_IRUGO, show_watchdog_config, set_watchdog_config, 0); +static SENSOR_DEVICE_ATTR(watchdog_counter, S_IRUGO, show_watchdog_counter, 0, 0); + +static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_diag.dev_attr.attr, + + &sensor_dev_attr_stacking_led.dev_attr.attr, + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_power_led.dev_attr.attr, + &sensor_dev_attr_service_led.dev_attr.attr, + + &sensor_dev_attr_interrupt.dev_attr.attr, + + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + &sensor_dev_attr_power_status.dev_attr.attr, + &sensor_dev_attr_resetbutton_status.dev_attr.attr, + + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_fanmodule1_type.dev_attr.attr, + &sensor_dev_attr_fanmodule2_type.dev_attr.attr, + &sensor_dev_attr_fanmodule3_type.dev_attr.attr, + &sensor_dev_attr_fanmodule4_type.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fanmodule5_type.dev_attr.attr, +#endif + &sensor_dev_attr_fanmodule1_led.dev_attr.attr, + &sensor_dev_attr_fanmodule2_led.dev_attr.attr, + &sensor_dev_attr_fanmodule3_led.dev_attr.attr, + &sensor_dev_attr_fanmodule4_led.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fanmodule5_led.dev_attr.attr, +#endif + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + &sensor_dev_attr_watchdog_feed.dev_attr.attr, + &sensor_dev_attr_watchdog_enable.dev_attr.attr, + &sensor_dev_attr_watchdog_config.dev_attr.attr, + &sensor_dev_attr_watchdog_counter.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + u8 byte[5]; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + //Check CPLD2 exist or not + client2 = i2c_new_dummy(client->adapter, CPLD2_ADDRESS); + if(!client2) { + hasCPLD2 = 0; + client2 = client; + } else { + status = i2c_smbus_read_byte_data(client2, CPLD_INFO_OFFSET); + if(status<0) { + i2c_unregister_device(client2); + i2c_set_clientdata(client2, NULL); + hasCPLD2 = 0; + client2 = client; + } + } + + //Handle LED control by the driver + byte[0]=0x01; + cpld_i2c_write(client, byte, CPLD_CTL_OFFSET, 1); + cpld_i2c_write(client2, byte, CPLD_CTL_OFFSET, 1); + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &cpld_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + if(hasCPLD2) { + i2c_unregister_device(client2); + i2c_set_clientdata(client2, NULL); + } + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("jack.ting "); +MODULE_DESCRIPTION("cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_eeprom.c new file mode 100644 index 00000000000..7bb167d2e74 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D6556 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.c new file mode 100644 index 00000000000..a303527bec4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.c @@ -0,0 +1,281 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +static struct mux_obj_s *mux_head_p = NULL; + + +/* ========== MUX object functions ========== + */ +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + return 0; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + + if (!gpio_is_valid(self->gpio_num)) { + SWPS_ERR("%s: GIPO:%d isn't valid\n", __func__, self->gpio_num); + return -1; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + SWPS_ERR("%s: gpio_request fail :%d :%d\n", + __func__, err, self->gpio_num); + return -1; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PAC9548: + case MUX_RST_GPIO_69_PAC9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PAC9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + if (gpio_is_valid(mux_head_p->gpio_num)) { + gpio_free(mux_head_p->gpio_num); + } + kfree(mux_head_p); + mux_head_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +reset_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_mux_gpio(unsigned gpio){ + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_gpio(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl if HW add new features. + * (Ex: Port power-status control) + */ + mux_head_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!mux_head_p) { + SWPS_ERR("%s: kzalloc fail!\n", __func__); + return -1; + } + /* Initial MUX controller */ + if (_setup_muxctl_cb(mux_head_p, gpio) < 0){ + SWPS_ERR("%s: _setup_muxctl_cb fail!\n", __func__); + return -1; + } + if (mux_head_p->_init(mux_head_p) < 0) { + SWPS_ERR("%s: init() fail\n", __func__); + goto err_init_mux_gpio; + } + /* Setup default value */ + if (mux_head_p->_pull_high(mux_head_p) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + goto err_init_mux_gpio; + } + return 0; + +err_init_mux_gpio: + clean_mux_gpio(); + return -1; +} + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.h new file mode 100644 index 00000000000..f981a304644 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.h @@ -0,0 +1,47 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_MUX_H +#define INV_MUX_H + + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PAC9548 (48) +#define MUX_RST_GPIO_69_PAC9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PAC9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS (1) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +struct mux_obj_s { + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_gpio(void); +int reset_mux_gpio(void); +int init_mux_gpio(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_platform.c new file mode 100644 index 00000000000..42900232dca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_platform.c @@ -0,0 +1,275 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode pca9641_modes_1[] = { + {.adap_id = bus_id(2),}, +}; + +static struct pca954x_platform_mode pca9641_modes_2[] = { + {.adap_id = bus_id(5),}, +}; + +static struct pca954x_platform_mode pca9641_modes_3[] = { + {.adap_id = bus_id(3),}, +}; + +static struct pca954x_platform_mode pca9641_modes_4[] = { + {.adap_id = bus_id(4),}, +}; + +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, + {.adap_id = bus_id(66),}, {.adap_id = bus_id(67),}, + {.adap_id = bus_id(68),}, {.adap_id = bus_id(69),}, +}; + +//no i2c device driver attach to mux 7 + +static struct pca954x_platform_data pca9641_data_1 = { + .modes = pca9641_modes_1, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_2 = { + .modes = pca9641_modes_2, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_3 = { + .modes = pca9641_modes_3, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_4 = { + .modes = pca9641_modes_4, + .num_modes = 1, +}; +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"pca9641", 0, 0x76, &pca9641_data_1, 0, 0}, //PCA9641-1 + {"pca9641", 0, 0x73, &pca9641_data_3, 0, 0}, //PCA9641-3 + {"pca9641", 0, 0x09, &pca9641_data_4, 0, 0}, //PCA9641-4 +}; +static struct i2c_board_info i2c_device_info1[] __initdata = { + {"pca9641", 0, 0x0A, &pca9641_data_2, 0, 0}, //PCA9641-2 +}; +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"inv_cpld", 0, 0x77, 0, 0, 0}, //CPLD +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"tmp75", 0, 0x48, 0, 0, 0}, //CPU Board Temp + {"tmp75", 0, 0x4A, 0, 0, 0}, //Temp + {"tmp75", 0, 0x4D, 0, 0, 0}, //Temp + {"tmp75", 0, 0x4E, 0, 0, 0}, //Temp +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"pmbus", 0, 0x5A, 0, 0, 0}, //PSU1 + {"pmbus", 0, 0x5B, 0, 0, 0}, //PSU2 +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, //mux root +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info9[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info10[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info11[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info12[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {bus_id(0), ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //SMBus + {bus_id(1), ARRAY_SIZE(i2c_device_info1), i2c_device_info1 }, //pca9641-2 + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //pca9641-1 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //pca9641-3 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //pca9641-4 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux root + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux CH0 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux CH1 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux CH2 + {bus_id(9), ARRAY_SIZE(i2c_device_info9), i2c_device_info9 }, //mux CH3 + {bus_id(10),ARRAY_SIZE(i2c_device_info10), i2c_device_info10}, //mux CH4 + {bus_id(11),ARRAY_SIZE(i2c_device_info11), i2c_device_info11}, //mux CH5 + {bus_id(12),ARRAY_SIZE(i2c_device_info12), i2c_device_info12}, //mux CH6 +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct platform_device *device_i2c_gpio0; +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 58, //494, + .sda_pin = 75, //511, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j,k; + + //printk("%s \n", __func__); + + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl( inl(0x533) | (1<<2), 0x533); //i2c-gpio sdl (GPIO58) + outl( inl(0x541) | (1<<3), 0x541); //i2c-gpio sda (GPIO75) + outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7) + outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + device_i2c_gpio0 = platform_device_alloc("i2c-gpio", 1); + if (!device_i2c_gpio0) { + printk(KERN_ERR "i2c-gpio: platform_device_alloc fail\n"); + return -ENOMEM; + } + device_i2c_gpio0->name = "i2c-gpio"; + device_i2c_gpio0->id = 1; + device_i2c_gpio0->dev.platform_data = &i2c_gpio_platdata0; + + ret = platform_device_add(device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: platform_device_add fail %d\n", ret); + } + msleep(10); + for(i=0; idev.platform_data = NULL; + platform_device_unregister(device_i2c_gpio0); +} + +module_init(inv_platform_init); +module_exit(inv_platform_exit); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Platform devices"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.c new file mode 100644 index 00000000000..cbb22fba297 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.c @@ -0,0 +1,3049 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p->vendor_name); + kfree(transvr_obj_p->vendor_pn); + kfree(transvr_obj_p->vendor_rev); + kfree(transvr_obj_p->vendor_sn); + kfree(transvr_obj_p->worker_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_MAPLE: + platform_p->id = PLATFORM_SETTINGS; + for (i=0; iname, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + PLATFORM_SETTINGS); + goto err_get_platform_type_2; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_MAPLE + case PLATFORM_TYPE_MAPLE: + gpio_rest_mux = maple_gpio_rest_mux; + ioexp_layout = maple_ioexp_layout; + port_layout = maple_port_layout; + ioexp_total = ARRAY_SIZE(maple_ioexp_layout); + port_total = ARRAY_SIZE(maple_port_layout); + break; +#endif + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2;; + } + } + return 0; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_MAPLE_NABC: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_gpio(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_gpio(); +err_init_mux: + clean_port_obj(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_obj(); + clean_ioexp_objs(); + clean_mux_gpio(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.h new file mode 100644 index 00000000000..d28a0a3c968 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.h @@ -0,0 +1,1164 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.9" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_MAPLE (201) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAPLE + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE) + #define SWPS_MAPLE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_MAPLE, "Maple" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PAC9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHI_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration + * =========================================================== + */ +#ifdef SWPS_MAPLE +unsigned maple_gpio_rest_mux = 249; + +struct inv_ioexp_layout_s maple_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, +}; +#endif + +#endif /* INV_SWPS_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.c new file mode 100644 index 00000000000..4564b5855fd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.c @@ -0,0 +1,2046 @@ +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_NABC: + return &ioexp_map_cypress_nabc; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_MAPLE_NABC: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} + + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.h new file mode 100644 index 00000000000..1af909e2466 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.h @@ -0,0 +1,187 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_CYPRESS_NABC (10103) +#define IOEXP_TYPE_MAPLE_NABC (10104) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.c new file mode 100644 index 00000000000..6fe8f599fb4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.c @@ -0,0 +1,8389 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[0], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.h new file mode 100644 index 00000000000..f17b7fde71b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.h @@ -0,0 +1,815 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ +#define BCM_CHIP_TYPE_TRIDENT_3 (31003) /* Maple */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/utils/inventec_d6356_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/utils/inventec_d6356_util.py new file mode 100755 index 00000000000..e3e696c088c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/utils/inventec_d6356_util.py @@ -0,0 +1,251 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV: ', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6356]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +instantiate = [ +'echo inv_eeprom 0x55 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device' +#'echo inv_cpld 0x33 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device', +#'echo inv_cpld 0x77 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device' +] + + +drivers =[ +#kernel-dirvers +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-mux-pca9541', +'i2c-dev', +'ucd9000', +#inv-modules +'inv_eeprom', +'inv_cpld', +'inv_platform', +'monitor', +'swps'] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + #insert extra module + status, output = exec_cmd("insmod /lib/modules/3.16.0-5-amd64/extra/gpio-ich.ko gpiobase=0",1) + + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + #swps map to i2c-bus + for i in range(14,22): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(22,30): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-7/i2c-"+str(i)+"/new_device", 1) + status, output =exec_cmd("echo sff8436 0x51 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(30,38): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-8/i2c-"+str(i)+"/new_device", 1) + status, output =exec_cmd("echo sff8436 0x51 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(38,46): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-9/i2c-"+str(i)+"/new_device", 1) + status, output =exec_cmd("echo sff8436 0x51 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-9/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(46,54): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-10/i2c-"+str(i)+"/new_device", 1) + status, output =exec_cmd("echo sff8436 0x51 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-10/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(54,62): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-11/i2c-"+str(i)+"/new_device", 1) + status, output =exec_cmd("echo sff8436 0x51 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-11/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(62,70): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-12/i2c-"+str(i)+"/new_device", 1) + status, output =exec_cmd("echo sff8436 0x51 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-12/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print "D6356 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + exec_cmd("rmmod gpio_ich",1) + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-5", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/control b/platform/broadcom/sonic-platform-modules-inventec/debian/control index 45aa6ba10bc..b3af29108f5 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/control +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/control @@ -25,6 +25,11 @@ Architecture: amd64 Depends: linux-image-4.9.0-9-2-amd64 Description: kernel modules for platform devices such as fan, led +Package: platform-modules-d6356 +Architecture: amd64 +Depends: linux-image-4.9.0-8-2-amd64 +Description: kernel modules for platform devices such as fan, led + Package: platform-modules-d7264q28b Architecture: amd64 Depends: linux-image-4.9.0-9-2-amd64 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.init new file mode 100644 index 00000000000..eaeb97406a1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.init @@ -0,0 +1,58 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6356 board. +### END INIT INFO + +PLATFORM_DIR=/usr/share/sonic/device/x86_64-inventec_d6356-r0/plugins + +PLATFORM_DAEMON=$PLATFORM_DIR/platfmgr.py +PLATFORM_DAEMON_NAME=platfmgr + +# The process ID of the script when it runs is stored here: +PLATFORM_PIDFILE=/var/run/$PLATFORM_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_PIDFILE --make-pidfile --startas $PLATFORM_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + +# depmod -a + /usr/local/bin/inventec_d6356_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d6356_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6356.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.install new file mode 100644 index 00000000000..4c668b9816c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.install @@ -0,0 +1 @@ +d6356/utils/inventec_d6356_util.py /usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/rules b/platform/broadcom/sonic-platform-modules-inventec/debian/rules index 2e396e16782..8bfe6e6582d 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/rules +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/rules @@ -14,7 +14,7 @@ export INSTALL_MOD_DIR:=extra KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= d7032q28b d7054q28b d6254qs d6556 d7264q28b +MODULE_DIRS:= d7032q28b d7054q28b d6254qs d6556 d6356 d7264q28b %: dh $@ --with=systemd diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/changelog b/platform/broadcom/sonic-platform-modules-quanta/debian/changelog index 4bed63edf9c..fe1cfa45490 100644 --- a/platform/broadcom/sonic-platform-modules-quanta/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/changelog @@ -25,3 +25,10 @@ sonic-quanta-platform-modules (1.0) unstable; urgency=low * Initial release -- Chih-Pei Chang Jonathan Tsai Thu, 4 Jan 2018 13:50:01 +0800 + +sonic-quanta-platform-modules (1.0) unstable; urgency=low + + * Add support for Quanta IX9-32X + * Initial release + + -- Jonathan Tsai Thu, 31 Jan 2019 13:09:01 +0800 diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/control b/platform/broadcom/sonic-platform-modules-quanta/debian/control index aea2a39d6ff..f25b0d8e3c5 100644 --- a/platform/broadcom/sonic-platform-modules-quanta/debian/control +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/control @@ -20,3 +20,7 @@ Description: kernel modules for platform devices such as psu, led, sfp Package: sonic-platform-quanta-ix8c-56x Architecture: amd64 Description: kernel modules for platform devices such as psu, led, sfp + +Package: sonic-platform-quanta-ix9-32x +Architecture: amd64 +Description: kernel modules for platform devices such as psu, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/rules b/platform/broadcom/sonic-platform-modules-quanta/debian/rules index 8ceede79196..46b9607135a 100644 --- a/platform/broadcom/sonic-platform-modules-quanta/debian/rules +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/rules @@ -19,7 +19,7 @@ PACKAGE_PRE_NAME := sonic-platform-quanta KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= ix1b-32x ix7-32x ix8-56x ix8c-56x +MODULE_DIRS:= ix1b-32x ix7-32x ix8-56x ix8c-56x ix9-32x MODULE_DIR := modules UTILS_DIR := utils SERVICE_DIR := service diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile index fd73f274ef5..48683c54a7b 100755 --- a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile @@ -1,3 +1 @@ -obj-m:=qci_pmbus.o qci_cpld_qsfp28.o qci_platform_ix1b.o - - +obj-m:=qci_pmbus.o qci_cpld_qsfp28.o qci_platform_ix1b.o qci_hwmon_ix1b.o diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/pmbus.h deleted file mode 100755 index fa9beb3eb60..00000000000 --- a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/pmbus.h +++ /dev/null @@ -1,387 +0,0 @@ -/* - * pmbus.h - Common defines and structures for PMBus devices - * - * Copyright (c) 2010, 2011 Ericsson AB. - * Copyright (c) 2012 Guenter Roeck - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef PMBUS_H -#define PMBUS_H - -/* - * Registers - */ -#define PMBUS_PAGE 0x00 -#define PMBUS_OPERATION 0x01 -#define PMBUS_ON_OFF_CONFIG 0x02 -#define PMBUS_CLEAR_FAULTS 0x03 -#define PMBUS_PHASE 0x04 - -#define PMBUS_CAPABILITY 0x19 -#define PMBUS_QUERY 0x1A - -#define PMBUS_VOUT_MODE 0x20 -#define PMBUS_VOUT_COMMAND 0x21 -#define PMBUS_VOUT_TRIM 0x22 -#define PMBUS_VOUT_CAL_OFFSET 0x23 -#define PMBUS_VOUT_MAX 0x24 -#define PMBUS_VOUT_MARGIN_HIGH 0x25 -#define PMBUS_VOUT_MARGIN_LOW 0x26 -#define PMBUS_VOUT_TRANSITION_RATE 0x27 -#define PMBUS_VOUT_DROOP 0x28 -#define PMBUS_VOUT_SCALE_LOOP 0x29 -#define PMBUS_VOUT_SCALE_MONITOR 0x2A - -#define PMBUS_COEFFICIENTS 0x30 -#define PMBUS_POUT_MAX 0x31 - -#define PMBUS_FAN_CONFIG_12 0x3A -#define PMBUS_FAN_COMMAND_1 0x3B -#define PMBUS_FAN_COMMAND_2 0x3C -#define PMBUS_FAN_CONFIG_34 0x3D -#define PMBUS_FAN_COMMAND_3 0x3E -#define PMBUS_FAN_COMMAND_4 0x3F - -#define PMBUS_VOUT_OV_FAULT_LIMIT 0x40 -#define PMBUS_VOUT_OV_FAULT_RESPONSE 0x41 -#define PMBUS_VOUT_OV_WARN_LIMIT 0x42 -#define PMBUS_VOUT_UV_WARN_LIMIT 0x43 -#define PMBUS_VOUT_UV_FAULT_LIMIT 0x44 -#define PMBUS_VOUT_UV_FAULT_RESPONSE 0x45 -#define PMBUS_IOUT_OC_FAULT_LIMIT 0x46 -#define PMBUS_IOUT_OC_FAULT_RESPONSE 0x47 -#define PMBUS_IOUT_OC_LV_FAULT_LIMIT 0x48 -#define PMBUS_IOUT_OC_LV_FAULT_RESPONSE 0x49 -#define PMBUS_IOUT_OC_WARN_LIMIT 0x4A -#define PMBUS_IOUT_UC_FAULT_LIMIT 0x4B -#define PMBUS_IOUT_UC_FAULT_RESPONSE 0x4C - -#define PMBUS_OT_FAULT_LIMIT 0x4F -#define PMBUS_OT_FAULT_RESPONSE 0x50 -#define PMBUS_OT_WARN_LIMIT 0x51 -#define PMBUS_UT_WARN_LIMIT 0x52 -#define PMBUS_UT_FAULT_LIMIT 0x53 -#define PMBUS_UT_FAULT_RESPONSE 0x54 -#define PMBUS_VIN_OV_FAULT_LIMIT 0x55 -#define PMBUS_VIN_OV_FAULT_RESPONSE 0x56 -#define PMBUS_VIN_OV_WARN_LIMIT 0x57 -#define PMBUS_VIN_UV_WARN_LIMIT 0x58 -#define PMBUS_VIN_UV_FAULT_LIMIT 0x59 - -#define PMBUS_IIN_OC_FAULT_LIMIT 0x5B -#define PMBUS_IIN_OC_WARN_LIMIT 0x5D - -#define PMBUS_POUT_OP_FAULT_LIMIT 0x68 -#define PMBUS_POUT_OP_WARN_LIMIT 0x6A -#define PMBUS_PIN_OP_WARN_LIMIT 0x6B - -#define PMBUS_STATUS_BYTE 0x78 -#define PMBUS_STATUS_WORD 0x79 -#define PMBUS_STATUS_VOUT 0x7A -#define PMBUS_STATUS_IOUT 0x7B -#define PMBUS_STATUS_INPUT 0x7C -#define PMBUS_STATUS_TEMPERATURE 0x7D -#define PMBUS_STATUS_CML 0x7E -#define PMBUS_STATUS_OTHER 0x7F -#define PMBUS_STATUS_MFR_SPECIFIC 0x80 -#define PMBUS_STATUS_FAN_12 0x81 -#define PMBUS_STATUS_FAN_34 0x82 - -#define PMBUS_READ_VIN 0x88 -#define PMBUS_READ_IIN 0x89 -#define PMBUS_READ_VCAP 0x8A -#define PMBUS_READ_VOUT 0x8B -#define PMBUS_READ_IOUT 0x8C -#define PMBUS_READ_TEMPERATURE_1 0x8D -#define PMBUS_READ_TEMPERATURE_2 0x8E -#define PMBUS_READ_TEMPERATURE_3 0x8F -#define PMBUS_READ_FAN_SPEED_1 0x90 -#define PMBUS_READ_FAN_SPEED_2 0x91 -#define PMBUS_READ_FAN_SPEED_3 0x92 -#define PMBUS_READ_FAN_SPEED_4 0x93 -#define PMBUS_READ_DUTY_CYCLE 0x94 -#define PMBUS_READ_FREQUENCY 0x95 -#define PMBUS_READ_POUT 0x96 -#define PMBUS_READ_PIN 0x97 - -#define PMBUS_REVISION 0x98 -#define PMBUS_MFR_ID 0x99 -#define PMBUS_MFR_MODEL 0x9A -#define PMBUS_MFR_REVISION 0x9B -#define PMBUS_MFR_LOCATION 0x9C -#define PMBUS_MFR_DATE 0x9D -#define PMBUS_MFR_SERIAL 0x9E - -/* - * Virtual registers. - * Useful to support attributes which are not supported by standard PMBus - * registers but exist as manufacturer specific registers on individual chips. - * Must be mapped to real registers in device specific code. - * - * Semantics: - * Virtual registers are all word size. - * READ registers are read-only; writes are either ignored or return an error. - * RESET registers are read/write. Reading reset registers returns zero - * (used for detection), writing any value causes the associated history to be - * reset. - * Virtual registers have to be handled in device specific driver code. Chip - * driver code returns non-negative register values if a virtual register is - * supported, or a negative error code if not. The chip driver may return - * -ENODATA or any other error code in this case, though an error code other - * than -ENODATA is handled more efficiently and thus preferred. Either case, - * the calling PMBus core code will abort if the chip driver returns an error - * code when reading or writing virtual registers. - */ -#define PMBUS_VIRT_BASE 0x100 -#define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0) -#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1) -#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2) -#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3) -#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4) -#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5) -#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6) -#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7) -#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8) -#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9) -#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10) -#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11) -#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12) -#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13) -#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14) -#define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15) -#define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16) -#define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17) -#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18) -#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19) -#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20) -#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21) -#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22) -#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23) -#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24) -#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25) -#define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26) -#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27) -#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28) -#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29) - -#define PMBUS_VIRT_READ_VMON (PMBUS_VIRT_BASE + 30) -#define PMBUS_VIRT_VMON_UV_WARN_LIMIT (PMBUS_VIRT_BASE + 31) -#define PMBUS_VIRT_VMON_OV_WARN_LIMIT (PMBUS_VIRT_BASE + 32) -#define PMBUS_VIRT_VMON_UV_FAULT_LIMIT (PMBUS_VIRT_BASE + 33) -#define PMBUS_VIRT_VMON_OV_FAULT_LIMIT (PMBUS_VIRT_BASE + 34) -#define PMBUS_VIRT_STATUS_VMON (PMBUS_VIRT_BASE + 35) - -/* - * CAPABILITY - */ -#define PB_CAPABILITY_SMBALERT (1<<4) -#define PB_CAPABILITY_ERROR_CHECK (1<<7) - -/* - * VOUT_MODE - */ -#define PB_VOUT_MODE_MODE_MASK 0xe0 -#define PB_VOUT_MODE_PARAM_MASK 0x1f - -#define PB_VOUT_MODE_LINEAR 0x00 -#define PB_VOUT_MODE_VID 0x20 -#define PB_VOUT_MODE_DIRECT 0x40 - -/* - * Fan configuration - */ -#define PB_FAN_2_PULSE_MASK ((1 << 0) | (1 << 1)) -#define PB_FAN_2_RPM (1 << 2) -#define PB_FAN_2_INSTALLED (1 << 3) -#define PB_FAN_1_PULSE_MASK ((1 << 4) | (1 << 5)) -#define PB_FAN_1_RPM (1 << 6) -#define PB_FAN_1_INSTALLED (1 << 7) - -/* - * STATUS_BYTE, STATUS_WORD (lower) - */ -#define PB_STATUS_NONE_ABOVE (1<<0) -#define PB_STATUS_CML (1<<1) -#define PB_STATUS_TEMPERATURE (1<<2) -#define PB_STATUS_VIN_UV (1<<3) -#define PB_STATUS_IOUT_OC (1<<4) -#define PB_STATUS_VOUT_OV (1<<5) -#define PB_STATUS_OFF (1<<6) -#define PB_STATUS_BUSY (1<<7) - -/* - * STATUS_WORD (upper) - */ -#define PB_STATUS_UNKNOWN (1<<8) -#define PB_STATUS_OTHER (1<<9) -#define PB_STATUS_FANS (1<<10) -#define PB_STATUS_POWER_GOOD_N (1<<11) -#define PB_STATUS_WORD_MFR (1<<12) -#define PB_STATUS_INPUT (1<<13) -#define PB_STATUS_IOUT_POUT (1<<14) -#define PB_STATUS_VOUT (1<<15) - -/* - * STATUS_IOUT - */ -#define PB_POUT_OP_WARNING (1<<0) -#define PB_POUT_OP_FAULT (1<<1) -#define PB_POWER_LIMITING (1<<2) -#define PB_CURRENT_SHARE_FAULT (1<<3) -#define PB_IOUT_UC_FAULT (1<<4) -#define PB_IOUT_OC_WARNING (1<<5) -#define PB_IOUT_OC_LV_FAULT (1<<6) -#define PB_IOUT_OC_FAULT (1<<7) - -/* - * STATUS_VOUT, STATUS_INPUT - */ -#define PB_VOLTAGE_UV_FAULT (1<<4) -#define PB_VOLTAGE_UV_WARNING (1<<5) -#define PB_VOLTAGE_OV_WARNING (1<<6) -#define PB_VOLTAGE_OV_FAULT (1<<7) - -/* - * STATUS_INPUT - */ -#define PB_PIN_OP_WARNING (1<<0) -#define PB_IIN_OC_WARNING (1<<1) -#define PB_IIN_OC_FAULT (1<<2) - -/* - * STATUS_TEMPERATURE - */ -#define PB_TEMP_UT_FAULT (1<<4) -#define PB_TEMP_UT_WARNING (1<<5) -#define PB_TEMP_OT_WARNING (1<<6) -#define PB_TEMP_OT_FAULT (1<<7) - -/* - * STATUS_FAN - */ -#define PB_FAN_AIRFLOW_WARNING (1<<0) -#define PB_FAN_AIRFLOW_FAULT (1<<1) -#define PB_FAN_FAN2_SPEED_OVERRIDE (1<<2) -#define PB_FAN_FAN1_SPEED_OVERRIDE (1<<3) -#define PB_FAN_FAN2_WARNING (1<<4) -#define PB_FAN_FAN1_WARNING (1<<5) -#define PB_FAN_FAN2_FAULT (1<<6) -#define PB_FAN_FAN1_FAULT (1<<7) - -/* - * CML_FAULT_STATUS - */ -#define PB_CML_FAULT_OTHER_MEM_LOGIC (1<<0) -#define PB_CML_FAULT_OTHER_COMM (1<<1) -#define PB_CML_FAULT_PROCESSOR (1<<3) -#define PB_CML_FAULT_MEMORY (1<<4) -#define PB_CML_FAULT_PACKET_ERROR (1<<5) -#define PB_CML_FAULT_INVALID_DATA (1<<6) -#define PB_CML_FAULT_INVALID_COMMAND (1<<7) - -enum pmbus_sensor_classes { - PSC_VOLTAGE_IN = 0, - PSC_VOLTAGE_OUT, - PSC_CURRENT_IN, - PSC_CURRENT_OUT, - PSC_POWER, - PSC_TEMPERATURE, - PSC_FAN, - PSC_NUM_CLASSES /* Number of power sensor classes */ -}; - -#define PMBUS_PAGES 32 /* Per PMBus specification */ - -/* Functionality bit mask */ -#define PMBUS_HAVE_VIN (1 << 0) -#define PMBUS_HAVE_VCAP (1 << 1) -#define PMBUS_HAVE_VOUT (1 << 2) -#define PMBUS_HAVE_IIN (1 << 3) -#define PMBUS_HAVE_IOUT (1 << 4) -#define PMBUS_HAVE_PIN (1 << 5) -#define PMBUS_HAVE_POUT (1 << 6) -#define PMBUS_HAVE_FAN12 (1 << 7) -#define PMBUS_HAVE_FAN34 (1 << 8) -#define PMBUS_HAVE_TEMP (1 << 9) -#define PMBUS_HAVE_TEMP2 (1 << 10) -#define PMBUS_HAVE_TEMP3 (1 << 11) -#define PMBUS_HAVE_STATUS_VOUT (1 << 12) -#define PMBUS_HAVE_STATUS_IOUT (1 << 13) -#define PMBUS_HAVE_STATUS_INPUT (1 << 14) -#define PMBUS_HAVE_STATUS_TEMP (1 << 15) -#define PMBUS_HAVE_STATUS_FAN12 (1 << 16) -#define PMBUS_HAVE_STATUS_FAN34 (1 << 17) -#define PMBUS_HAVE_VMON (1 << 18) -#define PMBUS_HAVE_STATUS_VMON (1 << 19) - -enum pmbus_data_format { linear = 0, direct, vid }; - -struct pmbus_driver_info { - int pages; /* Total number of pages */ - enum pmbus_data_format format[PSC_NUM_CLASSES]; - /* - * Support one set of coefficients for each sensor type - * Used for chips providing data in direct mode. - */ - int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ - int b[PSC_NUM_CLASSES]; /* offset */ - int R[PSC_NUM_CLASSES]; /* exponent */ - - u32 func[PMBUS_PAGES]; /* Functionality, per page */ - /* - * The following functions map manufacturing specific register values - * to PMBus standard register values. Specify only if mapping is - * necessary. - * Functions return the register value (read) or zero (write) if - * successful. A return value of -ENODATA indicates that there is no - * manufacturer specific register, but that a standard PMBus register - * may exist. Any other negative return value indicates that the - * register does not exist, and that no attempt should be made to read - * the standard register. - */ - int (*read_byte_data)(struct i2c_client *client, int page, int reg); - int (*read_word_data)(struct i2c_client *client, int page, int reg); - int (*write_word_data)(struct i2c_client *client, int page, int reg, - u16 word); - int (*write_byte)(struct i2c_client *client, int page, u8 value); - /* - * The identify function determines supported PMBus functionality. - * This function is only necessary if a chip driver supports multiple - * chips, and the chip functionality is not pre-determined. - */ - int (*identify)(struct i2c_client *client, - struct pmbus_driver_info *info); -}; - -/* Function declarations */ - -void pmbus_clear_cache(struct i2c_client *client); -int pmbus_set_page(struct i2c_client *client, u8 page); -int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); -int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); -int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); -int pmbus_write_byte(struct i2c_client *client, int page, u8 value); -void pmbus_clear_faults(struct i2c_client *client); -bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); -bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); -int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, - struct pmbus_driver_info *info); -int pmbus_do_remove(struct i2c_client *client); -const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client - *client); - -#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_hwmon_ix1b.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_hwmon_ix1b.c new file mode 100644 index 00000000000..eb730cb28d0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_hwmon_ix1b.c @@ -0,0 +1,425 @@ +/* + * A hwmon driver for Cypress PSoC fan controller and thermal sensor + * + * This PSoC is a specific customize design only for Quanta Switch + * This driver is also monitoring pca9555 which is related to + * RPSU detection and LED controll in front panel. Instead a standalone + * driver, it should be combined with gpio lib to work correctly. + * + * Copyright (C) 2014 Quanta Inc. + * + * Author: Luffy Cheng + * + * Based on: + * adt7470.c from Darrick J. Wong + * Copyright (C) 2007 IBM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define QUANTA_IX1_PSU_GPIO_PSU1_PRSNT_N 16 +#define QUANTA_IX1_PSU_GPIO_PSU1_PWRGD 17 +#define QUANTA_IX1_PSU_GPIO_PSU2_PRSNT_N 19 +#define QUANTA_IX1_PSU_GPIO_PSU2_PWRGD 20 + +#define QUANTA_IX1_FAN_GPIO_FAN1_PRSNT_N 36 +#define QUANTA_IX1_FAN_GPIO_FAN2_PRSNT_N 37 +#define QUANTA_IX1_FAN_GPIO_FAN3_PRSNT_N 38 +#define QUANTA_IX1_FAN_GPIO_FAN4_PRSNT_N 39 + +#define AUTO_UPDATE_INTERVAL 10000 + +enum psu_nr { + PSU1 = 0, + PSU2 +}; + +enum fan_nr { + FAN1 = 0, + FAN2, + FAN3, + FAN4, +}; + +enum led_color { + LED_RED = 1, + LED_GREEN, + LED_COLOR_OFF +}; + +int hwmon_enable = 1; + +struct qci_hwmon_data { + struct device *hwmon_dev; + struct task_struct *auto_update; + struct completion auto_update_stop; + unsigned int auto_update_interval; + struct attribute_group attrs; + +}; + +static void simple_atoi(const char *buf, int *output_val) +{ + int negative = 0; + + if (buf[0] == '-') + { + negative = 1; + buf++; + } + + while (*buf >= '0' && *buf <= '9') { + *output_val = *output_val * 10 + *buf - '0'; + buf++; + } + + if (negative) + *output_val = 0 - *output_val; +} + +int read_gpio_file(int gpio) +{ + struct file *fp; + char buffer[512], file_path[255]; + int offset = 0; + int ret; + + /*open the file in read mode*/ + sprintf(file_path, "/sys/class/gpio/gpio%d/value", gpio); + fp = filp_open(file_path, O_RDONLY, 0); + if (IS_ERR(fp)) { + printk("Cannot open the file %ld\n", PTR_ERR(fp)); + return -1; + } + + /*Read the data to the end of the file*/ + while (1) { + ret = kernel_read(fp, offset, buffer, 512); + if (ret > 0) { + offset += ret; + } + else { + break; + } + } + + filp_close(fp, NULL); + + simple_atoi(buffer, &ret); + + return ret; +} + +static ssize_t get_hwmon_status(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return sprintf(buf, "%d\n", hwmon_enable); +} + +static ssize_t set_hwmon_status(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count) +{ + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + + hwmon_enable = enable; + + return count; +} + +static u8 read_fan_present(u8 fan_nr) +{ + u8 value = 0; + + if (fan_nr == PSU1) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN1_PRSNT_N); + else if (fan_nr == FAN2) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN2_PRSNT_N); + else if (fan_nr == FAN3) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN3_PRSNT_N); + else if (fan_nr == FAN4) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN4_PRSNT_N); + else + return -1; + + return value; +} + +static u8 read_psu_present(u8 psu_nr) +{ + u8 value = 0; + + if (psu_nr == PSU1) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU1_PRSNT_N); + else if (psu_nr == PSU2) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU2_PRSNT_N); + else + return -1; + + return value; +} + +static u8 read_psu_AC_good(u8 psu_nr) +{ + u8 value = 0; + + if (psu_nr == PSU1) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU1_PWRGD); + else if (psu_nr == PSU2) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU2_PWRGD); + else + return -1; + + return value; +} + +static u8 front_led_set(char *name, char *value) +{ + struct file *fp; + char file_path[255]; + int ret; + mm_segment_t oldfs; + + sprintf(file_path, "/sys/class/leds/%s/brightness", name); + fp = filp_open(file_path, O_RDWR | O_CREAT, 0644); + + if (IS_ERR(fp)) { + printk("Cannot open the file %ld\n", PTR_ERR(fp)); + return -1; + } + + oldfs = get_fs(); + set_fs(get_ds()); + + ret = vfs_write(fp, value, sizeof(value), &fp->f_pos); + + set_fs(oldfs); + + filp_close(fp, NULL); + + return 0; +} + +static u8 update_led(u8 *fan_status, u8 *psu_status) +{ + u8 i = 0, fan_color = LED_GREEN; + + // Update FAN front LED + for (i = 0; i < 4; i++) + { + if (fan_status[i] == 1) + { + fan_color = LED_RED; + front_led_set("front_led_fan_red", "1"); + front_led_set("front_led_fan_green", "0"); + break; + } + } + + if (fan_color == LED_GREEN) + { + front_led_set("front_led_fan_red", "0"); + front_led_set("front_led_fan_green", "1"); + } + + // Update PSU1 front LED + if ((psu_status[0] == 0) && (psu_status[2] == 1)) + { + front_led_set("front_led_psu1_green", "1"); + front_led_set("front_led_psu1_red", "0"); + } + else if (psu_status[0] == 1) + { + front_led_set("front_led_psu1_green", "0"); + front_led_set("front_led_psu1_red", "0"); + } + else + { + front_led_set("front_led_psu1_green", "0"); + front_led_set("front_led_psu1_red", "1"); + } + + // Update PSU2 front LED + if ((psu_status[1] == 0) && (psu_status[3] == 1)) + { + front_led_set("front_led_psu2_green", "1"); + front_led_set("front_led_psu2_red", "0"); + } + else if (psu_status[1] == 1) + { + front_led_set("front_led_psu2_green", "0"); + front_led_set("front_led_psu2_red", "0"); + } + else + { + front_led_set("front_led_psu2_green", "0"); + front_led_set("front_led_psu2_red", "1"); + } + + return 0; +} + +static int led_update_thread(void *p) +{ + struct platform_device *pdev = p; + struct qci_hwmon_data *data = platform_get_drvdata(pdev); + + u8 i = 0; + u8 psu_status[4] = {0}; // {PSU1-2 present, PSU1-2 AC good} + u8 fan_status[4] = {0}; // {FAN1-4 present} + + while (!kthread_should_stop()) { + + if (hwmon_enable) + { + for (i = 0; i < 4; i++) + { + fan_status[i] = read_fan_present(i); + } + + for (i = 0; i < 2; i++) + { + psu_status[i] = read_psu_present(i); + psu_status[i+2] = read_psu_AC_good(i); + } + + update_led(fan_status, psu_status); + } + + if (kthread_should_stop()) + break; + msleep_interruptible(data->auto_update_interval); + } + + complete_all(&data->auto_update_stop); + return 0; +} + +static DEVICE_ATTR(hwmon_status, S_IWUSR | S_IRUGO, get_hwmon_status, set_hwmon_status); + +static struct attribute *qci_hwmon_attr[] = { + + &dev_attr_hwmon_status.attr, + + NULL +}; + +static int qci_hwmon_probe(struct platform_device *pdev) +{ + struct qci_hwmon_data *data; + int err; + + data = devm_kzalloc(&pdev->dev, sizeof(struct qci_hwmon_data), + GFP_KERNEL); + if (!data) + { + return -ENOMEM; + } + + data->auto_update_interval = AUTO_UPDATE_INTERVAL; + data->attrs.attrs = qci_hwmon_attr; + + platform_set_drvdata(pdev, data); + + dev_info(&pdev->dev, "%s device found\n", pdev->name); + + data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(data->hwmon_dev)) { + err = PTR_ERR(data->hwmon_dev); + } + + err = sysfs_create_group(&pdev->dev.kobj, &data->attrs); + if (err) + return err; + + init_completion(&data->auto_update_stop); + data->auto_update = kthread_run(led_update_thread, pdev, + dev_name(data->hwmon_dev)); + if (IS_ERR(data->auto_update)) { + err = PTR_ERR(data->auto_update); + goto exit_unregister; + } + + return 0; + +exit_unregister: + hwmon_device_unregister(data->hwmon_dev); + return err; +} + +static int qci_hwmon_remove(struct platform_device *pdev) +{ + struct qci_hwmon_data *data = platform_get_drvdata(pdev); + + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&pdev->dev.kobj, &data->attrs); + return 0; +} + +static struct platform_driver qci_hwmon_driver = { + .probe = qci_hwmon_probe, + .remove = qci_hwmon_remove, + .driver = { + .name = "qci-hwmon", + .owner = THIS_MODULE, + }, +}; + +static int __init qci_hwmon_init(void) +{ + platform_driver_register(&qci_hwmon_driver); + + return 0; +} + +static void __exit qci_hwmon_exit(void) +{ + platform_driver_unregister(&qci_hwmon_driver); +} + +module_init(qci_hwmon_init); +module_exit(qci_hwmon_exit); + +MODULE_AUTHOR("Quanta Computer Inc."); +MODULE_DESCRIPTION("Quanta Switch Hardware Monitor driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c old mode 100755 new mode 100644 index f783c88fb9a..925b46256ce --- a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c @@ -179,67 +179,67 @@ static struct pca953x_platform_data pca9555ID_data = { static struct i2c_board_info ix1b_i2c_devices[] = { { - I2C_BOARD_INFO("pca9546", 0x77), + I2C_BOARD_INFO("pca9546", 0x77), // 0 .platform_data = &pca9546_1_data, }, { - I2C_BOARD_INFO("pca9546", 0x72), + I2C_BOARD_INFO("pca9546", 0x72), // 1 .platform_data = &pca9546_2_data, }, { - I2C_BOARD_INFO("pca9555", 0x26), + I2C_BOARD_INFO("pca9555", 0x26), // 2 .platform_data = &pca9555psu1_data, }, { - I2C_BOARD_INFO("24c02", 0x54), + I2C_BOARD_INFO("24c02", 0x54), // 3 }, { - I2C_BOARD_INFO("pca9548", 0x73), + I2C_BOARD_INFO("pca9548", 0x73), // 4 .platform_data = &pca9548sfp1_data, }, { - I2C_BOARD_INFO("pca9548", 0x74), + I2C_BOARD_INFO("pca9548", 0x74), // 5 .platform_data = &pca9548sfp2_data, }, { - I2C_BOARD_INFO("pca9548", 0x75), + I2C_BOARD_INFO("pca9548", 0x75), // 6 .platform_data = &pca9548sfp3_data, }, { - I2C_BOARD_INFO("pca9548", 0x76), + I2C_BOARD_INFO("pca9548", 0x76), // 7 .platform_data = &pca9548sfp4_data, }, { - I2C_BOARD_INFO("CPLD-QSFP28", 0x38), + I2C_BOARD_INFO("CPLD-QSFP28", 0x38), // 8 }, { - I2C_BOARD_INFO("CPLD-QSFP28", 0x39), + I2C_BOARD_INFO("CPLD-QSFP28", 0x39), // 9 }, { - I2C_BOARD_INFO("pca9555", 0x23), + I2C_BOARD_INFO("pca9555", 0x23), // 10 .platform_data = &pca9555ID_data, }, { - I2C_BOARD_INFO("pca9555", 0x25), + I2C_BOARD_INFO("pca9555", 0x25), // 11 .platform_data = &pca9555fan_data, }, { - I2C_BOARD_INFO("qci_pmbus_ix1b", 0x5f), + I2C_BOARD_INFO("qci_pmbus_ix1b", 0x5f), // 12 }, { - I2C_BOARD_INFO("qci_pmbus_ix1b", 0x59), + I2C_BOARD_INFO("qci_pmbus_ix1b", 0x59), // 13 }, #if defined(QUANTA_CPU_RGL) { - I2C_BOARD_INFO("pca9546", 0x71), + I2C_BOARD_INFO("pca9546", 0x71), // 14 .platform_data = &pca9546_cpu1_data, }, { - I2C_BOARD_INFO("pca9555", 0x20), + I2C_BOARD_INFO("pca9555", 0x20), // 15 .platform_data = &pca9555_cpuled_data, }, { - I2C_BOARD_INFO("24c02", 0x50), + I2C_BOARD_INFO("optoe1", 0x50), // 16 }, #endif }; @@ -347,6 +347,13 @@ static struct platform_device system_led_dev = { }, }; +static struct platform_device qci_hwmon_device = { + .name = "qci-hwmon", + .id = 0, + .dev = { + }, +}; + static struct platform_device *ix1b_device; struct gpio_led_data { @@ -390,68 +397,68 @@ static int __init ix1b_platform_init(void) goto fail_platform_device; adapter = i2c_get_adapter(0); - client = i2c_new_device(adapter, &ix1b_i2c_devices[0]); // pca9546_1 + client = i2c_new_device(adapter, &ix1b_i2c_devices[0]); // pca9546_1 - Address: 0x77 printk("[CC] NEW device pca9546_1\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[1]); // pca9546_2 + client = i2c_new_device(adapter, &ix1b_i2c_devices[1]); // pca9546_2 - Address: 0x72 printk("[CC] NEW device pca9546_2\n"); #if defined(QUANTA_CPU_RGL) - client = i2c_new_device(adapter, &ix1b_i2c_devices[14]); // cpu pca9546_1 + client = i2c_new_device(adapter, &ix1b_i2c_devices[14]); // cpu pca9546_1 - Address: 0x71 printk("[CC] NEW device cpu pca9546_1\n"); #endif i2c_put_adapter(adapter); adapter = i2c_get_adapter(0x14); - client = i2c_new_device(adapter, &ix1b_i2c_devices[12]); // pmbus_psu1 + client = i2c_new_device(adapter, &ix1b_i2c_devices[12]); // pmbus_psu1 - Address: 0x5f printk("[CC] NEW device pmbus_psu1\n"); i2c_put_adapter(adapter); adapter = i2c_get_adapter(0x15); - client = i2c_new_device(adapter, &ix1b_i2c_devices[13]); // pmbus_psu2 + client = i2c_new_device(adapter, &ix1b_i2c_devices[13]); // pmbus_psu2 - Address: 0x59 printk("[CC] NEW device pmbus_psu2\n"); i2c_put_adapter(adapter); adapter = i2c_get_adapter(0x16); - client = i2c_new_device(adapter, &ix1b_i2c_devices[2]); // pca9555-PSU1 + client = i2c_new_device(adapter, &ix1b_i2c_devices[2]); // pca9555-PSU1 - Address: 0x26 printk("[CC] NEW device pca9555-PSU1\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[3]); // MB_BOARDINFO_EEPROM + client = i2c_new_device(adapter, &ix1b_i2c_devices[3]); // MB_BOARDINFO_EEPROM - Address: 0x54 printk("[CC] NEW device MB_BOARDINFO_EEPROM\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[10]); // pca9555-ID + client = i2c_new_device(adapter, &ix1b_i2c_devices[10]); // pca9555-ID - Address: 0x23 printk("[CC] NEW device pca9555-ID\n"); i2c_put_adapter(adapter); adapter = i2c_get_adapter(0x17); - client = i2c_new_device(adapter, &ix1b_i2c_devices[11]); // pca9555-fan + client = i2c_new_device(adapter, &ix1b_i2c_devices[11]); // pca9555-fan - Address: 0x25 printk("[CC] NEW device pca9555-fan\n"); i2c_put_adapter(adapter); adapter = i2c_get_adapter(0x10); - client = i2c_new_device(adapter, &ix1b_i2c_devices[4]); // pca9548_2 SFP + client = i2c_new_device(adapter, &ix1b_i2c_devices[4]); // pca9548_1 SFP - Address: 0x73 + printk("[CC] NEW device pca9548_1 SFP\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[5]); // pca9548_2 SFP - Address: 0x74 printk("[CC] NEW device pca9548_2 SFP\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[5]); // pca9548_3 SFP + client = i2c_new_device(adapter, &ix1b_i2c_devices[6]); // pca9548_3 SFP - Address: 0x75 printk("[CC] NEW device pca9548_3 SFP\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[6]); // pca9548_4 SFP - printk("[CC] NEW device pca9548_4 SFP\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[8]); // CPLD2 + client = i2c_new_device(adapter, &ix1b_i2c_devices[8]); // CPLD2 - Address: 0x38 printk("[CC] NEW device CPLD2\n"); - client = i2c_new_device(adapter, &ix1b_i2c_devices[9]); // CPLD3 + client = i2c_new_device(adapter, &ix1b_i2c_devices[9]); // CPLD3 - Address: 0x39 printk("[CC] NEW device CPLD3\n"); i2c_put_adapter(adapter); adapter = i2c_get_adapter(0x11); - client = i2c_new_device(adapter, &ix1b_i2c_devices[7]); // pca9548_5 SFP - printk("[CC] NEW device pca9548_5 SFP\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[7]); // pca9548_4 SFP - Address: 0x76 + printk("[CC] NEW device pca9548_4 SFP\n"); i2c_put_adapter(adapter); #if defined(QUANTA_CPU_RGL) adapter = i2c_get_adapter(0x18); - client = i2c_new_device(adapter, &ix1b_i2c_devices[15]); // cpu pca9555_1 + client = i2c_new_device(adapter, &ix1b_i2c_devices[15]); // cpu pca9555_1 - Address: 0x20 printk("[CC] NEW device cpu pca9555_1\n"); i2c_put_adapter(adapter); for(i = 0x20; i < 0x40; i++) { adapter = i2c_get_adapter(i); - client = i2c_new_device(adapter, &ix1b_i2c_devices[16]); // eeprom for loopback module + client = i2c_new_device(adapter, &ix1b_i2c_devices[16]); // eeprom for loopback module - Address: 0x50 i2c_put_adapter(adapter); } printk("[CC] NEW device eeprom\n"); @@ -466,6 +473,9 @@ static int __init ix1b_platform_init(void) } printk("[CC] NEW device led\n"); + platform_device_register(&qci_hwmon_device); + printk("[CC] NEW device hwmon\n"); + return 0; fail_platform_device: diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c index f54a0f204d6..0fac27b59b6 100755 --- a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c @@ -27,14 +27,268 @@ #include #include #include -//#include <../drivers/hwmon/pmbus/pmbus.h> -#include "pmbus.h" #include enum projects { ly8, ix1, ix2, ix1b }; #define DELAY_TIME 1000 /* uS */ +/* Pmbus reg defines are copied from drivers/hwmon/pmbus/pmbus.h*/ +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, +}; + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13 }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; +}; + +extern int pmbus_set_page(struct i2c_client *client, u8 page); +extern int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +extern bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +extern bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +extern int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +extern int pmbus_do_remove(struct i2c_client *client); + /* Needed to access the mutex. Copied from pmbus_core.c */ #define PB_STATUS_BASE 0 #define PB_STATUS_VOUT_BASE (PB_STATUS_BASE + PMBUS_PAGES) @@ -327,6 +581,7 @@ static int qci_pmbus_identify(struct i2c_client *client, break; case 1: info->format[PSC_VOLTAGE_OUT] = vid; + info->vrm_version = vr11; break; case 2: info->format[PSC_VOLTAGE_OUT] = direct; @@ -411,7 +666,7 @@ static int qci_pmbus_probe(struct i2c_client *client, { struct device *dev = &client->dev; struct pmbus_driver_info *info; - int ret, i; + int ret; dev_info(dev, "qci_pmbus_probe\n"); @@ -419,8 +674,7 @@ static int qci_pmbus_probe(struct i2c_client *client, I2C_FUNC_SMBUS_READ_WORD_DATA)) return -ENODEV; - info = devm_kzalloc(&client->dev, sizeof(struct pmbus_driver_info), - GFP_KERNEL); + info = devm_kzalloc(dev, sizeof(struct pmbus_driver_info), GFP_KERNEL); if (!info) return -ENOMEM; diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py index f530cf3dbb7..2135932938e 100755 --- a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py @@ -40,75 +40,96 @@ FORCE = 0 i2c_prefix = '/sys/bus/i2c/devices/' - if DEBUG == True: print sys.argv[0] - print 'ARGV :', sys.argv[1:] - + print 'ARGV :', sys.argv[1:] def main(): global DEBUG global args global FORCE - - if len(sys.argv)<2: + + if len(sys.argv) < 2: show_help() - + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', 'debug', 'force', ]) - if DEBUG == True: + if DEBUG == True: print options print args print len(sys.argv) - + for opt, arg in options: if opt in ('-h', '--help'): show_help() - elif opt in ('-d', '--debug'): + elif opt in ('-d', '--debug'): DEBUG = True - logging.basicConfig(level=logging.INFO) - elif opt in ('-f', '--force'): + logging.basicConfig(level = logging.INFO) + elif opt in ('-f', '--force'): FORCE = 1 else: - logging.info('no option') - for arg in args: + logging.info('no option') + + for arg in args: if arg == 'install': - install() + install() elif arg == 'clean': - uninstall() + uninstall() else: show_help() - - - return 0 - + + return 0 + def show_help(): print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} sys.exit(0) - + def show_log(txt): if DEBUG == True: - print "[IX1B-32X]"+txt + print "[IX1B-32X]" + txt + return - + def exec_cmd(cmd, show): - logging.info('Run :'+cmd) - status, output = commands.getstatusoutput(cmd) - show_log (cmd +"with result:" + str(status)) - show_log (" output:"+output) + logging.info('Run :' + cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd + "with result:" + str(status)) + show_log (" output:" + output) if status: - logging.info('Failed :'+cmd) + logging.info('Failed :' + cmd) if show: - print('Failed :'+cmd) - return status, output - -instantiate =[ + print('Failed :' + cmd) + + return status, output + +instantiate = [ #turn on module power 'echo 53 > /sys/class/gpio/export', 'echo out > /sys/class/gpio/gpio53/direction', -'echo 1 >/sys/class/gpio/gpio53/value', +'echo 1 > /sys/class/gpio/gpio53/value', +#PSU1 present +'echo 16 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio16/direction', +#PSU1 power good signal +'echo 17 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio17/direction', +#PSU2 present +'echo 19 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio19/direction', +#PSU2 power good signal +'echo 20 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio20/direction', +#FAN 1-4 present +'echo 36 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio36/direction', +'echo 37 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio37/direction', +'echo 38 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio38/direction', +'echo 39 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio39/direction', #turn on 100G led by default 'i2cset -y 0x13 0x38 0x00 0xff', 'i2cset -y 0x13 0x38 0x01 0xff', @@ -124,77 +145,89 @@ def exec_cmd(cmd, show): 'gpio-pca953x', 'qci_pmbus', 'leds-gpio', +'optoe', 'qci_cpld_qsfp28', 'qci_platform_ix1b' ] - - def system_install(): global FORCE - + + time.sleep(3) #remove default drivers to avoid modprobe order conflicts status, output = exec_cmd("rmmod i2c_ismt ", 1) status, output = exec_cmd("rmmod i2c-i801 ", 1) #setup driver dependency status, output = exec_cmd("depmod -a ", 1) + #install drivers - for i in range(0,len(drivers)): - status, output = exec_cmd("modprobe "+drivers[i], 1) + for i in range(0, len(drivers)): + status, output = exec_cmd("modprobe " + drivers[i], 1) + if status: - print output - if FORCE == 0: - return status - + print output + if FORCE == 0: + return status + #instantiate devices - for i in range(0,len(instantiate)): - time.sleep(1) - status, output = exec_cmd(instantiate[i], 1) + for i in range(0, len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + if status: - print output - if FORCE == 0: - return status - - #for i in range(22,30): - # status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1) - # if status: - # print output - # if FORCE == 0: - # return status - - return - - + print output + if FORCE == 0: + return status + + #Mount Quanta hardware monitor driver + status, output = exec_cmd("modprobe qci_hwmon_ix1b", 1) + + #QSFP for 1~32 port + for port_number in range(1, 33): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + + #Set system LED to green + status, output = exec_cmd("echo 1 > /sys/class/leds/sysled_green/brightness", 1) + + return + def system_ready(): - if not device_found(): + if not device_found(): return False + return True - -def install(): + +def install(): if not device_found(): - print "No device, installing...." - status = system_install() + print "No device, installing...." + status = system_install() + if status: - if FORCE == 0: - return status + if FORCE == 0: + return status else: - print " ix1b driver already installed...." + print " ix1b driver already installed...." + return def uninstall(): global FORCE + #uninstall drivers - for i in range(len(drivers)-1,-1,-1): - status, output = exec_cmd("rmmod "+drivers[i], 1) + for i in range(len(drivers) - 1, -1, -1): + status, output = exec_cmd("rmmod " + drivers[i], 1) + if status: - print output - if FORCE == 0: - return status + print output + if FORCE == 0: + return status + return def device_found(): - ret1, log = exec_cmd("ls "+i2c_prefix+"i2c-0", 0) - return ret1 + ret1, log = exec_cmd("ls " + i2c_prefix + "i2c-0", 0) + + return ret1 if __name__ == "__main__": main() diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/Makefile new file mode 100644 index 00000000000..929782931a4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m:=qci_cpld_qsfpdd.o qci_cpld_led.o qci_platform_ix9.o + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_led.c b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_led.c new file mode 100644 index 00000000000..d8f89240a85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_led.c @@ -0,0 +1,277 @@ +/* + * A LED CPLD driver for Quanta Switch Platform + * + * The CPLD is customize by Quanta for decode led bit stream, + * This driver modify from Quanta CPLD I/O driver. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * Author: Roger Chang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_led_ida); + +enum platform_type { + IX7 = 0, + IX8C, + IX9, + NONE +}; + +static struct class *cpld_class = NULL; + +struct cpld_data { + struct i2c_client *cpld_client; + char name[8]; + u8 cpld_id; +}; + +struct cpld_led_data { + struct mutex lock; + struct device *port_dev; + struct cpld_data *cpld_data; +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_led_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_led_id[] = { + { "CPLDLED_IX7", IX7 }, + { "CPLDLED_IX8C", IX8C }, + { "CPLDLED_IX9", IX9 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_led_id); + +static struct i2c_driver cpld_led_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_led", + }, + .probe = cpld_led_probe, + .remove = cpld_led_remove, + .id_table = cpld_led_id, +// .address_list = normal_i2c, +}; + +#define CPLD_LED_ID_PREFIX "CPLDLED-" +#define CPLD_LED_ID_FORMAT CPLD_LED_ID_PREFIX "%d" + +#define CPLD_DECODER_OFFSET 0x4 +#define CPLD_DECODER_MASK 0x1 +#define CPLD_USERCODE_START_OFFSET 0x0 + +static ssize_t get_led_decode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 offset = (u8)(CPLD_DECODER_OFFSET); + s32 value; + + value = i2c_smbus_read_byte_data(client, offset); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value &= CPLD_DECODER_MASK; + + return sprintf(buf, "%d\n", (value == 0) ? 1 : 0); +} + +static ssize_t get_usercode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 i = 0; + s32 value = 0, reading = 0; + + for (i = 0; i < 4; i++) + { + reading = i2c_smbus_read_byte_data(client, CPLD_USERCODE_START_OFFSET + i); + if (reading < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led usercode reg %d value= %x\n", i, reading); + + value |= reading << (24 - 8 * i); + } + + return sprintf(buf, "%X\n", value); +} + +static ssize_t set_led_decode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + s32 value; + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_byte_data(client, CPLD_DECODER_OFFSET); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value |= CPLD_DECODER_MASK; + if (enable) + value &= ~CPLD_DECODER_MASK; + + dev_dbg(&client->dev, "write led decode value= %x\n", value); + + i2c_smbus_write_byte_data(client, CPLD_DECODER_OFFSET, (u8)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(led_decode, S_IWUSR | S_IRUGO, get_led_decode, set_led_decode); +static DEVICE_ATTR(usercode, S_IRUGO, get_usercode, NULL); + +static const struct attribute *led_attrs[] = { + &dev_attr_usercode.attr, + &dev_attr_led_decode.attr, + NULL, +}; + +static const struct attribute_group led_attr_group = { + .attrs = (struct attribute **) led_attrs, +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_led_data *data; + struct cpld_data *led_data; + struct device *port_dev; + int nr, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-led"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_led_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* Test */ + nr = ida_simple_get(&cpld_led_ida, 1, 99, GFP_KERNEL); + if (nr < 0) + goto err_out; + + led_data = kzalloc(sizeof(struct cpld_led_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), led_data, CPLD_LED_ID_FORMAT, nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev = port_dev; + data->cpld_data = led_data; + + dev_info(&client->dev, "Register CPLDLED %d\n", nr); + + sprintf(led_data->name, "LED%d-data", nr); + led_data->cpld_id = nr; + dev_set_drvdata(port_dev, led_data); + port_dev->init_name = led_data->name; + led_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &led_attr_group); + // if (status) printk("err status\n"); + /* end */ + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_led_remove(struct i2c_client *client) +{ + struct cpld_led_data *data = i2c_get_clientdata(client); + + dev_info(data->port_dev, "Remove CPLDLED-%d\n", data->cpld_data->cpld_id); + device_unregister(data->port_dev); + ida_simple_remove(&cpld_led_ida, data->cpld_data->cpld_id); + kfree(data->cpld_data); + + if (cpld_idr_is_empty(&cpld_led_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_led_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("Quanta Switch LED CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_qsfpdd.c b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_qsfpdd.c new file mode 100644 index 00000000000..d616f887dbb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_qsfpdd.c @@ -0,0 +1,411 @@ +/* + * A CPLD driver for monitor QSFPDD module I/O + * + * The CPLD is customize by Quanta for controlling QSFPDD module signals, + * they are RESET , INTERREPT , Module_Present, LPMODE + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + QSFPDD = 0, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-QSFPDD", QSFPDD }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_qsfpdd", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +#define RESET_MASK 0x08 +#define INTERRUPT_MASK 0x04 +#define MODULE_PRESENT_MASK 0x02 +#define LPMODE_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +static ssize_t get_reset(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RESET_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_interrupt(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= INTERRUPT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_module_present(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= MODULE_PRESENT_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_lpmode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= LPMODE_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(RESET_MASK << (group_port * 4)); + if (disable) + value |= (RESET_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static ssize_t set_lpmode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(LPMODE_MASK << (group_port * 4)); + if (disable) + value |= (LPMODE_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(reset, S_IWUSR | S_IRUGO, get_reset, set_reset); +static DEVICE_ATTR(lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode); +static DEVICE_ATTR(module_present, S_IRUGO, get_module_present, NULL); +static DEVICE_ATTR(interrupt, S_IRUGO, get_interrupt, NULL); + +static const struct attribute *sfp_attrs[] = { + &dev_attr_reset.attr, + &dev_attr_lpmode.attr, + &dev_attr_module_present.attr, + &dev_attr_interrupt.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; + struct device *port_dev; + int port_nr, i, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-qsfpdd"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* register sfp port data to sysfs */ + for (i = 0; i < 16; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + return port_nr; + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + dev_info(&client->dev, "Register qsfpdd port-%d\n", port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +#if 0 +//FIXME: implement error check +exit_remove: +// sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +#endif +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i; + + for (i = 15; i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove qsfpdd port-%d\n", data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_DESCRIPTION("Quanta Switch SFP CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_platform_ix9.c b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_platform_ix9.c new file mode 100644 index 00000000000..a927e850791 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_platform_ix9.c @@ -0,0 +1,293 @@ +/* + * Quanta IX9 platform driver + * + * + * Copyright (C) 2019 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,12,0) +#include +#else +#include +#endif +#define MUX_INFO(bus, deselect) \ + {.adap_id = bus, .deselect_on_exit = deselect} + +static struct pca954x_platform_mode pca9546_1_modes[] = { + MUX_INFO(0x10, 1), + MUX_INFO(0x11, 1), + MUX_INFO(0x12, 1), + MUX_INFO(0x13, 1), +}; + +static struct pca954x_platform_data pca9546_1_data = { + .modes = pca9546_1_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548_1_modes[] = { + MUX_INFO(0x14, 1), + MUX_INFO(0x15, 1), + MUX_INFO(0x16, 1), + MUX_INFO(0x17, 1), +}; + +static struct pca954x_platform_data pca9548_1_data = { + .modes = pca9548_1_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548sfp1_modes[] = { + MUX_INFO(0x20, 1), + MUX_INFO(0x21, 1), + MUX_INFO(0x22, 1), + MUX_INFO(0x23, 1), + MUX_INFO(0x24, 1), + MUX_INFO(0x25, 1), + MUX_INFO(0x26, 1), + MUX_INFO(0x27, 1), +}; + +static struct pca954x_platform_data pca9548sfp1_data = { + .modes = pca9548sfp1_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp2_modes[] = { + MUX_INFO(0x28, 1), + MUX_INFO(0x29, 1), + MUX_INFO(0x2a, 1), + MUX_INFO(0x2b, 1), + MUX_INFO(0x2c, 1), + MUX_INFO(0x2d, 1), + MUX_INFO(0x2e, 1), + MUX_INFO(0x2f, 1), +}; + +static struct pca954x_platform_data pca9548sfp2_data = { + .modes = pca9548sfp2_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp3_modes[] = { + MUX_INFO(0x30, 1), + MUX_INFO(0x31, 1), + MUX_INFO(0x32, 1), + MUX_INFO(0x33, 1), + MUX_INFO(0x34, 1), + MUX_INFO(0x35, 1), + MUX_INFO(0x36, 1), + MUX_INFO(0x37, 1), +}; + +static struct pca954x_platform_data pca9548sfp3_data = { + .modes = pca9548sfp3_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp4_modes[] = { + MUX_INFO(0x38, 1), + MUX_INFO(0x39, 1), + MUX_INFO(0x3a, 1), + MUX_INFO(0x3b, 1), + MUX_INFO(0x3c, 1), + MUX_INFO(0x3d, 1), + MUX_INFO(0x3e, 1), + MUX_INFO(0x3f, 1), +}; + +static struct pca954x_platform_data pca9548sfp4_data = { + .modes = pca9548sfp4_modes, + .num_modes = 8, +}; + +static struct pca953x_platform_data tca9539_1_data = { + .gpio_base = 0x10, +}; +//CPU Linking Board at CPU's I2C Bus +static struct pca953x_platform_data pca9555_CPU_data = { + .gpio_base = 0x20, +}; + +static struct i2c_board_info ix9_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9546", 0x72), + .platform_data = &pca9546_1_data, // 0 pca9546_1 + }, + { + I2C_BOARD_INFO("pca9548", 0x77), + .platform_data = &pca9548_1_data, // 1 pca9548_1 + }, + { + I2C_BOARD_INFO("tca9539", 0x74), + .platform_data = &tca9539_1_data, // 2 Board ID and QSFP-DD PW EN/PG + }, + { + I2C_BOARD_INFO("24c02", 0x54), // 3 MB_BOARDINFO_EEPROM + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp1_data, // 4 0x77 ch0 pca9548 #1 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp2_data, // 5 0x77 ch1 pca9548 #2 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp3_data, // 6 0x77 ch2 pca9548 #3 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp4_data, // 7 0x77 ch3 pca9548 #4 + }, + { + I2C_BOARD_INFO("CPLD-QSFPDD", 0x38), // 8 0x72 ch0 CPLD-IO #2, #3 + }, + { + I2C_BOARD_INFO("CPLDLED_IX9", 0x39), // 9 0x72 ch1 CPLD-LED #4, #5 + }, + { + I2C_BOARD_INFO("optoe1", 0x50), // 10 eeprom for loopback module + }, + { + I2C_BOARD_INFO("pca9555", 0x22), // 11 CPU Linking Board at CPU's I2C Bus + .platform_data = &pca9555_CPU_data, + }, +}; + +static struct platform_driver ix9_platform_driver = { + .driver = { + .name = "qci-ix9", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *ix9_device; + +static int __init ix9_platform_init(void) +{ + struct i2c_client *client; + struct i2c_adapter *adapter; + int ret, i; + + ret = platform_driver_register(&ix9_platform_driver); + if (ret < 0) + return ret; + + /* Register platform stuff */ + ix9_device = platform_device_alloc("qci-ix9", -1); + if (!ix9_device) { + ret = -ENOMEM; + goto fail_platform_driver; + } + + ret = platform_device_add(ix9_device); + if (ret) + goto fail_platform_device; + + adapter = i2c_get_adapter(0); + client = i2c_new_device(adapter, &ix9_i2c_devices[0]); // pca9546_1 - Address: 0x72 + client = i2c_new_device(adapter, &ix9_i2c_devices[1]); // pca9548_1 - Address: 0x77 + client = i2c_new_device(adapter, &ix9_i2c_devices[11]); // CPU Linking Board at CPU's I2C Bus - Address: 0x22 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x10); + client = i2c_new_device(adapter, &ix9_i2c_devices[8]); // CPLD-IO #2 - Address: 0x38 + client = i2c_new_device(adapter, &ix9_i2c_devices[9]); // CPLD-LED #4 - Address: 0x39 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x11); + client = i2c_new_device(adapter, &ix9_i2c_devices[8]); // CPLD-IO #3 - Address: 0x38 + client = i2c_new_device(adapter, &ix9_i2c_devices[9]); // CPLD-LED #5 - Address: 0x39 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x12); + client = i2c_new_device(adapter, &ix9_i2c_devices[3]); // MB_BOARDINFO_EEPROM - Address: 0x54 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x13); + client = i2c_new_device(adapter, &ix9_i2c_devices[2]); // tca9539_1 Board ID and QSFP-DD PW EN/PG - Address: 0x74 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x14); + client = i2c_new_device(adapter, &ix9_i2c_devices[4]); // pca9548 #1 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x15); + client = i2c_new_device(adapter, &ix9_i2c_devices[5]); // pca9548 #2 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x16); + client = i2c_new_device(adapter, &ix9_i2c_devices[6]); // pca9548 #3 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x17); + client = i2c_new_device(adapter, &ix9_i2c_devices[7]); // pca9548 #4 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + for(i = 0x20; i < 0x40; i++) + { + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix9_i2c_devices[10]); // eeprom for loopback module - Address: 0x50 + i2c_put_adapter(adapter); + } + + return 0; + +fail_platform_device: + platform_device_put(ix9_device); + +fail_platform_driver: + platform_driver_unregister(&ix9_platform_driver); + return ret; +} + +static void __exit ix9_platform_exit(void) +{ + platform_device_unregister(ix9_device); + platform_driver_unregister(&ix9_platform_driver); +} + +module_init(ix9_platform_init); +module_exit(ix9_platform_exit); + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta IX9 Platform Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/service/ix9-platform-init.service b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/service/ix9-platform-init.service new file mode 100755 index 00000000000..1f33cc17011 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/service/ix9-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Quanta IX9-32X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/quanta_ix9_util.py install +ExecStop=/usr/local/bin/quanta_ix9_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/setup.py b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/setup.py new file mode 100644 index 00000000000..b2f1b39fcd7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='ix9_32x', + version='1.0', + description='Module to initialize Quanta IX9-32X platforms', + + packages=['ix9_32x'], + package_dir={'ix9_32x': 'ix9-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/utils/quanta_ix9_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/utils/quanta_ix9_util.py new file mode 100755 index 00000000000..4c31aa8584b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/utils/quanta_ix9_util.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Quanta Computer Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[IX9-32X]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#turn on module power +'echo 21 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio21/direction', +'echo 1 >/sys/class/gpio/gpio21/value', +#Reset fron-ports LED CPLD +'echo 33 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio33/direction', +'echo 0 >/sys/class/gpio/gpio33/value', +'echo 1 >/sys/class/gpio/gpio33/value', +#Enable front-ports LED decoding +'echo 1 > /sys/class/cpld-led/CPLDLED-1/led_decode', +'echo 1 > /sys/class/cpld-led/CPLDLED-2/led_decode', +#Update System LED +'echo 39 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio39/direction', +'echo 0 > /sys/class/gpio/gpio39/value', +'echo 40 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio40/direction', +'echo 1 > /sys/class/gpio/gpio40/value', +] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-dev', +'i2c-mux-pca954x', +'gpio-pca953x', +'qci_cpld_qsfpdd', +'qci_cpld_led', +'qci_platform_ix9', +'ipmi_devintf' +] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + #setup driver dependency + status, output = exec_cmd("depmod -a ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #remove net rules for generating new net rules + status, output = exec_cmd("systemctl stop systemd-udevd.service ", 1) + status, output = exec_cmd("rm /etc/udev/rules.d/70-persistent-net.rules ", 1) + status, output = exec_cmd("rmmod ixgbe ", 1) + status, output = exec_cmd("rmmod igb ", 1) + status, output = exec_cmd("modprobe igb ", 1) + status, output = exec_cmd("modprobe ixgbe ", 1) + status, output = exec_cmd("systemctl start systemd-udevd.service ", 1) + + #instantiate devices + for i in range(0,len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + #QSFPDD for 1~32 port + for port_number in range(1,33): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + + return + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " ix9 driver already installed...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"i2c-0", 0) + return ret1 + +if __name__ == "__main__": + main() + + + diff --git a/platform/innovium/docker-ptf-invm.mk b/platform/innovium/docker-ptf-invm.mk new file mode 100755 index 00000000000..6c81734676f --- /dev/null +++ b/platform/innovium/docker-ptf-invm.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-invm + +DOCKER_PTF_INVM = docker-ptf-invm.gz +$(DOCKER_PTF_INVM)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_INVM)_DEPENDS += $(PYTHON_SAITHRIFT_INVM) +$(DOCKER_PTF_INVM)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_INVM) diff --git a/platform/innovium/docker-syncd-invm-rpc.mk b/platform/innovium/docker-syncd-invm-rpc.mk new file mode 100755 index 00000000000..313f0d12ac2 --- /dev/null +++ b/platform/innovium/docker-syncd-invm-rpc.mk @@ -0,0 +1,17 @@ +# docker image for innovium syncd with rpc + +DOCKER_SYNCD_INVM_RPC = docker-syncd-invm-rpc.gz +$(DOCKER_SYNCD_INVM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-invm-rpc +$(DOCKER_SYNCD_INVM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(INVM_LIBSAI) +$(DOCKER_SYNCD_INVM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC) +endif + +$(DOCKER_SYNCD_INVM_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 b/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 new file mode 100755 index 00000000000..af31d587b90 --- /dev/null +++ b/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 @@ -0,0 +1,53 @@ +FROM docker-syncd-invm + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -P syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + libpython2.7 \ + libjansson4 \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf b/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf new file mode 100755 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/innovium/docker-syncd-invm.mk b/platform/innovium/docker-syncd-invm.mk new file mode 100755 index 00000000000..3ba35c5edb9 --- /dev/null +++ b/platform/innovium/docker-syncd-invm.mk @@ -0,0 +1,13 @@ +# docker image for innovium syncd + +DOCKER_SYNCD_PLATFORM_CODE = invm +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(INVM_LIBSAI) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm/Dockerfile.j2 b/platform/innovium/docker-syncd-invm/Dockerfile.j2 new file mode 100755 index 00000000000..6f6f5eca9b6 --- /dev/null +++ b/platform/innovium/docker-syncd-invm/Dockerfile.j2 @@ -0,0 +1,34 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_invm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +# Needed for Innovium Debug Shell +RUN apt-get install -y net-tools +RUN apt-get install -y libpython2.7 +RUN apt-get install -y libjansson4 + +RUN dpkg -i \ +{% for deb in docker_syncd_invm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/innovium/docker-syncd-invm/start.sh b/platform/innovium/docker-syncd-invm/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/innovium/docker-syncd-invm/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/innovium/docker-syncd-invm/supervisord.conf b/platform/innovium/docker-syncd-invm/supervisord.conf new file mode 100755 index 00000000000..1af5d70a1d0 --- /dev/null +++ b/platform/innovium/docker-syncd-invm/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/innovium/invm-sai.mk b/platform/innovium/invm-sai.mk new file mode 100755 index 00000000000..8c236a8b68d --- /dev/null +++ b/platform/innovium/invm-sai.mk @@ -0,0 +1,14 @@ +# INVM SAI + +INVM_SAI_ONLINE = https://github.com/Innovium/SONiC/raw/master/debian/master + +INVM_LIBSAI = isai.deb +INVM_HSAI = saihdr.deb +INVM_DRV = ipd.deb + +$(INVM_LIBSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_LIBSAI) +$(INVM_HSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_HSAI) +$(INVM_DRV)_URL = $(INVM_SAI_ONLINE)/$(INVM_DRV) + +SONIC_ONLINE_DEBS += $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_DRV) +SONIC_STRETCH_DEBS += $(INVM_DRV) diff --git a/platform/innovium/libsaithrift-dev.mk b/platform/innovium/libsaithrift-dev.mk new file mode 100755 index 00000000000..5357705bac9 --- /dev/null +++ b/platform/innovium/libsaithrift-dev.mk @@ -0,0 +1,7 @@ +# libsaithrift-dev package + +LIBSAITHRIFT_DEV_INVM = libsaithrift-dev_0.9.4_$(CONFIGURED_ARCH).deb +$(LIBSAITHRIFT_DEV_INVM)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV_INVM)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(THRIFT_COMPILER) $(INVM_LIBSAI) $(INVM_HSAI) +$(LIBSAITHRIFT_DEV_INVM)_RDEPENDS += $(LIBTHRIFT) $(INVM_HSAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV_INVM) diff --git a/platform/innovium/one-image.mk b/platform/innovium/one-image.mk new file mode 100755 index 00000000000..c88ec5e65cd --- /dev/null +++ b/platform/innovium/one-image.mk @@ -0,0 +1,11 @@ +# sonic innovium ONE image installer + +SONIC_ONE_IMAGE = sonic-innovium.bin +$(SONIC_ONE_IMAGE)_MACHINE = innovium +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELTA_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_INSTALLS += $(INVM_DRV) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/innovium/platform-modules-cel.mk b/platform/innovium/platform-modules-cel.mk new file mode 100755 index 00000000000..b93bea758d7 --- /dev/null +++ b/platform/innovium/platform-modules-cel.mk @@ -0,0 +1,12 @@ +# Celestica platform modules + +CEL_PLATFORM_MODULE_VERSION = 0.2.2 + +export CEL_PLATFORM_MODULE_VERSION + +CEL_MIDSTONE_200I_PLATFORM_MODULE = platform-modules-midstone-200i_$(CEL_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb +$(CEL_MIDSTONE_200I_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cel +$(CEL_MIDSTONE_200I_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(CEL_MIDSTONE_200I_PLATFORM_MODULE)_PLATFORM = x86_64-cel_midstone-r0 +SONIC_DPKG_DEBS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE) +SONIC_STRETCH_DEBS+= $(CEL_MIDSTONE_200I_PLATFORM_MODULE) diff --git a/platform/innovium/platform-modules-delta.mk b/platform/innovium/platform-modules-delta.mk new file mode 100644 index 00000000000..68e13fb8a8a --- /dev/null +++ b/platform/innovium/platform-modules-delta.mk @@ -0,0 +1,13 @@ +# Delta Platform modules + +DELTA_ETC032IF_PLATFORM_MODULE_VERSION = 1.1 + +export DELTA_ETC032IF_PLATFORM_MODULE_VERSION + +DELTA_PLATFORM_MODULE = platform-modules-et-c032if_$(DELTA_ETC032IF_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb +$(DELTA_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-delta +$(DELTA_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(DELTA_PLATFORM_MODULE)_PLATFORM = x86_64-delta_et-c032if-r0 + +SONIC_DPKG_DEBS += $(DELTA_PLATFORM_MODULE) +SONIC_STRETCH_DEBS += $(DELTA_PLATFORM_MODULE) diff --git a/platform/innovium/platform.conf b/platform/innovium/platform.conf new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/innovium/python-saithrift.mk b/platform/innovium/python-saithrift.mk new file mode 100755 index 00000000000..23d7df18834 --- /dev/null +++ b/platform/innovium/python-saithrift.mk @@ -0,0 +1,6 @@ +# python-saithrift package + +PYTHON_SAITHRIFT_INVM = python-saithrift_1.2.1_$(CONFIGURED_ARCH).deb +$(PYTHON_SAITHRIFT_INVM)_SRC_PATH = $(SRC_PATH)/SAI +$(PYTHON_SAITHRIFT_INVM)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV) +SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_INVM) diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk new file mode 100755 index 00000000000..68a9dbb4104 --- /dev/null +++ b/platform/innovium/rules.mk @@ -0,0 +1,20 @@ +include $(PLATFORM_PATH)/invm-sai.mk +include $(PLATFORM_PATH)/platform-modules-cel.mk +include $(PLATFORM_PATH)/platform-modules-delta.mk +include $(PLATFORM_PATH)/docker-syncd-invm.mk +include $(PLATFORM_PATH)/docker-syncd-invm-rpc.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/python-saithrift.mk +include $(PLATFORM_PATH)/docker-ptf-invm.mk + +SONIC_ALL += $(SONIC_INVM_ONE_IMAGE) \ + $(DOCKER_FPM) \ + $(DOCKER_PTF_INVM) \ + $(DOCKER_SYNCD_INVM_RPC) + +# Inject invm sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(INVM_HSAI) $(INVM_LIBSAI) $(LIBSAITHRIFT_DEV_INVM) + +# Runtime dependency on invm sai is set only for syncd +$(SYNCD)_RDEPENDS += $(INVM_HSAI) diff --git a/platform/innovium/sonic-platform-modules-cel/.gitignore b/platform/innovium/sonic-platform-modules-cel/.gitignore new file mode 100755 index 00000000000..f805e810e5c --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/.gitignore @@ -0,0 +1,33 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su diff --git a/platform/innovium/sonic-platform-modules-cel/LICENSE b/platform/innovium/sonic-platform-modules-cel/LICENSE new file mode 100755 index 00000000000..2386a3920c0 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2017 Celestica, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/innovium/sonic-platform-modules-cel/README.md b/platform/innovium/sonic-platform-modules-cel/README.md new file mode 100755 index 00000000000..fbda62f91ea --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/README.md @@ -0,0 +1 @@ +# Platform drivers for Celestica Midstone-200i for the SONiC project diff --git a/platform/innovium/sonic-platform-modules-cel/debian/changelog b/platform/innovium/sonic-platform-modules-cel/debian/changelog new file mode 100755 index 00000000000..4a4e5ed2b0a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/changelog @@ -0,0 +1,28 @@ +sonic-cel-platform-modules (0.2.2) unstable; urgency=low + + * Remove I2c mux ininitialization in init-script. + * Remapping virtual I2c ports number in sfputil. + * Fix qsfp driver, missing present status of sfp+ ports. + * Updated sfputil for decode sfp+ EEPROM. + * Add watchdog driver. + + -- Wirut Getbamrung Wed, 1 Feb 2018 16:00:00 +0700 + +sonic-cel-platform-modules (0.2.1) unstable; urgency=low + + * Fix module init-script not load CPLD virtual i2c driver properly. + + -- Pradchaya Phucharoen Mon, 9 Oct 2017 14:24:25 +0700 + +sonic-cel-platform-modules (0.2.0) unstable; urgency=low + + * Add sysfs interface to reset sfp ports. + * Fix qsfp driver, low power mode set/get incorrect bit. + + -- Pradchaya Phucharoen Tue, 26 Sep 2017 11:50:23 +0700 + +sonic-cel-platform-modules (0.1) unstable; urgency=low + + * Initial platform module. + + -- Pradchaya Phucharoen Tue, 23 Aug 2017 10:43:00 +0700 diff --git a/platform/innovium/sonic-platform-modules-cel/debian/compat b/platform/innovium/sonic-platform-modules-cel/debian/compat new file mode 100755 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/innovium/sonic-platform-modules-cel/debian/control b/platform/innovium/sonic-platform-modules-cel/debian/control new file mode 100755 index 00000000000..48ef777a99a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/control @@ -0,0 +1,11 @@ +Source: sonic-cel-platform-modules +Section: main +Priority: extra +Maintainer: Wirut Getbamrung +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-midstone-200i +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init new file mode 100755 index 00000000000..7074d2b5812 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init @@ -0,0 +1,52 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup 200i board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + # Attach TLV 0x56 eeprom + echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device + sleep 2 + + modprobe 200i-cpld + sleep 2 + + # Turn off/down lpmod by defult (0 - Normal, 1 - Low Pow) + echo 0x00 > /sys/devices/platform/ms200i_cpld/qsfp_lpmode + + # Attach 64 instances of EEPROM driver QSFP ports + for ((n=1;n<=66;n++)); + do + echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device + sleep 0.1 + done + + echo "done." + ;; + +stop) + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-200i.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install new file mode 100644 index 00000000000..4f298feb830 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install @@ -0,0 +1,2 @@ +midstone-200i/cfg/midstone-200i-modules.conf etc/modules-load.d +midstone-200i/systemd/platform-modules-midstone-200i.service lib/systemd/system \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst new file mode 100644 index 00000000000..213661ea1e8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable platform-modules-midstone-200i.service +systemctl start platform-modules-midstone-200i.service \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-cel/debian/rules b/platform/innovium/sonic-platform-modules-cel/debian/rules new file mode 100755 index 00000000000..3b01ad7e655 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/rules @@ -0,0 +1,32 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= midstone-200i + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf b/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf new file mode 100755 index 00000000000..b2a3e351c4c --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf @@ -0,0 +1,15 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x +ipmi-devintf diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c new file mode 100755 index 00000000000..3a99d230402 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c @@ -0,0 +1,854 @@ +/* + * ms200i_cpld.c - driver for MidStone's CPLD + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "ms200i_cpld" + +#define RESET0102 0xA248 +#define RESET0310 0xA2DC +#define RESET1118 0xA2DD +#define RESET1926 0xA2DE +#define RESET2733 0xA2DF +#define RESET3441 0xA31C +#define RESET4249 0xA31D +#define RESET5057 0xA31E +#define RESET5864 0xA31F + +#define LPMOD0102 0xA249 +#define LPMOD0310 0xA2E0 +#define LPMOD1118 0xA2E1 +#define LPMOD1926 0xA2E2 +#define LPMOD2733 0xA2E3 +#define LPMOD3441 0xA320 +#define LPMOD4249 0xA321 +#define LPMOD5057 0xA322 +#define LPMOD5864 0xA323 + +#define ABS0102 0xA24A +#define ABS0310 0xA2E4 +#define ABS1118 0xA2E5 +#define ABS1926 0xA2E6 +#define ABS2733 0xA2E7 +#define ABS3441 0xA324 +#define ABS4249 0xA325 +#define ABS5057 0xA326 +#define ABS5864 0xA327 + +#define ABS6566 0xA244 + +#define INT0102 0xA24B +#define INT0310 0xA2E8 +#define INT1118 0xA2E9 +#define INT1926 0xA2EA +#define INT2733 0xA2EB +#define INT3441 0xA328 +#define INT4249 0xA329 +#define INT5057 0xA32A +#define INT5864 0xA32B + +#define LENGTH_PORT_CPLD 66 + +#define CPLD2_EX_CP_I2CFDR0_I2C 0xA230 +#define CPLD2_EX_CP_I2CCR0_I2C 0xA231 +#define CPLD2_EX_CP_I2CSR0_I2C 0xA232 +#define CPLD2_EX_CP_I2CDR0_I2C 0xA233 +#define CPLD2_EX_CP_I2CID0_I2C 0xA234 + +#define CPLD3_EX_CP_I2CFDR0_I2C 0xA2D0 +#define CPLD3_EX_CP_I2CCR0_I2C 0xA2D1 +#define CPLD3_EX_CP_I2CSR0_I2C 0xA2D2 +#define CPLD3_EX_CP_I2CDR0_I2C 0xA2D3 +#define CPLD3_EX_CP_I2CID0_I2C 0xA2D4 + +#define CPLD4_EX_CP_I2CFDR0_I2C 0xA310 +#define CPLD4_EX_CP_I2CCR0_I2C 0xA311 +#define CPLD4_EX_CP_I2CSR0_I2C 0xA312 +#define CPLD4_EX_CP_I2CDR0_I2C 0xA313 +#define CPLD4_EX_CP_I2CID0_I2C 0xA314 + +enum { + I2C_SR_BIT_RXAK = 0, + I2C_SR_BIT_MIF, + I2C_SR_BIT_SRW, + I2C_SR_BIT_BCSTM, + I2C_SR_BIT_MAL, + I2C_SR_BIT_MBB, + I2C_SR_BIT_MAAS, + I2C_SR_BIT_MCF +}; + +enum { + I2C_CR_BIT_BCST = 0, + I2C_CR_BIT_RSTA = 2, + I2C_CR_BIT_TXAK, + I2C_CR_BIT_MTX, + I2C_CR_BIT_MSTA, + I2C_CR_BIT_MIEN, + I2C_CR_BIT_MEN, +}; + +#ifdef DEBUG_KERN +#define info(fmt,args...) printk(KERN_INFO "line %3d : "fmt,__LINE__,##args) +#define check(REG) printk(KERN_INFO "line %3d : %-8s = %2.2X",__LINE__,#REG,inb(REG)); +#else +#define info(fmt,args...) +#define check(REG) +#endif + +#define GET_REG_BIT(REG,BIT) ((inb(REG) >> BIT) & 0x01) +#define SET_REG_BIT_H(REG,BIT) outb(inb(REG) | (0x01 << BIT),REG) +#define SET_REG_BIT_L(REG,BIT) outb(inb(REG) & ~(0x01 << BIT),REG) + +struct ms200i_i2c_data { + int portid; + unsigned REG_FDR0; + unsigned REG_CR0; + unsigned REG_SR0; + unsigned REG_DR0; + unsigned REG_ID0; +}; + +struct ms200i_cpld_data { + struct i2c_adapter *i2c_adapter[LENGTH_PORT_CPLD]; + struct mutex cpld_lock; + unsigned char sfpp_lpmode[2]; + unsigned char sfpp_reset[2]; +}; + +struct ms200i_cpld_data *cpld_data; + +int strtobp(const char* str,unsigned char *bytes){ + unsigned length = strlen(str); + if(length > 20){ + return 0; + } + int i,b=0; + memset(bytes,0,10); + for(i=0;i= '0' && c <= '9'){ + byte = c - '0'; + }else if(c >= 'a' && c <= 'f'){ + byte = c - 'a' + 0x0a; + }else if(c >= 'A' && c <= 'F'){ + byte = c - 'A' + 0x0a; + }else if(c == 'x' || c == 'X'){ + break; + }else{ + continue; + } + if(b%2==0) + bytes[b/2] = byte & 0x0F; + else + bytes[b/2] += (byte << 4) & 0xF0; + b++; + } + return (i/2) + (i%2); +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long reset = 0; + + mutex_lock(&cpld_data->cpld_lock); + + reset = + ((unsigned long)(inb(RESET5864) & 0x7F) << 57 )| + ((unsigned long) inb(RESET5057) << 49 )| + ((unsigned long) inb(RESET4249) << 41 )| + ((unsigned long) inb(RESET3441) << 33 )| + ((unsigned long)(inb(RESET2733) & 0x7F) << 26 )| + ((unsigned long) inb(RESET1926) << 18 )| + ((unsigned long) inb(RESET1118) << 10 )| + ((unsigned long) inb(RESET0310) << 2 )| + ((unsigned long)(inb(RESET0102) & 0x03) ); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%x%16.16lx\n", + cpld_data->sfpp_reset[1] << 1 | cpld_data->sfpp_reset[0], + reset & 0x3ffffffffffffffff); +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char reset[10]; + int num; + + mutex_lock(&cpld_data->cpld_lock); + + num = strtobp(buf,reset); + if (num <= 0) + { + mutex_unlock(&cpld_data->cpld_lock); + return 22; + } + + outb (( reset[0] & 0x03 ) ,RESET0102); + outb (((reset[0] >>2) & 0x3F) | + (((reset[1] ) & 0x03) << 6),RESET0310); + outb (((reset[1] >>2) & 0x3F) | + (((reset[2] ) & 0x03) << 6),RESET1118); + outb (((reset[2] >>2) & 0x3F) | + (((reset[3] ) & 0x03) << 6),RESET1926); + outb (((reset[3] >>2) & 0x3F) | + (((reset[4] ) & 0x01) << 6),RESET2733); + outb (((reset[4] >>1) & 0x7F) | + (((reset[5] ) & 0x01) << 7),RESET3441); + outb (((reset[5] >>1) & 0x7F) | + (((reset[6] ) & 0x01) << 7),RESET4249); + outb (((reset[6] >>1) & 0x7F) | + (((reset[7] ) & 0x01) << 7),RESET5057); + outb (((reset[7] >>1) & 0x7F) ,RESET5864); + + cpld_data->sfpp_reset[0] = reset[8] & 0x01; + cpld_data->sfpp_reset[1] = (reset[8]>>1) & 0x01; + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long lpmod = 0; + + mutex_lock(&cpld_data->cpld_lock); + + lpmod = + ((unsigned long)(inb(LPMOD5864) & 0x7F) << 57 )| + ((unsigned long) inb(LPMOD5057) << 49 )| + ((unsigned long) inb(LPMOD4249) << 41 )| + ((unsigned long) inb(LPMOD3441) << 33 )| + ((unsigned long)(inb(LPMOD2733) & 0x7F) << 26 )| + ((unsigned long) inb(LPMOD1926) << 18 )| + ((unsigned long) inb(LPMOD1118) << 10 )| + ((unsigned long) inb(LPMOD0310) << 2 )| + ((unsigned long)(inb(LPMOD0102) & 0x03) ); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%x%16.16lx\n", + cpld_data->sfpp_lpmode[1] << 1 | cpld_data->sfpp_lpmode[0], + lpmod & 0xffffffffffffffff); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char lpmod[10]; + int num; + + mutex_lock(&cpld_data->cpld_lock); + + num = strtobp(buf,lpmod); + if (num <= 0) + { + mutex_unlock(&cpld_data->cpld_lock); + return 22; + } + + outb (( lpmod[0] & 0x03 ) ,LPMOD0102); + outb (((lpmod[0] >>2) & 0x3F) | + (((lpmod[1] ) & 0x03) << 6),LPMOD0310); + outb (((lpmod[1] >>2) & 0x3F) | + (((lpmod[2] ) & 0x03) << 6),LPMOD1118); + outb (((lpmod[2] >>2) & 0x3F) | + (((lpmod[3] ) & 0x03) << 6),LPMOD1926); + outb (((lpmod[3] >>2) & 0x3F) | + (((lpmod[4] ) & 0x01) << 6),LPMOD2733); + outb (((lpmod[4] >>1) & 0x7F) | + (((lpmod[5] ) & 0x01) << 7),LPMOD3441); + outb (((lpmod[5] >>1) & 0x7F) | + (((lpmod[6] ) & 0x01) << 7),LPMOD4249); + outb (((lpmod[6] >>1) & 0x7F) | + (((lpmod[7] ) & 0x01) << 7),LPMOD5057); + outb (((lpmod[7] >>1) & 0x7F) ,LPMOD5864); + + cpld_data->sfpp_lpmode[0] = lpmod[8] & 0x01; + cpld_data->sfpp_lpmode[1] = (lpmod[8]>>1) & 0x01; + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long present; + int present_sfp; + + mutex_lock(&cpld_data->cpld_lock); + present = + ((unsigned long)(inb(ABS5864) & 0x7F) << 57 )| + ((unsigned long) inb(ABS5057) << 49 )| + ((unsigned long) inb(ABS4249) << 41 )| + ((unsigned long) inb(ABS3441) << 33 )| + ((unsigned long)(inb(ABS2733) & 0x7F) << 26 )| + ((unsigned long) inb(ABS1926) << 18 )| + ((unsigned long) inb(ABS1118) << 10 )| + ((unsigned long) inb(ABS0310) << 2 )| + ((unsigned long)(inb(ABS0102) & 0x03) ); + + present_sfp = (inb(ABS6566) & 0x03); + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%d%16.16lx\n", present_sfp, present & 0xffffffffffffffff); +} + +static ssize_t get_modirq(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long irq; + + mutex_lock(&cpld_data->cpld_lock); + + irq = + ((unsigned long)(inb(INT5864) & 0x7F) << 57 )| + ((unsigned long) inb(INT5057) << 49 )| + ((unsigned long) inb(INT4249) << 41 )| + ((unsigned long) inb(INT3441) << 33 )| + ((unsigned long)(inb(INT2733) & 0x7F) << 26 )| + ((unsigned long) inb(INT1926) << 18 )| + ((unsigned long) inb(INT1118) << 10 )| + ((unsigned long) inb(INT0310) << 2 )| + ((unsigned long)(inb(INT0102) & 0x03) ); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%17.17lx\n", irq & 0x3ffffffffffffffff); +} + +static DEVICE_ATTR(qsfp_reset , S_IRUGO | S_IWUSR, get_reset, set_reset); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); +static DEVICE_ATTR(qsfp_modirq, S_IRUGO, get_modirq, NULL); + +static struct attribute *ms200i_lpc_attrs[] = { + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_modirq.attr, + NULL, +}; + +static struct attribute_group ms200i_lpc_attr_grp = { + .attrs = ms200i_lpc_attrs, +}; + +static struct resource cel_ms200i_lpc_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void cel_ms200i_lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cel_ms200i_lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cel_ms200i_lpc_resources), + .resource = cel_ms200i_lpc_resources, + .dev = { + .release = cel_ms200i_lpc_dev_release, + } +}; + + +static int i2c_wait_ack(struct i2c_adapter *a,unsigned timeout,int writing){ + int error = 0; + unsigned tick=0; + int Status; + + struct ms200i_i2c_data *new_data = i2c_get_adapdata(a); + + check(new_data->REG_SR0); + check(new_data->REG_CR0); + + while(1){ + Status = inb(new_data->REG_SR0); + tick++; + if(tick > timeout){ + info("Status %2.2X",Status); + info("Error Timeout"); + error = -ETIMEDOUT; + break; + } + + + if(Status & (1 << I2C_SR_BIT_MIF)){ + break; + } + + if(writing == 0 && (Status & (1<REG_SR0); + outb(0, new_data->REG_SR0); + + if(error<0){ + info("Status %2.2X",Status); + return error; + } + + if(!(Status & (1 << I2C_SR_BIT_MCF))){ + info("Error Unfinish"); + return -EIO; + } + + if(Status & (1 <REG_CR0,1<cpld_lock); + + /* Write the command register */ + new_data = i2c_get_adapdata(a); + + unsigned int portid = new_data->portid; + +#ifdef DEBUG_KERN + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X |DAT %4.4X" + ,portid,addr,flags,rw,rw == 1 ? "READ ":"WRITE" + ,size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : "ERROR" + ,cmd,data->word); +#endif + /* Map the size to what the chip understands */ + switch (size) { + case I2C_SMBUS_QUICK: + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + case I2C_SMBUS_WORD_DATA: + case I2C_SMBUS_BLOCK_DATA: + break; + default: + printk(KERN_INFO "Unsupported transaction %d\n", size); + error = -EOPNOTSUPP; + goto Done; + } + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + REG_FDR0 = new_data->REG_FDR0; + REG_CR0 = new_data->REG_CR0; + REG_SR0 = new_data->REG_SR0; + REG_DR0 = new_data->REG_DR0; + REG_ID0 = new_data->REG_ID0; + outb(portid,REG_ID0); + + int timeout=0; + int cnt=0; + + ////[S][ADDR/R] + //Clear status register + outb( 0 , REG_SR0); + outb( 1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA ,REG_CR0); + SET_REG_BIT_H(REG_CR0,I2C_CR_BIT_MEN); + + if(rw == I2C_SMBUS_READ && + (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)){ + // sent device address with Read mode + outb(addr << 1 | 0x01,REG_DR0); + }else{ + // sent device address with Write mode + outb(addr << 1 | 0x00,REG_DR0); + } + + + + info( "MS Start"); + + //// Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + + //// [CMD]{A} + if(size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)){ + + //sent command code to data register + outb(cmd,REG_DR0); + info( "MS Send CMD 0x%2.2X",cmd); + + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + switch(size){ + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + // in block data mode keep number of byte in block[0] + cnt = data->block[0]; + break; + default: + cnt = 0; break; + } + + // [CNT] used only bloack data write + if(size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE){ + + outb(cnt,REG_DR0); + info( "MS Send CNT 0x%2.2X",cnt); + + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + // [DATA]{A} + if( rw == I2C_SMBUS_WRITE && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )){ + int bid=0; + info( "MS prepare to sent [%d bytes]",cnt); + if(size == I2C_SMBUS_BLOCK_DATA ){ + bid=1; // block[0] is cnt; + cnt+=1; // offset from block[0] + } + for(;bidblock[bid],REG_DR0); + info( " Data > %2.2X",data->block[bid]); + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + goto Done; + } + } + + } + + //REPEATE START + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )){ + info( "MS Repeated Start"); + + SET_REG_BIT_L(REG_CR0,I2C_CR_BIT_MEN); + outb(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA | + 1 << I2C_CR_BIT_RSTA ,REG_CR0); + SET_REG_BIT_H(REG_CR0,I2C_CR_BIT_MEN); + + // sent Address with Read mode + outb( addr<<1 | 0x1 ,REG_DR0); + + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + goto Done; + } + + } + + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )){ + + switch(size){ + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + //will be changed after recived first data + cnt = 3; break; + default: + cnt = 0; break; + } + + int bid = 0; + info( "MS Receive"); + + //set to Receive mode + outb(1 << I2C_CR_BIT_MEN | + 1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MSTA , REG_CR0); + + for(bid=-1;bidblock[bid] = inb(REG_DR0); + + info( "DATA IN [%d] %2.2X",bid,data->block[bid]); + + if(size==I2C_SMBUS_BLOCK_DATA && bid == 0){ + cnt = data->block[0] + 1; + } + } + } + } + + +Stop: + //[P] + SET_REG_BIT_L(REG_CR0,I2C_CR_BIT_MSTA); + info( "MS STOP"); + +Done: + outb(1<cpld_lock); + + return error; +} + +static u32 ms200i_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA; +} + +static const struct i2c_algorithm ms200i_i2c_algorithm = { + .smbus_xfer = ms200i_i2c_access, + .functionality = ms200i_i2c_func, +}; + +static struct i2c_adapter * cel_ms200i_i2c_init(struct platform_device *pdev, int portid) +{ + int error; + + struct i2c_adapter *new_adapter; + struct ms200i_i2c_data *new_data; + + new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); + if (!new_adapter) + return NULL; + + new_adapter->dev.parent = &pdev->dev; + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->algo = &ms200i_i2c_algorithm; + + snprintf(new_adapter->name, sizeof(new_adapter->name), + "SMBus ms200i i2c Adapter portid@%04x", portid); + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) + return NULL; + + new_data->portid = portid; + + // QSFP 1-2 and SFP 1-2 + if((portid >= 1 && portid <= 2) || (portid >= 65 && portid <= 66)){ + new_data->REG_FDR0 = CPLD2_EX_CP_I2CFDR0_I2C; + new_data->REG_CR0 = CPLD2_EX_CP_I2CCR0_I2C; + new_data->REG_SR0 = CPLD2_EX_CP_I2CSR0_I2C; + new_data->REG_DR0 = CPLD2_EX_CP_I2CDR0_I2C; + new_data->REG_ID0 = CPLD2_EX_CP_I2CID0_I2C; + + }else if((portid >= 3 && portid <= 33)){ + new_data->REG_FDR0 = CPLD3_EX_CP_I2CFDR0_I2C; + new_data->REG_CR0 = CPLD3_EX_CP_I2CCR0_I2C; + new_data->REG_SR0 = CPLD3_EX_CP_I2CSR0_I2C; + new_data->REG_DR0 = CPLD3_EX_CP_I2CDR0_I2C; + new_data->REG_ID0 = CPLD3_EX_CP_I2CID0_I2C; + + }else if((portid >= 34 && portid <= 64)){ + new_data->REG_FDR0 = CPLD4_EX_CP_I2CFDR0_I2C; + new_data->REG_CR0 = CPLD4_EX_CP_I2CCR0_I2C; + new_data->REG_SR0 = CPLD4_EX_CP_I2CSR0_I2C; + new_data->REG_DR0 = CPLD4_EX_CP_I2CDR0_I2C; + new_data->REG_ID0 = CPLD4_EX_CP_I2CID0_I2C; + } + outb(portid,new_data->REG_ID0); + outb(0x1F,new_data->REG_FDR0); // 0x1F 100kHz + + + i2c_set_adapdata(new_adapter,new_data); + + error = i2c_add_adapter(new_adapter); + if(error) + return NULL; + + return new_adapter; +}; + +static int cel_ms200i_lpc_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + int portid_count; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct ms200i_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR " Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &ms200i_lpc_attr_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs\n"); + } + + for(portid_count=1 ; portid_count<=LENGTH_PORT_CPLD ; portid_count++) + cpld_data->i2c_adapter[portid_count-1] = cel_ms200i_i2c_init(pdev, portid_count); + return 0; +} + +static int cel_ms200i_lpc_drv_remove(struct platform_device *pdev) +{ + int portid_count; + struct ms200i_i2c_data *new_data; + + sysfs_remove_group(&pdev->dev.kobj, &ms200i_lpc_attr_grp); + + for (portid_count=1 ; portid_count<=LENGTH_PORT_CPLD ; portid_count++) + i2c_del_adapter(cpld_data->i2c_adapter[portid_count-1]); + return 0; +} + +static struct platform_driver cel_ms200i_lpc_drv = { + .probe = cel_ms200i_lpc_drv_probe, + .remove = __exit_p(cel_ms200i_lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cel_ms200i_lpc_init(void) +{ + platform_device_register(&cel_ms200i_lpc_dev); + platform_driver_register(&cel_ms200i_lpc_drv); + + return 0; +} + +void cel_ms200i_lpc_exit(void) +{ + platform_driver_unregister(&cel_ms200i_lpc_drv); + platform_device_unregister(&cel_ms200i_lpc_dev); +} + +module_init(cel_ms200i_lpc_init); +module_exit(cel_ms200i_lpc_exit); + +MODULE_AUTHOR("Pariwat Leamsumran "); +MODULE_DESCRIPTION("Celestica MidStone ms200i LPC Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c new file mode 100755 index 00000000000..9b3d79cc5a6 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c @@ -0,0 +1,363 @@ +/* + * Watchdog driver for the Midstone 200i + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRIVER_NAME "ms200i_wdt" + +#define CONF_GPIOBASE 0x8000F848 +#define PCI_CONFIG_ADDRESS 0x0CF8 +#define PCI_CONFIG_DATA 0x0CFC + +// WDT_CTRL is GPIO 32 +// GPIOBUS: 2 ,bit: 0th +#define WDT_CTRL_ENB_REG 0x30 +#define WDT_CTRL_DIR_REG 0x34 +#define WDT_CTRL_LVL_REG 0x38 +#define WDT_CTRL_MASK (unsigned long)(1<<(32%32)) + +// WDT_FEED is GPIO 15 +// GPIOBUS: 1 ,bit: 15th +#define WDT_FEED_ENB_REG 0x00 +#define WDT_FEED_DIR_REG 0x04 +#define WDT_FEED_LVL_REG 0x0C +#define WDT_FEED_MASK (unsigned long)(1<<(15%32)) + +static bool nowayout = WATCHDOG_NOWAYOUT; + +// For enabling Debug message +//#define ENAB_DEBUG +//#define ENAB_DEBUG_GPIO + +struct ms200i_wdt_drvdata { + struct watchdog_device wdt; + struct mutex lock; + unsigned int gpiobase; +}; + +static struct resource ms200i_wdt_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void ms200i_wdt_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device ms200i_wdt_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(ms200i_wdt_resources), + .resource = ms200i_wdt_resources, + .dev = { + .release = ms200i_wdt_dev_release, + } +}; + +static int ms200i_wdt_start(struct watchdog_device *wdt_dev) +{ + struct ms200i_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned char reset_ctrl = 0x00; + unsigned long enab, gpio ,dir; + unsigned int base_addr; +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT Start"); +#endif + mutex_lock(&drvdata->lock); + + base_addr = drvdata->gpiobase; + + enab = inl(base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl enab %16X",enab); +#endif + enab |= WDT_CTRL_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl enab %16X",enab); +#endif + outl(enab, base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + enab = inl(base_addr + WDT_CTRL_ENB_REG); + printk(KERN_INFO "ctrl enab %16X",enab); +#endif + + enab = inl(base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed enab %16X",enab); +#endif + enab |= WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed enab %16X",enab); +#endif + outl(enab, base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + enab = inl(base_addr + WDT_FEED_ENB_REG); + printk(KERN_INFO "feed enab %16X",enab); +#endif + + dir = inl(base_addr + WDT_CTRL_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl dir %16X",dir); +#endif + dir &= ~WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl dir %16X",dir); +#endif + outl(dir, base_addr + WDT_CTRL_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + dir = inl(base_addr + WDT_CTRL_DIR_REG); + printk(KERN_INFO "ctrl dir %16X",dir); +#endif + + dir = inl(base_addr + WDT_FEED_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed dir %16X",dir); +#endif + dir &= ~WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed dir %16X",dir); +#endif + outl(dir, base_addr + WDT_FEED_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + dir = inl(base_addr + WDT_FEED_DIR_REG); + printk(KERN_INFO "feed dir %16X",dir); +#endif + + gpio = inl(base_addr + WDT_CTRL_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + gpio &= ~WDT_CTRL_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + outl_p( gpio, base_addr + WDT_CTRL_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_CTRL_LVL_REG); + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + + mutex_unlock(&drvdata->lock); + printk(KERN_INFO "WDT Start Finish"); + return 0; +} + +static int ms200i_wdt_stop(struct watchdog_device *wdt_dev) +{ + struct ms200i_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned long gpio; + unsigned long base_addr; +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT Stop"); +#endif + mutex_lock(&drvdata->lock); + + base_addr = drvdata->gpiobase; + + gpio = inl(base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + gpio &= ~(WDT_CTRL_MASK); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + outl_p(gpio, base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_CTRL_ENB_REG); + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + + gpio = inl(base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + gpio &= ~(WDT_CTRL_MASK); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + outl_p(gpio, base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_FEED_ENB_REG); + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + + mutex_unlock(&drvdata->lock); + + return 0; +} + +static int ms200i_wdt_ping(struct watchdog_device *wdt_dev) +{ + struct ms200i_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned long gpio; + unsigned long base_addr; + +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT PING"); +#endif + mutex_lock(&drvdata->lock); + + base_addr = drvdata->gpiobase; + + gpio = inl(base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + gpio &= ~WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + outl_p( gpio, base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_FEED_LVL_REG); + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + mdelay(10); + + gpio = inl(base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + gpio |= WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + outl_p( gpio, base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_FEED_LVL_REG); + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + + mutex_unlock(&drvdata->lock); +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT PING FINISH"); +#endif + return 0; +} + +static const struct watchdog_info ms200i_wdt_info = { + .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, + .identity = "MS200i Watchdog", +}; + +static const struct watchdog_ops ms200i_wdt_ops = { + .owner = THIS_MODULE, + .start = ms200i_wdt_start, + .stop = ms200i_wdt_stop, + .ping = ms200i_wdt_ping, +}; + +static int ms200i_wdt_probe(struct platform_device *pdev) +{ + struct ms200i_wdt_drvdata *drvdata; + int ret; + unsigned int base_addr; + + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), + GFP_KERNEL); + if (!drvdata) { + ret = -ENOMEM; + goto err; + } + + outl(CONF_GPIOBASE, PCI_CONFIG_ADDRESS); + base_addr = inl(PCI_CONFIG_DATA); + // remove last bit , that is hardware inditcate. + base_addr &= ~(0x01); + + if(base_addr == 0){ + printk(KERN_INFO "can't get gpio base address"); + }else{ + printk(KERN_INFO "gpio base address : %8.8X",base_addr); + } + + mutex_init(&drvdata->lock); + + drvdata->gpiobase = base_addr; + drvdata->wdt.info = &ms200i_wdt_info; + drvdata->wdt.ops = &ms200i_wdt_ops; + + watchdog_set_nowayout(&drvdata->wdt, nowayout); + watchdog_set_drvdata(&drvdata->wdt, drvdata); + + ret = watchdog_register_device(&drvdata->wdt); + if (ret != 0) { + dev_err(&pdev->dev, "watchdog_register_device() failed: %d\n", + ret); + goto err; + } + + platform_set_drvdata(pdev, drvdata); + +err: + return ret; +} + +static int ms200i_wdt_remove(struct platform_device *pdev) +{ + struct ms200i_wdt_drvdata *drvdata = platform_get_drvdata(pdev); + + watchdog_unregister_device(&drvdata->wdt); +#ifdef ENAB_DEBUG + printk(KERN_INFO "MS200i WDT Remove"); +#endif + return 0; +} + +static struct platform_driver ms200i_wdt_drv = { + .probe = ms200i_wdt_probe, + .remove = ms200i_wdt_remove, + .driver = { + .name = DRIVER_NAME, + }, +}; + +int ms200i_wdt_init(void) +{ +#ifdef ENAB_DEBUG + printk(KERN_INFO "MS200i WDT Init"); +#endif + platform_device_register(&ms200i_wdt_dev); + platform_driver_register(&ms200i_wdt_drv); + + return 0; +} + +void ms200i_wdt_exit(void) +{ +#ifdef ENAB_DEBUG + printk(KERN_INFO "MS200i WDT Exit"); +#endif + platform_driver_unregister(&ms200i_wdt_drv); + platform_device_unregister(&ms200i_wdt_dev); +} + +module_init(ms200i_wdt_init); +module_exit(ms200i_wdt_exit); + +MODULE_AUTHOR("Sittisak Sinprem "); +MODULE_DESCRIPTION("Midstone ms200i Watchdog"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ms200i-watchdog"); diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile new file mode 100755 index 00000000000..932a13cf825 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile @@ -0,0 +1 @@ +obj-m := 200i_cpld.o mc24lc64t.o 200i_wdt.o diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c new file mode 100755 index 00000000000..a391056d09a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c @@ -0,0 +1,142 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct mc24lc64t_data { + struct i2c_client *fake_client; + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = 65536, + .read = mc24lc64t_read, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + drvdata->fake_client = i2c_new_dummy(client->adapter, client->addr + 1); + if (!drvdata->fake_client) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + if (err) + i2c_unregister_device(drvdata->fake_client); + + return err; +} + +static int mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + + i2c_unregister_device(drvdata->fake_client); + + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return 0; +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service b/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service new file mode 100644 index 00000000000..dbb7aed39df --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service @@ -0,0 +1,13 @@ +[Unit] +Description=Celestica Midstone 200i platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-midstone-200i start +ExecStop=-/etc/init.d/platform-modules-midstone-200i stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-delta/LICENSE b/platform/innovium/sonic-platform-modules-delta/LICENSE new file mode 100644 index 00000000000..ea87fe9caab --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Delta Networks, Inc. + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c b/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c new file mode 100644 index 00000000000..73d9900af5b --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c @@ -0,0 +1,381 @@ +/* + * + * + * Copyright (C) 2017 Delta Networks, Inc. + * + * This program is free software; you can redistribute it + * and/or modify it under the terms ofthe GNU General Public License as + * published by the Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + * + * + * + * + * A hwmon driver for the SMSC EMC2305 fan controller + * Complete datasheet is available (6/2013) at: + * http://www.smsc.com/media/Downloads_Public/Data_Sheets/2305.pdf + */ + +#include +#include +#include +#include +#include + + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf); +static ssize_t set_fan(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf); +static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_fan_percentage(struct device *dev, struct device_attribute * devattr, + char *buf); +static const unsigned short normal_i2c[] = { 0x2C, 0x2D, 0x2E, 0x2F, 0x4C, + 0x4D, I2C_CLIENT_END + }; + + +#define EMC2305_REG_DEVICE 0xFD +#define EMC2305_REG_VENDOR 0xFE + +//#define FAN_MINIMUN 0x33 /*20%*/ +#define FAN_MINIMUN 0x0 /*0%*/ +#define FAN_RPM_BASED 0xAB + +#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * n) +#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * n) +#define EMC2305_REG_FAN_TACH(n) (0x3E + 0x10 * n) +#define EMC2305_REG_FAN_CONF(n) (0x32 + 0x10 * n) +#define EMC2305_REG_FAN_REAR_H_RPM(n) (0x3D + 0x10 * n) +#define EMC2305_REG_FAN_REAR_L_RPM(n) (0x3C + 0x10 * n) + +#define EMC2305_DEVICE 0x34 +#define EMC2305_VENDOR 0x5D +#define MAX_FAN_SPEED 23000 + +struct emc2305_data +{ + struct device *hwmon_dev; + struct attribute_group attrs; + struct mutex lock; +}; + +static int emc2305_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int emc2305_detect(struct i2c_client *client, + struct i2c_board_info *info); +static int emc2305_remove(struct i2c_client *client); + +static const struct i2c_device_id emc2305_id[] = +{ + { "emc2305", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_id); + +static struct i2c_driver emc2305_driver = +{ + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_id, + .detect = emc2305_detect, + .address_list = normal_i2c, +}; + +static SENSOR_DEVICE_ATTR(fan1_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 4); +static SENSOR_DEVICE_ATTR(fan1_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 0); +static SENSOR_DEVICE_ATTR(fan2_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 1); +static SENSOR_DEVICE_ATTR(fan3_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 2); +static SENSOR_DEVICE_ATTR(fan4_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 3); +static SENSOR_DEVICE_ATTR(fan5_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 4); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 4); + +static struct attribute *emc2305_attr[] = +{ + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan1_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan2_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan3_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan4_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan5_input_percentage.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm5.dev_attr.attr, + NULL +}; + +static ssize_t show_fan_percentage(struct device *dev, struct device_attribute * devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + mutex_lock(&data->lock); + val = i2c_smbus_read_word_swapped(client, + EMC2305_REG_FAN_TACH(attr->index)); + mutex_unlock(&data->lock); + /* Left shift 3 bits for showing correct RPM */ + val = val >> 3; + if ((int)(3932160 * 2 / (val > 0 ? val : 1) == 960))return sprintf(buf, "%d\n", 0); + return sprintf(buf, "%d\n", (int)(3932160 * 2 / (val > 0 ? val : 1) * 100 / MAX_FAN_SPEED)); +} + + +static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long hsb, lsb; + unsigned long tech; + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 100) + { + return -EINVAL; + } + + if (val <= 5) + { + hsb = 0xff; /*high bit*/ + lsb = 0xe0; /*low bit*/ + } + else + { + val = val * 230; + tech = (3932160 * 2) / (val > 0 ? val : 1); + hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff); + lsb = (uint8_t)((tech << 3) & 0x0f8); + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb); + mutex_unlock(&data->lock); + return count; +} + + +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + + mutex_lock(&data->lock); + val = i2c_smbus_read_word_swapped(client, + EMC2305_REG_FAN_TACH(attr->index)); + mutex_unlock(&data->lock); + /* Left shift 3 bits for showing correct RPM */ + val = val >> 3; + return sprintf(buf, "%d\n", 3932160 * 2 / (val > 0 ? val : 1)); +} + +static ssize_t set_fan(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long hsb, lsb; + unsigned long tech; + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 23000) + { + return -EINVAL; + } + + if (val <= 960) + { + hsb = 0xff; /*high bit*/ + lsb = 0xe0; /*low bit*/ + } + else + { + tech = (3932160 * 2) / (val > 0 ? val : 1); + hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff); + lsb = (uint8_t)((tech << 3) & 0x0f8); + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb); + mutex_unlock(&data->lock); + return count; +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + mutex_lock(&data->lock); + val = i2c_smbus_read_byte_data(client, + EMC2305_REG_FAN_DRIVE(attr->index)); + mutex_unlock(&data->lock); + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 255) + { + return -EINVAL; + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, + EMC2305_REG_FAN_DRIVE(attr->index), + val); + mutex_unlock(&data->lock); + return count; +} + +static int emc2305_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + int vendor, device; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + { + return -ENODEV; + } + + vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR); + if (vendor != EMC2305_VENDOR) + { + return -ENODEV; + } + + device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE); + if (device != EMC2305_DEVICE) + { + return -ENODEV; + } + + strlcpy(info->type, "emc2305", I2C_NAME_SIZE); + + return 0; +} + +static int emc2305_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct emc2305_data *data; + int err; + int i; + + data = devm_kzalloc(&client->dev, sizeof(struct emc2305_data), + GFP_KERNEL); + if (!data) + { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s chip found\n", client->name); + + data->attrs.attrs = emc2305_attr; + err = sysfs_create_group(&client->dev.kobj, &data->attrs); + if (err) + { + return err; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) + { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + for (i = 0; i < 5; i++) + { + /* set minimum drive to 0% */ + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i), FAN_MINIMUN); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_CONF(i), FAN_RPM_BASED); + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +} + +static int emc2305_remove(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return 0; +} + +module_i2c_driver(emc2305_driver); + +MODULE_AUTHOR("Neal Tai"); +MODULE_DESCRIPTION("SMSC EMC2305 fan controller driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-delta/debian/changelog b/platform/innovium/sonic-platform-modules-delta/debian/changelog new file mode 100644 index 00000000000..ec8327e8ae7 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/changelog @@ -0,0 +1,5 @@ +sonic-delta-platform-modules (1.1) unstable; urgency=low + + * Initial release + + -- Neal Tai Fri, 21 APR 2017 11:11:11 -0800 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/compat b/platform/innovium/sonic-platform-modules-delta/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/control b/platform/innovium/sonic-platform-modules-delta/debian/control new file mode 100644 index 00000000000..71c403387f8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/control @@ -0,0 +1,13 @@ +Source: sonic-delta-platform-modules +Section: main +Priority: extra +Maintainer: Neal Tai +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-et-c032if +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + + diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init new file mode 100755 index 00000000000..f2d24b04a0d --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init @@ -0,0 +1,39 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup et-c032if board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + modprobe optoe + modprobe delta_et-c032if_platform + + /usr/local/bin/et-c032if_platform_init.sh + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-et-c032if.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install new file mode 100644 index 00000000000..45886664b87 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install @@ -0,0 +1,3 @@ +et-c032if/cfg/et-c032if-modules.conf etc/modules-load.d +et-c032if/scripts/et-c032if_platform_init.sh usr/local/bin +systemd/platform-modules-et-c032if.service lib/systemd/system diff --git a/platform/innovium/sonic-platform-modules-delta/debian/rules b/platform/innovium/sonic-platform-modules-delta/debian/rules new file mode 100755 index 00000000000..a84c235e548 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/rules @@ -0,0 +1,33 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= et-c032if + +%: + dh $@ --with=systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf b/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile new file mode 100644 index 00000000000..2e8feec0b40 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := delta_et-c032if_platform.o + diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c new file mode 100644 index 00000000000..d4e23a166e8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c @@ -0,0 +1,2100 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define CPULD_ADDR 0x31 +#define SWPLD2_ADDR 0x35 +#define SWPLD3_ADDR 0x36 +#define BUS0_BASE_NUM 10 +#define BUS0_DEV_NUM 3 +#define DEFAULT_NUM 0 +#define EEPROM_VAL 0xfc +#define SWPLD_VAL 0xfe +#define QSFP_VAL 0xff +#define BUS0_MUX_REG 0x14 +#define QSFP_PRESENCE_1 0x51 +#define QSFP_PRESENCE_2 0x52 +#define QSFP_PRESENCE_3 0x51 +#define QSFP_PRESENCE_4 0x52 +#define SFP_PRESENCE 0x71 +#define QSFP_RESPONDE_1 0x31 +#define QSFP_RESPONDE_2 0x32 +#define QSFP_RESPONDE_3 0x31 +#define QSFP_RESPONDE_4 0x32 +#define QSFP_LP_MODE_1 0x21 +#define QSFP_LP_MODE_2 0x22 +#define QSFP_LP_MODE_3 0x21 +#define QSFP_LP_MODE_4 0x22 +#define QSFP_RESET_1 0x11 +#define QSFP_RESET_2 0x12 +#define QSFP_RESET_3 0x11 +#define QSFP_RESET_4 0x12 +#define QSFP_INTERRUPT_1 0x61 +#define QSFP_INTERRUPT_2 0x62 +#define QSFP_INTERRUPT_3 0x61 +#define QSFP_INTERRUPT_4 0x62 + +#define EEPROM_SIZE 256 +#define EEPROM_MASK 29 +#define ATTR_R 1 +#define ATTR_W 2 + +#define et_c032if_i2c_device_num(NUM){ \ + .name = "delta-et-c032if-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &et_c032if_i2c_device_platform_data[NUM],\ + .release = device_release, \ + }, \ +} + +struct mutex dni_lock; + +/*Define struct to get client of i2c_new_deivce */ +struct i2c_client * i2c_client_9548_1; +struct i2c_client * i2c_client_9548_2; +struct i2c_client * i2c_client_9548_3; +struct i2c_client * i2c_client_9548_4; +struct i2c_client * i2c_client_9548_5; + +static struct kobject *kobj_cpld; +static struct kobject *kobj_swpld2; +static struct kobject *kobj_swpld3; +static struct kobject *kobj_sfp; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, + BUS8, + BUS9, + BUS10, + BUS11, + BUS12, + BUS13, + BUS14, + BUS15, + BUS16, + BUS17, + BUS18, + BUS19, +}; + +static struct cpld_attribute_data { + uint8_t bus; + uint8_t addr; + uint8_t reg; + uint8_t mask; + char note[350]; +}; + +unsigned char reverse_8bits(unsigned char c) +{ + unsigned char s = 0; + int i; + for (i = 0; i < 8; ++i) { + s <<= 1; + s |= c & 1; + c >>= 1; + } + return s; +} + +unsigned char dni_log2 (unsigned char num){ + unsigned char num_log2 = 0; + while(num > 0){ + num = num >> 1; + num_log2 += 1; + } + return num_log2 -1; +} + +/*---------------- I2C device - start ------------- */ +static void device_release(struct device *dev) +{ + return; +} + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; +/* pca9548 - add 8 bus */ + +static struct pca954x_platform_mode pca954x_1_mode[] = +{ + { .adap_id = 30, + .deselect_on_exit = 1, + }, + { .adap_id = 31, + .deselect_on_exit = 1, + }, + { .adap_id = 32, + .deselect_on_exit = 1, + }, + { .adap_id = 33, + .deselect_on_exit = 1, + }, + { .adap_id = 34, + .deselect_on_exit = 1, + }, + { .adap_id = 35, + .deselect_on_exit = 1, + }, + { .adap_id = 36, + .deselect_on_exit = 1, + }, + { .adap_id = 37, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_2_mode[] = +{ + { .adap_id = 38, + .deselect_on_exit = 1, + }, + { .adap_id = 39, + .deselect_on_exit = 1, + }, + { .adap_id = 40, + .deselect_on_exit = 1, + }, + { .adap_id = 41, + .deselect_on_exit = 1, + }, + { .adap_id = 42, + .deselect_on_exit = 1, + }, + { .adap_id = 43, + .deselect_on_exit = 1, + }, + { .adap_id = 44, + .deselect_on_exit = 1, + }, + { .adap_id = 45, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_3_mode[] = +{ + { .adap_id = 46, + .deselect_on_exit = 1, + }, + { .adap_id = 47, + .deselect_on_exit = 1, + }, + { .adap_id = 48, + .deselect_on_exit = 1, + }, + { .adap_id = 49, + .deselect_on_exit = 1, + }, + { .adap_id = 50, + .deselect_on_exit = 1, + }, + { .adap_id = 51, + .deselect_on_exit = 1, + }, + { .adap_id = 52, + .deselect_on_exit = 1, + }, + { .adap_id = 53, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_4_mode[] = +{ + { .adap_id = 54, + .deselect_on_exit = 1, + }, + { .adap_id = 55, + .deselect_on_exit = 1, + }, + { .adap_id = 56, + .deselect_on_exit = 1, + }, + { .adap_id = 57, + .deselect_on_exit = 1, + }, + { .adap_id = 58, + .deselect_on_exit = 1, + }, + { .adap_id = 59, + .deselect_on_exit = 1, + }, + { .adap_id = 60, + .deselect_on_exit = 1, + }, + { .adap_id = 61, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_5_mode[] = +{ + { .adap_id = 62, + .deselect_on_exit = 1, + }, + { .adap_id = 63, + .deselect_on_exit = 1, + }, + { .adap_id = 64, + .deselect_on_exit = 1, + }, + { .adap_id = 65, + .deselect_on_exit = 1, + }, + { .adap_id = 66, + .deselect_on_exit = 1, + }, + { .adap_id = 67, + .deselect_on_exit = 1, + }, + { .adap_id = 68, + .deselect_on_exit = 1, + }, + { .adap_id = 69, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data[] = +{ + { + .modes = pca954x_1_mode, + .num_modes = ARRAY_SIZE(pca954x_1_mode), + }, + { + .modes = pca954x_2_mode, + .num_modes = ARRAY_SIZE(pca954x_2_mode), + }, + { + .modes = pca954x_3_mode, + .num_modes = ARRAY_SIZE(pca954x_3_mode), + }, + { + .modes = pca954x_4_mode, + .num_modes = ARRAY_SIZE(pca954x_4_mode), + }, + { + .modes = pca954x_5_mode, + .num_modes = ARRAY_SIZE(pca954x_5_mode), + }, +}; + +static struct i2c_board_info __initdata i2c_info_pca9548[] = +{ + { + I2C_BOARD_INFO("pca9548", 0x71), + .platform_data = &pca954x_data[0], + }, + { + I2C_BOARD_INFO("pca9548", 0x72), + .platform_data = &pca954x_data[1], + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca954x_data[2], + }, + { + I2C_BOARD_INFO("pca9548", 0x74), + .platform_data = &pca954x_data[3], + }, + { + I2C_BOARD_INFO("pca9548", 0x76), + .platform_data = &pca954x_data[4], + }, +}; + +static struct i2c_device_platform_data et_c032if_i2c_device_platform_data[] = { + { + /* id eeprom (0x53) */ + .parent = 10, + .info = { I2C_BOARD_INFO("24c02", 0x53) }, + .client = NULL, + }, + { + /* qsfp 1 (0x50) */ + .parent = 30, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 2 (0x50) */ + .parent = 31, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 3 (0x50) */ + .parent = 32, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 4 (0x50) */ + .parent = 33, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 5 (0x50) */ + .parent = 34, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 6 (0x50) */ + .parent = 35, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 7 (0x50) */ + .parent = 36, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 8 (0x50) */ + .parent = 37, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 9 (0x50) */ + .parent = 38, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 10 (0x50) */ + .parent = 39, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 11 (0x50) */ + .parent = 40, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 12 (0x50) */ + .parent = 41, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 13 (0x50) */ + .parent = 42, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 14 (0x50) */ + .parent = 43, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 15 (0x50) */ + .parent = 44, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 16 (0x50) */ + .parent = 45, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 17 (0x50) */ + .parent = 46, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 18 (0x50) */ + .parent = 47, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 19 (0x50) */ + .parent = 48, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 20 (0x50) */ + .parent = 49, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 21 (0x50) */ + .parent = 50, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 22 (0x50) */ + .parent = 51, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 23 (0x50) */ + .parent = 52, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 24 (0x50) */ + .parent = 53, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 25 (0x50) */ + .parent = 54, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 26 (0x50) */ + .parent = 55, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 27 (0x50) */ + .parent = 56, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 28 (0x50) */ + .parent = 57, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 29 (0x50) */ + .parent = 58, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 30 (0x50) */ + .parent = 59, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 31 (0x50) */ + .parent = 60, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 32 (0x50) */ + .parent = 61, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* sfp 1 (0x50) */ + .parent = 62, + .info = { .type = "optoe2", .addr = 0x50 }, + .client = NULL, + }, + { + /* sfp 2 (0x50) */ + .parent = 63, + .info = { .type = "optoe2", .addr = 0x50 }, + .client = NULL, + }, + +}; + + +static struct platform_device et_c032if_i2c_device[] = { + et_c032if_i2c_device_num(0), + et_c032if_i2c_device_num(1), + et_c032if_i2c_device_num(2), + et_c032if_i2c_device_num(3), + et_c032if_i2c_device_num(4), + et_c032if_i2c_device_num(5), + et_c032if_i2c_device_num(6), + et_c032if_i2c_device_num(7), + et_c032if_i2c_device_num(8), + et_c032if_i2c_device_num(9), + et_c032if_i2c_device_num(10), + et_c032if_i2c_device_num(11), + et_c032if_i2c_device_num(12), + et_c032if_i2c_device_num(13), + et_c032if_i2c_device_num(14), + et_c032if_i2c_device_num(15), + et_c032if_i2c_device_num(16), + et_c032if_i2c_device_num(17), + et_c032if_i2c_device_num(18), + et_c032if_i2c_device_num(19), + et_c032if_i2c_device_num(20), + et_c032if_i2c_device_num(21), + et_c032if_i2c_device_num(22), + et_c032if_i2c_device_num(23), + et_c032if_i2c_device_num(24), + et_c032if_i2c_device_num(25), + et_c032if_i2c_device_num(26), + et_c032if_i2c_device_num(27), + et_c032if_i2c_device_num(28), + et_c032if_i2c_device_num(29), + et_c032if_i2c_device_num(30), + et_c032if_i2c_device_num(31), + et_c032if_i2c_device_num(32), + et_c032if_i2c_device_num(33), + et_c032if_i2c_device_num(34), +}; + +/*---------------- I2C device - end ------------- */ + +/*---------------- I2C driver - start ------------- */ +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- CPLD - start ------------- */ + +unsigned char cpupld_reg_addr; +unsigned char swpld2_reg_addr; +unsigned char swpld3_reg_addr; + +/* CPLD -- device */ + +enum cpld_type { + cpu_cpld, +}; + +enum swpld2_type { + swpld2, +}; + +enum swpld3_type { + swpld3, +}; + +enum cpld_attributes { +//CPLDs address and value + CPLD_REG_ADDR, + CPLD_REG_VALUE, + SWPLD2_REG_ADDR, + SWPLD2_REG_VALUE, + SWPLD3_REG_ADDR, + SWPLD3_REG_VALUE, + SFP_SELECT_PORT, + SFP_IS_PRESENT, + SFP_IS_PRESENT_ALL, + QSFP_LP_MODE, + QSFP_RESET, + QSFP_INTERRUPT, + QSFP_RESPONDE, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +static struct cpld_platform_data et_c032if_cpld_platform_data[] = { + [cpu_cpld] = { + .reg_addr = CPULD_ADDR, + }, +}; + +static struct cpld_platform_data et_c032if_swpld2_platform_data[] = { + [swpld2] = { + .reg_addr = SWPLD2_ADDR, + }, +}; + +static struct cpld_platform_data et_c032if_swpld3_platform_data[] = { + [swpld3] = { + .reg_addr = SWPLD3_ADDR, + }, +}; + +static struct platform_device et_c032if_cpld = { + .name = "delta-et-c032if-cpld", + .id = 0, + .dev = { + .platform_data = et_c032if_cpld_platform_data, + .release = device_release, + }, +}; + +static struct platform_device et_c032if_swpld2 = { + .name = "delta-et-c032if-swpld2", + .id = 0, + .dev = { + .platform_data = et_c032if_swpld2_platform_data, + .release = device_release + }, +}; + +static struct platform_device et_c032if_swpld3 = { + .name = "delta-et-c032if-swpld3", + .id = 0, + .dev = { + .platform_data = et_c032if_swpld3_platform_data, + .release = device_release + }, +}; + +static ssize_t get_cpld_reg(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + int mask; + int value; + char note[450]; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + mutex_lock(&dni_lock); + switch (attr->index) { + case CPLD_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", cpupld_reg_addr); + case SWPLD2_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld2_reg_addr); + case SWPLD3_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld3_reg_addr); + case CPLD_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, cpupld_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + case SWPLD2_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld2].client, swpld2_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + case SWPLD3_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld3].client, swpld3_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0xff: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x%s", value, note); + case 0x0f: + case 0x07: + case 0x03: + break; + case 0x0c: + value = value >> 2; + break; + case 0xf0: + case 0x70: + case 0x30: + value = value >> 4; + break; + case 0xe0: + value = value >> 5; + break; + case 0xc0: + value = value >> 6; + break; + default : + value = value >> dni_log2(mask); + mutex_unlock(&dni_lock); + return sprintf(buf, "%d%s", value, note); + } + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x%s", value, note); +} + +static ssize_t set_cpld_reg(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int err; + int set_data; + unsigned long set_data_ul; + unsigned char mask; + unsigned char mask_out; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 0, &set_data_ul); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + set_data = (int)set_data_ul; + if (set_data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + mutex_unlock(&dni_lock); + return count; + } + + switch (attr->index) { + case CPLD_REG_ADDR: + cpupld_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD2_REG_ADDR: + swpld2_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD3_REG_ADDR: + swpld3_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case CPLD_REG_VALUE: + i2c_smbus_write_byte_data(pdata[cpu_cpld].client, cpupld_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD2_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld2].client, swpld2_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD3_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld3].client, swpld3_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0x03: + case 0x07: + case 0x0f: + case 0xff: + set_data = mask_out | (set_data & mask); + break; + case 0x0c: + set_data = set_data << 2; + set_data = mask_out | (set_data & mask); + break; + case 0xf0: + case 0x70: + case 0x30: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + case 0xe0: + set_data = set_data << 5; + set_data = mask_out | (set_data & mask); + break; + case 0xc0: + set_data = set_data << 6; + set_data = mask_out | (set_data & mask); + break; + default : + set_data = mask_out | (set_data << dni_log2(mask) ); + } + switch (attr->index) { + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "cpld not found"); + } + mutex_unlock(&dni_lock); + return count; +} + +/* ---------------- SFP attribute read/write - start -------- */ + +static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf){ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + + mutex_lock(&dni_lock); + int ret; + u32 data = 0; + int data2 = 0; + u8 save_bytes = 0x00; + + switch (attr->index) { + case SFP_IS_PRESENT: + /* Report the SFP/QSFP ALL PRESENCE status + * This data information form SWPLD2 and SWPLD3. */ + + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_PRESENCE_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_PRESENCE_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_PRESENCE_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_PRESENCE_1); + data |= (u32)(ret & 0xff) << 24; + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, SFP_PRESENCE); + data2 = (ret & 0x44); + save_bytes = data2 & 0x40; + save_bytes = save_bytes << 1; + data2 &= 0x04; + data2 = data2 << 4; + data2 |= save_bytes; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x%02x\n", data, data2); + + case QSFP_LP_MODE: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_LP_MODE_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_LP_MODE_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_LP_MODE_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_LP_MODE_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_RESET: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESET_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESET_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESET_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESET_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_INTERRUPT: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_INTERRUPT_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_INTERRUPT_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_INTERRUPT_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_INTERRUPT_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_RESPONDE: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESPONDE_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESPONDE_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESPONDE_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESPONDE_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } +} + + +static ssize_t set_lpmode_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + mutex_lock(&dni_lock); + reg_t = QSFP_LP_MODE_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + reg_t = QSFP_LP_MODE_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + reg_t = QSFP_LP_MODE_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + reg_t = QSFP_LP_MODE_4; + values = (set_data & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static ssize_t set_reset_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + reg_t = QSFP_RESET_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESET_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESET_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESET_4; + values = (set_data & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static ssize_t set_interrupt_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + reg_t = QSFP_INTERRUPT_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_INTERRUPT_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_INTERRUPT_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_INTERRUPT_4; + values = (set_data & 0xff); + + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static ssize_t set_responde_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + reg_t = QSFP_RESPONDE_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESPONDE_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESPONDE_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESPONDE_4; + values = (set_data & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static SENSOR_DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_ADDR); +static SENSOR_DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld2_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD2_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld2_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD2_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld3_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD3_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld3_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD3_REG_VALUE); +//SFP, QSFP +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, for_status, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(sfp_lp_mode, S_IWUSR | S_IRUGO, for_status, set_lpmode_data, QSFP_LP_MODE); +static SENSOR_DEVICE_ATTR(sfp_reset, S_IWUSR | S_IRUGO, for_status, set_reset_data, QSFP_RESET); +static SENSOR_DEVICE_ATTR(sfp_interrupt, S_IWUSR | S_IRUGO, for_status, set_interrupt_data, QSFP_INTERRUPT); +static SENSOR_DEVICE_ATTR(sfp_responde, S_IWUSR | S_IRUGO, for_status, set_responde_data, QSFP_RESPONDE); + +static struct attribute *cpld_attrs[] = { + &sensor_dev_attr_cpld_reg_value.dev_attr.attr, + &sensor_dev_attr_cpld_reg_addr.dev_attr.attr, +//SFP, QSFP + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_lp_mode.dev_attr.attr, + &sensor_dev_attr_sfp_reset.dev_attr.attr, + &sensor_dev_attr_sfp_interrupt.dev_attr.attr, + &sensor_dev_attr_sfp_responde.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld2_attrs[] = { + &sensor_dev_attr_swpld2_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld2_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld3_attrs[] = { + &sensor_dev_attr_swpld3_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld3_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpld_attr_grp = { + .attrs = cpld_attrs, +}; + +static struct attribute_group swpld2_attr_grp = { + .attrs = swpld2_attrs, +}; + +static struct attribute_group swpld3_attr_grp = { + .attrs = swpld3_attrs, +}; + +/* CPLD -- driver */ +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS0); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS0); + return -ENODEV; + } + + pdata[cpu_cpld].client = i2c_new_dummy(parent, pdata[cpu_cpld].reg_addr); + if (!pdata[cpu_cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[cpu_cpld].reg_addr); + goto error; + } + + kobj_cpld = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; +error: + kobject_put(kobj_cpld); + i2c_unregister_device(pdata[cpu_cpld].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[cpu_cpld].client) { + if (!parent) { + parent = (pdata[cpu_cpld].client)->adapter; + } + i2c_unregister_device(pdata[cpu_cpld].client); + } + } + i2c_put_adapter(parent); + + return 0; +} + +static int __init swpld2_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD2 platform data not found\n"); + return -ENODEV; + } + parent = i2c_get_adapter(11); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", 11); + return -ENODEV; + } + + pdata[swpld2].client = i2c_new_dummy(parent, pdata[swpld2].reg_addr); + if (!pdata[swpld2].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld2].reg_addr); + goto error; + } + + kobj_swpld2 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld2_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + return 0; + +error: + kobject_put(kobj_swpld2); + i2c_unregister_device(pdata[swpld2].client); + i2c_put_adapter(parent); + return -ENODEV; +} + +static int __exit swpld2_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld2_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld2].client) { + if (!parent) { + parent = (pdata[swpld2].client)->adapter; + } + i2c_unregister_device(pdata[swpld2].client); + } + } + i2c_put_adapter(parent); + return 0; +} + + +static int __init swpld3_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD3 platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(11); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", 11); + return -ENODEV; + } + + pdata[swpld3].client = i2c_new_dummy(parent, pdata[swpld3].reg_addr); + if (!pdata[swpld3].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld3].reg_addr); + goto error; + } + + kobj_swpld3 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld3_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + + return 0; + +error: + kobject_put(kobj_swpld3); + i2c_unregister_device(pdata[swpld3].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit swpld3_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld3_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld3].client) { + if (!parent) { + parent = (pdata[swpld3].client)->adapter; + } + i2c_unregister_device(pdata[swpld3].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-cpld", + }, +}; + +static struct platform_driver swpld2_driver = { + .probe = swpld2_probe, + .remove = __exit_p(swpld2_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-swpld2", + }, +}; + +static struct platform_driver swpld3_driver = { + .probe = swpld3_probe, + .remove = __exit_p(swpld3_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-swpld3", + }, +}; + + +/*---------------- CPLD - end ------------- */ + +/*---------------- delta ATTR - start ------------- */ + +struct delta_bin_attribute { + struct bin_attribute attr; + int index; +}; + +#define to_delta_attr(x) container_of(x, struct delta_bin_attribute, attr) + +#define BIN_ATTR(_name, _mode, _read, _write, _size, _index) { \ + .attr = { \ + .attr = {.name = __stringify(_name), .mode = _mode }, \ + .read = _read, \ + .write = _write, \ + .size = _size, \ + }, \ + .index = _index, \ +} + +#define DELTA_BIN_ATTR(_name, _mode, _read, _write, _size, _index) \ +struct delta_bin_attribute delta_attr_##_name \ + = BIN_ATTR(_name, _mode, _read, _write, _size, _index) + +static char eeprom_data[EEPROM_SIZE]; + +static ssize_t access_user_space(const char *name, char *buf, size_t len, loff_t offset, int mode) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + ssize_t vfs_ret = 0; + + fs = get_fs(); + set_fs(get_ds()); + + switch(mode) + { + case ATTR_W: + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)){ + return -ENOENT; + } + vfs_ret = vfs_write(fp, buf, len, &pos); + break; + case ATTR_R: + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)){ + return -ENOENT; + } + vfs_ret = vfs_read(fp, buf, len, &pos); + break; + } + + set_fs(fs); + filp_close(fp, NULL); + return vfs_ret; +} + +enum sfp_attributes{ + EEPROM_SYS, + EEPROM_SFP_1, + EEPROM_SFP_2, + EEPROM_SFP_3, + EEPROM_SFP_4, + EEPROM_SFP_5, + EEPROM_SFP_6, + EEPROM_SFP_7, + EEPROM_SFP_8, + EEPROM_SFP_9, + EEPROM_SFP_10, + EEPROM_SFP_11, + EEPROM_SFP_12, + EEPROM_SFP_13, + EEPROM_SFP_14, + EEPROM_SFP_15, + EEPROM_SFP_16, + EEPROM_SFP_17, + EEPROM_SFP_18, + EEPROM_SFP_19, + EEPROM_SFP_20, + EEPROM_SFP_21, + EEPROM_SFP_22, + EEPROM_SFP_23, + EEPROM_SFP_24, + EEPROM_SFP_25, + EEPROM_SFP_26, + EEPROM_SFP_27, + EEPROM_SFP_28, + EEPROM_SFP_29, + EEPROM_SFP_30, + EEPROM_SFP_31, + EEPROM_SFP_32, + EEPROM_SFP_33, + EEPROM_SFP_34, +}; + + +static ssize_t delta_bin_attr_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct delta_bin_attribute *delta_attr = to_delta_attr(attr); + char attr_path[100]; + + mutex_lock(&dni_lock); + memset(buf, 0, count); + switch(delta_attr->index) { + case EEPROM_SFP_1: + case EEPROM_SFP_2: + case EEPROM_SFP_3: + case EEPROM_SFP_4: + case EEPROM_SFP_5: + case EEPROM_SFP_6: + case EEPROM_SFP_7: + case EEPROM_SFP_8: + case EEPROM_SFP_9: + case EEPROM_SFP_10: + case EEPROM_SFP_11: + case EEPROM_SFP_12: + case EEPROM_SFP_13: + case EEPROM_SFP_14: + case EEPROM_SFP_15: + case EEPROM_SFP_16: + case EEPROM_SFP_17: + case EEPROM_SFP_18: + case EEPROM_SFP_19: + case EEPROM_SFP_20: + case EEPROM_SFP_21: + case EEPROM_SFP_22: + case EEPROM_SFP_23: + case EEPROM_SFP_24: + case EEPROM_SFP_25: + case EEPROM_SFP_26: + case EEPROM_SFP_27: + case EEPROM_SFP_28: + case EEPROM_SFP_29: + case EEPROM_SFP_30: + case EEPROM_SFP_31: + case EEPROM_SFP_32: + case EEPROM_SFP_33: + case EEPROM_SFP_34: + sprintf(attr_path, "/sys/bus/i2c/devices/%d-0050/eeprom", delta_attr->index + EEPROM_MASK); + if (access_user_space(attr_path, eeprom_data, EEPROM_SIZE, 0, ATTR_R) < 0) { + goto ACCESS_ERROR; + } + count = (count <= EEPROM_SIZE) ? count : EEPROM_SIZE; + memcpy(buf, eeprom_data + off, count); + break; + case EEPROM_SYS: + sprintf(attr_path, "/sys/bus/i2c/devices/10-0053/eeprom"); + if (access_user_space(attr_path, eeprom_data, EEPROM_SIZE, 0, ATTR_R) < 0) { + goto ACCESS_ERROR; + } + count = (count <= EEPROM_SIZE) ? count : EEPROM_SIZE; + memcpy(buf, eeprom_data + off, count); + break; + default: + goto ACCESS_ERROR; + } + mutex_unlock(&dni_lock); + return count; + +ACCESS_ERROR: + mutex_unlock(&dni_lock); + return -ENXIO; +} + +static ssize_t delta_bin_attr_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct delta_bin_attribute *delta_attr = to_delta_attr(attr); + char attr_path[100]; + + switch(delta_attr->index){ + case EEPROM_SFP_1: + case EEPROM_SFP_2: + case EEPROM_SFP_3: + case EEPROM_SFP_4: + case EEPROM_SFP_5: + case EEPROM_SFP_6: + case EEPROM_SFP_7: + case EEPROM_SFP_8: + case EEPROM_SFP_9: + case EEPROM_SFP_10: + case EEPROM_SFP_11: + case EEPROM_SFP_12: + case EEPROM_SFP_13: + case EEPROM_SFP_14: + case EEPROM_SFP_15: + case EEPROM_SFP_16: + case EEPROM_SFP_17: + case EEPROM_SFP_18: + case EEPROM_SFP_19: + case EEPROM_SFP_20: + case EEPROM_SFP_21: + case EEPROM_SFP_22: + case EEPROM_SFP_23: + case EEPROM_SFP_24: + case EEPROM_SFP_25: + case EEPROM_SFP_26: + case EEPROM_SFP_27: + case EEPROM_SFP_28: + case EEPROM_SFP_29: + case EEPROM_SFP_30: + case EEPROM_SFP_31: + case EEPROM_SFP_32: + case EEPROM_SFP_33: + case EEPROM_SFP_34: + sprintf(attr_path, "/sys/bus/i2c/devices/%d-0050/eeprom", delta_attr->index + EEPROM_MASK); + if (access_user_space(attr_path, buf, count, 0, ATTR_W) < 0) { + goto ACCESS_ERROR; + } + break; + case EEPROM_SYS: + sprintf(attr_path, "/sys/bus/i2c/devices/10-0053/eeprom"); + if (access_user_space(attr_path, buf, count, 0, ATTR_W) < 0) { + goto ACCESS_ERROR; + } + break; + default: + goto ACCESS_ERROR; + } + + mutex_unlock(&dni_lock); + return count; +ACCESS_ERROR: + mutex_unlock(&dni_lock); + return -ETIMEDOUT; +} + +DELTA_BIN_ATTR(eeprom_sys, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SYS); +DELTA_BIN_ATTR(eeprom_sfp_1, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_1); +DELTA_BIN_ATTR(eeprom_sfp_2, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_2); +DELTA_BIN_ATTR(eeprom_sfp_3, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_3); +DELTA_BIN_ATTR(eeprom_sfp_4, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_4); +DELTA_BIN_ATTR(eeprom_sfp_5, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_5); +DELTA_BIN_ATTR(eeprom_sfp_6, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_6); +DELTA_BIN_ATTR(eeprom_sfp_7, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_7); +DELTA_BIN_ATTR(eeprom_sfp_8, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_8); +DELTA_BIN_ATTR(eeprom_sfp_9, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_9); +DELTA_BIN_ATTR(eeprom_sfp_10, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_10); +DELTA_BIN_ATTR(eeprom_sfp_11, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_11); +DELTA_BIN_ATTR(eeprom_sfp_12, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_12); +DELTA_BIN_ATTR(eeprom_sfp_13, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_13); +DELTA_BIN_ATTR(eeprom_sfp_14, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_14); +DELTA_BIN_ATTR(eeprom_sfp_15, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_15); +DELTA_BIN_ATTR(eeprom_sfp_16, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_16); +DELTA_BIN_ATTR(eeprom_sfp_17, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_17); +DELTA_BIN_ATTR(eeprom_sfp_18, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_18); +DELTA_BIN_ATTR(eeprom_sfp_19, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_19); +DELTA_BIN_ATTR(eeprom_sfp_20, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_20); +DELTA_BIN_ATTR(eeprom_sfp_21, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_21); +DELTA_BIN_ATTR(eeprom_sfp_22, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_22); +DELTA_BIN_ATTR(eeprom_sfp_23, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_23); +DELTA_BIN_ATTR(eeprom_sfp_24, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_24); +DELTA_BIN_ATTR(eeprom_sfp_25, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_25); +DELTA_BIN_ATTR(eeprom_sfp_26, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_26); +DELTA_BIN_ATTR(eeprom_sfp_27, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_27); +DELTA_BIN_ATTR(eeprom_sfp_28, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_28); +DELTA_BIN_ATTR(eeprom_sfp_29, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_29); +DELTA_BIN_ATTR(eeprom_sfp_30, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_30); +DELTA_BIN_ATTR(eeprom_sfp_31, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_31); +DELTA_BIN_ATTR(eeprom_sfp_32, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_32); +DELTA_BIN_ATTR(eeprom_sfp_33, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_33); +DELTA_BIN_ATTR(eeprom_sfp_34, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_34); + +static struct bin_attribute *sfp_attrs[] = { + &delta_attr_eeprom_sys.attr, + &delta_attr_eeprom_sfp_1.attr, + &delta_attr_eeprom_sfp_2.attr, + &delta_attr_eeprom_sfp_3.attr, + &delta_attr_eeprom_sfp_4.attr, + &delta_attr_eeprom_sfp_5.attr, + &delta_attr_eeprom_sfp_6.attr, + &delta_attr_eeprom_sfp_7.attr, + &delta_attr_eeprom_sfp_8.attr, + &delta_attr_eeprom_sfp_9.attr, + &delta_attr_eeprom_sfp_10.attr, + &delta_attr_eeprom_sfp_11.attr, + &delta_attr_eeprom_sfp_12.attr, + &delta_attr_eeprom_sfp_13.attr, + &delta_attr_eeprom_sfp_14.attr, + &delta_attr_eeprom_sfp_15.attr, + &delta_attr_eeprom_sfp_16.attr, + &delta_attr_eeprom_sfp_17.attr, + &delta_attr_eeprom_sfp_18.attr, + &delta_attr_eeprom_sfp_19.attr, + &delta_attr_eeprom_sfp_20.attr, + &delta_attr_eeprom_sfp_21.attr, + &delta_attr_eeprom_sfp_22.attr, + &delta_attr_eeprom_sfp_23.attr, + &delta_attr_eeprom_sfp_24.attr, + &delta_attr_eeprom_sfp_25.attr, + &delta_attr_eeprom_sfp_26.attr, + &delta_attr_eeprom_sfp_27.attr, + &delta_attr_eeprom_sfp_28.attr, + &delta_attr_eeprom_sfp_29.attr, + &delta_attr_eeprom_sfp_30.attr, + &delta_attr_eeprom_sfp_31.attr, + &delta_attr_eeprom_sfp_32.attr, + &delta_attr_eeprom_sfp_33.attr, + &delta_attr_eeprom_sfp_34.attr, + NULL, /* need to NULL terminate the list of attributes */ +}; + +static struct attribute_group sfp_attr_grp = { + .bin_attrs = sfp_attrs, +}; + +/*---------------- delta ATTR - end ------------- */ + +/*---------------- MUX - start ------------- */ + +struct cpld_mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; +}; + +struct cpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct cpld_mux_platform_data data; +}; + +static struct cpld_mux_platform_data et_c032if_cpld_mux_platform_data[] = { + { + .parent = BUS0, + .base_nr = BUS0_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS0_MUX_REG, + }, +}; + +static struct platform_device et_c032if_cpld_mux[] = +{ + { + .name = "delta-et-c032if-cpld-mux", + .id = 0, + .dev = { + .platform_data = &et_c032if_cpld_mux_platform_data[0], + .release = device_release, + }, + }, +}; + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +static int cpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct cpld_mux *mux = i2c_mux_priv(muxc); + u8 cpld_mux_val=0; + + if ( mux->data.base_nr == BUS0_BASE_NUM ) + { + switch (chan) { + case 0: + cpld_mux_val = EEPROM_VAL; + break; + case 1: + cpld_mux_val = SWPLD_VAL; + break; + case 2: + cpld_mux_val = QSFP_VAL; + break; + default: + cpld_mux_val = 0x00; + break; + } + } + else + { + cpld_mux_val = 0x00; + } + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(cpld_mux_val & 0xff)); + +} + +static int __init cpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct cpld_mux *mux; + struct cpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS0: + dev_num = BUS0_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0,cpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + for (i = 0; i < dev_num; i++) + { + int nr = pdata->base_nr + i; + unsigned int class = 0; + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + + return ret; +} + +static int __exit cpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent = muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_mux_driver = { + .probe = cpld_mux_probe, + .remove = __exit_p(cpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-cpld-mux", + }, +}; +/*---------------- MUX - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_et_c032if_platform_init(void) +{ + struct i2c_adapter *adapter; + struct cpld_platform_data *cpld_pdata; + struct cpld_mux_platform_data *cpld_mux_pdata; + int ret,i = 0; + + mutex_init(&dni_lock); + printk("c032if_platform module initialization\n"); + + // set the CPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + + ret = platform_driver_register(&cpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_cpld_mux_driver; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld2_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld2_driver; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld3_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld3_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the CPLD + ret = platform_device_register(&et_c032if_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_et_c032if_cpld; + } + + cpld_pdata = et_c032if_cpld.dev.platform_data; + cpld_mux_pdata = et_c032if_cpld_mux[0].dev.platform_data; + cpld_mux_pdata->cpld = cpld_pdata[cpu_cpld].client; + ret = platform_device_register(&et_c032if_cpld_mux[0]); + if (ret) { + printk(KERN_WARNING "Fail to create cpld mux\n"); + goto error_et_c032if_cpld_mux; + } + + adapter = i2c_get_adapter(12); + i2c_client_9548_1 = i2c_new_device(adapter, &i2c_info_pca9548[0]); + i2c_client_9548_2 = i2c_new_device(adapter, &i2c_info_pca9548[1]); + i2c_client_9548_3 = i2c_new_device(adapter, &i2c_info_pca9548[2]); + i2c_client_9548_4 = i2c_new_device(adapter, &i2c_info_pca9548[3]); + i2c_client_9548_5 = i2c_new_device(adapter, &i2c_info_pca9548[4]); + i2c_put_adapter(adapter); + + // register the SWPLD2 + ret = platform_device_register(&et_c032if_swpld2); + if (ret) { + printk(KERN_WARNING "Fail to create swpld2 device\n"); + goto error_swpld2_device; + } + + // register the SWPLD3 + ret = platform_device_register(&et_c032if_swpld3); + if (ret) { + printk(KERN_WARNING "Fail to create swpld3 device\n"); + goto error_swpld3_device; + } + for (i = 0; i < ARRAY_SIZE(et_c032if_i2c_device); i++) + { + ret = platform_device_register(&et_c032if_i2c_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_et_c032if_i2c_device; + } + } + + kobj_sfp = kobject_create_and_add("sfp", kernel_kobj); + if(!kobj_sfp) + { + return -ENOMEM; + } + ret = sysfs_create_group(kobj_sfp, &sfp_attr_grp); + if (ret) + { + printk(KERN_WARNING "Fail to create sysfs of sfp group\n"); + goto error_create_sfp_group; + } + if (ret) + goto error_create_sfp_group; + + return 0; + +error_create_sfp_group: + kobject_put(kobj_sfp); +error_et_c032if_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&et_c032if_i2c_device[i]); + } + i = ARRAY_SIZE(et_c032if_cpld_mux); + platform_device_unregister(&et_c032if_swpld3); +error_swpld3_device: + platform_device_unregister(&et_c032if_swpld2); +error_swpld2_device: + i2c_unregister_device(i2c_client_9548_1); + i2c_unregister_device(i2c_client_9548_2); + i2c_unregister_device(i2c_client_9548_3); + i2c_unregister_device(i2c_client_9548_4); + i2c_unregister_device(i2c_client_9548_5); +error_et_c032if_cpld_mux: + platform_device_unregister(&et_c032if_cpld_mux[0]); + platform_device_unregister(&et_c032if_cpld); +error_et_c032if_cpld: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld3_driver); +error_swpld3_driver: + platform_driver_unregister(&swpld2_driver); +error_swpld2_driver: + platform_driver_unregister(&cpld_mux_driver); +error_cpld_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit delta_et_c032if_platform_exit(void) +{ + int i = 0; + + kobject_put(kobj_sfp); + for (i = 0; i < ARRAY_SIZE(et_c032if_i2c_device); i++) { + platform_device_unregister(&et_c032if_i2c_device[i]); + } + platform_device_unregister(&et_c032if_swpld2); + platform_device_unregister(&et_c032if_swpld3); + i2c_unregister_device(i2c_client_9548_1); + i2c_unregister_device(i2c_client_9548_2); + i2c_unregister_device(i2c_client_9548_3); + i2c_unregister_device(i2c_client_9548_4); + i2c_unregister_device(i2c_client_9548_5); + platform_device_unregister(&et_c032if_cpld_mux[0]); + platform_device_unregister(&et_c032if_cpld); + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&swpld2_driver); + platform_driver_unregister(&swpld3_driver); + platform_driver_unregister(&cpld_mux_driver); + platform_driver_unregister(&cpld_driver); +} + +module_init(delta_et_c032if_platform_init); +module_exit(delta_et_c032if_platform_exit); + +MODULE_DESCRIPTION("Delta et-c032if Platform Support"); +MODULE_AUTHOR("Johnson Lu "); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh b/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh new file mode 100644 index 00000000000..522aabea26b --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh @@ -0,0 +1,9 @@ +#!/bin/bash + +#platform init script for Delta et-c032if + + + +exit 0 + + diff --git a/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service b/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service new file mode 100644 index 00000000000..273a5ab65a4 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service @@ -0,0 +1,13 @@ +[Unit] +Description=Delta et-c032if Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-et-c032if start +ExecStop=-/etc/init.d/platform-modules-et-c032if stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk index f6b2a86a7b3..72a92c1dc57 100644 --- a/platform/mellanox/fw.mk +++ b/platform/mellanox/fw.mk @@ -2,12 +2,12 @@ MLNX_FW_BASE_URL = $(MLNX_SDK_BASE_URL) -MLNX_SPC_FW_VERSION = 13.2000.1634 +MLNX_SPC_FW_VERSION = 13.2000.1886 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE) SONIC_ONLINE_FILES += $(MLNX_SPC_FW_FILE) -MLNX_SPC2_FW_VERSION = 29.2000.1634 +MLNX_SPC2_FW_VERSION = 29.2000.1886 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE) SONIC_ONLINE_FILES += $(MLNX_SPC2_FW_FILE) diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk index 91af460c8de..21a16d29dbb 100644 --- a/platform/mellanox/hw-management.mk +++ b/platform/mellanox/hw-management.mk @@ -1,6 +1,6 @@ # Mellanox HW Management -MLNX_HW_MANAGEMENT_VERSION = 2.0.0183 +MLNX_HW_MANAGEMENT_VERSION = 2.0.0191 export MLNX_HW_MANAGEMENT_VERSION diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt index a9ef3e5acf9..93076e83b08 160000 --- a/platform/mellanox/hw-management/hw-mgmt +++ b/platform/mellanox/hw-management/hw-mgmt @@ -1 +1 @@ -Subproject commit a9ef3e5acf9a2bc4fb4de1f80a53ca2bf3c68a66 +Subproject commit 93076e83b08322207f7b860d34c6c3c2bd655aa0 diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py b/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py index e69de29bb2d..d94d4c9ec82 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * \ No newline at end of file diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py index 41d237143d5..814c7aca817 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -10,15 +10,7 @@ try: from sonic_platform_base.chassis_base import ChassisBase - from sonic_platform.psu import Psu - from sonic_platform.fan import Fan - from sonic_platform.fan import FAN_PATH - from sonic_platform.sfp import SFP - from sonic_platform.thermal import Thermal, initialize_thermals - from sonic_platform.watchdog import get_watchdog from sonic_daemon_base.daemon_base import Logger - from eeprom import Eeprom - from sfp_event import sfp_event from os import listdir from os.path import isfile, join import sys @@ -43,11 +35,6 @@ #reboot cause related definitions REBOOT_CAUSE_ROOT = HWMGMT_SYSTEM_ROOT -REBOOT_CAUSE_POWER_LOSS_FILE = 'reset_main_pwr_fail' -REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC_FILE = 'reset_asic_thermal' -REBOOT_CAUSE_WATCHDOG_FILE = 'reset_hotswap_or_wd' -REBOOT_CAUSE_MLNX_FIRMWARE_RESET = 'reset_fw_reset' - REBOOT_CAUSE_FILE_LENGTH = 1 #version retrieving related definitions @@ -84,14 +71,30 @@ def __init__(self): # Initialize SKU name self.sku_name = self._get_sku_name() + # move the initialization of each components to their dedicated initializer + # which will be called from platform + self.sfp_module_initialized = False + self.sfp_event_initialized = False + self.reboot_cause_initialized = False + logger.log_info("Chassis loaded successfully") + + def __del__(self): + if self.sfp_event_initialized: + self.sfp_event.deinitialize() + + def initialize_psu(self): + from sonic_platform.psu import Psu # Initialize PSU list + self.psu_module = Psu for index in range(MLNX_NUM_PSU): psu = Psu(index, self.sku_name) self._psu_list.append(psu) - # Initialize watchdog - self._watchdog = get_watchdog() - + def initialize_fan(self): + from sonic_platform.fan import Fan + from sonic_platform.fan import FAN_PATH + self.fan_module = Fan + self.fan_path = FAN_PATH # Initialize FAN list multi_rotor_in_drawer = False num_of_fan, num_of_drawer = self._extract_num_of_fans_and_fan_drawers() @@ -104,6 +107,11 @@ def __init__(self): fan = Fan(index, index) self._fan_list.append(fan) + def initialize_sfp(self): + from sonic_platform.sfp import SFP + + self.sfp_module = SFP + # Initialize SFP list port_position_tuple = self._get_port_position_tuple_by_sku_name() self.PORT_START = port_position_tuple[0] @@ -118,31 +126,82 @@ def __init__(self): sfp_module = SFP(index, 'SFP') self._sfp_list.append(sfp_module) + self.sfp_module_initialized = True + + def initialize_thermals(self): + from sonic_platform.thermal import initialize_thermals # Initialize thermals initialize_thermals(self.sku_name, self._thermal_list, self._psu_list) + def initialize_eeprom(self): + from eeprom import Eeprom # Initialize EEPROM - self.eeprom = Eeprom() + self._eeprom = Eeprom() + def initialize_components_list(self): # Initialize component list self._component_name_list.append(COMPONENT_BIOS) self._component_name_list.append(COMPONENT_FIRMWARE) self._component_name_list.append(COMPONENT_CPLD1) self._component_name_list.append(COMPONENT_CPLD2) - # Initialize sfp-change-listening stuff - self._init_sfp_change_event() + ############################################## + # SFP methods + ############################################## + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + + Returns: + An integer, the number of sfps available on this chassis + """ + if not self.sfp_module_initialized: + self.initialize_sfp() + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + if not self.sfp_module_initialized: + self.initialize_sfp() + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet0, 1 for Ethernet4 and so on. + + Returns: + An object dervied from SfpBase representing the specified sfp + """ + if not self.sfp_module_initialized: + self.initialize_sfp() + + sfp = None + + try: + sfp = self._sfp_list[index] + except IndexError: + sys.stderr.write("SFP index {} out of range (0-{})\n".format( + index, len(self._sfp_list)-1)) - def _init_sfp_change_event(self): - self.sfp_event = sfp_event() - self.sfp_event.initialize() - self.MAX_SELECT_EVENT_RETURNED = self.PORT_END + return sfp def _extract_num_of_fans_and_fan_drawers(self): num_of_fan = 0 num_of_drawer = 0 - for f in listdir(FAN_PATH): - if isfile(join(FAN_PATH, f)): + for f in listdir(self.fan_path): + if isfile(join(self.fan_path, f)): match_obj = re.match('fan(\d+)_speed_get', f) if match_obj != None: if int(match_obj.group(1)) > num_of_fan: @@ -163,6 +222,30 @@ def _get_port_position_tuple_by_sku_name(self): position_tuple = port_position_tuple_list[hwsku_dict_port[self.sku_name]] return position_tuple + def get_watchdog(self): + """ + Retrieves hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + + Note: + We overload this method to ensure that watchdog is only initialized + when it is referenced. Currently, only one daemon can open the watchdog. + To initialize watchdog in the constructor causes multiple daemon + try opening watchdog when loading and constructing a chassis object + and fail. By doing so we can eliminate that risk. + """ + try: + if self._watchdog is None: + from sonic_platform.watchdog import get_watchdog + self._watchdog = get_watchdog() + except Exception as e: + logger.log_info("Fail to load watchdog due to {}".format(repr(e))) + + return self._watchdog + def get_base_mac(self): """ Retrieves the base MAC address for the chassis @@ -171,7 +254,7 @@ def get_base_mac(self): A string containing the MAC address in the format 'XX:XX:XX:XX:XX:XX' """ - return self.eeprom.get_base_mac() + return self._eeprom.get_base_mac() def get_serial_number(self): """ @@ -180,7 +263,7 @@ def get_serial_number(self): Returns: A string containing the hardware serial number for this chassis. """ - return self.eeprom.get_serial_number() + return self._eeprom.get_serial_number() def get_system_eeprom_info(self): """ @@ -191,7 +274,7 @@ def get_system_eeprom_info(self): OCP ONIE TlvInfo EEPROM format and values are their corresponding values. """ - return self.eeprom.get_system_eeprom_info() + return self._eeprom.get_system_eeprom_info() def _read_generic_file(self, filename, len): """ @@ -205,7 +288,7 @@ def _read_generic_file(self, filename, len): return result except Exception as e: logger.log_info("Fail to read file {} due to {}".format(filename, repr(e))) - return '' + return '0' def _verify_reboot_cause(self, filename): ''' @@ -215,6 +298,31 @@ def _verify_reboot_cause(self, filename): ''' return bool(int(self._read_generic_file(join(REBOOT_CAUSE_ROOT, filename), REBOOT_CAUSE_FILE_LENGTH).rstrip('\n'))) + def initialize_reboot_cause(self): + self.reboot_major_cause_dict = { + 'reset_main_pwr_fail' : self.REBOOT_CAUSE_POWER_LOSS, + 'reset_aux_pwr_or_ref' : self.REBOOT_CAUSE_POWER_LOSS, + 'reset_asic_thermal' : self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC, + 'reset_hotswap_or_wd' : self.REBOOT_CAUSE_WATCHDOG, + 'reset_swb_wd' : self.REBOOT_CAUSE_WATCHDOG, + 'reset_sff_wd' : self.REBOOT_CAUSE_WATCHDOG + } + self.reboot_minor_cause_dict = { + 'reset_fw_reset' : "Reset by ASIC firmware", + 'reset_long_pb' : "Reset by long press on power button", + 'reset_short_pb' : "Reset by short press on power button", + 'reset_comex_thermal' : "ComEx thermal shutdown", + 'reset_comex_pwr_fail' : "ComEx power fail", + 'reset_comex_wd' : "Reset requested from ComEx", + 'reset_from_asic' : "Reset requested from ASIC", + 'reset_reload_bios' : "Reset caused by BIOS reload", + 'reset_sw_reset' : "Software reset", + 'reset_hotswap_or_halt' : "Reset caused by hotswap or halt", + 'reset_from_comex' : "Reset from ComEx", + 'reset_voltmon_upgrade_fail': "Reset due to voltage monitor devices upgrade failure" + } + self.reboot_cause_initialized = True + def get_reboot_cause(self): """ Retrieves the cause of the previous reboot @@ -227,21 +335,18 @@ def get_reboot_cause(self): to pass a description of the reboot cause. """ #read reboot causes files in the following order - minor_cause = '' - if self._verify_reboot_cause(REBOOT_CAUSE_POWER_LOSS_FILE): - major_cause = self.REBOOT_CAUSE_POWER_LOSS - elif self._verify_reboot_cause(REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC_FILE): - major_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC - elif self._verify_reboot_cause(REBOOT_CAUSE_WATCHDOG_FILE): - major_cause = self.REBOOT_CAUSE_WATCHDOG - else: - major_cause = self.REBOOT_CAUSE_HARDWARE_OTHER - if self._verify_reboot_cause(REBOOT_CAUSE_MLNX_FIRMWARE_RESET): - minor_cause = "Reset by ASIC firmware" - else: - major_cause = self.REBOOT_CAUSE_NON_HARDWARE + if not self.reboot_cause_initialized: + self.initialize_reboot_cause() + + for reset_file, reset_cause in self.reboot_major_cause_dict.iteritems(): + if self._verify_reboot_cause(reset_file): + return reset_cause, '' - return major_cause, minor_cause + for reset_file, reset_cause in self.reboot_minor_cause_dict.iteritems(): + if self._verify_reboot_cause(reset_file): + return self.REBOOT_CAUSE_HARDWARE_OTHER, reset_cause + + return self.REBOOT_CAUSE_NON_HARDWARE, '' def _get_cpld_version(self, version_file): cpld_version = self._read_generic_file(join(CPLD_VERSION_ROOT, version_file), CPLD_VERSION_MAX_LENGTH) @@ -383,6 +488,14 @@ def get_change_event(self, timeout=0): indicates that fan 0 has been removed, fan 2 has been inserted and sfp 11 has been removed. """ + # Initialize SFP event first + if not self.sfp_event_initialized: + from sonic_platform.sfp_event import sfp_event + self.sfp_event = sfp_event() + self.sfp_event.initialize() + self.MAX_SELECT_EVENT_RETURNED = self.PORT_END + self.sfp_event_initialized = True + wait_for_ever = (timeout == 0) port_dict = {} if wait_for_ever: diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py new file mode 100644 index 00000000000..fc555bc479a --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py @@ -0,0 +1,45 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# implementation of new platform api +############################################################################# + +try: + import subprocess + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + def __init__(self): + PlatformBase.__init__(self) + if self._is_host(): + self._chassis = Chassis() + else: + self._chassis = Chassis() + self._chassis.initialize_psu() + self._chassis.initialize_fan() + self._chassis.initialize_eeprom() + self._chassis.initialize_components_list() + + def _is_host(self): + """ + Test whether current process is running on the host or an docker + return True for host and False for docker + """ + is_host = False + try: + proc = subprocess.Popen("docker --version 2>/dev/null", stdout=subprocess.PIPE, shell=True, stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + if result != '': + is_host = True + + except OSError, e: + pass + + return is_host diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py index 9ea9c21899f..be59451a8cb 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py @@ -63,6 +63,24 @@ XCVR_VENDOR_DATE_WIDTH = 8 XCVR_DOM_CAPABILITY_OFFSET = 92 XCVR_DOM_CAPABILITY_WIDTH = 2 +# to improve performance we retrieve all eeprom data via a single ethtool command +# in function get_transceiver_info and get_transceiver_bulk_status +# XCVR_INTERFACE_DATA_SIZE stands for the max size to be read +# this variable is only used by get_transceiver_info. +# please be noted that each time some new value added to the function +# we should make sure that it falls into the area +# [XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE] or +# adjust XCVR_INTERFACE_MAX_SIZE to contain the new data +# It's same for [QSFP_DOM_BULK_DATA_START, QSFP_DOM_BULK_DATA_SIZE] and +# [SFP_DOM_BULK_DATA_START, SFP_DOM_BULK_DATA_SIZE] which are used by +# get_transceiver_bulk_status +XCVR_INTERFACE_DATA_START = 0 +XCVR_INTERFACE_DATA_SIZE = 92 + +QSFP_DOM_BULK_DATA_START = 22 +QSFP_DOM_BULK_DATA_SIZE = 36 +SFP_DOM_BULK_DATA_START = 96 +SFP_DOM_BULK_DATA_SIZE = 10 # definitions of the offset for values in OSFP info eeprom OSFP_TYPE_OFFSET = 0 @@ -229,7 +247,7 @@ def get_presence(self): bool: True if device is present, False if not """ presence = False - ethtool_cmd = "ethtool -m sfp{} 2>/dev/null".format(self.index) + ethtool_cmd = "ethtool -m sfp{} hex on offset 0 length 4 2>/dev/null".format(self.index) try: proc = subprocess.Popen(ethtool_cmd, stdout=subprocess.PIPE, shell=True, stderr=subprocess.STDOUT) stdout = proc.communicate()[0] @@ -261,6 +279,15 @@ def _read_eeprom_specific_bytes(self, offset, num_bytes): return eeprom_raw def _dom_capability_detect(self): + if not self.get_presence(): + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + return + if self.sfp_type == "QSFP": self.calibration = 1 sfpi_obj = sff8436InterfaceId() @@ -466,47 +493,37 @@ def get_transceiver_info(self): print("Error: sfp_object open failed") return None - sfp_interface_bulk_raw = self._read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), interface_info_bulk_width) - if sfp_interface_bulk_raw is not None: - sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) - else: + sfp_interface_bulk_raw = self._read_eeprom_specific_bytes(offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE) + if sfp_interface_bulk_raw is None: return None - sfp_vendor_name_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) - if sfp_vendor_name_raw is not None: - sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) - else: - return None + start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START + end = start + interface_info_bulk_width + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw[start : end], 0) - sfp_vendor_pn_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) - if sfp_vendor_pn_raw is not None: - sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) - else: - return None + start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_NAME_WIDTH + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_interface_bulk_raw[start : end], 0) - sfp_vendor_rev_raw = self._read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), vendor_rev_width) - if sfp_vendor_rev_raw is not None: - sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) - else: - return None + start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_PN_WIDTH + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_interface_bulk_raw[start : end], 0) - sfp_vendor_sn_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) - if sfp_vendor_sn_raw is not None: - sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) - else: - return None + start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START + end = start + vendor_rev_width + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_interface_bulk_raw[start : end], 0) - sfp_vendor_oui_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) - if sfp_vendor_oui_raw is not None: - sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) - else: - return None + start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_SN_WIDTH + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_interface_bulk_raw[start : end], 0) - sfp_vendor_date_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) - if sfp_vendor_date_raw is not None: - sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) - else: - return None + start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_OUI_WIDTH + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_DATE_WIDTH + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_interface_bulk_raw[start : end], 0) transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] @@ -578,84 +595,63 @@ def get_transceiver_bulk_status(self): """ transceiver_dom_info_dict = {} + dom_info_dict_keys = ['temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power' + ] + transceiver_dom_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A') + if self.sfp_type == OSFP_TYPE: - transceiver_dom_info_dict['temperature'] = 'N/A' - transceiver_dom_info_dict['voltage'] = 'N/A' - transceiver_dom_info_dict['rx1power'] = 'N/A' - transceiver_dom_info_dict['rx2power'] = 'N/A' - transceiver_dom_info_dict['rx3power'] = 'N/A' - transceiver_dom_info_dict['rx4power'] = 'N/A' - transceiver_dom_info_dict['tx1bias'] = 'N/A' - transceiver_dom_info_dict['tx2bias'] = 'N/A' - transceiver_dom_info_dict['tx3bias'] = 'N/A' - transceiver_dom_info_dict['tx4bias'] = 'N/A' - transceiver_dom_info_dict['tx1power'] = 'N/A' - transceiver_dom_info_dict['tx2power'] = 'N/A' - transceiver_dom_info_dict['tx3power'] = 'N/A' - transceiver_dom_info_dict['tx4power'] = 'N/A' + pass elif self.sfp_type == QSFP_TYPE: if not self.dom_supported: - return None + return transceiver_dom_info_dict offset = 0 sfpd_obj = sff8436Dom() if sfpd_obj is None: - return None + return transceiver_dom_info_dict + + dom_data_raw = self._read_eeprom_specific_bytes((offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE) + if dom_data_raw is None: + return transceiver_dom_info_dict if self.dom_temp_supported: - dom_temperature_raw = self._read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) - if dom_temperature_raw is not None: - dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) - temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) - if temp is not None: - transceiver_dom_info_dict['temperature'] = temp - else: - transceiver_dom_info_dict['temperature'] = 'N/A' - else: - return None - else: - transceiver_dom_info_dict['temperature'] = 'N/A' + start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START + end = start + QSFP_TEMPE_WIDTH + dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw[start : end], 0) + temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + if temp is not None: + transceiver_dom_info_dict['temperature'] = temp if self.dom_volt_supported: - dom_voltage_raw = self._read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) - if dom_voltage_raw is not None: - dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) - volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) - if volt is not None: - transceiver_dom_info_dict['voltage'] = volt - else: - transceiver_dom_info_dict['voltage'] = 'N/A' - else: - return None - else: - transceiver_dom_info_dict['voltage'] = 'N/A' + start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START + end = start + QSFP_VOLT_WIDTH + dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw[start : end], 0) + volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + if volt is not None: + transceiver_dom_info_dict['voltage'] = volt - dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START + end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_data_raw[start : end], 0) if self.dom_tx_power_supported: transceiver_dom_info_dict['tx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value']) transceiver_dom_info_dict['tx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value']) transceiver_dom_info_dict['tx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value']) transceiver_dom_info_dict['tx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value']) - else: - transceiver_dom_info_dict['tx1power'] = 'N/A' - transceiver_dom_info_dict['tx2power'] = 'N/A' - transceiver_dom_info_dict['tx3power'] = 'N/A' - transceiver_dom_info_dict['tx4power'] = 'N/A' if self.dom_rx_power_supported: transceiver_dom_info_dict['rx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value']) transceiver_dom_info_dict['rx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value']) transceiver_dom_info_dict['rx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value']) transceiver_dom_info_dict['rx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value']) - else: - transceiver_dom_info_dict['rx1power'] = 'N/A' - transceiver_dom_info_dict['rx2power'] = 'N/A' - transceiver_dom_info_dict['rx3power'] = 'N/A' - transceiver_dom_info_dict['rx4power'] = 'N/A' transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] @@ -664,46 +660,33 @@ def get_transceiver_bulk_status(self): else: if not self.dom_supported: - return None + return transceiver_dom_info_dict offset = 256 sfpd_obj = sff8472Dom() if sfpd_obj is None: - return None + return transceiver_dom_info_dict sfpd_obj._calibration_type = self.calibration - - dom_temperature_raw = self._read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) - if dom_temperature_raw is not None: - dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) - else: - return None - dom_voltage_raw = self._read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) - if dom_voltage_raw is not None: - dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) - else: - return None + dom_data_raw = self._read_eeprom_specific_bytes((offset + SFP_DOM_BULK_DATA_START), SFP_DOM_BULK_DATA_SIZE) - dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) - else: - return None + start = SFP_TEMPE_OFFSET - SFP_DOM_BULK_DATA_START + end = start + SFP_TEMPE_WIDTH + dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw[start: end], 0) + + start = SFP_VOLT_OFFSET - SFP_DOM_BULK_DATA_START + end = start + SFP_VOLT_WIDTH + dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw[start: end], 0) + + start = SFP_CHANNL_MON_OFFSET - SFP_DOM_BULK_DATA_START + end = start + SFP_CHANNL_MON_WIDTH + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_data_raw[start: end], 0) transceiver_dom_info_dict['temperature'] = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) transceiver_dom_info_dict['voltage'] = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) transceiver_dom_info_dict['rx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RXPower']['value']) - transceiver_dom_info_dict['rx2power'] = 'N/A' - transceiver_dom_info_dict['rx3power'] = 'N/A' - transceiver_dom_info_dict['rx4power'] = 'N/A' transceiver_dom_info_dict['tx1bias'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TXBias']['value']) - transceiver_dom_info_dict['tx2bias'] = 'N/A' - transceiver_dom_info_dict['tx3bias'] = 'N/A' - transceiver_dom_info_dict['tx4bias'] = 'N/A' transceiver_dom_info_dict['tx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TXPower']['value']) - transceiver_dom_info_dict['tx2power'] = 'N/A' - transceiver_dom_info_dict['tx3power'] = 'N/A' - transceiver_dom_info_dict['tx4power'] = 'N/A' return transceiver_dom_info_dict @@ -1036,7 +1019,7 @@ def get_tx_bias(self): sfpd_obj = sff8472Dom() if sfpd_obj is None: return None - sfpd_obj._calibration_type = 1 + sfpd_obj._calibration_type = self.calibration if self.dom_supported: dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) @@ -1145,7 +1128,7 @@ def get_tx_power(self): return None if self.dom_supported: - sfpd_obj._calibration_type = 1 + sfpd_obj._calibration_type = self.calibration dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) if dom_channel_monitor_raw is not None: diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py index 5195d378a46..6614e368e54 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py @@ -49,8 +49,8 @@ THERMAL_API_GET_HIGH_THRESHOLD:"cpu_pack_max" } thermal_api_handler_module = { - THERMAL_API_GET_TEMPERATURE:"temp_input_module{}", - THERMAL_API_GET_HIGH_THRESHOLD:"temp_crit_module{}" + THERMAL_API_GET_TEMPERATURE:"module{}_temp_input", + THERMAL_API_GET_HIGH_THRESHOLD:"module{}_temp_crit" } thermal_api_handler_psu = { THERMAL_API_GET_TEMPERATURE:"psu{}_temp", diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk index 1401b5f6289..ae49cb61922 100644 --- a/platform/mellanox/sdk.mk +++ b/platform/mellanox/sdk.mk @@ -1,5 +1,5 @@ -MLNX_SDK_BASE_URL = https://github.com/Mellanox/SAI-Implementation/raw/f4bc0f92f729cedf4d65a19563f61db23acb7763/sdk -MLNX_SDK_VERSION = 4.3.1634 +MLNX_SDK_BASE_URL = https://github.com/Mellanox/SAI-Implementation/raw/acf8ed31fd43e8280b553357c4ac4248f2c2e3aa/sdk +MLNX_SDK_VERSION = 4.3.1886 MLNX_SDK_ISSU_VERSION = 101 MLNX_SDK_DEB_VERSION = $(subst _,.,$(MLNX_SDK_VERSION)) diff --git a/platform/nephos/platform-modules-accton.mk b/platform/nephos/platform-modules-accton.mk index 1d4788bc9a2..ebfd77f30fc 100644 --- a/platform/nephos/platform-modules-accton.mk +++ b/platform/nephos/platform-modules-accton.mk @@ -1,6 +1,6 @@ # Accton AS7116 54X Platform modules -ACCTON_AS7116_54X_PLATFORM_MODULE_VERSION = 1.0.0 +ACCTON_AS7116_54X_PLATFORM_MODULE_VERSION = 1.0.1 export ACCTON_AS7116_54X_PLATFORM_MODULE_VERSION diff --git a/rules/config b/rules/config index 31e5d40ff1f..afc9a4b9a37 100644 --- a/rules/config +++ b/rules/config @@ -52,9 +52,9 @@ DEFAULT_PASSWORD = YourPaSsWoRd # by default for TOR switch # ENABLE_PFCWD_ON_START = y -# SONIC_INSTALL_DEBUG_TOOLS - installs debugging tools in baseline docker +# INSTALL_DEBUG_TOOLS - installs debugging tools in baseline docker # Uncomment next line to enable: -# SONIC_INSTALL_DEBUG_TOOLS = y +# INSTALL_DEBUG_TOOLS = y # SONIC_ROUTING_STACK - specify the routing-stack being elected to drive SONiC's control-plane. # Supported routing stacks on SONiC are: diff --git a/rules/linux-kernel.mk b/rules/linux-kernel.mk index fd8429eb8f3..bc95255e0df 100644 --- a/rules/linux-kernel.mk +++ b/rules/linux-kernel.mk @@ -3,7 +3,7 @@ KVERSION_SHORT = 4.9.0-9-2 KVERSION = $(KVERSION_SHORT)-$(CONFIGURED_ARCH) KERNEL_VERSION = 4.9.168 -KERNEL_SUBVERSION = 1+deb9u3 +KERNEL_SUBVERSION = 1+deb9u5 export KVERSION_SHORT KVERSION KERNEL_VERSION KERNEL_SUBVERSION diff --git a/scripts/dbg_files.sh b/scripts/dbg_files.sh index 1515639bc9d..6624fca83f3 100755 --- a/scripts/dbg_files.sh +++ b/scripts/dbg_files.sh @@ -2,8 +2,11 @@ # Provide file paths to archive for debug image as relative to src subdir # -for i in $debug_src_archive -do - find $i/ -name "*.c" -o -name "*.cpp" -o -name "*.h" -o -name "*.hpp" -type f -done +if [ "$DEBUG_IMG" == "y" ] +then + for i in $DEBUG_SRC_ARCHIVE_DIRS + do + find src/$i/ -name "*.c" -o -name "*.cpp" -o -name "*.h" -o -name "*.hpp" -type f + done | tar -czf $DEBUG_SRC_ARCHIVE_FILE -T - +fi diff --git a/slave.mk b/slave.mk index 162c167ebf8..0cb618e21cd 100644 --- a/slave.mk +++ b/slave.mk @@ -37,6 +37,7 @@ PROJECT_ROOT = $(shell pwd) STRETCH_DEBS_PATH = $(TARGET_PATH)/debs/stretch STRETCH_FILES_PATH = $(TARGET_PATH)/files/stretch DBG_IMAGE_MARK = dbg +DBG_SRC_ARCHIVE_FILE = $(TARGET_PATH)/sonic_src.tar.gz CONFIGURED_PLATFORM := $(shell [ -f .platform ] && cat .platform || echo generic) PLATFORM_PATH = platform/$(CONFIGURED_PLATFORM) @@ -184,6 +185,7 @@ $(info "ENABLE_SYNCD_RPC" : "$(ENABLE_SYNCD_RPC)") $(info "ENABLE_ORGANIZATION_EXTENSIONS" : "$(ENABLE_ORGANIZATION_EXTENSIONS)") $(info "HTTP_PROXY" : "$(HTTP_PROXY)") $(info "HTTPS_PROXY" : "$(HTTPS_PROXY)") +$(info "APT_CACHER_NG_PROXY" : "$(APT_CACHER_NG_PROXY)") $(info "ENABLE_SYSTEM_TELEMETRY" : "$(ENABLE_SYSTEM_TELEMETRY)") $(info "SONIC_DEBUGGING_ON" : "$(SONIC_DEBUGGING_ON)") $(info "SONIC_PROFILING_ON" : "$(SONIC_PROFILING_ON)") @@ -667,9 +669,13 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ chmod +x sonic_debian_extension.sh, ) - export debug_src_archive="$(DBG_SRC_ARCHIVE)" + DEBUG_IMG="$(INSTALL_DEBUG_TOOLS)" \ + DEBUG_SRC_ARCHIVE_DIRS="$(DBG_SRC_ARCHIVE)" \ + DEBUG_SRC_ARCHIVE_FILE="$(DBG_SRC_ARCHIVE_FILE)" \ + scripts/dbg_files.sh DEBUG_IMG="$(INSTALL_DEBUG_TOOLS)" \ + DEBUG_SRC_ARCHIVE_FILE="$(DBG_SRC_ARCHIVE_FILE)" \ USERNAME="$(USERNAME)" \ PASSWORD="$(PASSWORD)" \ ./build_debian.sh $(LOG) @@ -703,7 +709,6 @@ SONIC_CLEAN_DEBS = $(addsuffix -clean,$(addprefix $(DEBS_PATH)/, \ $(SONIC_COPY_DEBS) \ $(SONIC_MAKE_DEBS) \ $(SONIC_DPKG_DEBS) \ - $(SONIC_PYTHON_STDEB_DEBS) \ $(SONIC_DERIVED_DEBS) \ $(SONIC_EXTRA_DEBS))) @@ -728,15 +733,20 @@ SONIC_CLEAN_TARGETS += $(addsuffix -clean,$(addprefix $(TARGET_PATH)/, \ $(SONIC_CLEAN_TARGETS) : $(TARGET_PATH)/%-clean : .platform @rm -f $(TARGET_PATH)/$* +SONIC_CLEAN_STDEB_DEBS = $(addsuffix -clean,$(addprefix $(PYTHON_DEBS_PATH)/, \ + $(SONIC_PYTHON_STDEB_DEBS))) +$(SONIC_CLEAN_STDEB_DEBS) : $(PYTHON_DEBS_PATH)/%-clean : .platform + @rm -f $(PYTHON_DEBS_PATH)/$* + SONIC_CLEAN_WHEELS = $(addsuffix -clean,$(addprefix $(PYTHON_WHEELS_PATH)/, \ $(SONIC_PYTHON_WHEELS))) $(SONIC_CLEAN_WHEELS) : $(PYTHON_WHEELS_PATH)/%-clean : .platform @rm -f $(PYTHON_WHEELS_PATH)/$* clean-logs : .platform - @rm -f $(TARGET_PATH)/*.log $(DEBS_PATH)/*.log $(FILES_PATH)/*.log $(PYTHON_WHEELS_PATH)/*.log + @rm -f $(TARGET_PATH)/*.log $(DEBS_PATH)/*.log $(FILES_PATH)/*.log $(PYTHON_DEBS_PATH)/*.log $(PYTHON_WHEELS_PATH)/*.log -clean : .platform clean-logs $$(SONIC_CLEAN_DEBS) $$(SONIC_CLEAN_FILES) $$(SONIC_CLEAN_TARGETS) $$(SONIC_CLEAN_WHEELS) +clean : .platform clean-logs $$(SONIC_CLEAN_DEBS) $$(SONIC_CLEAN_FILES) $$(SONIC_CLEAN_TARGETS) $$(SONIC_CLEAN_STDEB_DEBS) $$(SONIC_CLEAN_WHEELS) ############################################################################### ## all @@ -755,6 +765,6 @@ jessie : $$(addprefix $(TARGET_PATH)/,$$(SONIC_JESSIE_DOCKERS_FOR_INSTALLERS)) ## Standard targets ############################################################################### -.PHONY : $(SONIC_CLEAN_DEBS) $(SONIC_CLEAN_FILES) $(SONIC_CLEAN_TARGETS) $(SONIC_CLEAN_WHEELS) $(SONIC_PHONY_TARGETS) clean distclean configure +.PHONY : $(SONIC_CLEAN_DEBS) $(SONIC_CLEAN_FILES) $(SONIC_CLEAN_TARGETS) $(SONIC_CLEAN_STDEB_DEBS) $(SONIC_CLEAN_WHEELS) $(SONIC_PHONY_TARGETS) clean distclean configure .INTERMEDIATE : $(SONIC_INSTALL_TARGETS) $(SONIC_INSTALL_WHEELS) $(DOCKER_LOAD_TARGETS) docker-start .platform diff --git a/sonic-slave-stretch/Dockerfile.j2 b/sonic-slave-stretch/Dockerfile.j2 index 5c1739c49d5..aa9ed30db56 100644 --- a/sonic-slave-stretch/Dockerfile.j2 +++ b/sonic-slave-stretch/Dockerfile.j2 @@ -32,6 +32,10 @@ RUN echo "deb [arch=arm64] http://deb.debian.org/debian stretch main contrib non echo 'deb [arch=arm64] http://ftp.debian.org/debian stretch-backports main' >> /etc/apt/sources.list {%- endif %} + +ARG apt_cacher_ng_proxy +RUN echo "Acquire::http::Proxy \"$apt_cacher_ng_proxy\";" >> /etc/apt/apt.conf.d/02proxy + ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive @@ -270,6 +274,8 @@ RUN apt-get update && apt-get install -y \ python3-requests \ python3-pytest \ python3-colorama \ +# For bash + texi2html \ # For initramfs bash-completion \ {%- if CONFIGURED_ARCH == "amd64" %} diff --git a/sonic-slave/Dockerfile.j2 b/sonic-slave/Dockerfile.j2 index 91ed039a2d6..732b4c09cfa 100644 --- a/sonic-slave/Dockerfile.j2 +++ b/sonic-slave/Dockerfile.j2 @@ -28,6 +28,9 @@ RUN echo "deb [arch=arm64] http://archive.debian.org/debian jessie main contrib echo "deb [arch=arm64] http://archive.debian.org/debian jessie-backports main contrib non-free" >> /etc/apt/sources.list {% endif %} +ARG apt_cacher_ng_proxy +RUN echo "Acquire::http::Proxy \"$apt_cacher_ng_proxy\";" >> /etc/apt/apt.conf.d/02proxy + ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/src/snmpd/patch-5.7.3+dfsg/0006-Release-all-requests-that-use-this-session.patch b/src/snmpd/patch-5.7.3+dfsg/0006-Release-all-requests-that-use-this-session.patch new file mode 100644 index 00000000000..66a18eb1724 --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0006-Release-all-requests-that-use-this-session.patch @@ -0,0 +1,26 @@ +From 84846206c7ee230bd7b6274af98513952c4a7a7f Mon Sep 17 00:00:00 2001 +From: Renuka Manavalan +Date: Wed, 7 Aug 2019 21:48:33 +0000 +Subject: [PATCH] Release all requests that use this session. + +--- + agent/snmp_agent.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c +index b96d650..ee3b0da 100644 +--- a/agent/snmp_agent.c ++++ b/agent/snmp_agent.c +@@ -1542,7 +1542,8 @@ netsnmp_remove_delegated_requests_for_session(netsnmp_session *sess) + * check each request + */ + netsnmp_request_info *request; +- for(request = asp->requests; request; request = request->next) { ++ int i; ++ for(i = 0, request = asp->requests; i < asp->vbcount; ++i, ++request) { + /* + * check session + */ +-- +2.17.1 + diff --git a/src/snmpd/patch-5.7.3+dfsg/series b/src/snmpd/patch-5.7.3+dfsg/series index e3764c3aac5..04ee079ffe9 100644 --- a/src/snmpd/patch-5.7.3+dfsg/series +++ b/src/snmpd/patch-5.7.3+dfsg/series @@ -3,3 +3,4 @@ 0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch 0004-Disable-SNMPv1.patch 0005-Port-OpenSSL-1.1.0-with-support-for-1.0.2.patch +0006-Release-all-requests-that-use-this-session.patch diff --git a/src/sonic-config-engine/tests/sample_output/staticd_frr.conf b/src/sonic-config-engine/tests/sample_output/staticd_frr.conf new file mode 100644 index 00000000000..a1a5fddf322 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/staticd_frr.conf @@ -0,0 +1,17 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/staticd.conf.j2 using config DB data +! file: staticd.conf +! +! +hostname switch-t0 +password zebra +enable password zebra +! +! set static default route to mgmt gateway as a backup to learned default +ip route 0.0.0.0/0 10.0.0.1 200 +! +log syslog informational +log facility local4 +! + diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf index 8861e6d3012..312394bf76c 100644 --- a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf @@ -23,8 +23,6 @@ interface PortChannel8 link-detect ! ! -! set static default route to mgmt gateway as a backup to learned default -! ! Set ip source to loopback for bgp learned routes route-map RM_SET_SRC permit 10 set src 4.0.0.0 diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf index 1f9dce8812b..30571f2082a 100644 --- a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf @@ -23,8 +23,6 @@ interface Ethernet8 link-detect ! ! -! set static default route to mgmt gateway as a backup to learned default -! ! Set ip source to loopback for bgp learned routes route-map RM_SET_SRC permit 10 set src 4.0.0.0 diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf index b89aeb4a382..c8157b0519a 100644 --- a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf @@ -23,8 +23,6 @@ interface Ethernet8 link-detect ! ! -! set static default route to mgmt gateway as a backup to learned default -! ! Set ip source to loopback for bgp learned routes route-map RM_SET_SRC permit 10 set src 4.0.0.0 diff --git a/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh b/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh index 383f7cb389e..5f50106ff55 100644 --- a/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh +++ b/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh @@ -31,11 +31,7 @@ function wait_until_iface_ready # Wait for all interfaces to be up and ready wait_until_iface_ready ${VLAN_TABLE_PREFIX} Vlan1000 wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel01 -wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel01 -wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel02 wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel02 wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel03 -wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel03 -wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel04 wait_until_iface_ready ${LAG_TABLE_PREFIX} PortChannel04 diff --git a/src/sonic-config-engine/tests/sample_output/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/zebra_frr.conf index aa3486b0163..2b21ea523f7 100644 --- a/src/sonic-config-engine/tests/sample_output/zebra_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/zebra_frr.conf @@ -8,6 +8,7 @@ hostname switch-t0 password zebra enable password zebra ! +! ! Enable link-detect (default disabled) interface PortChannel01 link-detect @@ -22,9 +23,6 @@ interface PortChannel04 link-detect ! ! -! set static default route to mgmt gateway as a backup to learned default -ip route 0.0.0.0/0 10.0.0.1 200 -! ! Set ip source to loopback for bgp learned routes route-map RM_SET_SRC permit 10 set src 10.1.0.32 diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py index 01bb5d8144d..ed8ad6cbc5a 100644 --- a/src/sonic-config-engine/tests/test_j2files.py +++ b/src/sonic-config-engine/tests/test_j2files.py @@ -89,11 +89,16 @@ def test_bgpd_frr(self): self.assertTrue(r, "Diff:\n" + diff_output) def test_zebra_frr(self): - conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-quagga', 'zebra.conf.j2') + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', 'zebra.conf.j2') argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + conf_template + ' > ' + self.output_file self.run_script(argument) self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'zebra_frr.conf'), self.output_file)) + def test_staticd_frr(self): + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', 'staticd.conf.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + conf_template + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'staticd_frr.conf'), self.output_file)) def test_ipinip(self): ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') diff --git a/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py b/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py index 388f1b2885a..531a9d477a6 100644 --- a/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py +++ b/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py @@ -35,7 +35,7 @@ def test_t2_chassis_fe_pc_zebra_frr(self): self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 't2-chassis-fe-pc-zebra.conf'), self.output_file)) # Test zebra.conf in FRR docker for a T2 chassis frontend (fe) switch with specified VNI - def test_t2_chassis_fe_pc_zebra_frr(self): + def test_t2_chassis_fe_vni_zebra_frr(self): conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', 'zebra.conf.j2') argument = '-m ' + self.t2_chassis_fe_vni_minigraph + ' -p ' + self.t2_chassis_fe_port_config + ' -t ' + conf_template + ' > ' + self.output_file self.run_script(argument) diff --git a/src/sonic-device-data/tests/config_checker b/src/sonic-device-data/tests/config_checker index 29f1ba3cd74..a0e3b0cbd45 100755 --- a/src/sonic-device-data/tests/config_checker +++ b/src/sonic-device-data/tests/config_checker @@ -33,7 +33,7 @@ def check_file(file_name): # Remove trailing unit ".$" p = re.sub(r"\.[0-9]+$", '', p) # Remove trailing port name - p = re.sub(r"_[cxg]e(\d+)?$", '', p) + p = re.sub(r"_[cxg][de](\d+)?$", '', p) # Remove trailing port id "{id/number}" p = re.sub(r"\{.*\}", '', p) # Remove trailing port name example diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index 7e9adc1df31..47eea9fa9db 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -132,6 +132,7 @@ serdes_pre_driver_current serdes_preemphasis serdes_rx_los serdes_sgmii_m +serdes_tx_taps skip_L2_USER_ENTRY sram_scan_enable stable_size @@ -153,3 +154,8 @@ ifp_inports_support_enable port_flex_enable pdma_descriptor_prefetch_enable pktdma_poll_mode_channel_bitmap +ccm_dma_enable +ccmdma_intr_enable +phy_enable +init_all_modules +port_fec diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index 1d9c69fbe1b..f8bbe29ff89 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit 1d9c69fbe1b996fd84a659bd28c91f67fe1fe044 +Subproject commit f8bbe29ff89611d190658118e2c191943dabe3e0 diff --git a/src/sonic-platform-common b/src/sonic-platform-common index 56b5b14dec1..0caf265f1bf 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit 56b5b14dec179ddf445849fae2e7783ead0475b7 +Subproject commit 0caf265f1bf3d8d68a9a4a3abe20f6d89ca09231 diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons index 6618737230c..88d6d5a13c1 160000 --- a/src/sonic-platform-daemons +++ b/src/sonic-platform-daemons @@ -1 +1 @@ -Subproject commit 6618737230c27668d2ae8787f15311171262215f +Subproject commit 88d6d5a13c12cc26458762ce3f54fd90dda7fe9f diff --git a/src/sonic-quagga b/src/sonic-quagga index b1d01a2dd84..904a3501077 160000 --- a/src/sonic-quagga +++ b/src/sonic-quagga @@ -1 +1 @@ -Subproject commit b1d01a2dd841f76e73067171702f7c6321793c49 +Subproject commit 904a350107793d44be7167500fcec9087ca3243b diff --git a/src/sonic-sairedis b/src/sonic-sairedis index 80c7e8b1105..6bc64eedf16 160000 --- a/src/sonic-sairedis +++ b/src/sonic-sairedis @@ -1 +1 @@ -Subproject commit 80c7e8b110571b9dfcf58bc15286beb1eda4195b +Subproject commit 6bc64eedf16e0dd377374e3c81ff179f996d459d diff --git a/src/sonic-swss b/src/sonic-swss index 5be3963793d..252e12cf3a5 160000 --- a/src/sonic-swss +++ b/src/sonic-swss @@ -1 +1 @@ -Subproject commit 5be3963793d5d04807931f016faf1fcca87f6286 +Subproject commit 252e12cf3a592a287a102a3b74ad2152b36781f6