From 0205fedaeae8dd57366d43cc4ab4dc9bc81db832 Mon Sep 17 00:00:00 2001 From: Shay Schlafman Date: Sat, 8 Mar 2025 03:47:11 +0200 Subject: [PATCH 1/2] Add new T1 Mellanox-SN4280-O8V40 SKU --- .../Mellanox-SN4280-O8V40/buffers.json.j2 | 18 + .../buffers_defaults_objects.j2 | 435 +++++++++++++++ .../buffers_defaults_t0.j2 | 43 ++ .../buffers_defaults_t1.j2 | 38 ++ .../buffers_dynamic.json.j2 | 19 + .../Mellanox-SN4280-O8V40/hwsku.json | 264 +++++++++ .../Mellanox-SN4280-O8V40/media_settings.json | 506 ++++++++++++++++++ .../optics_si_settings.json | 108 ++++ .../pg_profile_lookup.ini | 60 +++ .../pmon_daemon_control.json | 6 + .../Mellanox-SN4280-O8V40/port_config.ini | 70 +++ .../Mellanox-SN4280-O8V40/qos.json.j2 | 17 + .../Mellanox-SN4280-O8V40/sai.profile | 4 + .../Mellanox-SN4280-O8V40/sai_4280.xml | 265 +++++++++ 14 files changed, 1853 insertions(+) create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 new file mode 100644 index 00000000000..e7817793ba3 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 @@ -0,0 +1,18 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 new file mode 100644 index 00000000000..20273084f7d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 @@ -0,0 +1,435 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{% set PORT_DPC = [] %} +{%- for port in PORT %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} +{%- endfor %} + +{% set PROFILE_PORT_MAP = { + "BUFFER_PORT_INGRESS_PROFILE_LIST": { + "Dpc": { + "active": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_profile" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "ingress_lossless_profile", + "static": "ingress_lossless_profile" + }, + "inactive": { + "dynamic": "ingress_lossless_profile", + "static": "ingress_lossless_zero_profile" + } + } + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { + "Dpc": { + "active": { + "dynamic": "egress_lossy_profile", + "static": "egress_lossy_profile" + }, + "inactive": { + "dynamic": "egress_lossy_profile", + "static": "egress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "egress_lossless_profile,egress_lossy_profile", + "static": "egress_lossless_profile,egress_lossy_profile" + }, + "inactive": { + "dynamic": "egress_lossless_profile,egress_lossy_profile", + "static": "egress_lossless_zero_profile,egress_lossy_zero_profile" + } + } + }, + "BUFFER_QUEUE": { + "Dpc": { + "active": { + "dynamic": "q_lossy_profile", + "static": "q_lossy_profile" + }, + "inactive": { + "dynamic": "q_lossy_profile", + "static": "egress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "egress_lossless_profile", + "static": "egress_lossless_profile" + }, + "inactive": { + "dynamic": "egress_lossless_profile", + "static": "egress_lossless_zero_profile" + } + } + }, + "BUFFER_PG": { + "Dpc": { + "active": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_profile" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_pg_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "NULL" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_pg_zero_profile" + } + } + } +} %} + +{%- macro find_profile_to_attach(table, port, active_status, dynamic_status) -%} +{% if port in PORT_DPC %} +"{{PROFILE_PORT_MAP[table]['Dpc'][active_status][dynamic_status]}}" +{% else %} +"{{PROFILE_PORT_MAP[table]['Ext'][active_status][dynamic_status]}}" +{% endif %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} + "BUFFER_POOL": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_zero_pool" : { + "mode": "static", + "type": "ingress", + "size": "0" + }, + {% endif -%} + "ingress_lossless_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossless_pool_size }}", + "xoff": "{{ ingress_lossless_pool_xoff }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ egress_lossy_pool_size }}", + {% endif -%} + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_lossy_pg_zero_profile" : { + "pool":"ingress_zero_pool", + "size":"0", + "static_th":"0" + }, + "ingress_lossless_zero_profile" : { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossless_zero_profile" : { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossy_zero_profile" : { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + {% endif -%} + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"9216", + "dynamic_th":"7" + }, + "q_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'active', 'static')}} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} +{% else %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'static')}} +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'active', 'static')}} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} +{% else %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'static')}} +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %} + "BUFFER_QUEUE": { +{% set q_loop = namespace(last_valid=false) %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'active', 'static')}} + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% set q_loop.last_valid = true %} +{% else %} +{% set q_loop.last_valid = false %} +{% endif %} +{% endfor %} +{% if port_names_extra_queues|length > 0 %} +{% if q_loop.last_valid %},{% endif %} +{% for port in port_names_extra_queues.split(',') %} + "{{ port }}|0-1": { + "profile" : "q_lossy_profile" + }, + "{{ port }}|2-4": { + "profile" : "egress_lossless_profile" + }, + "{{ port }}|5": { + "profile" : "q_lossy_profile" + }, + "{{ port }}|6": { + "profile" : "egress_lossless_profile" + }, + "{{ port }}|7": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% if port_names_inactive|length > 0 %} +, +{% if dynamic_mode is defined %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'dynamic')}} + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% else %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'static')}} + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_zero_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "egress_lossy_zero_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} +{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %} + "BUFFER_PG": { +{% set pg_loop = namespace(last_valid=false) %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_pgs.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% set pg_loop.last_valid = true %} +{% else %} +{% set pg_loop.last_valid = false %} +{% endif %} +{% endfor %} +{% if port_names_extra_pgs|length > 0 %} +{% if pg_loop.last_valid %},{% endif %} +{% for port in port_names_extra_pgs.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|2-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, + "{{ port }}|6": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|2-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, + "{{ port }}|6": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% if port_names_inactive|length > 0 %} +{%- for port in port_names_inactive.split(',') %} + {%- if loop.first -%},{%- endif -%} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { +{% if dynamic_mode is defined %} + "profile" : "ingress_lossy_profile" +{% else %} + "profile" : "ingress_lossy_pg_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} +{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..0814c102746 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 @@ -0,0 +1,43 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{%-set ports2cable = { + 'leafrouter_torrouter' : '300m', + 'torrouter_server' : '40m' + } +-%} +{% set ingress_lossless_pool_size = '52064208' %} +{% set ingress_lossless_pool_xoff = '3461040' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '52064208' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..c0792d56518 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2 @@ -0,0 +1,38 @@ +{# + Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{% set ingress_lossless_pool_size = '48013312' %} +{% set ingress_lossless_pool_xoff = '6508544' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '48013312' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 new file mode 100644 index 00000000000..54964e94b1d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 @@ -0,0 +1,19 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json new file mode 100644 index 00000000000..7a7d0d6c652 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json @@ -0,0 +1,264 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet4": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet12": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet20": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet28": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet36": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet44": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet52": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet60": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet68": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet76": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet84": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet92": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet164": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet172": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet180": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet188": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet196": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet204": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet212": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet220": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "off" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "off" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "off" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "off" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json new file mode 100644 index 00000000000..3bd288caa9c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json @@ -0,0 +1,506 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-28": { + "QSFP-DD-sm_media_interface": { + "speed:400GAUI-8": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020", + "lane2": "0x00000020", + "lane3": "0x00000020", + "lane4": "0x00000020", + "lane5": "0x00000020", + "lane6": "0x00000020", + "lane7": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069", + "lane2": "0x00000069", + "lane3": "0x00000069", + "lane4": "0x00000069", + "lane5": "0x00000069", + "lane6": "0x00000069", + "lane7": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e", + "lane2": "0x0000001e", + "lane3": "0x0000001e", + "lane4": "0x0000001e", + "lane5": "0x0000001e", + "lane6": "0x0000001e", + "lane7": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa", + "lane2": "0x000000aa", + "lane3": "0x000000aa", + "lane4": "0x000000aa", + "lane5": "0x000000aa", + "lane6": "0x000000aa", + "lane7": "0x000000aa" + } + }, + "speed:100GAUI-2": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa" + } + } + }, + "QSFP-DD-active_cable_media_interface": { + "speed:400GAUI-8": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020", + "lane2": "0x00000020", + "lane3": "0x00000020", + "lane4": "0x00000020", + "lane5": "0x00000020", + "lane6": "0x00000020", + "lane7": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069", + "lane2": "0x00000069", + "lane3": "0x00000069", + "lane4": "0x00000069", + "lane5": "0x00000069", + "lane6": "0x00000069", + "lane7": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e", + "lane2": "0x0000001e", + "lane3": "0x0000001e", + "lane4": "0x0000001e", + "lane5": "0x0000001e", + "lane6": "0x0000001e", + "lane7": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa", + "lane2": "0x000000aa", + "lane3": "0x000000aa", + "lane4": "0x000000aa", + "lane5": "0x000000aa", + "lane6": "0x000000aa", + "lane7": "0x000000aa" + } + }, + "speed:CAUI-4": { + "idriver": { + "lane0": "0x00000028", + "lane1": "0x00000028", + "lane2": "0x00000028", + "lane3": "0x00000028", + "lane4": "0x00000028", + "lane5": "0x00000028", + "lane6": "0x00000028", + "lane7": "0x00000028" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000033", + "lane1": "0x00000033", + "lane2": "0x00000033", + "lane3": "0x00000033", + "lane4": "0x00000033", + "lane5": "0x00000033", + "lane6": "0x00000033", + "lane7": "0x00000033" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_m2lp": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "obnlev": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "regn_bfm1p": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "regn_bfm1n": { + "lane0": "0x0000008c", + "lane1": "0x0000008c", + "lane2": "0x0000008c", + "lane3": "0x0000008c", + "lane4": "0x0000008c", + "lane5": "0x0000008c", + "lane6": "0x0000008c", + "lane7": "0x0000008c" + } + } + }, + "QSFP+-active_cable_media_interface": { + "speed:CAUI-4": { + "idriver": { + "lane0": "0x00000028", + "lane1": "0x00000028", + "lane2": "0x00000028", + "lane3": "0x00000028", + "lane4": "0x00000028", + "lane5": "0x00000028", + "lane6": "0x00000028", + "lane7": "0x00000028" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000033", + "lane1": "0x00000033", + "lane2": "0x00000033", + "lane3": "0x00000033", + "lane4": "0x00000033", + "lane5": "0x00000033", + "lane6": "0x00000033", + "lane7": "0x00000033" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_m2lp": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "obnlev": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "regn_bfm1p": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "regn_bfm1n": { + "lane0": "0x0000008c", + "lane1": "0x0000008c", + "lane2": "0x0000008c", + "lane3": "0x0000008c", + "lane4": "0x0000008c", + "lane5": "0x0000008c", + "lane6": "0x0000008c", + "lane7": "0x0000008c" + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json new file mode 100644 index 00000000000..6e427a5b03e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json @@ -0,0 +1,108 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-28": { + "50G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "25G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "10G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini new file mode 100644 index 00000000000..6b40ed3f60d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini @@ -0,0 +1,60 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 19456 19456 16384 0 + 25000 5m 19456 19456 17408 0 + 40000 5m 19456 19456 19456 0 + 50000 5m 19456 19456 21504 0 + 100000 5m 19456 19456 37888 0 + 200000 5m 19456 19456 43008 0 + 400000 5m 38912 38912 73728 0 + 10000 30m 19456 19456 16384 0 + 25000 30m 19456 19456 18432 0 + 40000 30m 19456 19456 21504 0 + 50000 30m 19456 19456 23552 0 + 100000 30m 19456 19456 43008 0 + 200000 30m 19456 19456 51200 0 + 400000 30m 38912 38912 91136 0 + 10000 40m 19456 19456 16384 0 + 25000 40m 19456 19456 18432 0 + 40000 40m 19456 19456 21504 0 + 50000 40m 19456 19456 23552 0 + 100000 40m 19456 19456 43008 0 + 200000 40m 19456 19456 51200 0 + 400000 40m 38912 38912 91136 0 + 10000 300m 19456 19456 19456 0 + 25000 300m 19456 19456 26624 0 + 40000 300m 19456 19456 34816 0 + 50000 300m 19456 19456 40960 0 + 100000 300m 19456 19456 75776 0 + 200000 300m 19456 19456 118784 0 + 400000 300m 38912 38912 225280 0 + 10000 1500m 19456 19456 35840 0 + 25000 1500m 19456 19456 65536 0 + 40000 1500m 19456 19456 96256 0 + 50000 1500m 19456 19456 117760 0 + 100000 1500m 19456 19456 230400 0 + 200000 1500m 19456 19456 427008 0 + 400000 1500m 38912 38912 427008 0 + 10000 2000m 19456 19456 41984 0 + 25000 2000m 19456 19456 80896 0 + 40000 2000m 19456 19456 121856 0 + 50000 2000m 19456 19456 149504 0 + 100000 2000m 19456 19456 293888 0 + 200000 2000m 19456 19456 555008 0 + 400000 2000m 38912 38912 555008 0 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json new file mode 100644 index 00000000000..3ada0d34478 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "delay_xcvrd": false, + "skip_xcvrd_cmis_mgr": false +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini new file mode 100644 index 00000000000..f22f59516b2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini @@ -0,0 +1,70 @@ +## +## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1a 1 200000 +Ethernet4 4,5,6,7 etp1b 1 200000 +Ethernet8 8,9,10,11 etp2a 2 200000 +Ethernet12 12,13,14,15 etp2b 2 200000 +Ethernet16 16,17,18,19 etp3a 3 200000 +Ethernet20 20,21,22,23 etp3b 3 200000 +Ethernet24 24,25,26,27 etp4a 4 200000 +Ethernet28 28,29,30,31 etp4b 4 200000 +Ethernet32 32,33,34,35 etp5a 5 200000 +Ethernet36 36,37,38,39 etp5b 5 200000 +Ethernet40 40,41,42,43 etp6a 6 200000 +Ethernet44 44,45,46,47 etp6b 6 200000 +Ethernet48 48,49,50,51 etp7a 7 200000 +Ethernet52 52,53,54,55 etp7b 7 200000 +Ethernet56 56,57,58,59 etp8a 8 200000 +Ethernet60 60,61,62,63 etp8b 8 200000 +Ethernet64 64,65,66,67 etp9a 9 200000 +Ethernet68 68,69,70,71 etp9b 9 200000 +Ethernet72 72,73,74,75 etp10a 10 200000 +Ethernet76 76,77,78,79 etp10b 10 200000 +Ethernet80 80,81,82,83 etp11a 11 200000 +Ethernet84 84,85,86,87 etp11b 11 200000 +Ethernet88 88,89,90,91 etp12a 12 200000 +Ethernet92 92,93,94,95 etp12b 12 200000 +Ethernet96 96,97,98,99,100,101,102,103 etp13 13 400000 +Ethernet104 104,105,106,107,108,109,110,111 etp14 14 400000 +Ethernet112 112,113,114,115,116,117,118,119 etp15 15 400000 +Ethernet120 120,121,122,123,124,125,126,127 etp16 16 400000 +Ethernet128 128,129,130,131,132,133,134,135 etp17 17 400000 +Ethernet136 136,137,138,139,140,141,142,143 etp18 18 400000 +Ethernet144 144,145,146,147,148,149,150,151 etp19 19 400000 +Ethernet152 152,153,154,155,156,157,158,159 etp20 20 400000 +Ethernet160 160,161,162,163 etp21a 21 200000 +Ethernet164 164,165,166,167 etp21b 21 200000 +Ethernet168 168,169,170,171 etp22a 22 200000 +Ethernet172 172,173,174,175 etp22b 22 200000 +Ethernet176 176,177,178,179 etp23a 23 200000 +Ethernet180 180,181,182,183 etp23b 23 200000 +Ethernet184 184,185,186,187 etp24a 24 200000 +Ethernet188 188,189,190,191 etp24b 24 200000 +Ethernet192 192,193,194,195 etp25a 25 200000 +Ethernet196 196,197,198,199 etp25b 25 200000 +Ethernet200 200,201,202,203 etp26a 26 200000 +Ethernet204 204,205,206,207 etp26b 26 200000 +Ethernet208 208,209,210,211 etp27a 27 200000 +Ethernet212 212,213,214,215 etp27b 27 200000 +Ethernet216 216,217,218,219 etp28a 28 200000 +Ethernet220 220,221,222,223 etp28b 28 200000 +Ethernet224 224,225,226,227,228,229,230,231 etp29 29 400000 +Ethernet232 232,233,234,235,236,237,238,239 etp30 30 400000 +Ethernet240 240,241,242,243,244,245,246,247 etp31 31 400000 +Ethernet248 248,249,250,251,252,253,254,255 etp32 32 400000 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 new file mode 100644 index 00000000000..68a41d8d597 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 @@ -0,0 +1,17 @@ +{# + Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile new file mode 100644 index 00000000000..84e9021d0c8 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile @@ -0,0 +1,4 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 +SAI_INDEPENDENT_MODULE_MODE=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml new file mode 100644 index 00000000000..185aae6cf99 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml @@ -0,0 +1,265 @@ + + + + + + + 00:77:66:55:44:00 + + + 1 + + + 32 + + + 1 + + + + + 1 + 8 + 13 + + + 3 + + + 32768 + + + 5 + 8 + 12 + 3 + 32768 + + + 9 + 8 + 15 + 3 + 32768 + + + 13 + 8 + 14 + 3 + 32768 + + + 17 + 8 + 17 + 3 + 32768 + + + 21 + 8 + 16 + 3 + 32768 + + + 25 + 8 + 19 + 3 + 32768 + + + 29 + 8 + 18 + 3 + 32768 + + + 33 + 8 + 25 + 3 + 32768 + + + 37 + 8 + 24 + 3 + 32768 + + + 41 + 8 + 27 + 3 + 32768 + + + 45 + 8 + 26 + 3 + 32768 + + + 49 + 8 + 21 + 3 + 32768 + + + 53 + 8 + 20 + 3 + 32768 + + + 57 + 8 + 23 + 3 + 32768 + + + 61 + 8 + 22 + 3 + 32768 + + + 65 + 8 + 10 + 3 + 32768 + + + 69 + 8 + 11 + 3 + 32768 + + + 73 + 8 + 8 + 3 + 32768 + + + 77 + 8 + 9 + 3 + 32768 + + + 81 + 8 + 6 + 3 + 32768 + + + 85 + 8 + 7 + 3 + 32768 + + + 89 + 8 + 4 + 3 + 32768 + + + 93 + 8 + 5 + 3 + 32768 + + + 97 + 8 + 31 + 3 + 32768 + + + 101 + 8 + 30 + 3 + 32768 + + + 105 + 8 + 29 + 3 + 32768 + + + 109 + 8 + 28 + 3 + 32768 + + + 113 + 8 + 2 + 3 + 32768 + + + 117 + 8 + 3 + 3 + 32768 + + + 121 + 8 + 0 + 3 + 32768 + + + 125 + 8 + 1 + 3 + 32768 + + + + From cb2d4de22a89b1882b001918708412785d1f25b6 Mon Sep 17 00:00:00 2001 From: Shay Schlafman Date: Tue, 18 Mar 2025 23:45:19 +0200 Subject: [PATCH 2/2] updated link pointer files to point to Mellanox-SN4280-O28 SKU since ACS-SN4280 was removed --- .../Mellanox-SN4280-O8V40/buffers.json.j2 | 19 +- .../buffers_defaults_objects.j2 | 436 +-------------- .../buffers_defaults_t0.j2 | 44 +- .../buffers_dynamic.json.j2 | 20 +- .../Mellanox-SN4280-O8V40/media_settings.json | 507 +----------------- .../optics_si_settings.json | 109 +--- .../pmon_daemon_control.json | 7 +- .../Mellanox-SN4280-O8V40/qos.json.j2 | 18 +- .../Mellanox-SN4280-O8V40/sai.profile | 5 +- .../Mellanox-SN4280-O8V40/sai_4280.xml | 266 +-------- 10 files changed, 10 insertions(+), 1421 deletions(-) mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 deleted file mode 100644 index e7817793ba3..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 +++ /dev/null @@ -1,18 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{%- set default_topo = 't1' %} -{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 new file mode 120000 index 00000000000..91bf6407d93 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 deleted file mode 100644 index 20273084f7d..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 +++ /dev/null @@ -1,435 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} - -{% set PORT_DPC = [] %} -{%- for port in PORT %} - {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} - {%- if PORT_DPC.append(port) %}{%- endif %} - {%- endif %} -{%- endfor %} - -{% set PROFILE_PORT_MAP = { - "BUFFER_PORT_INGRESS_PROFILE_LIST": { - "Dpc": { - "active": { - "dynamic": "ingress_lossy_profile", - "static": "ingress_lossy_profile" - }, - "inactive": { - "dynamic": "ingress_lossy_profile", - "static": "ingress_lossy_zero_profile" - } - }, - "Ext": { - "active": { - "dynamic": "ingress_lossless_profile", - "static": "ingress_lossless_profile" - }, - "inactive": { - "dynamic": "ingress_lossless_profile", - "static": "ingress_lossless_zero_profile" - } - } - }, - "BUFFER_PORT_EGRESS_PROFILE_LIST": { - "Dpc": { - "active": { - "dynamic": "egress_lossy_profile", - "static": "egress_lossy_profile" - }, - "inactive": { - "dynamic": "egress_lossy_profile", - "static": "egress_lossy_zero_profile" - } - }, - "Ext": { - "active": { - "dynamic": "egress_lossless_profile,egress_lossy_profile", - "static": "egress_lossless_profile,egress_lossy_profile" - }, - "inactive": { - "dynamic": "egress_lossless_profile,egress_lossy_profile", - "static": "egress_lossless_zero_profile,egress_lossy_zero_profile" - } - } - }, - "BUFFER_QUEUE": { - "Dpc": { - "active": { - "dynamic": "q_lossy_profile", - "static": "q_lossy_profile" - }, - "inactive": { - "dynamic": "q_lossy_profile", - "static": "egress_lossy_zero_profile" - } - }, - "Ext": { - "active": { - "dynamic": "egress_lossless_profile", - "static": "egress_lossless_profile" - }, - "inactive": { - "dynamic": "egress_lossless_profile", - "static": "egress_lossless_zero_profile" - } - } - }, - "BUFFER_PG": { - "Dpc": { - "active": { - "dynamic": "ingress_lossy_profile", - "static": "ingress_lossy_profile" - }, - "inactive": { - "dynamic": "ingress_lossy_profile", - "static": "ingress_lossy_pg_zero_profile" - } - }, - "Ext": { - "active": { - "dynamic": "NULL" - }, - "inactive": { - "dynamic": "ingress_lossy_profile", - "static": "ingress_lossy_pg_zero_profile" - } - } - } -} %} - -{%- macro find_profile_to_attach(table, port, active_status, dynamic_status) -%} -{% if port in PORT_DPC %} -"{{PROFILE_PORT_MAP[table]['Dpc'][active_status][dynamic_status]}}" -{% else %} -"{{PROFILE_PORT_MAP[table]['Ext'][active_status][dynamic_status]}}" -{% endif %} -{%- endmacro %} - -{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} - "BUFFER_POOL": { - {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} - "ingress_zero_pool" : { - "mode": "static", - "type": "ingress", - "size": "0" - }, - {% endif -%} - "ingress_lossless_pool": { - {% if dynamic_mode is not defined -%} - "size": "{{ ingress_lossless_pool_size }}", - "xoff": "{{ ingress_lossless_pool_xoff }}", - {% endif -%} - "type": "ingress", - "mode": "dynamic" - }, - "egress_lossless_pool": { - "size": "{{ egress_lossless_pool_size }}", - "type": "egress", - "mode": "dynamic" - }, - "egress_lossy_pool": { - {% if dynamic_mode is not defined -%} - "size": "{{ egress_lossy_pool_size }}", - {% endif -%} - "type": "egress", - "mode": "dynamic" - } - }, - "BUFFER_PROFILE": { - {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} - "ingress_lossy_pg_zero_profile" : { - "pool":"ingress_zero_pool", - "size":"0", - "static_th":"0" - }, - "ingress_lossless_zero_profile" : { - "pool":"ingress_lossless_pool", - "size":"0", - "dynamic_th":"-8" - }, - "egress_lossless_zero_profile" : { - "pool":"egress_lossless_pool", - "size":"0", - "dynamic_th":"-8" - }, - "egress_lossy_zero_profile" : { - "pool":"egress_lossy_pool", - "size":"0", - "dynamic_th":"-8" - }, - {% endif -%} - "ingress_lossless_profile": { - "pool":"ingress_lossless_pool", - "size":"0", - "dynamic_th":"7" - }, - "ingress_lossy_profile": { - "pool":"ingress_lossless_pool", - "size":"0", - "dynamic_th":"3" - }, - "egress_lossless_profile": { - "pool":"egress_lossless_pool", - "size":"0", - "dynamic_th":"7" - }, - "egress_lossy_profile": { - "pool":"egress_lossy_pool", - "size":"9216", - "dynamic_th":"7" - }, - "q_lossy_profile": { - "pool":"egress_lossy_pool", - "size":"0", - "dynamic_th":"3" - } - }, -{%- endmacro %} - -{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} - "BUFFER_PORT_INGRESS_PROFILE_LIST": { -{% for port in port_names_active.split(',') %} - "{{ port }}": { - "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'active', 'static')}} - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% if port_names_inactive|length > 0 %} -, -{% for port in port_names_inactive.split(',') %} - "{{ port }}": { -{% if dynamic_mode is defined %} - "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} -{% else %} - "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'static')}} -{% endif %} - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% endif %} - }, - "BUFFER_PORT_EGRESS_PROFILE_LIST": { -{% for port in port_names_active.split(',') %} - "{{ port }}": { - "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'active', 'static')}} - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% if port_names_inactive|length > 0 %} -, -{% for port in port_names_inactive.split(',') %} - "{{ port }}": { -{% if dynamic_mode is defined %} - "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} -{% else %} - "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'static')}} -{% endif %} - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% endif %} - } -{%- endmacro %} - -{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %} - "BUFFER_QUEUE": { -{% set q_loop = namespace(last_valid=false) %} -{% for port in port_names_active.split(',') %} -{% if port not in port_names_extra_queues.split(',') %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'active', 'static')}} - }, -{% endif %} -{% endfor %} -{% for port in port_names_active.split(',') %} -{% if port not in port_names_extra_queues.split(',') %} - "{{ port }}|0-2": { - "profile" : "q_lossy_profile" - }, -{% endif %} -{% endfor %} -{% for port in port_names_active.split(',') %} -{% if port not in port_names_extra_queues.split(',') %} -{% if port_names_extra_queues|length > 0 %} - "{{ port }}|5-7": { -{% else %} - "{{ port }}|5-6": { -{% endif %} - "profile" : "q_lossy_profile" - }{% if not loop.last %},{% endif %} - -{% set q_loop.last_valid = true %} -{% else %} -{% set q_loop.last_valid = false %} -{% endif %} -{% endfor %} -{% if port_names_extra_queues|length > 0 %} -{% if q_loop.last_valid %},{% endif %} -{% for port in port_names_extra_queues.split(',') %} - "{{ port }}|0-1": { - "profile" : "q_lossy_profile" - }, - "{{ port }}|2-4": { - "profile" : "egress_lossless_profile" - }, - "{{ port }}|5": { - "profile" : "q_lossy_profile" - }, - "{{ port }}|6": { - "profile" : "egress_lossless_profile" - }, - "{{ port }}|7": { - "profile" : "q_lossy_profile" - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% endif %} -{% if port_names_inactive|length > 0 %} -, -{% if dynamic_mode is defined %} -{% for port in port_names_inactive.split(',') %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'dynamic')}} - }, -{% endfor %} -{% for port in port_names_inactive.split(',') %} - "{{ port }}|0-2": { - "profile" : "q_lossy_profile" - }, -{% endfor %} -{% for port in port_names_inactive.split(',') %} -{% if port_names_extra_queues|length > 0 %} - "{{ port }}|5-7": { -{% else %} - "{{ port }}|5-6": { -{% endif %} - "profile" : "q_lossy_profile" - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% else %} -{% for port in port_names_inactive.split(',') %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'static')}} - }, -{% endfor %} -{% for port in port_names_inactive.split(',') %} - "{{ port }}|0-2": { - "profile" : "egress_lossy_zero_profile" - }, -{% endfor %} -{% for port in port_names_inactive.split(',') %} -{% if port_names_extra_queues|length > 0 %} - "{{ port }}|5-7": { -{% else %} - "{{ port }}|5-6": { -{% endif %} - "profile" : "egress_lossy_zero_profile" - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% endif %} -{% endif %} - } -{%- endmacro %} - -{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} -{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %} - "BUFFER_PG": { -{% set pg_loop = namespace(last_valid=false) %} -{% for port in port_names_active.split(',') %} -{% if port not in port_names_extra_pgs.split(',') %} -{% if dynamic_mode is defined %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} - }, -{% else %} -{% if port in PORT_DPC %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} - }, -{% endif %} -{% endif %} - "{{ port }}|0": { - "profile" : "ingress_lossy_profile" - }{% if not loop.last %},{% endif %} - -{% set pg_loop.last_valid = true %} -{% else %} -{% set pg_loop.last_valid = false %} -{% endif %} -{% endfor %} -{% if port_names_extra_pgs|length > 0 %} -{% if pg_loop.last_valid %},{% endif %} -{% for port in port_names_extra_pgs.split(',') %} -{% if dynamic_mode is defined %} - "{{ port }}|2-4": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} - }, - "{{ port }}|6": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} - }, -{% else %} -{% if port in PORT_DPC %} - "{{ port }}|2-4": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} - }, - "{{ port }}|6": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} - }, -{% endif %} -{% endif %} - "{{ port }}|0": { - "profile" : "ingress_lossy_profile" - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% endif %} -{% if port_names_inactive|length > 0 %} -{%- for port in port_names_inactive.split(',') %} - {%- if loop.first -%},{%- endif -%} -{% if dynamic_mode is defined %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'dynamic')}} - }, -{% else %} -{% if port in PORT_DPC %} - "{{ port }}|3-4": { - "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'static')}} - }, -{% endif %} -{% endif %} - "{{ port }}|0": { -{% if dynamic_mode is defined %} - "profile" : "ingress_lossy_profile" -{% else %} - "profile" : "ingress_lossy_pg_zero_profile" -{% endif %} - }{% if not loop.last %},{% endif %} - -{% endfor %} -{% endif %} - } -{%- endmacro %} - -{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} -{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }} -{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..b799f8c7e01 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 deleted file mode 100644 index 0814c102746..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 +++ /dev/null @@ -1,43 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{% set default_cable = '40m' %} -{%-set ports2cable = { - 'leafrouter_torrouter' : '300m', - 'torrouter_server' : '40m' - } --%} -{% set ingress_lossless_pool_size = '52064208' %} -{% set ingress_lossless_pool_xoff = '3461040' %} -{% set egress_lossless_pool_size = '60817392' %} -{% set egress_lossy_pool_size = '52064208' %} - -{% import 'buffers_defaults_objects.j2' as defs with context %} - -{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} -{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} -{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..da6bfd24f4e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 deleted file mode 100644 index 54964e94b1d..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 +++ /dev/null @@ -1,19 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{%- set default_topo = 't1' %} -{%- set dynamic_mode = 'true' %} -{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..4de460cb275 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json deleted file mode 100644 index 3bd288caa9c..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json +++ /dev/null @@ -1,506 +0,0 @@ -{ - "GLOBAL_MEDIA_SETTINGS": { - "1-28": { - "QSFP-DD-sm_media_interface": { - "speed:400GAUI-8": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:100GAUI-2": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa" - } - } - }, - "QSFP-DD-active_cable_media_interface": { - "speed:400GAUI-8": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:CAUI-4": { - "idriver": { - "lane0": "0x00000028", - "lane1": "0x00000028", - "lane2": "0x00000028", - "lane3": "0x00000028", - "lane4": "0x00000028", - "lane5": "0x00000028", - "lane6": "0x00000028", - "lane7": "0x00000028" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000033", - "lane1": "0x00000033", - "lane2": "0x00000033", - "lane3": "0x00000033", - "lane4": "0x00000033", - "lane5": "0x00000033", - "lane6": "0x00000033", - "lane7": "0x00000033" - }, - "post1": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_m2lp": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000050", - "lane1": "0x00000050", - "lane2": "0x00000050", - "lane3": "0x00000050", - "lane4": "0x00000050", - "lane5": "0x00000050", - "lane6": "0x00000050", - "lane7": "0x00000050" - }, - "obnlev": { - "lane0": "0x00000078", - "lane1": "0x00000078", - "lane2": "0x00000078", - "lane3": "0x00000078", - "lane4": "0x00000078", - "lane5": "0x00000078", - "lane6": "0x00000078", - "lane7": "0x00000078" - }, - "regn_bfm1p": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "regn_bfm1n": { - "lane0": "0x0000008c", - "lane1": "0x0000008c", - "lane2": "0x0000008c", - "lane3": "0x0000008c", - "lane4": "0x0000008c", - "lane5": "0x0000008c", - "lane6": "0x0000008c", - "lane7": "0x0000008c" - } - } - }, - "QSFP+-active_cable_media_interface": { - "speed:CAUI-4": { - "idriver": { - "lane0": "0x00000028", - "lane1": "0x00000028", - "lane2": "0x00000028", - "lane3": "0x00000028", - "lane4": "0x00000028", - "lane5": "0x00000028", - "lane6": "0x00000028", - "lane7": "0x00000028" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000033", - "lane1": "0x00000033", - "lane2": "0x00000033", - "lane3": "0x00000033", - "lane4": "0x00000033", - "lane5": "0x00000033", - "lane6": "0x00000033", - "lane7": "0x00000033" - }, - "post1": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_m2lp": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000050", - "lane1": "0x00000050", - "lane2": "0x00000050", - "lane3": "0x00000050", - "lane4": "0x00000050", - "lane5": "0x00000050", - "lane6": "0x00000050", - "lane7": "0x00000050" - }, - "obnlev": { - "lane0": "0x00000078", - "lane1": "0x00000078", - "lane2": "0x00000078", - "lane3": "0x00000078", - "lane4": "0x00000078", - "lane5": "0x00000078", - "lane6": "0x00000078", - "lane7": "0x00000078" - }, - "regn_bfm1p": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "regn_bfm1n": { - "lane0": "0x0000008c", - "lane1": "0x0000008c", - "lane2": "0x0000008c", - "lane3": "0x0000008c", - "lane4": "0x0000008c", - "lane5": "0x0000008c", - "lane6": "0x0000008c", - "lane7": "0x0000008c" - } - } - } - } - } -} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json new file mode 120000 index 00000000000..becbe5ec68a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json deleted file mode 100644 index 6e427a5b03e..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json +++ /dev/null @@ -1,108 +0,0 @@ -{ - "GLOBAL_MEDIA_SETTINGS": { - "1-28": { - "50G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - }, - "25G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - }, - "10G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - } - } - } -} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json new file mode 120000 index 00000000000..a30588ab624 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json deleted file mode 100644 index 3ada0d34478..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json +++ /dev/null @@ -1,6 +0,0 @@ -{ - "skip_ledd": true, - "skip_fancontrol": true, - "delay_xcvrd": false, - "skip_xcvrd_cmis_mgr": false -} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json new file mode 120000 index 00000000000..fc7fbfe33ee --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 deleted file mode 100644 index 68a41d8d597..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 +++ /dev/null @@ -1,17 +0,0 @@ -{# - Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 new file mode 120000 index 00000000000..176ba148274 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile deleted file mode 100644 index 84e9021d0c8..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile +++ /dev/null @@ -1,4 +0,0 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml -SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 -SAI_INDEPENDENT_MODULE_MODE=1 -SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile new file mode 120000 index 00000000000..ee409a15104 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/sai.profile \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml deleted file mode 100644 index 185aae6cf99..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml +++ /dev/null @@ -1,265 +0,0 @@ - - - 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- 1 - 3 - 32768 - - - - diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml new file mode 120000 index 00000000000..563ede5a0ad --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/sai_4280.xml \ No newline at end of file