From 0d75b2ac45d2de05d70d3add03bd45544c41b3bd Mon Sep 17 00:00:00 2001 From: Rodny Molina Date: Thu, 30 Aug 2018 05:18:06 -0700 Subject: [PATCH 01/57] Deleting stretch-branch pointer from .gitmodules (#2003) Removing .gitmodules pointer to inexistent linux-kernel branch. rmolina-mn1:sonic-buildimage rmolina$ git submodule update --recursive --remote .. fatal: Needed a single revision Unable to find current origin/stretch revision in submodule path 'src/sonic-linux-kernel' ... Signed-off-by: Rodny Molina --- .gitmodules | 1 - 1 file changed, 1 deletion(-) diff --git a/.gitmodules b/.gitmodules index 72d743e426f..3977babe512 100644 --- a/.gitmodules +++ b/.gitmodules @@ -4,7 +4,6 @@ [submodule "sonic-linux-kernel"] path = src/sonic-linux-kernel url = https://github.com/Azure/sonic-linux-kernel - branch = stretch [submodule "sonic-sairedis"] path = src/sonic-sairedis url = https://github.com/Azure/sonic-sairedis From 674b58e2a27c34c2021fa28398cc11fdeeaceab5 Mon Sep 17 00:00:00 2001 From: Shuotian Cheng Date: Thu, 30 Aug 2018 05:28:22 -0700 Subject: [PATCH 02/57] [snmpagent]: Update sonic-snmpagent submodule (#2001) - Fix NameError: name 'logger' is not defined bug Signed-off-by: Shu0T1an ChenG --- src/sonic-snmpagent | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index b180f4423a6..b7d915e2679 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit b180f4423a6cd205009f2aed19c2bac441a2dfd0 +Subproject commit b7d915e2679c731bb47cb1fb2889bad76e6fe110 From 26850b351f60d761e6864e023ee917286393d0ff Mon Sep 17 00:00:00 2001 From: lguohan Date: Thu, 30 Aug 2018 22:47:43 -0700 Subject: [PATCH 03/57] refactor bcm attribute checker (#1974) * refactor bcm attribute checker * exclude phy_84752 and phy_84328 Signed-off-by: Guohan Lu --- src/sonic-device-data/tests/config_checker | 43 ++++++++++------------ src/sonic-device-data/tests/permitted_list | 17 ++++++--- 2 files changed, 31 insertions(+), 29 deletions(-) diff --git a/src/sonic-device-data/tests/config_checker b/src/sonic-device-data/tests/config_checker index 51c32c19c3e..6e59d1f44ce 100755 --- a/src/sonic-device-data/tests/config_checker +++ b/src/sonic-device-data/tests/config_checker @@ -10,29 +10,9 @@ def usage(): sys.exit(1) def check_property(p): + if p in permitted_properties: return True - # Try to remove trailing . - if re.sub(r".\d+$", "", p) in permitted_properties: - return True - # Try to remove trailing _. - if re.sub(r"_\d+.\d+$", "", p) in permitted_properties: - return True - # Try to remove trailing _hg. - if re.sub(r"_hg.0$", "", p) in permitted_properties: - return True - # Try to remove trailing _[cx]e - if re.sub(r"_[cx]e\d*$", "", p) in permitted_properties: - return True - # Try to remove trailing _lane_ - if re.sub(r"_lane\d_\d+$", "", p) in permitted_properties: - return True - # Try to remove trailing _lane_. - if re.sub(r"_lane\d_\d+.\d+$", "", p) in permitted_properties: - return True - # Try to remove trailing _lane_[cx]e - if re.sub(r"_lane\d_[cx]e\d+$", "", p) in permitted_properties: - return True return False def check_file(file_name): @@ -45,12 +25,27 @@ def check_file(file_name): lineno = lineno + 1 # Check both commented and uncommented lines line = line.strip().lstrip('#').strip().lower() + # Check if = in the line if line.find("=") == -1: continue p = line.split("=", 1)[0] - # Remove trailing "{.}" - p = re.sub('{[0-9]+\.[0-9]+}', '', p) - # Check if = in the line + + # Remove trailing unit ".$" + p = re.sub(r"\.[0-9]+$", '', p) + # Remove trailing port name + p = re.sub(r"_[cxg]e(\d+)?$", '', p) + # Remove trailing port name example + p = re.sub(r"_$", '', p) + # Remove trailing port number + if p != "phy_84752" and p != "phy_84328": + p = re.sub(r"_(port)?\d+$", '', p) + # Remove trailing higig port + p = re.sub(r"_hg$", '', p) + # Remove trailing lane number + p = re.sub(r"_lane\d+$", '', p) + # Remove trailing "{.}$" + p = re.sub(r"{[0-9]+\.[0-9]+}$", '', p) + if not check_property(p): file_ok = False print("[line %d] Error: %s is not permitted" % (lineno, p)) diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index 150a16292c9..ea78b8165f3 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -7,6 +7,9 @@ bcm_stat_interval bcm_stat_jumbo bcm_tunnel_term_compatible_mode bcm_xlate_port_enable +bcm56340_4x10 +bcm56340_2x10 +bcm56340_config cdma_timeout_usec core_clock_frequency ctr_evict_enable @@ -59,7 +62,7 @@ oversubscribe_mode parity_correction parity_enable pbmp_oversubscribe -pbmp_xport_xe +pbmp_xport pci2eb_overrid pfc_deadlock_seq_control phy_84328 @@ -69,31 +72,35 @@ phy_an_allow_pll_change_hg phy_an_c37 phy_an_c73 phy_an_fec +phy_automedium phy_aux_voltage_enable phy_chain_rx_lane_map_physical phy_chain_rx_polarity_flip_physical phy_chain_tx_lane_map_physical phy_chain_tx_polarity_flip_physical phy_ext_rom_boot +phy_fiber_pref phy_gearbox_enable +phy_null phy_line_tx_mode phy_pcs_rx_polarity_flip phy_pcs_tx_polarity_flip phy_port_primary_and_offset phy_rx_polarity_flip phy_system_tx_mode +phy_sgmii_autoneg phy_tx_polarity_flip phy_xaui_rx_polarity_flip phy_xaui_tx_polarity_flip physical_ports port_init_autoneg port_init_cl72 -port_init_cl72_hg -port_init_speed_xe +port_init_speed port_phy_addr port_phy_clause port_phy_id0 port_phy_id1 +portgroup portmap prbs_polynomial ptp_bs_fref @@ -113,7 +120,7 @@ serdes_firmware_mode serdes_if_type serdes_pre_driver_current serdes_preemphasis -serdes_rx_los_xe +serdes_rx_los serdes_sgmii_m skip_L2_USER_ENTRY sram_scan_enable @@ -129,6 +136,6 @@ tslam_intr_enable tslam_timeout_usec uplink_ports xgxs_lcpll_xtal_refclk -xgxs_pdetect_1 +xgxs_pdetect xgxs_rx_lane_map xgxs_tx_lane_map From 14a0b8c8a3f78e602e9fb77ec1cac5058783f843 Mon Sep 17 00:00:00 2001 From: jackyjs <38714676+jackyjs@users.noreply.github.com> Date: Sun, 2 Sep 2018 04:25:46 +0800 Subject: [PATCH 04/57] [devices]: Add Delta Platform et-6248brb (#1640) * Add Delta Platform et-6248brb Signed-off-by: jackyjsliu * add Broadcom configuration file Signed-off-by: jackyjsliu * modify Broadcom configuration file --- .../helix4-et-6248brb-48x1G+2x10G.config.bcm | 158 ++++++++++++++++++ .../x86_64-delta_et-6248brb-r0/sensors.conf | 4 +- platform/broadcom/platform-modules-delta.mk | 2 +- .../modules/delta_et-6248brb_platform.c | 2 +- .../et-6248brb/modules/dni_gpio.c | 2 + 5 files changed, 163 insertions(+), 5 deletions(-) create mode 100644 device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm diff --git a/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm new file mode 100644 index 00000000000..05d1c1e8820 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm @@ -0,0 +1,158 @@ +# bcm56340 setting : +# Specifies the base port and phy index of a multi slice phy chip. +#phy_port_primary_and_offset_ value is 0xPPOO 0xPP is primary port number 0xOO is offset of the slice +# bcm56340 QG0 port setting +phy_port_primary_and_offset_1=0x0100 +phy_port_primary_and_offset_2=0x0101 +phy_port_primary_and_offset_3=0x0102 +phy_port_primary_and_offset_4=0x0103 +phy_port_primary_and_offset_5=0x0104 +phy_port_primary_and_offset_6=0x0105 +phy_port_primary_and_offset_7=0x0106 +phy_port_primary_and_offset_8=0x0107 + +# bcm56340 QG1 port setting +phy_port_primary_and_offset_9=0x0900 +phy_port_primary_and_offset_10=0x0901 +phy_port_primary_and_offset_11=0x0902 +phy_port_primary_and_offset_12=0x0903 +phy_port_primary_and_offset_13=0x0904 +phy_port_primary_and_offset_14=0x0905 +phy_port_primary_and_offset_15=0x0906 +phy_port_primary_and_offset_16=0x0907 + +# bcm56340 QG2 port setting +phy_port_primary_and_offset_17=0x1100 +phy_port_primary_and_offset_18=0x1101 +phy_port_primary_and_offset_19=0x1102 +phy_port_primary_and_offset_20=0x1103 +phy_port_primary_and_offset_21=0x1104 +phy_port_primary_and_offset_22=0x1105 +phy_port_primary_and_offset_23=0x1106 +phy_port_primary_and_offset_24=0x1107 + +# bcm56340 QG3 port setting +phy_port_primary_and_offset_25=0x1900 +phy_port_primary_and_offset_26=0x1901 +phy_port_primary_and_offset_27=0x1902 +phy_port_primary_and_offset_28=0x1903 +phy_port_primary_and_offset_29=0x1904 +phy_port_primary_and_offset_30=0x1905 +phy_port_primary_and_offset_31=0x1906 +phy_port_primary_and_offset_32=0x1907 + +# bcm56340 QG4 port setting +phy_port_primary_and_offset_33=0x2100 +phy_port_primary_and_offset_34=0x2101 +phy_port_primary_and_offset_35=0x2102 +phy_port_primary_and_offset_36=0x2103 +phy_port_primary_and_offset_37=0x2104 +phy_port_primary_and_offset_38=0x2105 +phy_port_primary_and_offset_39=0x2106 +phy_port_primary_and_offset_40=0x2107 + +# bcm56340 QG5 port setting +phy_port_primary_and_offset_41=0x2900 +phy_port_primary_and_offset_42=0x2901 +phy_port_primary_and_offset_43=0x2902 +phy_port_primary_and_offset_44=0x2903 +phy_port_primary_and_offset_45=0x2904 +phy_port_primary_and_offset_46=0x2905 +phy_port_primary_and_offset_47=0x2906 +phy_port_primary_and_offset_48=0x2907 + +# bcm56340 port group setting +bcm56340_4x10=1 +portgroup_0=1 +portgroup_1=1 +portgroup_2=1 +portgroup_3=1 +portgroup_4=1 +portgroup_5=1 +portgroup_6=1 +portgroup_7=1 +portgroup_8=1 +portgroup_9=1 +portgroup_10=1 +portgroup_11=1 +portgroup_12=1 + +# Port map +pbmp_xport_ge=0x0001FFFFFFFFFFFE +pbmp_xport_xe=0x3F000000000000 + +# phy addr setting for bcm54285-0 +port_phy_addr_1=0x1 +port_phy_addr_2=0x2 +port_phy_addr_3=0x3 +port_phy_addr_4=0x4 +port_phy_addr_5=0x5 +port_phy_addr_6=0x6 +port_phy_addr_7=0x7 +port_phy_addr_8=0x8 + +# phy addr setting for bcm54285-1 +port_phy_addr_9=0xa +port_phy_addr_10=0xb +port_phy_addr_11=0xc +port_phy_addr_12=0xd +port_phy_addr_13=0xe +port_phy_addr_14=0xf +port_phy_addr_15=0x10 +port_phy_addr_16=0x11 + +# phy addr setting for bcm54285-2 +port_phy_addr_17=0x13 +port_phy_addr_18=0x14 +port_phy_addr_19=0x15 +port_phy_addr_20=0x16 +port_phy_addr_21=0x17 +port_phy_addr_22=0x18 +port_phy_addr_23=0x19 +port_phy_addr_24=0x1a + +# phy addr setting for bcm54285-3 +port_phy_addr_25=0x21 +port_phy_addr_26=0x22 +port_phy_addr_27=0x23 +port_phy_addr_28=0x24 +port_phy_addr_29=0x25 +port_phy_addr_30=0x26 +port_phy_addr_31=0x27 +port_phy_addr_32=0x28 + +# phy addr setting for bcm54285-4 +port_phy_addr_33=0x2a +port_phy_addr_34=0x2b +port_phy_addr_35=0x2c +port_phy_addr_36=0x2d +port_phy_addr_37=0x2e +port_phy_addr_38=0x2f +port_phy_addr_39=0x30 +port_phy_addr_40=0x31 + +# phy addr setting for bcm54285-5 +port_phy_addr_41=0x33 +port_phy_addr_42=0x34 +port_phy_addr_43=0x35 +port_phy_addr_44=0x36 +port_phy_addr_45=0x37 +port_phy_addr_46=0x38 +port_phy_addr_47=0x39 +port_phy_addr_48=0x3a + +# phy addr setting for bcm84758 +port_phy_addr_50=0x40 +port_phy_addr_51=0x41 +port_phy_addr_52=0x42 +port_phy_addr_53=0x43 + +# Fiber prefer setting for bcm54285 +phy_automedium=1 +#phy_fiber_pref value is 1 +phy_ext_rom_boot=0 +phy_sgmii_autoneg_ge=1 + +os=unix +phy_null_port52=1 +phy_null_port53=1 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf b/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf index f388bd71ecb..d5da19ffecd 100644 --- a/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf +++ b/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf @@ -10,6 +10,4 @@ chip "tmp75-i2c-8-4a" chip "adt7473-i2c-0-2e" label fan1 "FANTRAY 1" - label fan2 "FANTRAY 2" - - + label fan2 "FANTRAY 2" \ No newline at end of file diff --git a/platform/broadcom/platform-modules-delta.mk b/platform/broadcom/platform-modules-delta.mk index 5e6137e74ac..0c186f127a5 100644 --- a/platform/broadcom/platform-modules-delta.mk +++ b/platform/broadcom/platform-modules-delta.mk @@ -28,4 +28,4 @@ DELTA_ET6248BRB_PLATFORM_MODULE = platform-modules-et-6248brb_$(DELTA_ET6248BRB_ $(DELTA_ET6248BRB_PLATFORM_MODULE)_PLATFORM = x86_64-delta_et-6248brb-r0 $(eval $(call add_extra_package,$(DELTA_AG9032V1_PLATFORM_MODULE),$(DELTA_ET6248BRB_PLATFORM_MODULE))) -SONIC_STRETCH_DEBS += $(DELTA_AG9032V1_PLATFORM_MODULE) +SONIC_STRETCH_DEBS += $(DELTA_AG9032V1_PLATFORM_MODULE) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c index fc5ecf32003..72fccd9aa0e 100644 --- a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c @@ -545,7 +545,7 @@ static ssize_t set_gpio_reg(struct device *dev, struct device_attribute *dev_att { int err; int value; - unsigned long set_data; + unsigned long set_data; unsigned char set_reg; unsigned char mask; unsigned char mask_out; diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c index b83ed4e6035..127cf6af13a 100644 --- a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c @@ -401,6 +401,7 @@ static struct ichx_desc avoton_desc = { .reglen = avoton_reglen, .use_outlvl_cache = true, }; + #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) static int ichx_gpio_request_regions(struct resource *res_base, const char *name, u8 use_gpio) @@ -558,6 +559,7 @@ static int ichx_gpio_remove(struct platform_device *pdev) return 0; } + #else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) static int ichx_gpio_request_regions(struct device *dev, struct resource *res_base, const char *name, u8 use_gpio) From fd5a3cf6fbcb16fdb20ae89045fc4eb2f5187ee6 Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Sun, 2 Sep 2018 04:30:31 +0800 Subject: [PATCH 05/57] [console speed] Inherit console speed from install environment (#1987) * pick up console speed from install enviroment * get console speed from /proc/cmdline * add CONSOLE_PORT handle --- installer/x86_64/install.sh | 35 ++++++++++++++++++++++++++++++----- 1 file changed, 30 insertions(+), 5 deletions(-) diff --git a/installer/x86_64/install.sh b/installer/x86_64/install.sh index 874dc8d13da..e39ed972747 100755 --- a/installer/x86_64/install.sh +++ b/installer/x86_64/install.sh @@ -64,11 +64,6 @@ fi echo "onie_platform: $onie_platform" -# default console settings -CONSOLE_PORT=0x3f8 -CONSOLE_DEV=0 -CONSOLE_SPEED=9600 - # Get platform specific linux kernel command line arguments ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" @@ -77,6 +72,36 @@ VAR_LOG_SIZE=4096 [ -r platforms/$onie_platform ] && . platforms/$onie_platform +# Pick up console port and speed from install enviroment if not defined yet. +# Console port and speed setting in cmdline is like "console=ttyS0,9600n", +# so we can use pattern 'console=ttyS[0-9]+,[0-9]+' to match it. +# If failed to get the speed and ttyS from cmdline then set them to default: ttyS0 and 9600 +if [ -z "$CONSOLE_PORT" ]; then + console_ttys=$(cat /proc/cmdline | grep -Eo 'console=ttyS[0-9]+' | cut -d "=" -f2) + if [ -z "$console_ttys" -o "$console_ttys" = "ttyS0" ]; then + CONSOLE_PORT=0x3f8 + CONSOLE_DEV=0 + elif [ "$console_ttys" = "ttyS1" ]; then + CONSOLE_PORT=0x2f8 + CONSOLE_DEV=1 + elif [ "$console_ttys" = "ttyS2" ]; then + CONSOLE_PORT=0x3e8 + CONSOLE_DEV=2 + elif [ "$console_ttys" = "ttyS3" ]; then + CONSOLE_PORT=0x2e8 + CONSOLE_DEV=3 + fi +fi + +if [ -z "$CONSOLE_SPEED" ]; then + speed=$(cat /proc/cmdline | grep -Eo 'console=ttyS[0-9]+,[0-9]+' | cut -d "," -f2) + if [ -z "$speed" ]; then + CONSOLE_SPEED=9600 + else + CONSOLE_SPEED=$speed + fi +fi + # Install demo on same block device as ONIE if [ "$install_env" != "build" ]; then onie_dev=$(blkid | grep ONIE-BOOT | head -n 1 | awk '{print $1}' | sed -e 's/:.*$//') From 2cce4aec1c4292f490fb490130fec6220709f393 Mon Sep 17 00:00:00 2001 From: StanleyCi <34563271+StanleyCi@users.noreply.github.com> Date: Sun, 2 Sep 2018 04:52:38 +0800 Subject: [PATCH 06/57] [device] Update ag9032v1 and ag9064 modules. (#1690) * Update ag9032v1 and ag9064 modules. Signed-off-by: neal tai * Fix the sfputil.py when convert an integer to hexadecimal without the 'L' trailing. Signed-off-by: neal tai --- .../x86_64-delta_ag9064-r0/plugins/sfputil.py | 2 +- .../ag9032v1/modules/delta_ag9032v1_cpupld.c | 774 +-- .../modules/delta_ag9032v1_platform.c | 5108 ++++++++--------- .../scripts/ag9032v1_platform_init.sh | 3 + .../ag9032v1/scripts/led_status.sh | 2 +- .../debian/platform-modules-ag9032v1.init | 1 - 6 files changed, 2946 insertions(+), 2944 deletions(-) diff --git a/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py index d7eadb58036..708c50819b0 100644 --- a/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py +++ b/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py @@ -120,7 +120,7 @@ def set_low_power_mode(self, port_num, lpmode): reg_value = reg_value & ~mask # Convert our register value back to a hex string and write back - content = hex(reg_value) + content = hex(reg_value).rstrip("L") or "0" reg_file.seek(0) reg_file.write(content) diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c index ba920f7558d..22f997e71fa 100644 --- a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c @@ -1,387 +1,387 @@ -#include -#include -#include -#include -#include -#include - -#define CPUPLD_REG 0x31 - -enum cpld_type { - cpld, -}; - -struct platform_data { - int reg_addr; - struct i2c_client *client; -}; - -enum{ - BUS0 = 0, - BUS1, - BUS2, - BUS3, - BUS4, - BUS5, - BUS6, - BUS7, -}; - -enum cpld_attributes { - CPLD_VER, - CPU_BOARD_VER, - CPU_ID, - CPLD_RST, - MB_RST, - I2C_SW_RST, - MB_PWR, - PSU_FAN_INT, - SPI_WP_GBE, - EEPROM_WP, -}; - -static void device_release(struct device *dev) -{ - return; -} - -/*---------------- CPUPLD - start ------------- */ -static struct platform_data ag9032v1_cpld_platform_data[] = { - [cpld] = { - .reg_addr = CPUPLD_REG, - }, -}; - -static struct platform_device ag9032v1_cpld = { - .name = "delta-ag9032v1-cpupld", - .id = 0, - .dev = { - .platform_data = ag9032v1_cpld_platform_data, - .release = device_release - }, -}; -static unsigned char cpld_reg_addr; -static ssize_t get_cpld_reg_value(struct device *dev, struct device_attribute *devattr, char *buf) -{ - int ret; - struct platform_data *pdata = dev->platform_data; - - ret = i2c_smbus_read_byte_data(pdata[cpld].client, cpld_reg_addr); - - return sprintf(buf, "0x%02x\n", ret); -} - -static ssize_t set_cpld_reg_value(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned long data; - int err; - struct platform_data *pdata = dev->platform_data; - err = kstrtoul(buf, 0, &data); - if (err){ - return err; - } - - if (data > 0xff){ - printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); - return count; - } - - i2c_smbus_write_byte_data(pdata[cpld].client, cpld_reg_addr, data); - - return count; -} - -static ssize_t get_cpld_reg_addr(struct device *dev, struct device_attribute *devattr, char *buf) -{ - - return sprintf(buf, "0x%02x\n", cpld_reg_addr); -} - -static ssize_t set_cpld_reg_addr(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned long data; - int err; - - err = kstrtoul(buf, 0, &data); - if (err){ - return err; - } - if (data > 0xff){ - printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); - return count; - } - cpld_reg_addr = data; - - return count; -} - -static ssize_t get_cpld_data(struct device *dev, struct device_attribute *dev_attr, char *buf) -{ - int ret; - struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); - struct platform_data *pdata = dev->platform_data; - unsigned char reg; - int mask; - int value; - char note[180]; - switch (attr->index) { - case CPLD_VER: - reg = 0x01; - value = i2c_smbus_read_byte_data(pdata[cpld].client, reg); - sprintf(note, "\nCPLD Version, controlled by CPLD editor.\n"); - return sprintf(buf, "0x%02x%s", value, note); - break; - case CPU_BOARD_VER: - reg = 0x02; - ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); - value = ret >> 4; - sprintf(note, "\n“0x00”: proto A1\n“0x01”: proto A2\n“0x02”: proto B\n"); - return sprintf(buf, "0x%02x%s", value, note); - break; - case CPU_ID: - reg = 0x02; - ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); - value = ret & 0x0F; - sprintf(note, "\n“0x00”: P2041 ECC\n“0x01”: Rangeley ECC\n“0x02”: T2080 ECC\n"); - return sprintf(buf, "0x%02x%s", value, note); - break; - case CPLD_RST: - reg = 0x05; - mask = 7; - sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); - break; - case MB_RST: - reg = 0x05; - mask = 1; - sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); - break; - case I2C_SW_RST: - reg = 0x05; - mask = 0; - sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); - break; - case MB_PWR: - reg = 0x08; - mask = 4; - sprintf(note, "\n“1” = Power rail is good\n“0” = Power rail is failed\n"); - break; - case PSU_FAN_INT: - reg = 0x0A; - mask = 0; - sprintf(note, "\n“1” = Interrupt doesn’t occur\n“0” = Interrupt occurs\n"); - break; - case SPI_WP_GBE: - reg = 0x10; - mask = 3; - sprintf(note, "\n“1” = overrides the lock-down function enabling blocks to be erased or programmed using software commands.\n“0” = enables the lock-down mechanism.\n"); - break; - case EEPROM_WP: - reg = 0x10; - mask = 2; - sprintf(note, "\n“1” = overrides the lock-down function enabling blocks to be erased or programmed using software commands.\n“0” = enables the lock-down mechanism.\n"); - break; - default: - return sprintf(buf, "%d not found", attr->index); - } - ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); - value = (ret & (1 << mask)) >> mask; - return sprintf(buf, "%d%s", value, note); -} - -static ssize_t set_cpld_data(struct device *dev, struct device_attribute *dev_attr, - const char *buf, size_t count) -{ - int mask; - int err; - int ret; - unsigned long data; - unsigned char reg; - unsigned char mask_shift; - struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); - struct platform_data *pdata = dev->platform_data; - err = kstrtoul(buf, 0, &data); - if (err){ - return err; - } - - if (data > 0xff){ - printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); - return count; - } - switch (attr->index) { - case CPLD_RST: - reg = 0x05; - mask = 7; - break; - case MB_RST: - reg = 0x05; - mask = 1; - break; - case I2C_SW_RST: - reg = 0x05; - mask = 0; - break; - case SPI_WP_GBE: - reg = 0x10; - mask = 3; - break; - case EEPROM_WP: - reg = 0x10; - mask = 2; - break; - default: - return count; - } - - ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); - mask_shift = 1 << mask; - data = (ret & ~mask_shift) | (data << mask); - i2c_smbus_write_byte_data(pdata[cpld].client, cpld_reg_addr, data); - - return count; -} - -static DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg_value, set_cpld_reg_value); -static DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg_addr, set_cpld_reg_addr); - -static SENSOR_DEVICE_ATTR(cpld_ver, S_IRUGO, get_cpld_data, NULL, CPLD_VER); -static SENSOR_DEVICE_ATTR(cpu_board_ver, S_IRUGO, get_cpld_data, NULL, CPU_BOARD_VER); -static SENSOR_DEVICE_ATTR(cpu_id, S_IRUGO, get_cpld_data, NULL, CPU_ID); -static SENSOR_DEVICE_ATTR(cpld_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, CPLD_RST); -static SENSOR_DEVICE_ATTR(mb_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, MB_RST); -static SENSOR_DEVICE_ATTR(i2c_sw_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, I2C_SW_RST); -static SENSOR_DEVICE_ATTR(mb_pwr, S_IRUGO, get_cpld_data, NULL, MB_PWR); -static SENSOR_DEVICE_ATTR(psu_fan_int, S_IRUGO, get_cpld_data, NULL, PSU_FAN_INT); -static SENSOR_DEVICE_ATTR(spi_wp_gbe, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, SPI_WP_GBE); -static SENSOR_DEVICE_ATTR(eeprom_wp, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, EEPROM_WP); - -static struct attribute *ag9032v1_cpld_attrs[] = { - &dev_attr_cpld_reg_value.attr, - &dev_attr_cpld_reg_addr.attr, - &sensor_dev_attr_cpld_ver.dev_attr.attr, - &sensor_dev_attr_cpu_board_ver.dev_attr.attr, - &sensor_dev_attr_cpu_id.dev_attr.attr, - &sensor_dev_attr_cpld_rst.dev_attr.attr, - &sensor_dev_attr_mb_rst.dev_attr.attr, - &sensor_dev_attr_i2c_sw_rst.dev_attr.attr, - &sensor_dev_attr_mb_pwr.dev_attr.attr, - &sensor_dev_attr_psu_fan_int.dev_attr.attr, - &sensor_dev_attr_spi_wp_gbe.dev_attr.attr, - &sensor_dev_attr_eeprom_wp.dev_attr.attr, - NULL, -}; - -static struct attribute_group ag9032v1_cpld_attr_group = { - .attrs = ag9032v1_cpld_attrs, -}; - -static int __init cpld_probe(struct platform_device *pdev) -{ - struct platform_data *pdata; - struct i2c_adapter *parent; - int ret; - int retval; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "CPUPLD platform data not found\n"); - return -ENODEV; - } - - parent = i2c_get_adapter(BUS2); - if (!parent) { - printk(KERN_WARNING "Parent adapter (%d) not found\n",BUS2); - return -ENODEV; - } - - pdata[cpld].client = i2c_new_dummy(parent, pdata[cpld].reg_addr); - if (!pdata[cpld].client) { - printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[cpld].reg_addr); - goto error; - } - - retval = sysfs_create_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_group); - if (retval){ - printk(KERN_WARNING "Fail to create cpupld attribute group"); - goto error; - } - return 0; - -error: - i2c_unregister_device(pdata[cpld].client); - i2c_put_adapter(parent); - return -ENODEV; -} - -static int __exit cpld_remove(struct platform_device *pdev) -{ - struct i2c_adapter *parent = NULL; - struct platform_data *pdata = pdev->dev.platform_data; - sysfs_remove_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_group); - - if (!pdata) { - dev_err(&pdev->dev, "Missing platform data\n"); - } - else { - if (pdata[cpld].client) { - if (!parent) { - parent = (pdata[cpld].client)->adapter; - } - i2c_unregister_device(pdata[cpld].client); - } - } - i2c_put_adapter(parent); - return 0; -} - -static struct platform_driver cpld_driver = { - .probe = cpld_probe, - .remove = __exit_p(cpld_remove), - .driver = { - .owner = THIS_MODULE, - .name = "delta-ag9032v1-cpupld", - }, -}; -/*---------------- CPUPLD - end ------------- */ - - -/*---------------- module initialization ------------- */ -static int __init delta_ag9032v1_cpupld_init(void) -{ - int ret; - printk(KERN_WARNING "ag9032v1_platform_cpupld module initialization\n"); - - // set the CPUPLD prob and remove - ret = platform_driver_register(&cpld_driver); - if (ret) { - printk(KERN_WARNING "Fail to register cpupld driver\n"); - goto error_cpupld_driver; - } - - // register the CPUPLD - ret = platform_device_register(&ag9032v1_cpld); - if (ret) { - printk(KERN_WARNING "Fail to create cpupld device\n"); - goto error_ag9032v1_cpupld; - } - return 0; - -error_ag9032v1_cpupld: - platform_driver_unregister(&cpld_driver); -error_cpupld_driver: - return ret; -} - -static void __exit delta_ag9032v1_cpupld_exit(void) -{ - platform_device_unregister(&ag9032v1_cpld); - platform_driver_unregister(&cpld_driver); -} -module_init(delta_ag9032v1_cpupld_init); -module_exit(delta_ag9032v1_cpupld_exit); - -MODULE_DESCRIPTION("DNI ag9032v1 CPLD Platform Support"); -MODULE_AUTHOR("Stanley Chi "); -MODULE_LICENSE("GPL"); +#include +#include +#include +#include +#include +#include + +#define CPUPLD_REG 0x31 + +enum cpld_type { + cpld, +}; + +struct platform_data { + int reg_addr; + struct i2c_client *client; +}; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, +}; + +enum cpld_attributes { + CPLD_VER, + CPU_BOARD_VER, + CPU_ID, + CPLD_RST, + MB_RST, + I2C_SW_RST, + MB_PWR, + PSU_FAN_INT, + SPI_WP_GBE, + EEPROM_WP, +}; + +static void device_release(struct device *dev) +{ + return; +} + +/*---------------- CPUPLD - start ------------- */ +static struct platform_data ag9032v1_cpld_platform_data[] = { + [cpld] = { + .reg_addr = CPUPLD_REG, + }, +}; + +static struct platform_device ag9032v1_cpld = { + .name = "delta-ag9032v1-cpupld", + .id = 0, + .dev = { + .platform_data = ag9032v1_cpld_platform_data, + .release = device_release + }, +}; +static unsigned char cpld_reg_addr; +static ssize_t get_cpld_reg_value(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + struct platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[cpld].client, cpld_reg_addr); + + return sprintf(buf, "0x%02x\n", ret); +} + +static ssize_t set_cpld_reg_value(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + struct platform_data *pdata = dev->platform_data; + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + + i2c_smbus_write_byte_data(pdata[cpld].client, cpld_reg_addr, data); + + return count; +} + +static ssize_t get_cpld_reg_addr(struct device *dev, struct device_attribute *devattr, char *buf) +{ + + return sprintf(buf, "0x%02x\n", cpld_reg_addr); +} + +static ssize_t set_cpld_reg_addr(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + cpld_reg_addr = data; + + return count; +} + +static ssize_t get_cpld_data(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct platform_data *pdata = dev->platform_data; + unsigned char reg; + int mask; + int value; + char note[180]; + switch (attr->index) { + case CPLD_VER: + reg = 0x01; + value = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + sprintf(note, "\nCPLD Version, controlled by CPLD editor.\n"); + return sprintf(buf, "0x%02x%s", value, note); + break; + case CPU_BOARD_VER: + reg = 0x02; + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + value = ret >> 4; + sprintf(note, "\n“0x00”: proto A1\n“0x01”: proto A2\n“0x02”: proto B\n"); + return sprintf(buf, "0x%02x%s", value, note); + break; + case CPU_ID: + reg = 0x02; + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + value = ret & 0x0F; + sprintf(note, "\n“0x00”: P2041 ECC\n“0x01”: Rangeley ECC\n“0x02”: T2080 ECC\n"); + return sprintf(buf, "0x%02x%s", value, note); + break; + case CPLD_RST: + reg = 0x05; + mask = 7; + sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); + break; + case MB_RST: + reg = 0x05; + mask = 1; + sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); + break; + case I2C_SW_RST: + reg = 0x05; + mask = 0; + sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); + break; + case MB_PWR: + reg = 0x08; + mask = 4; + sprintf(note, "\n“1” = Power rail is good\n“0” = Power rail is failed\n"); + break; + case PSU_FAN_INT: + reg = 0x0A; + mask = 0; + sprintf(note, "\n“1” = Interrupt doesn’t occur\n“0” = Interrupt occurs\n"); + break; + case SPI_WP_GBE: + reg = 0x10; + mask = 3; + sprintf(note, "\n“1” = overrides the lock-down function enabling blocks to be erased or programmed using software commands.\n“0” = enables the lock-down mechanism.\n"); + break; + case EEPROM_WP: + reg = 0x10; + mask = 2; + sprintf(note, "\n“1” = overrides the lock-down function enabling blocks to be erased or programmed using software commands.\n“0” = enables the lock-down mechanism.\n"); + break; + default: + return sprintf(buf, "%d not found", attr->index); + } + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + value = (ret & (1 << mask)) >> mask; + return sprintf(buf, "%d%s", value, note); +} + +static ssize_t set_cpld_data(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int mask; + int err; + int ret; + unsigned long data; + unsigned char reg; + unsigned char mask_shift; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct platform_data *pdata = dev->platform_data; + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + switch (attr->index) { + case CPLD_RST: + reg = 0x05; + mask = 7; + break; + case MB_RST: + reg = 0x05; + mask = 1; + break; + case I2C_SW_RST: + reg = 0x05; + mask = 0; + break; + case SPI_WP_GBE: + reg = 0x10; + mask = 3; + break; + case EEPROM_WP: + reg = 0x10; + mask = 2; + break; + default: + return count; + } + + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + mask_shift = 1 << mask; + data = (ret & ~mask_shift) | (data << mask); + i2c_smbus_write_byte_data(pdata[cpld].client, cpld_reg_addr, data); + + return count; +} + +static DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg_value, set_cpld_reg_value); +static DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg_addr, set_cpld_reg_addr); + +static SENSOR_DEVICE_ATTR(cpld_ver, S_IRUGO, get_cpld_data, NULL, CPLD_VER); +static SENSOR_DEVICE_ATTR(cpu_board_ver, S_IRUGO, get_cpld_data, NULL, CPU_BOARD_VER); +static SENSOR_DEVICE_ATTR(cpu_id, S_IRUGO, get_cpld_data, NULL, CPU_ID); +static SENSOR_DEVICE_ATTR(cpld_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, CPLD_RST); +static SENSOR_DEVICE_ATTR(mb_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, MB_RST); +static SENSOR_DEVICE_ATTR(i2c_sw_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, I2C_SW_RST); +static SENSOR_DEVICE_ATTR(mb_pwr, S_IRUGO, get_cpld_data, NULL, MB_PWR); +static SENSOR_DEVICE_ATTR(psu_fan_int, S_IRUGO, get_cpld_data, NULL, PSU_FAN_INT); +static SENSOR_DEVICE_ATTR(spi_wp_gbe, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, SPI_WP_GBE); +static SENSOR_DEVICE_ATTR(eeprom_wp, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, EEPROM_WP); + +static struct attribute *ag9032v1_cpld_attrs[] = { + &dev_attr_cpld_reg_value.attr, + &dev_attr_cpld_reg_addr.attr, + &sensor_dev_attr_cpld_ver.dev_attr.attr, + &sensor_dev_attr_cpu_board_ver.dev_attr.attr, + &sensor_dev_attr_cpu_id.dev_attr.attr, + &sensor_dev_attr_cpld_rst.dev_attr.attr, + &sensor_dev_attr_mb_rst.dev_attr.attr, + &sensor_dev_attr_i2c_sw_rst.dev_attr.attr, + &sensor_dev_attr_mb_pwr.dev_attr.attr, + &sensor_dev_attr_psu_fan_int.dev_attr.attr, + &sensor_dev_attr_spi_wp_gbe.dev_attr.attr, + &sensor_dev_attr_eeprom_wp.dev_attr.attr, + NULL, +}; + +static struct attribute_group ag9032v1_cpld_attr_group = { + .attrs = ag9032v1_cpld_attrs, +}; + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct platform_data *pdata; + struct i2c_adapter *parent; + int ret; + int retval; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPUPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS2); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n",BUS2); + return -ENODEV; + } + + pdata[cpld].client = i2c_new_dummy(parent, pdata[cpld].reg_addr); + if (!pdata[cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[cpld].reg_addr); + goto error; + } + + retval = sysfs_create_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_group); + if (retval){ + printk(KERN_WARNING "Fail to create cpupld attribute group"); + goto error; + } + return 0; + +error: + i2c_unregister_device(pdata[cpld].client); + i2c_put_adapter(parent); + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_group); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[cpld].client) { + if (!parent) { + parent = (pdata[cpld].client)->adapter; + } + i2c_unregister_device(pdata[cpld].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-cpupld", + }, +}; +/*---------------- CPUPLD - end ------------- */ + + +/*---------------- module initialization ------------- */ +static int __init delta_ag9032v1_cpupld_init(void) +{ + int ret; + printk(KERN_WARNING "ag9032v1_platform_cpupld module initialization\n"); + + // set the CPUPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpupld driver\n"); + goto error_cpupld_driver; + } + + // register the CPUPLD + ret = platform_device_register(&ag9032v1_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpupld device\n"); + goto error_ag9032v1_cpupld; + } + return 0; + +error_ag9032v1_cpupld: + platform_driver_unregister(&cpld_driver); +error_cpupld_driver: + return ret; +} + +static void __exit delta_ag9032v1_cpupld_exit(void) +{ + platform_device_unregister(&ag9032v1_cpld); + platform_driver_unregister(&cpld_driver); +} +module_init(delta_ag9032v1_cpupld_init); +module_exit(delta_ag9032v1_cpupld_exit); + +MODULE_DESCRIPTION("DNI ag9032v1 CPLD Platform Support"); +MODULE_AUTHOR("Stanley Chi "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c index 20a91db4c0f..9b7a1958c77 100644 --- a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c @@ -1,2554 +1,2554 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define BUS3_DEV_NUM 9 -#define BUS4_DEV_NUM 6 -#define BUS5_DEV_NUM 32 -#define DEFAULT_NUM 1 -#define BUS3_BASE_NUM 30 -#define BUS4_BASE_NUM 40 -#define BUS5_BASE_NUM 50 - -#define BUS3_MUX_REG 0x21 -#define BUS4_MUX_REG 0x21 -#define BUS5_MUX_REG 0x20 - -#define TEMP_FAN_VAL 0x06 -#define FANIO_CTL_VAL 0x07 -#define FAN_CTRL_VAL 0x05 -#define PSU1_VAL 0x00 -#define PSU2_VAL 0x20 -#define HOT_SWAP1_VAL 0x10 -#define HOT_SWAP2_VAL 0x30 -#define FAN_EEPROM1_VAL 0x00 -#define FAN_EEPROM2_VAL 0x01 -#define FAN_EEPROM3_VAL 0x02 -#define FAN_EEPROM4_VAL 0x03 -#define FAN_EEPROM5_VAL 0x04 - -#define SWPLD_REG 0x31 -#define SWPLD_SFP_MUX_REG 0x20 - -#define SYS_LED_REG 0x1C -#define FAN1_LED_REG 0x1D -#define FAN2_LED_REG 0x1E - -#define SFP_PRESENCE_1 0x38 -#define SFP_PRESENCE_2 0x39 -#define SFP_PRESENCE_3 0x3A -#define SFP_PRESENCE_4 0x3B - -#define SFP_LP_MODE_1 0x34 -#define SFP_LP_MODE_2 0x35 -#define SFP_LP_MODE_3 0x36 -#define SFP_LP_MODE_4 0x37 - -#define SFP_RESET_1 0x3C -#define SFP_RESET_2 0x3D -#define SFP_RESET_3 0x3E -#define SFP_RESET_4 0x3F - -#define SFP_RESPONSE_1 0x30 -#define SFP_RESPONSE_2 0x31 -#define SFP_RESPONSE_3 0x32 -#define SFP_RESPONSE_4 0x33 - -#define SFF8436_INFO(data) \ - .type = "sff8436", .addr = 0x50, .platform_data = (data) - -#define SFF_8346_PORT(eedata) \ - .byte_len = 256, .page_size = 1, .flags = SFF_8436_FLAG_READONLY - -#define ag9032v1_i2c_device_num(NUM){ \ - .name = "delta-ag9032v1-i2c-device", \ - .id = NUM, \ - .dev = { \ - .platform_data = &ag9032v1_i2c_device_platform_data[NUM], \ - .release = device_release, \ - }, \ -} - -/*Define struct to get client of i2c_new_deivce */ -struct i2c_client * i2c_client_9547; - -enum{ - BUS0 = 0, - BUS1, - BUS2, - BUS3, - BUS4, - BUS5, - BUS6, - BUS7, -}; - -unsigned char reverse_8bits(unsigned char c) -{ - unsigned char s = 0; - int i; - for (i = 0; i < 8; ++i) { - s <<= 1; - s |= c & 1; - c >>= 1; - } - return s; -} -/*---------------- I2C device - start ------------- */ -static void device_release(struct device *dev) -{ - return; -} - -struct i2c_device_platform_data { - int parent; - struct i2c_board_info info; - struct i2c_client *client; -}; -/* pca9547 - add 8 bus */ -static struct pca954x_platform_mode pca954x_mode[] = { - { .adap_id = 2, - .deselect_on_exit = 1, - }, - { .adap_id = 3, - .deselect_on_exit = 1, - }, - { .adap_id = 4, - .deselect_on_exit = 1, - }, - { .adap_id = 5, - .deselect_on_exit = 1, - }, - { .adap_id = 6, - .deselect_on_exit = 1, - }, - { .adap_id = 7, - .deselect_on_exit = 1, - }, - { .adap_id = 8, - .deselect_on_exit = 1, - }, - { .adap_id = 9, - .deselect_on_exit = 1, - }, -}; - -static struct pca954x_platform_data pca954x_data = { - .modes = pca954x_mode, - .num_modes = ARRAY_SIZE(pca954x_mode), -}; - -static struct i2c_board_info __initdata i2c_info_pca9547[] = -{ - { - I2C_BOARD_INFO("pca9547", 0x71), - .platform_data = &pca954x_data, - }, -}; - - -static struct sff_8436_platform_data sff_8436_port[] = { - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, - { SFF_8346_PORT() }, -}; - -static struct i2c_device_platform_data ag9032v1_i2c_device_platform_data[] = { - { - /* tmp75 (0x4d) */ - .parent = 2, - .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, - .client = NULL, - }, - { - /* id eeprom (0x53) */ - .parent = 2, - .info = { I2C_BOARD_INFO("24c02", 0x53) }, - .client = NULL, - }, - { - /* tmp75 (0x4c) */ - .parent = 7, - .info = { I2C_BOARD_INFO("tmp75", 0x4c) }, - .client = NULL, - }, - { - /* tmp75 (0x4d) */ - .parent = 7, - .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, - .client = NULL, - }, - { - /* tmp75 (0x4e) */ - .parent = 7, - .info = { I2C_BOARD_INFO("tmp75", 0x4e) }, - .client = NULL, - }, - { - /* tmp75 (0x4f) */ - .parent = 30, - .info = { I2C_BOARD_INFO("tmp75", 0x4f) }, - .client = NULL, - }, - { - /* FAN 1 Controller (0x2c) */ - .parent = 37, - .info = { I2C_BOARD_INFO("emc2305", 0x2c) }, - .client = NULL, - }, - { - /* FAN 2 Controller (0x2d) */ - .parent = 38, - .info = { I2C_BOARD_INFO("emc2305", 0x2d) }, - .client = NULL, - }, - { - /* psu 1 (0x58) */ - .parent = 40, - .info = { .type = "dni_ag9032v1_psu", .addr = 0x58, .platform_data = (void *) 0 }, - .client = NULL, - }, - { - /* psu 2 (0x58) */ - .parent = 41, - .info = { .type = "dni_ag9032v1_psu", .addr = 0x58, .platform_data = (void *) 1 }, - .client = NULL, - }, - { - /* hot-swap 1 (0x40) */ - .parent = 42, - .info = { .type = "ltc4215", .addr = 0x40, .platform_data = (void *) 0 }, - .client = NULL, - }, - { - /* hot-swap 2 (0x40) */ - .parent = 43, - .info = { .type = "ltc4215", .addr = 0x40, .platform_data = (void *) 1 }, - .client = NULL, - }, - { - /* qsfp 1 (0x50) */ - .parent = 50, - .info = { SFF8436_INFO(&sff_8436_port[0]) }, - .client = NULL, - }, - { - /* qsfp 2 (0x50) */ - .parent = 51, - .info = { SFF8436_INFO(&sff_8436_port[1]) }, - .client = NULL, - }, - { - /* qsfp 3 (0x50) */ - .parent = 52, - .info = { SFF8436_INFO(&sff_8436_port[2]) }, - .client = NULL, - }, - { - /* qsfp 4 (0x50) */ - .parent = 53, - .info = { SFF8436_INFO(&sff_8436_port[3]) }, - .client = NULL, - }, - { - /* qsfp 5 (0x50) */ - .parent = 54, - .info = { SFF8436_INFO(&sff_8436_port[4]) }, - .client = NULL, - }, - { - /* qsfp 6 (0x50) */ - .parent = 55, - .info = { SFF8436_INFO(&sff_8436_port[5]) }, - .client = NULL, - }, - { - /* qsfp 7 (0x50) */ - .parent = 56, - .info = { SFF8436_INFO(&sff_8436_port[6]) }, - .client = NULL, - }, - { - /* qsfp 8 (0x50) */ - .parent = 57, - .info = { SFF8436_INFO(&sff_8436_port[7]) }, - .client = NULL, - }, - { - /* qsfp 9 (0x50) */ - .parent = 58, - .info = { SFF8436_INFO(&sff_8436_port[8]) }, - .client = NULL, - }, - { - /* qsfp 10 (0x50) */ - .parent = 59, - .info = { SFF8436_INFO(&sff_8436_port[9]) }, - .client = NULL, - }, - { - /* qsfp 11 (0x50) */ - .parent = 60, - .info = { SFF8436_INFO(&sff_8436_port[10]) }, - .client = NULL, - }, - { - /* qsfp 12 (0x50) */ - .parent = 61, - .info = { SFF8436_INFO(&sff_8436_port[11]) }, - .client = NULL, - }, - { - /* qsfp 13 (0x50) */ - .parent = 62, - .info = { SFF8436_INFO(&sff_8436_port[12]) }, - .client = NULL, - }, - { - /* qsfp 14 (0x50) */ - .parent = 63, - .info = { SFF8436_INFO(&sff_8436_port[13]) }, - .client = NULL, - }, - { - /* qsfp 15 (0x50) */ - .parent = 64, - .info = { SFF8436_INFO(&sff_8436_port[14]) }, - .client = NULL, - }, - { - /* qsfp 16 (0x50) */ - .parent = 65, - .info = { SFF8436_INFO(&sff_8436_port[15]) }, - .client = NULL, - }, - { - /* qsfp 17 (0x50) */ - .parent = 66, - .info = { SFF8436_INFO(&sff_8436_port[16]) }, - .client = NULL, - }, - { - /* qsfp 18 (0x50) */ - .parent = 67, - .info = { SFF8436_INFO(&sff_8436_port[17]) }, - .client = NULL, - }, - { - /* qsfp 19 (0x50) */ - .parent = 68, - .info = { SFF8436_INFO(&sff_8436_port[18]) }, - .client = NULL, - }, - { - /* qsfp 20 (0x50) */ - .parent = 69, - .info = { SFF8436_INFO(&sff_8436_port[19]) }, - .client = NULL, - }, - { - /* qsfp 21 (0x50) */ - .parent = 70, - .info = { SFF8436_INFO(&sff_8436_port[20]) }, - .client = NULL, - }, - { - /* qsfp 22 (0x50) */ - .parent = 71, - .info = { SFF8436_INFO(&sff_8436_port[21]) }, - .client = NULL, - }, - { - /* qsfp 23 (0x50) */ - .parent = 72, - .info = { SFF8436_INFO(&sff_8436_port[22]) }, - .client = NULL, - }, - { - /* qsfp 24 (0x50) */ - .parent = 73, - .info = { SFF8436_INFO(&sff_8436_port[23]) }, - .client = NULL, - }, - { - /* qsfp 25 (0x50) */ - .parent = 74, - .info = { SFF8436_INFO(&sff_8436_port[24]) }, - .client = NULL, - }, - { - /* qsfp 26 (0x50) */ - .parent = 75, - .info = { SFF8436_INFO(&sff_8436_port[25]) }, - .client = NULL, - }, - { - /* qsfp 27 (0x50) */ - .parent = 76, - .info = { SFF8436_INFO(&sff_8436_port[26]) }, - .client = NULL, - }, - { - /* qsfp 28 (0x50) */ - .parent = 77, - .info = { SFF8436_INFO(&sff_8436_port[27]) }, - .client = NULL, - }, - { - /* qsfp 29 (0x50) */ - .parent = 78, - .info = { SFF8436_INFO(&sff_8436_port[28]) }, - .client = NULL, - }, - { - /* qsfp 30 (0x50) */ - .parent = 79, - .info = { SFF8436_INFO(&sff_8436_port[29]) }, - .client = NULL, - }, - { - /* qsfp 31 (0x50) */ - .parent = 80, - .info = { SFF8436_INFO(&sff_8436_port[30]) }, - .client = NULL, - }, - { - /* qsfp 32 (0x50) */ - .parent = 81, - .info = { SFF8436_INFO(&sff_8436_port[31]) }, - .client = NULL, - }, -}; - - -static struct platform_device ag9032v1_i2c_device[] = { - ag9032v1_i2c_device_num(0), - ag9032v1_i2c_device_num(1), - ag9032v1_i2c_device_num(2), - ag9032v1_i2c_device_num(3), - ag9032v1_i2c_device_num(4), - ag9032v1_i2c_device_num(5), - ag9032v1_i2c_device_num(6), - ag9032v1_i2c_device_num(7), - ag9032v1_i2c_device_num(8), - ag9032v1_i2c_device_num(9), - ag9032v1_i2c_device_num(10), - ag9032v1_i2c_device_num(11), - ag9032v1_i2c_device_num(12), - ag9032v1_i2c_device_num(13), - ag9032v1_i2c_device_num(14), - ag9032v1_i2c_device_num(15), - ag9032v1_i2c_device_num(16), - ag9032v1_i2c_device_num(17), - ag9032v1_i2c_device_num(18), - ag9032v1_i2c_device_num(19), - ag9032v1_i2c_device_num(20), - ag9032v1_i2c_device_num(21), - ag9032v1_i2c_device_num(22), - ag9032v1_i2c_device_num(23), - ag9032v1_i2c_device_num(24), - ag9032v1_i2c_device_num(25), - ag9032v1_i2c_device_num(26), - ag9032v1_i2c_device_num(27), - ag9032v1_i2c_device_num(28), - ag9032v1_i2c_device_num(29), - ag9032v1_i2c_device_num(30), - ag9032v1_i2c_device_num(31), - ag9032v1_i2c_device_num(32), - ag9032v1_i2c_device_num(33), - ag9032v1_i2c_device_num(34), - ag9032v1_i2c_device_num(35), - ag9032v1_i2c_device_num(36), - ag9032v1_i2c_device_num(37), - ag9032v1_i2c_device_num(38), - ag9032v1_i2c_device_num(39), - ag9032v1_i2c_device_num(40), - ag9032v1_i2c_device_num(41), - ag9032v1_i2c_device_num(42), - ag9032v1_i2c_device_num(43), -}; - -/*---------------- I2C device - end ------------- */ - -/*---------------- I2C driver - start ------------- */ -static int __init i2c_device_probe(struct platform_device *pdev) -{ - struct i2c_device_platform_data *pdata; - struct i2c_adapter *parent; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "Missing platform data\n"); - return -ENODEV; - } - - parent = i2c_get_adapter(pdata->parent); - if (!parent) { - dev_err(&pdev->dev, "Parent adapter (%d) not found\n", - pdata->parent); - return -ENODEV; - } - - pdata->client = i2c_new_device(parent, &pdata->info); - if (!pdata->client) { - dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", - pdata->info.type, pdata->parent); - return -ENODEV; - } - - return 0; -} - -static int __exit i2c_deivce_remove(struct platform_device *pdev) -{ - struct i2c_adapter *parent; - struct i2c_device_platform_data *pdata; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "Missing platform data\n"); - return -ENODEV; - } - - if (pdata->client) { - parent = (pdata->client)->adapter; - i2c_unregister_device(pdata->client); - i2c_put_adapter(parent); - } - - return 0; -} -static struct platform_driver i2c_device_driver = { - .probe = i2c_device_probe, - .remove = __exit_p(i2c_deivce_remove), - .driver = { - .owner = THIS_MODULE, - .name = "delta-ag9032v1-i2c-device", - } -}; - -/*---------------- I2C driver - end ------------- */ - -/*---------------- CPLD - start ------------- */ - -/* CPLD -- device */ - -enum cpld_type { - system_cpld, -}; - -struct cpld_platform_data { - int reg_addr; - struct i2c_client *client; -}; - -enum swpld_attributes { - SW_BOARD_ID, - SW_BOARD_VER, - SWPLD_VER, - SYS_RST, - B56960_RST, - MB_A_PLD_RST, - MB_B_PLD_RST, - PSU1_PWR_OK, - PSU2_PWR_OK, - HS1_PWR_OK, - HS2_PWR_OK, - B54616_RST, - B54616_INT, - B54616_MASK_INT, - PB_HS_INT, - MB_HS_INT, - PB_PWR_INT, - MB_PWR_INT, - FAN_INT, - PB_HS_MASK_INT, - MB_HS_MASK_INT, - PB_PWR1_MASK_INT, - PB_PWR2_MASK_INT, - FAN_MASK_INT, - QSFP_01TO08_INT, - QSFP_08TO16_INT, - QSFP_17TO24_INT, - QSFP_25TO32_INT, - QSFP_01TO08_ABS, - QSFP_08TO16_ABS, - QSFP_17TO24_ABS, - QSFP_25TO32_ABS, - QSFP_01TO08_MASK_INT, - QSFP_08TO16_MASK_INT, - QSFP_17TO24_MASK_INT, - QSFP_25TO32_MASK_INT, - QSFP_01TO08_MASK_ABS, - QSFP_08TO16_MASK_ABS, - QSFP_17TO24_MASK_ABS, - QSFP_25TO32_MASK_ABS, - QSFP01_MOD_INT, - QSFP02_MOD_INT, - QSFP03_MOD_INT, - QSFP04_MOD_INT, - QSFP05_MOD_INT, - QSFP06_MOD_INT, - QSFP07_MOD_INT, - QSFP08_MOD_INT, - QSFP09_MOD_INT, - QSFP10_MOD_INT, - QSFP11_MOD_INT, - QSFP12_MOD_INT, - QSFP13_MOD_INT, - QSFP14_MOD_INT, - QSFP15_MOD_INT, - QSFP16_MOD_INT, - QSFP17_MOD_INT, - QSFP18_MOD_INT, - QSFP19_MOD_INT, - QSFP20_MOD_INT, - QSFP21_MOD_INT, - QSFP22_MOD_INT, - QSFP23_MOD_INT, - QSFP24_MOD_INT, - QSFP25_MOD_INT, - QSFP26_MOD_INT, - QSFP27_MOD_INT, - QSFP28_MOD_INT, - QSFP29_MOD_INT, - QSFP30_MOD_INT, - QSFP31_MOD_INT, - QSFP32_MOD_INT, -}; - -static struct cpld_platform_data ag9032v1_cpld_platform_data[] = { - [system_cpld] = { - .reg_addr = SWPLD_REG, - }, -}; - -static struct platform_device ag9032v1_cpld = { - .name = "delta-ag9032v1-swpld", - .id = 0, - .dev = { - .platform_data = ag9032v1_cpld_platform_data, - .release = device_release, - }, -}; - -static struct swpld_attribute_data { - int reg_addr; - int reg_mask; - char reg_note[150]; -}; - -static struct swpld_attribute_data controller_interrupt_data[] = { -//BOARD - [SYS_RST] = { - .reg_addr = 0x04, - .reg_mask = 7, - .reg_note = "“1” = Normal operation\n“0” = Reset" - }, - [B56960_RST] = { - .reg_addr = 0x04, - .reg_mask = 6, - .reg_note = "“1” = Normal operation\n“0” = Reset" - }, - [MB_A_PLD_RST] = { - .reg_addr = 0x04, - .reg_mask = 4, - .reg_note = "“1” = Normal operation\n“0” = Reset" - }, - [MB_B_PLD_RST] = { - .reg_addr = 0x04, - .reg_mask = 3, - .reg_note = "“1” = Normal operation\n“0” = Reset" - }, -//PSU - [PSU1_PWR_OK] = { - .reg_addr = 0x0a, - .reg_mask = 7, - .reg_note = "‘0’ = Power rail is failed\n‘1’ = Power rail is good" - }, - [PSU2_PWR_OK] = { - .reg_addr = 0x0a, - .reg_mask = 6, - .reg_note = "‘0’ = Power rail is failed\n‘1’ = Power rail is good" - }, -//HOT SWAP - [HS1_PWR_OK] = { - .reg_addr = 0x08, - .reg_mask = 5, - .reg_note = "‘0’ = Hot swap controller disabled\n‘1’ = Hot swap controller enabled" - }, - [HS2_PWR_OK] = { - .reg_addr = 0x08, - .reg_mask = 4, - .reg_note = "‘0’ = Hot swap controller disabled\n‘1’ = Hot swap controller enabled" - }, -//BCM54616S - [B54616_RST] = { - .reg_addr = 0x04, - .reg_mask = 5, - .reg_note = "“0” = Reset\n“1” = Normal operation" - }, - [B54616_INT] = { - .reg_addr = 0x16, - .reg_mask = 7, - .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [B54616_MASK_INT] = { - .reg_addr = 0x17, - .reg_mask = 7, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, -//QSFP - [PB_HS_INT] = { - .reg_addr = 0x10, - .reg_mask = 7, - .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [MB_HS_INT] = { - .reg_addr = 0x10, - .reg_mask = 6, - .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [PB_PWR_INT] = { - .reg_addr = 0x10, - .reg_mask = 5, - .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [MB_PWR_INT] = { - .reg_addr = 0x10, - .reg_mask = 4, - .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [FAN_INT] = { - .reg_addr = 0x10, - .reg_mask = 3, - .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" - }, - [PB_HS_MASK_INT] = { - .reg_addr = 0x11, - .reg_mask = 7, - .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" - }, - [MB_HS_MASK_INT] = { - .reg_addr = 0x11, - .reg_mask = 6, - .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" - }, - [PB_PWR1_MASK_INT] = { - .reg_addr = 0x11, - .reg_mask = 5, - .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" - }, - [PB_PWR2_MASK_INT] = { - .reg_addr = 0x11, - .reg_mask = 4, - .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" - }, - [FAN_MASK_INT] = { - .reg_addr = 0x11, - .reg_mask = 3, - .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" - }, - [QSFP_01TO08_INT] = { - .reg_addr = 0x12, - .reg_mask = 7, - .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" - }, - [QSFP_08TO16_INT] = { - .reg_addr = 0x12, - .reg_mask = 6, - .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" - }, - [QSFP_17TO24_INT] = { - .reg_addr = 0x12, - .reg_mask = 5, - .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" - }, - [QSFP_25TO32_INT] = { - .reg_addr = 0x12, - .reg_mask = 4, - .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" - }, - [QSFP_01TO08_ABS] = { - .reg_addr = 0x12, - .reg_mask = 3, - .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" - }, - [QSFP_08TO16_ABS] = { - .reg_addr = 0x12, - .reg_mask = 2, - .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" - }, - [QSFP_17TO24_ABS] = { - .reg_addr = 0x12, - .reg_mask = 1, - .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" - }, - [QSFP_25TO32_ABS] = { - .reg_addr = 0x12, - .reg_mask = 0, - .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" - }, - [QSFP_01TO08_MASK_INT] = { - .reg_addr = 0x13, - .reg_mask = 7, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_08TO16_MASK_INT] = { - .reg_addr = 0x13, - .reg_mask = 6, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_17TO24_MASK_INT] = { - .reg_addr = 0x13, - .reg_mask = 5, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_25TO32_MASK_INT] = { - .reg_addr = 0x13, - .reg_mask = 4, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_01TO08_MASK_ABS] = { - .reg_addr = 0x13, - .reg_mask = 3, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_08TO16_MASK_ABS] = { - .reg_addr = 0x13, - .reg_mask = 2, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_17TO24_MASK_ABS] = { - .reg_addr = 0x13, - .reg_mask = 1, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP_25TO32_MASK_ABS] = { - .reg_addr = 0x13, - .reg_mask = 0, - .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" - }, - [QSFP01_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 7, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP02_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 6, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP03_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 5, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP04_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 4, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP05_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 3, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP06_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 2, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP07_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 1, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP08_MOD_INT] = { - .reg_addr = 0x40, - .reg_mask = 0, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP09_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 7, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP10_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 6, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP11_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 5, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP12_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 4, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP13_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 3, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP14_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 2, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP15_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 1, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP16_MOD_INT] = { - .reg_addr = 0x41, - .reg_mask = 0, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP17_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 7, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP18_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 6, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP19_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 5, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP20_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 4, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP21_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 3, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP22_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 2, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP23_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 1, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP24_MOD_INT] = { - .reg_addr = 0x42, - .reg_mask = 0, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP25_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 7, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP26_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 6, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP27_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 5, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP28_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 4, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP29_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 3, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP30_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 2, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP31_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 1, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, - [QSFP32_MOD_INT] = { - .reg_addr = 0x43, - .reg_mask = 0, - .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" - }, -}; - -static ssize_t get_present(struct device *dev, struct device_attribute \ - *dev_attr, char *buf) -{ - int ret; - u32 data = 0; - struct cpld_platform_data *pdata = dev->platform_data; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_1); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data = (u32)reverse_8bits(ret) & 0xff; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_2); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 8; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_3); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 16; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_4); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 24; - - return sprintf(buf, "0x%08x\n", data); //return 32bits data -} - -static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) -{ - int ret; - u32 data = 0; - struct cpld_platform_data *pdata = dev->platform_data; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_1); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data = (u32)(reverse_8bits(ret) & 0xff); - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_2); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 8; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_3); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 16; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_4); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 24; - - return sprintf(buf, "0x%08x\n", data); //return 32bits data -} - -static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) -{ - unsigned long data; - int err; - struct cpld_platform_data *pdata = dev->platform_data; - - err = kstrtoul(buf, 16, &data); - if (err) - return err; - - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_1, (u8)reverse_8bits(data & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_2, (u8)(reverse_8bits(data >> 8) & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_3, (u8)(reverse_8bits(data >> 16) & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_4, (u8)(reverse_8bits(data >> 24) & 0xff)); - - return count; -} - -static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) -{ - int ret; - u32 data = 0; - struct cpld_platform_data *pdata = dev->platform_data; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_1); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data = (u32)(reverse_8bits(ret) & 0xff); - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_2); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 8; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_3); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 16; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_4); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 24; - - return sprintf(buf, "0x%08x\n", data); //return 32bits data -} - -static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) -{ - unsigned long data; - int err; - struct cpld_platform_data *pdata = dev->platform_data; - - err = kstrtoul(buf, 16, &data); - if (err) - return err; - - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_1, (u8)reverse_8bits(data & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_2, (u8)reverse_8bits((data >> 8)& 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_3, (u8)reverse_8bits((data >> 16) & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_4, (u8)reverse_8bits((data >> 24) & 0xff)); - - return count; -} - -static ssize_t get_response(struct device *dev, struct device_attribute *devattr, char *buf) -{ - int ret; - u32 data = 0; - struct cpld_platform_data *pdata = dev->platform_data; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_1); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data = (u32)(reverse_8bits(ret) & 0xff); - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_2); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 8; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_3); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 16; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_4); - if (ret < 0) - return sprintf(buf, "error number(%d)",ret); - data |= (u32)(reverse_8bits(ret) & 0xff) << 24; - - return sprintf(buf, "0x%08x\n", data); //return 32bits data -} - -static ssize_t set_response(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) -{ - unsigned long data; - int err; - struct cpld_platform_data *pdata = dev->platform_data; - - err = kstrtoul(buf, 16, &data); - if (err) - return err; - - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_1, (u8)reverse_8bits(data & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_2, (u8)reverse_8bits((data >> 8)& 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_3, (u8)reverse_8bits((data >> 16) & 0xff)); - i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_4, (u8)reverse_8bits((data >> 24) & 0xff)); - - return count; -} - -struct platform_led_status{ - int reg_data; - char *led_status; - int led_id; -}; - -static struct platform_led_status led_info[] = { - { - .reg_data = 0x40, - .led_status = "pwr1_green", - .led_id = 0, - }, - { - .reg_data = 0x80, - .led_status = "pwr1_amber", - .led_id = 0, - }, - { - .reg_data = 0x00, - .led_status = "pwr1_off", - .led_id = 0, - }, - { - .reg_data = 0xc0, - .led_status = "pwr1_off", - .led_id = 0, - }, - { - .reg_data = 0x10, - .led_status = "pwr2_green", - .led_id = 1, - }, - { - .reg_data = 0x20, - .led_status = "pwr2_amber", - .led_id = 1, - }, - { - .reg_data = 0x00, - .led_status = "pwr2_off", - .led_id = 1, - }, - { - .reg_data = 0x30, - .led_status = "pwr2_off", - .led_id = 1, - }, - { - .reg_data = 0x04, - .led_status = "sys_green", - .led_id = 2, - }, - { - .reg_data = 0x08, - .led_status = "sys_blinking_green", - .led_id = 2, - }, - { - .reg_data = 0x0c, - .led_status = "sys_red", - .led_id = 2, - }, - { - .reg_data = 0x00, - .led_status = "sys_off", - .led_id = 2, - }, - { - .reg_data = 0x01, - .led_status = "fan_green", - .led_id = 3, - }, - { - .reg_data = 0x02, - .led_status = "fan_amber", - .led_id = 3, - }, - { - .reg_data = 0x00, - .led_status = "fan_off", - .led_id = 3, - }, - { - .reg_data = 0x03, - .led_status = "fan_off", - .led_id = 3, - }, - { - .reg_data = 0x40, - .led_status = "fan1_green", - .led_id = 4, - }, - { - .reg_data = 0x80, - .led_status = "fan1_red", - .led_id = 4, - }, - { - .reg_data = 0x00, - .led_status = "fan1_off", - .led_id = 4, - }, - { - .reg_data = 0x10, - .led_status = "fan2_green", - .led_id = 5, - }, - { - .reg_data = 0x20, - .led_status = "fan2_red", - .led_id = 5, - }, - { - .reg_data = 0x00, - .led_status = "fan2_off", - .led_id = 5, - }, - { - .reg_data = 0x04, - .led_status = "fan3_green", - .led_id = 6, - }, - { - .reg_data = 0x08, - .led_status = "fan3_red", - .led_id = 6, - }, - { - .reg_data = 0x00, - .led_status = "fan3_off", - .led_id = 6, - }, - { - .reg_data = 0x01, - .led_status = "fan4_green", - .led_id = 7, - }, - { - .reg_data = 0x02, - .led_status = "fan4_red", - .led_id = 7, - }, - { - .reg_data = 0x00, - .led_status = "fan4_off", - .led_id = 7, - }, - { - .reg_data = 0x40, - .led_status = "fan5_green", - .led_id = 8, - }, - { - .reg_data = 0x80, - .led_status = "fan5_red", - .led_id = 8, - }, - { - .reg_data = 0x00, - .led_status = "fan5_off", - .led_id = 8, - }, -}; - -struct platform_led_data{ - int reg_addr; - int mask; -}; - -static struct platform_led_data led_data[] = { - { - .reg_addr = SYS_LED_REG, - .mask = 0xc0, - }, - { - .reg_addr = SYS_LED_REG, - .mask = 0x30, - }, - { - .reg_addr = SYS_LED_REG, - .mask = 0x0c, - }, - { - .reg_addr = SYS_LED_REG, - .mask = 0x03, - }, - { - .reg_addr = FAN1_LED_REG, - .mask = 0xc0, - }, - { - .reg_addr = FAN1_LED_REG, - .mask = 0x30, - }, - { - .reg_addr = FAN1_LED_REG, - .mask = 0x0c, - }, - { - .reg_addr = FAN1_LED_REG, - .mask = 0x03, - }, - { - .reg_addr = FAN2_LED_REG, - .mask = 0xc0, - }, -}; - -static ssize_t get_led_color(struct device *dev, struct device_attribute *devattr, char *buf) -{ - char str[9][20] = {0}; - int board_data; - int led_data_number; - int led_info_number; - struct cpld_platform_data *pdata = dev->platform_data; - - for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ - board_data = i2c_smbus_read_byte_data(pdata[system_cpld].client, led_data[led_data_number].reg_addr); - if(board_data >= 0){ - board_data &= led_data[led_data_number].mask; - for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ - if (led_data_number == led_info[led_info_number].led_id){ - if(board_data == led_info[led_info_number].reg_data){ - sprintf(str[led_data_number], "%s", led_info[led_info_number].led_status); - } - } - } - } - else - printk( KERN_ERR "Missing LED board data\n"); - } - return sprintf(buf,"%s\n%s\n%s\n%s\n%s\n%s\n%s\n%s\n%s\n",str[0],str[1],str[2],str[3],str[4],str[5],str[6],str[7],str[8]); -} - -static ssize_t set_led_color(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) -{ - int led_info_number; - int led_data_number; - int str_compar; - int led_reg_value; - struct cpld_platform_data *pdata = dev->platform_data; - - for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ - str_compar = strncmp(buf,led_info[led_info_number].led_status,strlen(led_info[led_info_number].led_status)); - if(str_compar == 0){ - for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ - if(led_info[led_info_number].led_id == led_data_number){ - led_reg_value = i2c_smbus_read_byte_data(pdata[system_cpld].client, led_data[led_data_number].reg_addr); - if(led_reg_value >= 0){ - led_reg_value &= (~led_data[led_data_number].mask); - led_reg_value |= led_info[led_info_number].reg_data; - i2c_smbus_write_byte_data(pdata[system_cpld].client, (u8)(led_data[led_data_number].reg_addr & 0xff), (u8)(led_reg_value & 0xff)); - } - else - printk( KERN_ERR "Missing LED reg. data\n"); - } - } - } - } - return count; -} - -static unsigned char swpld_reg_addr; -static ssize_t get_swpld_reg_value(struct device *dev, struct device_attribute *devattr, char *buf) -{ - int ret; - struct cpld_platform_data *pdata = dev->platform_data; - - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, swpld_reg_addr); - return sprintf(buf, "0x%02x\n", ret); -} - -static ssize_t set_swpld_reg_value(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned long data; - int err; - struct cpld_platform_data *pdata = dev->platform_data; - err = kstrtoul(buf, 0, &data); - if (err){ - return err; - } - - if (data > 0xff){ - printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); - return count; - } - - i2c_smbus_write_byte_data(pdata[system_cpld].client, swpld_reg_addr, data); - - return count; -} - -static ssize_t get_swpld_reg_addr(struct device *dev, struct device_attribute *devattr, char *buf) -{ - - return sprintf(buf, "0x%02x\n", swpld_reg_addr); -} - -static ssize_t set_swpld_reg_addr(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned long data; - int err; - - err = kstrtoul(buf, 0, &data); - if (err){ - return err; - } - if (data > 0xff){ - printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); - return count; - } - swpld_reg_addr = data; - - return count; -} - -static DEVICE_ATTR(swpld_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg_value, set_swpld_reg_value); -static DEVICE_ATTR(swpld_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg_addr, set_swpld_reg_addr); -static DEVICE_ATTR(sfp_present, S_IRUGO, get_present, NULL ); -static DEVICE_ATTR(sfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode ); -static DEVICE_ATTR(sfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset ); -static DEVICE_ATTR(sfp_response, S_IRUGO | S_IWUSR, get_response, set_response ); -static DEVICE_ATTR(led_control, S_IRUGO | S_IWUSR, get_led_color, set_led_color); - -static struct attribute *ag9032v1_cpld_attrs[] = { - &dev_attr_swpld_reg_value.attr, - &dev_attr_swpld_reg_addr.attr, - &dev_attr_sfp_response.attr, - &dev_attr_sfp_present.attr, - &dev_attr_sfp_lpmode.attr, - &dev_attr_sfp_reset.attr, - &dev_attr_led_control.attr, - NULL, -}; - -static struct attribute_group ag9032v1_cpld_attr_grp = { - .attrs = ag9032v1_cpld_attrs, -}; - -static struct kobject *kobj_swpld; -static struct kobject *kobj_board; -static struct kobject *kobj_psu; -static struct kobject *kobj_hot_swap; -static struct kobject *kobj_controller_interrupt; -static struct kobject *kobj_BCM54616S; - -static ssize_t get_swpld_data(struct device *dev, struct device_attribute *dev_attr, char *buf) -{ - int ret; - struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); - struct device *i2cdev = kobj_to_dev(kobj_swpld); - struct cpld_platform_data *pdata = i2cdev->platform_data; - - - unsigned char reg; - int mask; - int value; - char note[150]; - - switch (attr->index) { - //attributes on BOARD - case SW_BOARD_ID: - reg = 0x00; - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); - value = ret >> 4; - sprintf(note, "\n“0x00”: L9032NB-AL-R\n“0x01”: AK9032-R\n“0x02”: AG9032-R\n“0x03”: AG9032R-R\n“0x04”: AG9032 V1-R\n"); - return sprintf(buf, "0x%02x%s", value, note); - case SW_BOARD_VER: - reg = 0x00; - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); - value = ret & 0x0F; - sprintf(note, "\n“0x00”: proto-A\n“0x01”: proto-B\n"); - return sprintf(buf, "0x%02x%s", value, note); - case SWPLD_VER: - reg = 0x01; - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); - value = ret & 0xFF; - sprintf(note, " "); - return sprintf(buf, "0x%02x%s", value, note); - //other attributes - case SYS_RST ... QSFP32_MOD_INT: - reg = controller_interrupt_data[attr->index].reg_addr; - mask = controller_interrupt_data[attr->index].reg_mask; - sprintf(note, "\n%s\n",controller_interrupt_data[attr->index].reg_note); - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); - value = (ret & (1 << mask)) >> mask; - return sprintf(buf, "%d%s", value, note); - default: - return sprintf(buf, "%d not found", attr->index); - } -} - -static ssize_t set_swpld_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) -{ - int ret; - struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); - struct device *i2cdev = kobj_to_dev(kobj_board->parent); - struct cpld_platform_data *pdata = i2cdev->platform_data; - unsigned char reg; - int mask; - int value; - char note[180]; - int data; - int val; - u8 mask_out; - - ret = kstrtoint(buf, 0, &val); - - if (ret) - { - return ret; - } - if (val > 1) - { - return -EINVAL; - } - - switch (attr->index) { - case SYS_RST ... MB_B_PLD_RST: - case HS1_PWR_OK ... HS2_PWR_OK: - case B54616_RST: - case QSFP_01TO08_MASK_INT... QSFP_25TO32_MASK_ABS: - reg = controller_interrupt_data[attr->index].reg_addr; - mask = controller_interrupt_data[attr->index].reg_mask; - break; - default: - return sprintf(buf, "%d not found", attr->index); - } - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); - mask_out = ret & ~((u8)(1 << mask)); - data = mask_out | (val << mask); - i2c_smbus_write_byte_data(pdata[system_cpld].client, reg, (u8)(data & 0xff)); - ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); - return count; -} - -static SENSOR_DEVICE_ATTR(sw_board_id, S_IRUGO, get_swpld_data, NULL, SW_BOARD_ID); -static SENSOR_DEVICE_ATTR(sw_board_ver, S_IRUGO, get_swpld_data, NULL, SW_BOARD_VER); -static SENSOR_DEVICE_ATTR(swpld_ver, S_IRUGO, get_swpld_data, NULL, SWPLD_VER); -static SENSOR_DEVICE_ATTR(sys_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, SYS_RST); -static SENSOR_DEVICE_ATTR(B56960_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, B56960_RST); -static SENSOR_DEVICE_ATTR(mb_a_pld_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, MB_A_PLD_RST); -static SENSOR_DEVICE_ATTR(mb_b_pld_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, MB_B_PLD_RST); - -static struct attribute *ag9032v1_swpld_attrs_board[] = { - &sensor_dev_attr_sw_board_id.dev_attr.attr, - &sensor_dev_attr_sw_board_ver.dev_attr.attr, - &sensor_dev_attr_swpld_ver.dev_attr.attr, - &sensor_dev_attr_sys_rst.dev_attr.attr, - &sensor_dev_attr_B56960_rst.dev_attr.attr, - &sensor_dev_attr_mb_a_pld_rst.dev_attr.attr, - &sensor_dev_attr_mb_b_pld_rst.dev_attr.attr, - NULL, -}; - -static SENSOR_DEVICE_ATTR(psu1_pwr_ok, S_IRUGO, get_swpld_data, NULL, PSU1_PWR_OK); -static SENSOR_DEVICE_ATTR(psu2_pwr_ok, S_IRUGO, get_swpld_data, NULL, PSU2_PWR_OK); - -static struct attribute *ag9032v1_swpld_attrs_psu[] = { - &sensor_dev_attr_psu1_pwr_ok.dev_attr.attr, - &sensor_dev_attr_psu2_pwr_ok.dev_attr.attr, - NULL, -}; - -static SENSOR_DEVICE_ATTR(hs1_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, HS1_PWR_OK); -static SENSOR_DEVICE_ATTR(hs2_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, HS2_PWR_OK); - -static struct attribute *ag9032v1_swpld_attrs_hot_swap[] = { - &sensor_dev_attr_hs1_pwr_ok.dev_attr.attr, - &sensor_dev_attr_hs2_pwr_ok.dev_attr.attr, - NULL, -}; - -static SENSOR_DEVICE_ATTR(B54616_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, B54616_RST ); -static SENSOR_DEVICE_ATTR(B54616_int, S_IRUGO, get_swpld_data, NULL, B54616_INT ); -static SENSOR_DEVICE_ATTR(B54616_mask_int, S_IRUGO, get_swpld_data, NULL, B54616_MASK_INT); - -static struct attribute *ag9032v1_swpld_attrs_BCM54616S[] = { - &sensor_dev_attr_B54616_rst.dev_attr.attr, - &sensor_dev_attr_B54616_int.dev_attr.attr, - &sensor_dev_attr_B54616_mask_int.dev_attr.attr, - NULL, -}; - -static SENSOR_DEVICE_ATTR(pb_hs_int, S_IRUGO, get_swpld_data, NULL, PB_HS_INT); -static SENSOR_DEVICE_ATTR(mb_hs_int, S_IRUGO, get_swpld_data, NULL, MB_HS_INT); -static SENSOR_DEVICE_ATTR(pb_pwr_int, S_IRUGO, get_swpld_data, NULL, PB_PWR_INT); -static SENSOR_DEVICE_ATTR(mb_pwr_int, S_IRUGO, get_swpld_data, NULL, MB_PWR_INT); -static SENSOR_DEVICE_ATTR(fan_int, S_IRUGO, get_swpld_data, NULL, FAN_INT); -static SENSOR_DEVICE_ATTR(pb_hs_mask_int, S_IRUGO, get_swpld_data, NULL, PB_HS_MASK_INT); -static SENSOR_DEVICE_ATTR(mb_hs_mask_int, S_IRUGO, get_swpld_data, NULL, MB_HS_MASK_INT); -static SENSOR_DEVICE_ATTR(pb_pwr1_mask_int, S_IRUGO, get_swpld_data, NULL, PB_PWR1_MASK_INT); -static SENSOR_DEVICE_ATTR(pb_pwr2_mask_int, S_IRUGO, get_swpld_data, NULL, PB_PWR2_MASK_INT); -static SENSOR_DEVICE_ATTR(fan_mask_int, S_IRUGO, get_swpld_data, NULL, FAN_MASK_INT); -static SENSOR_DEVICE_ATTR(qsfp_01to08_int, S_IRUGO, get_swpld_data, NULL, QSFP_01TO08_INT); -static SENSOR_DEVICE_ATTR(qsfp_08to16_int, S_IRUGO, get_swpld_data, NULL, QSFP_08TO16_INT); -static SENSOR_DEVICE_ATTR(qsfp_17to24_int, S_IRUGO, get_swpld_data, NULL, QSFP_17TO24_INT); -static SENSOR_DEVICE_ATTR(qsfp_25to32_int, S_IRUGO, get_swpld_data, NULL, QSFP_25TO32_INT); -static SENSOR_DEVICE_ATTR(qsfp_01to08_abs, S_IRUGO, get_swpld_data, NULL, QSFP_01TO08_ABS); -static SENSOR_DEVICE_ATTR(qsfp_08to16_abs, S_IRUGO, get_swpld_data, NULL, QSFP_08TO16_ABS); -static SENSOR_DEVICE_ATTR(qsfp_17to24_abs, S_IRUGO, get_swpld_data, NULL, QSFP_17TO24_ABS); -static SENSOR_DEVICE_ATTR(qsfp_25to32_abs, S_IRUGO, get_swpld_data, NULL, QSFP_25TO32_ABS); -static SENSOR_DEVICE_ATTR(qsfp_01to08_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_01TO08_MASK_INT); -static SENSOR_DEVICE_ATTR(qsfp_08to16_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_08TO16_MASK_INT); -static SENSOR_DEVICE_ATTR(qsfp_17to24_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_17TO24_MASK_INT); -static SENSOR_DEVICE_ATTR(qsfp_25to32_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_25TO32_MASK_INT); -static SENSOR_DEVICE_ATTR(qsfp_01to08_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_01TO08_MASK_ABS); -static SENSOR_DEVICE_ATTR(qsfp_08to16_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_08TO16_MASK_ABS); -static SENSOR_DEVICE_ATTR(qsfp_17to24_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_17TO24_MASK_ABS); -static SENSOR_DEVICE_ATTR(qsfp_25to32_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_25TO32_MASK_ABS); -static SENSOR_DEVICE_ATTR(qsfp01_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP01_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp02_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP02_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp03_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP03_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp04_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP04_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp05_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP05_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp06_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP06_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp07_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP07_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp08_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP08_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp09_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP09_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp10_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP10_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp11_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP11_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp12_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP12_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp13_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP13_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp14_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP14_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp15_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP15_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp16_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP16_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp17_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP17_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp18_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP18_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp19_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP19_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp20_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP20_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp21_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP21_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp22_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP22_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp23_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP23_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp24_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP24_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp25_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP25_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp26_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP26_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp27_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP27_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp28_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP28_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp29_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP29_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp30_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP30_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp31_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP31_MOD_INT); -static SENSOR_DEVICE_ATTR(qsfp32_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP32_MOD_INT); - -static struct attribute *ag9032v1_swpld_attrs_controller_interrupt[] = { - &sensor_dev_attr_pb_hs_int.dev_attr.attr, - &sensor_dev_attr_mb_hs_int.dev_attr.attr, - &sensor_dev_attr_pb_pwr_int.dev_attr.attr, - &sensor_dev_attr_mb_pwr_int.dev_attr.attr, - &sensor_dev_attr_fan_int.dev_attr.attr, - &sensor_dev_attr_pb_hs_mask_int.dev_attr.attr, - &sensor_dev_attr_mb_hs_mask_int.dev_attr.attr, - &sensor_dev_attr_pb_pwr1_mask_int.dev_attr.attr, - &sensor_dev_attr_pb_pwr2_mask_int.dev_attr.attr, - &sensor_dev_attr_fan_mask_int.dev_attr.attr, - &sensor_dev_attr_qsfp_01to08_int.dev_attr.attr, - &sensor_dev_attr_qsfp_08to16_int.dev_attr.attr, - &sensor_dev_attr_qsfp_17to24_int.dev_attr.attr, - &sensor_dev_attr_qsfp_25to32_int.dev_attr.attr, - &sensor_dev_attr_qsfp_01to08_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_08to16_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_17to24_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_25to32_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_01to08_mask_int.dev_attr.attr, - &sensor_dev_attr_qsfp_08to16_mask_int.dev_attr.attr, - &sensor_dev_attr_qsfp_17to24_mask_int.dev_attr.attr, - &sensor_dev_attr_qsfp_25to32_mask_int.dev_attr.attr, - &sensor_dev_attr_qsfp_01to08_mask_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_08to16_mask_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_17to24_mask_abs.dev_attr.attr, - &sensor_dev_attr_qsfp_25to32_mask_abs.dev_attr.attr, - &sensor_dev_attr_qsfp01_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp02_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp03_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp04_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp05_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp06_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp07_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp08_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp09_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp10_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp11_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp12_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp13_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp14_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp15_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp16_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp17_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp18_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp19_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp20_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp21_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp22_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp23_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp24_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp25_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp26_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp27_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp28_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp29_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp30_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp31_mod_int.dev_attr.attr, - &sensor_dev_attr_qsfp32_mod_int.dev_attr.attr, - NULL, -}; - -static struct attribute_group ag9032v1_swpld_attr_grp_board = { - .attrs = ag9032v1_swpld_attrs_board, -}; -static struct attribute_group ag9032v1_swpld_attr_grp_psu = { - .attrs = ag9032v1_swpld_attrs_psu, -}; -static struct attribute_group ag9032v1_swpld_attr_grp_hot_swap = { - .attrs = ag9032v1_swpld_attrs_hot_swap, -}; -static struct attribute_group ag9032v1_swpld_attr_grp_BCM54616S = { - .attrs = ag9032v1_swpld_attrs_BCM54616S, -}; -static struct attribute_group ag9032v1_swpld_attr_grp_controller_interrupt = { - .attrs = ag9032v1_swpld_attrs_controller_interrupt, -}; - -/* CPLD -- driver */ -static int __init cpld_probe(struct platform_device *pdev) -{ - struct cpld_platform_data *pdata; - struct i2c_adapter *parent; - int ret; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "CPLD platform data not found\n"); - return -ENODEV; - } - - parent = i2c_get_adapter(BUS6); - if (!parent) { - printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS6); - return -ENODEV; - } - - pdata[system_cpld].client = i2c_new_dummy(parent, pdata[system_cpld].reg_addr); - if (!pdata[system_cpld].client) { - printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[system_cpld].reg_addr); - goto error; - } - - kobj_swpld = &pdev->dev.kobj; - kobj_board = kobject_create_and_add("Board", &pdev->dev.kobj); - if (!kobj_board){ - printk(KERN_WARNING "Fail to create directory"); - goto error; - } - - kobj_psu = kobject_create_and_add("PSU", &pdev->dev.kobj); - if (!kobj_psu){ - printk(KERN_WARNING "Fail to create directory"); - goto error; - } - - kobj_hot_swap = kobject_create_and_add("HOT_SWAP", &pdev->dev.kobj); - if (!kobj_hot_swap){ - printk(KERN_WARNING "Fail to create directory"); - goto error; - } - - kobj_controller_interrupt = kobject_create_and_add("Controller_interrupt", &pdev->dev.kobj); - if (!kobj_controller_interrupt){ - printk(KERN_WARNING "Fail to create directory"); - goto error; - } - - kobj_BCM54616S = kobject_create_and_add("BCM54616S", &pdev->dev.kobj); - if (!kobj_BCM54616S){ - printk(KERN_WARNING "Fail to create directory"); - goto error; - } - - ret = sysfs_create_group(kobj_board, &ag9032v1_swpld_attr_grp_board); - if (ret) { - printk(KERN_WARNING "Fail to create cpld attribute group"); - goto error; - } - - ret = sysfs_create_group(kobj_psu, &ag9032v1_swpld_attr_grp_psu); - if (ret) { - printk(KERN_WARNING "Fail to create cpld attribute group"); - goto error; - } - - ret = sysfs_create_group(kobj_hot_swap, &ag9032v1_swpld_attr_grp_hot_swap); - if (ret) { - printk(KERN_WARNING "Fail to create cpld attribute group"); - goto error; - } - - ret = sysfs_create_group(kobj_BCM54616S, &ag9032v1_swpld_attr_grp_BCM54616S); - if (ret) { - printk(KERN_WARNING "Fail to create cpld attribute group"); - goto error; - } - - ret = sysfs_create_group(kobj_controller_interrupt, &ag9032v1_swpld_attr_grp_controller_interrupt); - if (ret) { - printk(KERN_WARNING "Fail to create cpld attribute group"); - goto error; - } - - ret = sysfs_create_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_grp); - if (ret) { - printk(KERN_WARNING "Fail to create cpld attribute group"); - goto error; - } - - return 0; - -error: - kobject_put(kobj_swpld); - kobject_put(kobj_board); - kobject_put(kobj_psu); - kobject_put(kobj_hot_swap); - kobject_put(kobj_controller_interrupt); - kobject_put(kobj_BCM54616S); - i2c_unregister_device(pdata[system_cpld].client); - i2c_put_adapter(parent); - - return -ENODEV; -} - -static int __exit cpld_remove(struct platform_device *pdev) -{ - struct i2c_adapter *parent = NULL; - struct cpld_platform_data *pdata = pdev->dev.platform_data; - sysfs_remove_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_grp); - sysfs_remove_group(kobj_board, &ag9032v1_swpld_attr_grp_board); - - if (!pdata) { - dev_err(&pdev->dev, "Missing platform data\n"); - } - else { - kobject_put(kobj_swpld); - kobject_put(kobj_board); - kobject_put(kobj_psu); - kobject_put(kobj_hot_swap); - kobject_put(kobj_controller_interrupt); - kobject_put(kobj_BCM54616S); - if (pdata[system_cpld].client) { - if (!parent) { - parent = (pdata[system_cpld].client)->adapter; - } - i2c_unregister_device(pdata[system_cpld].client); - } - } - i2c_put_adapter(parent); - - return 0; -} - -static struct platform_driver cpld_driver = { - .probe = cpld_probe, - .remove = __exit_p(cpld_remove), - .driver = { - .owner = THIS_MODULE, - .name = "delta-ag9032v1-swpld", - }, -}; - -/*---------------- CPLD - end ------------- */ - -/*---------------- MUX - start ------------- */ - -struct swpld_mux_platform_data { - int parent; - int base_nr; - int reg_addr; - struct i2c_client *cpld; -}; - -struct swpld_mux { - struct i2c_adapter *parent; - struct i2c_adapter **child; - struct swpld_mux_platform_data data; -}; -static struct swpld_mux_platform_data ag9032v1_swpld_mux_platform_data[] = { - { - .parent = BUS3, - .base_nr = BUS3_BASE_NUM, - .cpld = NULL, - .reg_addr = BUS3_MUX_REG ,// the i2c register address which for select mux TEMP(FAN) - }, - { - .parent = BUS4, - .base_nr = BUS4_BASE_NUM , - .cpld = NULL, - .reg_addr = BUS4_MUX_REG , - }, - { - .parent = BUS5, - .base_nr = BUS5_BASE_NUM , - .cpld = NULL, - .reg_addr = BUS5_MUX_REG , - }, -}; - -static struct platform_device ag9032v1_swpld_mux[] = { - { - .name = "delta-ag9032v1-swpld-mux", - .id = 0, - .dev = { - .platform_data = &ag9032v1_swpld_mux_platform_data[0], - .release = device_release, - }, - }, - { - .name = "delta-ag9032v1-swpld-mux", - .id = 1, - .dev = { - .platform_data = &ag9032v1_swpld_mux_platform_data[1], - .release = device_release, - }, - }, - { - .name = "delta-ag9032v1-swpld-mux", - .id = 2, - .dev = { - .platform_data = &ag9032v1_swpld_mux_platform_data[2], - .release = device_release, - }, - }, -}; - -static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) -{ - union i2c_smbus_data data; - - data.byte = val; - return client->adapter->algo->smbus_xfer(client->adapter, client->addr, - client->flags, - I2C_SMBUS_WRITE, - regaddr, I2C_SMBUS_BYTE_DATA, &data); -} - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) -static int swpld_mux_select(struct i2c_adapter *adap, void *data, u8 chan) -{ - struct swpld_mux *mux = data; - u8 swpld_mux_val=0; - - if ( mux->data.base_nr == BUS3_BASE_NUM ) - { - switch (chan) { - case 0: - swpld_mux_val = TEMP_FAN_VAL; - break; - case 1: - swpld_mux_val = FAN_EEPROM1_VAL; - break; - case 2: - swpld_mux_val = FAN_EEPROM2_VAL; - break; - case 3: - swpld_mux_val = FAN_EEPROM3_VAL; - break; - case 4: - swpld_mux_val = FAN_EEPROM4_VAL; - break; - case 5: - swpld_mux_val = FAN_EEPROM5_VAL; - break; - case 6: - swpld_mux_val = FANIO_CTL_VAL; - break; - case 7: - case 8: - swpld_mux_val = FAN_CTRL_VAL; - break; - } - } - else if ( mux->data.base_nr == BUS4_BASE_NUM ) - { - switch (chan) { - case 0: - swpld_mux_val = PSU1_VAL; - break; - case 1: - swpld_mux_val = PSU2_VAL; - break; - case 2: - swpld_mux_val = HOT_SWAP1_VAL; - break; - case 3: - swpld_mux_val = HOT_SWAP2_VAL; - break; - } - } - else if ( mux->data.base_nr == BUS5_BASE_NUM ){ - if (chan < 9){ - swpld_mux_val = (u8)(chan) + 0x01; - } - else if (8 < chan && chan < 19){ - swpld_mux_val = (u8)(chan - 9) + 0x10; - } - else if (18 < chan && chan < 29){ - swpld_mux_val = (u8)(chan - 19) + 0x20; - } - else if (28 < chan && chan < 39){ - swpld_mux_val = (u8)(chan - 29) + 0x30; - } - else{ - swpld_mux_val = 0x00; - } - } - else - { - swpld_mux_val = 0x00; - } - return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); -} -#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) -static int swpld_mux_select(struct i2c_mux_core *muxc, u32 chan) -{ - struct swpld_mux *mux = i2c_mux_priv(muxc); - u8 swpld_mux_val=0; - - if ( mux->data.base_nr == BUS3_BASE_NUM ) - { - switch (chan) { - case 0: - swpld_mux_val = TEMP_FAN_VAL; - break; - case 1: - swpld_mux_val = FAN_EEPROM1_VAL; - break; - case 2: - swpld_mux_val = FAN_EEPROM2_VAL; - break; - case 3: - swpld_mux_val = FAN_EEPROM3_VAL; - break; - case 4: - swpld_mux_val = FAN_EEPROM4_VAL; - break; - case 5: - swpld_mux_val = FAN_EEPROM5_VAL; - break; - case 6: - swpld_mux_val = FANIO_CTL_VAL; - break; - case 7: - case 8: - swpld_mux_val = FAN_CTRL_VAL; - break; - } - } - else if ( mux->data.base_nr == BUS4_BASE_NUM ) - { - switch (chan) { - case 0: - swpld_mux_val = PSU1_VAL; - break; - case 1: - swpld_mux_val = PSU2_VAL; - break; - case 2: - swpld_mux_val = HOT_SWAP1_VAL; - break; - case 3: - swpld_mux_val = HOT_SWAP2_VAL; - break; - } - } - else if ( mux->data.base_nr == BUS5_BASE_NUM ){ - if (chan < 9){ - swpld_mux_val = (u8)(chan) + 0x01; - } - else if (8 < chan && chan < 19){ - swpld_mux_val = (u8)(chan - 9) + 0x10; - } - else if (18 < chan && chan < 29){ - swpld_mux_val = (u8)(chan - 19) + 0x20; - } - else if (28 < chan && chan < 39){ - swpld_mux_val = (u8)(chan - 29) + 0x30; - } - else{ - swpld_mux_val = 0x00; - } - } - else - { - swpld_mux_val = 0x00; - } - - return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); -} -#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) -static int __init swpld_mux_probe(struct platform_device *pdev) -{ - struct swpld_mux *mux; - struct swpld_mux_platform_data *pdata; - struct i2c_adapter *parent; - int i, ret, dev_num; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "SWPLD platform data not found\n"); - return -ENODEV; - } - - parent = i2c_get_adapter(pdata->parent); - if (!parent) { - dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); - return -ENODEV; - } - /* Judge bus number to decide how many devices*/ - switch (pdata->parent) { - case BUS3: - dev_num = BUS3_DEV_NUM; - break; - case BUS4: - dev_num = BUS4_DEV_NUM; - break; - case BUS5: - dev_num = BUS5_DEV_NUM; - break; - default : - dev_num = DEFAULT_NUM; - break; - } - - mux = kzalloc(sizeof(*mux), GFP_KERNEL); - if (!mux) { - ret = -ENOMEM; - printk(KERN_ERR "Failed to allocate memory for mux\n"); - goto alloc_failed; - } - - mux->parent = parent; - mux->data = *pdata; - mux->child = kzalloc(sizeof(struct i2c_adapter *) * dev_num, GFP_KERNEL); - if (!mux->child) { - ret = -ENOMEM; - printk(KERN_ERR "Failed to allocate memory for device on mux\n"); - goto alloc_failed2; - } - - for (i = 0; i < dev_num; i++) { - int nr = pdata->base_nr + i; - unsigned int class = 0; - - mux->child[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, - nr, i, class, - swpld_mux_select, NULL); - if (!mux->child[i]) { - ret = -ENODEV; - dev_err(&pdev->dev, "Failed to add adapter %d\n", i); - goto add_adapter_failed; - } - } - - platform_set_drvdata(pdev, mux); - return 0; - -add_adapter_failed: - for (; i > 0; i--) - i2c_del_mux_adapter(mux->child[i - 1]); - kfree(mux->child); -alloc_failed2: - kfree(mux); -alloc_failed: - i2c_put_adapter(parent); - - return ret; -} -#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) -static int __init swpld_mux_probe(struct platform_device *pdev) -{ - struct i2c_mux_core *muxc; - struct swpld_mux *mux; - struct swpld_mux_platform_data *pdata; - struct i2c_adapter *parent; - int i, ret, dev_num; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "SWPLD platform data not found\n"); - return -ENODEV; - } - - mux = kzalloc(sizeof(*mux), GFP_KERNEL); - if (!mux) { - printk(KERN_ERR "Failed to allocate memory for mux\n"); - return -ENOMEM; - } - mux->data = *pdata; - - parent = i2c_get_adapter(pdata->parent); - if (!parent) { - kfree(mux); - dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); - return -ENODEV; - } - - /* Judge bus number to decide how many devices*/ - switch (pdata->parent) { - case BUS3: - dev_num = BUS3_DEV_NUM; - break; - case BUS4: - dev_num = BUS4_DEV_NUM; - break; - case BUS5: - dev_num = BUS5_DEV_NUM; - break; - default : - dev_num = DEFAULT_NUM; - break; - } - - - - muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0, - swpld_mux_select, NULL); - if (!muxc) { - ret = -ENOMEM; - goto alloc_failed; - } - muxc->priv = mux; - platform_set_drvdata(pdev, muxc); - - - for (i = 0; i < dev_num; i++) { - int nr = pdata->base_nr + i; - unsigned int class = 0; - - ret = i2c_mux_add_adapter(muxc, nr, i, class); - if (ret) { - dev_err(&pdev->dev, "Failed to add adapter %d\n", i); - goto add_adapter_failed; - } - } - - dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); - - return 0; - -add_adapter_failed: - i2c_mux_del_adapters(muxc); -alloc_failed: - kfree(mux); - i2c_put_adapter(parent); - - return ret; -} -#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) -static int __exit swpld_mux_remove(struct platform_device *pdev) -{ - int i; - struct swpld_mux *mux = platform_get_drvdata(pdev); - struct swpld_mux_platform_data *pdata; - struct i2c_adapter *parent; - int dev_num; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "SWPLD platform data not found\n"); - return -ENODEV; - } - - parent = i2c_get_adapter(pdata->parent); - if (!parent) { - dev_err(&pdev->dev, "Parent adapter (%d) not found\n", - pdata->parent); - return -ENODEV; - } - switch (pdata->parent) { - case BUS3: - dev_num = BUS3_DEV_NUM; - break; - case BUS4: - dev_num = BUS4_DEV_NUM; - break; - case BUS5: - dev_num = BUS5_DEV_NUM; - break; - default : - dev_num = DEFAULT_NUM; - break; - } - - for (i = 0; i < dev_num; i++) - i2c_del_mux_adapter(mux->child[i]); - - platform_set_drvdata(pdev, NULL); - i2c_put_adapter(mux->parent); - kfree(mux->child); - kfree(mux); - - return 0; -} -#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) -static int __exit swpld_mux_remove(struct platform_device *pdev) -{ - struct i2c_mux_core *muxc = platform_get_drvdata(pdev); - struct i2c_adapter *parent=muxc->parent; - - i2c_mux_del_adapters(muxc); - i2c_put_adapter(parent); - - return 0; -} -#endif - -static struct platform_driver swpld_mux_driver = { - .probe = swpld_mux_probe, - .remove = __exit_p(swpld_mux_remove), /* TODO */ - .driver = { - .owner = THIS_MODULE, - .name = "delta-ag9032v1-swpld-mux", - }, -}; -/*---------------- MUX - end ------------- */ - -/*---------------- module initialization ------------- */ -static int __init delta_ag9032v1_platform_init(void) -{ -// struct i2c_client *client; - struct i2c_adapter *adapter; - struct cpld_platform_data *cpld_pdata; - struct swpld_mux_platform_data *swpld_mux_pdata; - int ret,i = 0; - printk("ag9032v1_platform module initialization\n"); - - //Use pca9547 in i2c_mux_pca954x.c - adapter = i2c_get_adapter(BUS1); - //client = i2c_new_device(adapter, &i2c_info_pca9547[0]); - i2c_client_9547 = i2c_new_device(adapter, &i2c_info_pca9547[0]); - - i2c_put_adapter(adapter); - - // set the CPLD prob and remove - ret = platform_driver_register(&cpld_driver); - if (ret) { - printk(KERN_WARNING "Fail to register cpld driver\n"); - goto error_cpld_driver; - } - // register the mux prob which call the CPLD - ret = platform_driver_register(&swpld_mux_driver); - if (ret) { - printk(KERN_WARNING "Fail to register swpld mux driver\n"); - goto error_swpld_mux_driver; - } - - // register the i2c devices - ret = platform_driver_register(&i2c_device_driver); - if (ret) { - printk(KERN_WARNING "Fail to register i2c device driver\n"); - goto error_i2c_device_driver; - } - - // register the CPLD - ret = platform_device_register(&ag9032v1_cpld); - if (ret) { - printk(KERN_WARNING "Fail to create cpld device\n"); - goto error_ag9032v1_cpld; - } - // link the CPLD and the Mux - cpld_pdata = ag9032v1_cpld.dev.platform_data; - - for (i = 0; i < ARRAY_SIZE(ag9032v1_swpld_mux); i++) - { - swpld_mux_pdata = ag9032v1_swpld_mux[i].dev.platform_data; - swpld_mux_pdata->cpld = cpld_pdata[system_cpld].client; - ret = platform_device_register(&ag9032v1_swpld_mux[i]); - if (ret) { - printk(KERN_WARNING "Fail to create swpld mux %d\n", i); - goto error_ag9032v1_swpld_mux; - } - } - - for (i = 0; i < ARRAY_SIZE(ag9032v1_i2c_device); i++) - { - ret = platform_device_register(&ag9032v1_i2c_device[i]); - if (ret) { - printk(KERN_WARNING "Fail to create i2c device %d\n", i); - goto error_ag9032v1_i2c_device; - } - } - - if (ret) - goto error_ag9032v1_swpld_mux; - - return 0; - -error_ag9032v1_i2c_device: - i--; - for (; i >= 0; i--) { - platform_device_unregister(&ag9032v1_i2c_device[i]); - } - i = ARRAY_SIZE(ag9032v1_swpld_mux); -error_ag9032v1_swpld_mux: - i--; - for (; i >= 0; i--) { - platform_device_unregister(&ag9032v1_swpld_mux[i]); - } - platform_driver_unregister((struct platform_driver *) &ag9032v1_cpld); -error_ag9032v1_cpld: - platform_driver_unregister(&i2c_device_driver); -error_i2c_device_driver: - platform_driver_unregister(&swpld_mux_driver); -error_swpld_mux_driver: - platform_driver_unregister(&cpld_driver); -error_cpld_driver: - return ret; -} - -static void __exit delta_ag9032v1_platform_exit(void) -{ - int i = 0; - - for ( i = 0; i < ARRAY_SIZE(ag9032v1_i2c_device); i++ ) { - platform_device_unregister(&ag9032v1_i2c_device[i]); - } - - for (i = 0; i < ARRAY_SIZE(ag9032v1_swpld_mux); i++) { - platform_device_unregister(&ag9032v1_swpld_mux[i]); - } - - platform_device_unregister(&ag9032v1_cpld); - platform_driver_unregister(&i2c_device_driver); - platform_driver_unregister(&cpld_driver); - platform_driver_unregister(&swpld_mux_driver); - - i2c_unregister_device(i2c_client_9547); -} - -module_init(delta_ag9032v1_platform_init); -module_exit(delta_ag9032v1_platform_exit); - -MODULE_DESCRIPTION("DNI ag9032v1 Platform Support"); -MODULE_AUTHOR("Neal Tai "); -MODULE_LICENSE("GPL"); +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BUS3_DEV_NUM 9 +#define BUS4_DEV_NUM 6 +#define BUS5_DEV_NUM 32 +#define DEFAULT_NUM 1 +#define BUS3_BASE_NUM 30 +#define BUS4_BASE_NUM 40 +#define BUS5_BASE_NUM 50 + +#define BUS3_MUX_REG 0x21 +#define BUS4_MUX_REG 0x21 +#define BUS5_MUX_REG 0x20 + +#define TEMP_FAN_VAL 0x06 +#define FANIO_CTL_VAL 0x07 +#define FAN_CTRL_VAL 0x05 +#define PSU1_VAL 0x00 +#define PSU2_VAL 0x20 +#define HOT_SWAP1_VAL 0x10 +#define HOT_SWAP2_VAL 0x30 +#define FAN_EEPROM1_VAL 0x00 +#define FAN_EEPROM2_VAL 0x01 +#define FAN_EEPROM3_VAL 0x02 +#define FAN_EEPROM4_VAL 0x03 +#define FAN_EEPROM5_VAL 0x04 + +#define SWPLD_REG 0x31 +#define SWPLD_SFP_MUX_REG 0x20 + +#define SYS_LED_REG 0x1C +#define FAN1_LED_REG 0x1D +#define FAN2_LED_REG 0x1E + +#define SFP_PRESENCE_1 0x38 +#define SFP_PRESENCE_2 0x39 +#define SFP_PRESENCE_3 0x3A +#define SFP_PRESENCE_4 0x3B + +#define SFP_LP_MODE_1 0x34 +#define SFP_LP_MODE_2 0x35 +#define SFP_LP_MODE_3 0x36 +#define SFP_LP_MODE_4 0x37 + +#define SFP_RESET_1 0x3C +#define SFP_RESET_2 0x3D +#define SFP_RESET_3 0x3E +#define SFP_RESET_4 0x3F + +#define SFP_RESPONSE_1 0x30 +#define SFP_RESPONSE_2 0x31 +#define SFP_RESPONSE_3 0x32 +#define SFP_RESPONSE_4 0x33 + +#define SFF8436_INFO(data) \ + .type = "sff8436", .addr = 0x50, .platform_data = (data) + +#define SFF_8346_PORT(eedata) \ + .byte_len = 256, .page_size = 1, .flags = SFF_8436_FLAG_READONLY + +#define ag9032v1_i2c_device_num(NUM){ \ + .name = "delta-ag9032v1-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &ag9032v1_i2c_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +/*Define struct to get client of i2c_new_deivce */ +struct i2c_client * i2c_client_9547; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, +}; + +unsigned char reverse_8bits(unsigned char c) +{ + unsigned char s = 0; + int i; + for (i = 0; i < 8; ++i) { + s <<= 1; + s |= c & 1; + c >>= 1; + } + return s; +} +/*---------------- I2C device - start ------------- */ +static void device_release(struct device *dev) +{ + return; +} + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; +/* pca9547 - add 8 bus */ +static struct pca954x_platform_mode pca954x_mode[] = { + { .adap_id = 2, + .deselect_on_exit = 1, + }, + { .adap_id = 3, + .deselect_on_exit = 1, + }, + { .adap_id = 4, + .deselect_on_exit = 1, + }, + { .adap_id = 5, + .deselect_on_exit = 1, + }, + { .adap_id = 6, + .deselect_on_exit = 1, + }, + { .adap_id = 7, + .deselect_on_exit = 1, + }, + { .adap_id = 8, + .deselect_on_exit = 1, + }, + { .adap_id = 9, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data = { + .modes = pca954x_mode, + .num_modes = ARRAY_SIZE(pca954x_mode), +}; + +static struct i2c_board_info __initdata i2c_info_pca9547[] = +{ + { + I2C_BOARD_INFO("pca9547", 0x71), + .platform_data = &pca954x_data, + }, +}; + + +static struct sff_8436_platform_data sff_8436_port[] = { + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, +}; + +static struct i2c_device_platform_data ag9032v1_i2c_device_platform_data[] = { + { + /* tmp75 (0x4d) */ + .parent = 2, + .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, + .client = NULL, + }, + { + /* id eeprom (0x53) */ + .parent = 2, + .info = { I2C_BOARD_INFO("24c02", 0x53) }, + .client = NULL, + }, + { + /* tmp75 (0x4c) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x4c) }, + .client = NULL, + }, + { + /* tmp75 (0x4d) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, + .client = NULL, + }, + { + /* tmp75 (0x4e) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x4e) }, + .client = NULL, + }, + { + /* tmp75 (0x4f) */ + .parent = 30, + .info = { I2C_BOARD_INFO("tmp75", 0x4f) }, + .client = NULL, + }, + { + /* FAN 1 Controller (0x2c) */ + .parent = 37, + .info = { I2C_BOARD_INFO("emc2305", 0x2c) }, + .client = NULL, + }, + { + /* FAN 2 Controller (0x2d) */ + .parent = 38, + .info = { I2C_BOARD_INFO("emc2305", 0x2d) }, + .client = NULL, + }, + { + /* psu 1 (0x58) */ + .parent = 40, + .info = { .type = "dni_ag9032v1_psu", .addr = 0x58, .platform_data = (void *) 0 }, + .client = NULL, + }, + { + /* psu 2 (0x58) */ + .parent = 41, + .info = { .type = "dni_ag9032v1_psu", .addr = 0x58, .platform_data = (void *) 1 }, + .client = NULL, + }, + { + /* hot-swap 1 (0x40) */ + .parent = 42, + .info = { .type = "ltc4215", .addr = 0x40, .platform_data = (void *) 0 }, + .client = NULL, + }, + { + /* hot-swap 2 (0x40) */ + .parent = 43, + .info = { .type = "ltc4215", .addr = 0x40, .platform_data = (void *) 1 }, + .client = NULL, + }, + { + /* qsfp 1 (0x50) */ + .parent = 50, + .info = { SFF8436_INFO(&sff_8436_port[0]) }, + .client = NULL, + }, + { + /* qsfp 2 (0x50) */ + .parent = 51, + .info = { SFF8436_INFO(&sff_8436_port[1]) }, + .client = NULL, + }, + { + /* qsfp 3 (0x50) */ + .parent = 52, + .info = { SFF8436_INFO(&sff_8436_port[2]) }, + .client = NULL, + }, + { + /* qsfp 4 (0x50) */ + .parent = 53, + .info = { SFF8436_INFO(&sff_8436_port[3]) }, + .client = NULL, + }, + { + /* qsfp 5 (0x50) */ + .parent = 54, + .info = { SFF8436_INFO(&sff_8436_port[4]) }, + .client = NULL, + }, + { + /* qsfp 6 (0x50) */ + .parent = 55, + .info = { SFF8436_INFO(&sff_8436_port[5]) }, + .client = NULL, + }, + { + /* qsfp 7 (0x50) */ + .parent = 56, + .info = { SFF8436_INFO(&sff_8436_port[6]) }, + .client = NULL, + }, + { + /* qsfp 8 (0x50) */ + .parent = 57, + .info = { SFF8436_INFO(&sff_8436_port[7]) }, + .client = NULL, + }, + { + /* qsfp 9 (0x50) */ + .parent = 58, + .info = { SFF8436_INFO(&sff_8436_port[8]) }, + .client = NULL, + }, + { + /* qsfp 10 (0x50) */ + .parent = 59, + .info = { SFF8436_INFO(&sff_8436_port[9]) }, + .client = NULL, + }, + { + /* qsfp 11 (0x50) */ + .parent = 60, + .info = { SFF8436_INFO(&sff_8436_port[10]) }, + .client = NULL, + }, + { + /* qsfp 12 (0x50) */ + .parent = 61, + .info = { SFF8436_INFO(&sff_8436_port[11]) }, + .client = NULL, + }, + { + /* qsfp 13 (0x50) */ + .parent = 62, + .info = { SFF8436_INFO(&sff_8436_port[12]) }, + .client = NULL, + }, + { + /* qsfp 14 (0x50) */ + .parent = 63, + .info = { SFF8436_INFO(&sff_8436_port[13]) }, + .client = NULL, + }, + { + /* qsfp 15 (0x50) */ + .parent = 64, + .info = { SFF8436_INFO(&sff_8436_port[14]) }, + .client = NULL, + }, + { + /* qsfp 16 (0x50) */ + .parent = 65, + .info = { SFF8436_INFO(&sff_8436_port[15]) }, + .client = NULL, + }, + { + /* qsfp 17 (0x50) */ + .parent = 66, + .info = { SFF8436_INFO(&sff_8436_port[16]) }, + .client = NULL, + }, + { + /* qsfp 18 (0x50) */ + .parent = 67, + .info = { SFF8436_INFO(&sff_8436_port[17]) }, + .client = NULL, + }, + { + /* qsfp 19 (0x50) */ + .parent = 68, + .info = { SFF8436_INFO(&sff_8436_port[18]) }, + .client = NULL, + }, + { + /* qsfp 20 (0x50) */ + .parent = 69, + .info = { SFF8436_INFO(&sff_8436_port[19]) }, + .client = NULL, + }, + { + /* qsfp 21 (0x50) */ + .parent = 70, + .info = { SFF8436_INFO(&sff_8436_port[20]) }, + .client = NULL, + }, + { + /* qsfp 22 (0x50) */ + .parent = 71, + .info = { SFF8436_INFO(&sff_8436_port[21]) }, + .client = NULL, + }, + { + /* qsfp 23 (0x50) */ + .parent = 72, + .info = { SFF8436_INFO(&sff_8436_port[22]) }, + .client = NULL, + }, + { + /* qsfp 24 (0x50) */ + .parent = 73, + .info = { SFF8436_INFO(&sff_8436_port[23]) }, + .client = NULL, + }, + { + /* qsfp 25 (0x50) */ + .parent = 74, + .info = { SFF8436_INFO(&sff_8436_port[24]) }, + .client = NULL, + }, + { + /* qsfp 26 (0x50) */ + .parent = 75, + .info = { SFF8436_INFO(&sff_8436_port[25]) }, + .client = NULL, + }, + { + /* qsfp 27 (0x50) */ + .parent = 76, + .info = { SFF8436_INFO(&sff_8436_port[26]) }, + .client = NULL, + }, + { + /* qsfp 28 (0x50) */ + .parent = 77, + .info = { SFF8436_INFO(&sff_8436_port[27]) }, + .client = NULL, + }, + { + /* qsfp 29 (0x50) */ + .parent = 78, + .info = { SFF8436_INFO(&sff_8436_port[28]) }, + .client = NULL, + }, + { + /* qsfp 30 (0x50) */ + .parent = 79, + .info = { SFF8436_INFO(&sff_8436_port[29]) }, + .client = NULL, + }, + { + /* qsfp 31 (0x50) */ + .parent = 80, + .info = { SFF8436_INFO(&sff_8436_port[30]) }, + .client = NULL, + }, + { + /* qsfp 32 (0x50) */ + .parent = 81, + .info = { SFF8436_INFO(&sff_8436_port[31]) }, + .client = NULL, + }, +}; + + +static struct platform_device ag9032v1_i2c_device[] = { + ag9032v1_i2c_device_num(0), + ag9032v1_i2c_device_num(1), + ag9032v1_i2c_device_num(2), + ag9032v1_i2c_device_num(3), + ag9032v1_i2c_device_num(4), + ag9032v1_i2c_device_num(5), + ag9032v1_i2c_device_num(6), + ag9032v1_i2c_device_num(7), + ag9032v1_i2c_device_num(8), + ag9032v1_i2c_device_num(9), + ag9032v1_i2c_device_num(10), + ag9032v1_i2c_device_num(11), + ag9032v1_i2c_device_num(12), + ag9032v1_i2c_device_num(13), + ag9032v1_i2c_device_num(14), + ag9032v1_i2c_device_num(15), + ag9032v1_i2c_device_num(16), + ag9032v1_i2c_device_num(17), + ag9032v1_i2c_device_num(18), + ag9032v1_i2c_device_num(19), + ag9032v1_i2c_device_num(20), + ag9032v1_i2c_device_num(21), + ag9032v1_i2c_device_num(22), + ag9032v1_i2c_device_num(23), + ag9032v1_i2c_device_num(24), + ag9032v1_i2c_device_num(25), + ag9032v1_i2c_device_num(26), + ag9032v1_i2c_device_num(27), + ag9032v1_i2c_device_num(28), + ag9032v1_i2c_device_num(29), + ag9032v1_i2c_device_num(30), + ag9032v1_i2c_device_num(31), + ag9032v1_i2c_device_num(32), + ag9032v1_i2c_device_num(33), + ag9032v1_i2c_device_num(34), + ag9032v1_i2c_device_num(35), + ag9032v1_i2c_device_num(36), + ag9032v1_i2c_device_num(37), + ag9032v1_i2c_device_num(38), + ag9032v1_i2c_device_num(39), + ag9032v1_i2c_device_num(40), + ag9032v1_i2c_device_num(41), + ag9032v1_i2c_device_num(42), + ag9032v1_i2c_device_num(43), +}; + +/*---------------- I2C device - end ------------- */ + +/*---------------- I2C driver - start ------------- */ +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- CPLD - start ------------- */ + +/* CPLD -- device */ + +enum cpld_type { + system_cpld, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +enum swpld_attributes { + SW_BOARD_ID, + SW_BOARD_VER, + SWPLD_VER, + SYS_RST, + B56960_RST, + MB_A_PLD_RST, + MB_B_PLD_RST, + PSU1_PWR_OK, + PSU2_PWR_OK, + HS1_PWR_OK, + HS2_PWR_OK, + B54616_RST, + B54616_INT, + B54616_MASK_INT, + PB_HS_INT, + MB_HS_INT, + PB_PWR_INT, + MB_PWR_INT, + FAN_INT, + PB_HS_MASK_INT, + MB_HS_MASK_INT, + PB_PWR1_MASK_INT, + PB_PWR2_MASK_INT, + FAN_MASK_INT, + QSFP_01TO08_INT, + QSFP_08TO16_INT, + QSFP_17TO24_INT, + QSFP_25TO32_INT, + QSFP_01TO08_ABS, + QSFP_08TO16_ABS, + QSFP_17TO24_ABS, + QSFP_25TO32_ABS, + QSFP_01TO08_MASK_INT, + QSFP_08TO16_MASK_INT, + QSFP_17TO24_MASK_INT, + QSFP_25TO32_MASK_INT, + QSFP_01TO08_MASK_ABS, + QSFP_08TO16_MASK_ABS, + QSFP_17TO24_MASK_ABS, + QSFP_25TO32_MASK_ABS, + QSFP01_MOD_INT, + QSFP02_MOD_INT, + QSFP03_MOD_INT, + QSFP04_MOD_INT, + QSFP05_MOD_INT, + QSFP06_MOD_INT, + QSFP07_MOD_INT, + QSFP08_MOD_INT, + QSFP09_MOD_INT, + QSFP10_MOD_INT, + QSFP11_MOD_INT, + QSFP12_MOD_INT, + QSFP13_MOD_INT, + QSFP14_MOD_INT, + QSFP15_MOD_INT, + QSFP16_MOD_INT, + QSFP17_MOD_INT, + QSFP18_MOD_INT, + QSFP19_MOD_INT, + QSFP20_MOD_INT, + QSFP21_MOD_INT, + QSFP22_MOD_INT, + QSFP23_MOD_INT, + QSFP24_MOD_INT, + QSFP25_MOD_INT, + QSFP26_MOD_INT, + QSFP27_MOD_INT, + QSFP28_MOD_INT, + QSFP29_MOD_INT, + QSFP30_MOD_INT, + QSFP31_MOD_INT, + QSFP32_MOD_INT, +}; + +static struct cpld_platform_data ag9032v1_cpld_platform_data[] = { + [system_cpld] = { + .reg_addr = SWPLD_REG, + }, +}; + +static struct platform_device ag9032v1_cpld = { + .name = "delta-ag9032v1-swpld", + .id = 0, + .dev = { + .platform_data = ag9032v1_cpld_platform_data, + .release = device_release, + }, +}; + +static struct swpld_attribute_data { + int reg_addr; + int reg_mask; + char reg_note[150]; +}; + +static struct swpld_attribute_data controller_interrupt_data[] = { +//BOARD + [SYS_RST] = { + .reg_addr = 0x04, + .reg_mask = 7, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, + [B56960_RST] = { + .reg_addr = 0x04, + .reg_mask = 6, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, + [MB_A_PLD_RST] = { + .reg_addr = 0x04, + .reg_mask = 4, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, + [MB_B_PLD_RST] = { + .reg_addr = 0x04, + .reg_mask = 3, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, +//PSU + [PSU1_PWR_OK] = { + .reg_addr = 0x0a, + .reg_mask = 7, + .reg_note = "‘0’ = Power rail is failed\n‘1’ = Power rail is good" + }, + [PSU2_PWR_OK] = { + .reg_addr = 0x0a, + .reg_mask = 6, + .reg_note = "‘0’ = Power rail is failed\n‘1’ = Power rail is good" + }, +//HOT SWAP + [HS1_PWR_OK] = { + .reg_addr = 0x08, + .reg_mask = 5, + .reg_note = "‘0’ = Hot swap controller disabled\n‘1’ = Hot swap controller enabled" + }, + [HS2_PWR_OK] = { + .reg_addr = 0x08, + .reg_mask = 4, + .reg_note = "‘0’ = Hot swap controller disabled\n‘1’ = Hot swap controller enabled" + }, +//BCM54616S + [B54616_RST] = { + .reg_addr = 0x04, + .reg_mask = 5, + .reg_note = "“0” = Reset\n“1” = Normal operation" + }, + [B54616_INT] = { + .reg_addr = 0x16, + .reg_mask = 7, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [B54616_MASK_INT] = { + .reg_addr = 0x17, + .reg_mask = 7, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, +//QSFP + [PB_HS_INT] = { + .reg_addr = 0x10, + .reg_mask = 7, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [MB_HS_INT] = { + .reg_addr = 0x10, + .reg_mask = 6, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [PB_PWR_INT] = { + .reg_addr = 0x10, + .reg_mask = 5, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [MB_PWR_INT] = { + .reg_addr = 0x10, + .reg_mask = 4, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [FAN_INT] = { + .reg_addr = 0x10, + .reg_mask = 3, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [PB_HS_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 7, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [MB_HS_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 6, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [PB_PWR1_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 5, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [PB_PWR2_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 4, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [FAN_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 3, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [QSFP_01TO08_INT] = { + .reg_addr = 0x12, + .reg_mask = 7, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_08TO16_INT] = { + .reg_addr = 0x12, + .reg_mask = 6, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_17TO24_INT] = { + .reg_addr = 0x12, + .reg_mask = 5, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_25TO32_INT] = { + .reg_addr = 0x12, + .reg_mask = 4, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_01TO08_ABS] = { + .reg_addr = 0x12, + .reg_mask = 3, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_08TO16_ABS] = { + .reg_addr = 0x12, + .reg_mask = 2, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_17TO24_ABS] = { + .reg_addr = 0x12, + .reg_mask = 1, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_25TO32_ABS] = { + .reg_addr = 0x12, + .reg_mask = 0, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_01TO08_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 7, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_08TO16_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 6, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_17TO24_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 5, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_25TO32_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 4, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_01TO08_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 3, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_08TO16_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 2, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_17TO24_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 1, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_25TO32_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 0, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP01_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP02_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP03_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP04_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP05_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP06_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP07_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP08_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP09_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP10_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP11_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP12_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP13_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP14_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP15_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP16_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP17_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP18_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP19_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP20_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP21_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP22_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP23_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP24_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP25_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP26_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP27_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP28_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP29_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP30_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP31_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP32_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, +}; + +static ssize_t get_present(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)reverse_8bits(ret) & 0xff; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(reverse_8bits(ret) & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_1, (u8)reverse_8bits(data & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_2, (u8)(reverse_8bits(data >> 8) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_3, (u8)(reverse_8bits(data >> 16) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_4, (u8)(reverse_8bits(data >> 24) & 0xff)); + + return count; +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(reverse_8bits(ret) & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_1, (u8)reverse_8bits(data & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_2, (u8)reverse_8bits((data >> 8)& 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_3, (u8)reverse_8bits((data >> 16) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_4, (u8)reverse_8bits((data >> 24) & 0xff)); + + return count; +} + +static ssize_t get_response(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(reverse_8bits(ret) & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t set_response(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_1, (u8)reverse_8bits(data & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_2, (u8)reverse_8bits((data >> 8)& 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_3, (u8)reverse_8bits((data >> 16) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_4, (u8)reverse_8bits((data >> 24) & 0xff)); + + return count; +} + +struct platform_led_status{ + int reg_data; + char *led_status; + int led_id; +}; + +static struct platform_led_status led_info[] = { + { + .reg_data = 0x40, + .led_status = "pwr1_green", + .led_id = 0, + }, + { + .reg_data = 0x80, + .led_status = "pwr1_amber", + .led_id = 0, + }, + { + .reg_data = 0x00, + .led_status = "pwr1_off", + .led_id = 0, + }, + { + .reg_data = 0xc0, + .led_status = "pwr1_off", + .led_id = 0, + }, + { + .reg_data = 0x10, + .led_status = "pwr2_green", + .led_id = 1, + }, + { + .reg_data = 0x20, + .led_status = "pwr2_amber", + .led_id = 1, + }, + { + .reg_data = 0x00, + .led_status = "pwr2_off", + .led_id = 1, + }, + { + .reg_data = 0x30, + .led_status = "pwr2_off", + .led_id = 1, + }, + { + .reg_data = 0x04, + .led_status = "sys_green", + .led_id = 2, + }, + { + .reg_data = 0x08, + .led_status = "sys_blinking_green", + .led_id = 2, + }, + { + .reg_data = 0x0c, + .led_status = "sys_red", + .led_id = 2, + }, + { + .reg_data = 0x00, + .led_status = "sys_off", + .led_id = 2, + }, + { + .reg_data = 0x01, + .led_status = "fan_green", + .led_id = 3, + }, + { + .reg_data = 0x02, + .led_status = "fan_amber", + .led_id = 3, + }, + { + .reg_data = 0x00, + .led_status = "fan_off", + .led_id = 3, + }, + { + .reg_data = 0x03, + .led_status = "fan_off", + .led_id = 3, + }, + { + .reg_data = 0x40, + .led_status = "fan1_green", + .led_id = 4, + }, + { + .reg_data = 0x80, + .led_status = "fan1_red", + .led_id = 4, + }, + { + .reg_data = 0x00, + .led_status = "fan1_off", + .led_id = 4, + }, + { + .reg_data = 0x10, + .led_status = "fan2_green", + .led_id = 5, + }, + { + .reg_data = 0x20, + .led_status = "fan2_red", + .led_id = 5, + }, + { + .reg_data = 0x00, + .led_status = "fan2_off", + .led_id = 5, + }, + { + .reg_data = 0x04, + .led_status = "fan3_green", + .led_id = 6, + }, + { + .reg_data = 0x08, + .led_status = "fan3_red", + .led_id = 6, + }, + { + .reg_data = 0x00, + .led_status = "fan3_off", + .led_id = 6, + }, + { + .reg_data = 0x01, + .led_status = "fan4_green", + .led_id = 7, + }, + { + .reg_data = 0x02, + .led_status = "fan4_red", + .led_id = 7, + }, + { + .reg_data = 0x00, + .led_status = "fan4_off", + .led_id = 7, + }, + { + .reg_data = 0x40, + .led_status = "fan5_green", + .led_id = 8, + }, + { + .reg_data = 0x80, + .led_status = "fan5_red", + .led_id = 8, + }, + { + .reg_data = 0x00, + .led_status = "fan5_off", + .led_id = 8, + }, +}; + +struct platform_led_data{ + int reg_addr; + int mask; +}; + +static struct platform_led_data led_data[] = { + { + .reg_addr = SYS_LED_REG, + .mask = 0xc0, + }, + { + .reg_addr = SYS_LED_REG, + .mask = 0x30, + }, + { + .reg_addr = SYS_LED_REG, + .mask = 0x0c, + }, + { + .reg_addr = SYS_LED_REG, + .mask = 0x03, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0xc0, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0x30, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0x0c, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0x03, + }, + { + .reg_addr = FAN2_LED_REG, + .mask = 0xc0, + }, +}; + +static ssize_t get_led_color(struct device *dev, struct device_attribute *devattr, char *buf) +{ + char str[9][20] = {0}; + int board_data; + int led_data_number; + int led_info_number; + struct cpld_platform_data *pdata = dev->platform_data; + + for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ + board_data = i2c_smbus_read_byte_data(pdata[system_cpld].client, led_data[led_data_number].reg_addr); + if(board_data >= 0){ + board_data &= led_data[led_data_number].mask; + for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ + if (led_data_number == led_info[led_info_number].led_id){ + if(board_data == led_info[led_info_number].reg_data){ + sprintf(str[led_data_number], "%s", led_info[led_info_number].led_status); + } + } + } + } + else + printk( KERN_ERR "Missing LED board data\n"); + } + return sprintf(buf,"%s\n%s\n%s\n%s\n%s\n%s\n%s\n%s\n%s\n",str[0],str[1],str[2],str[3],str[4],str[5],str[6],str[7],str[8]); +} + +static ssize_t set_led_color(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int led_info_number; + int led_data_number; + int str_compar; + int led_reg_value; + struct cpld_platform_data *pdata = dev->platform_data; + + for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ + str_compar = strncmp(buf,led_info[led_info_number].led_status,strlen(led_info[led_info_number].led_status)); + if(str_compar == 0){ + for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ + if(led_info[led_info_number].led_id == led_data_number){ + led_reg_value = i2c_smbus_read_byte_data(pdata[system_cpld].client, led_data[led_data_number].reg_addr); + if(led_reg_value >= 0){ + led_reg_value &= (~led_data[led_data_number].mask); + led_reg_value |= led_info[led_info_number].reg_data; + i2c_smbus_write_byte_data(pdata[system_cpld].client, (u8)(led_data[led_data_number].reg_addr & 0xff), (u8)(led_reg_value & 0xff)); + } + else + printk( KERN_ERR "Missing LED reg. data\n"); + } + } + } + } + return count; +} + +static unsigned char swpld_reg_addr; +static ssize_t get_swpld_reg_value(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, swpld_reg_addr); + return sprintf(buf, "0x%02x\n", ret); +} + +static ssize_t set_swpld_reg_value(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + + i2c_smbus_write_byte_data(pdata[system_cpld].client, swpld_reg_addr, data); + + return count; +} + +static ssize_t get_swpld_reg_addr(struct device *dev, struct device_attribute *devattr, char *buf) +{ + + return sprintf(buf, "0x%02x\n", swpld_reg_addr); +} + +static ssize_t set_swpld_reg_addr(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + swpld_reg_addr = data; + + return count; +} + +static DEVICE_ATTR(swpld_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg_value, set_swpld_reg_value); +static DEVICE_ATTR(swpld_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg_addr, set_swpld_reg_addr); +static DEVICE_ATTR(sfp_present, S_IRUGO, get_present, NULL ); +static DEVICE_ATTR(sfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode ); +static DEVICE_ATTR(sfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset ); +static DEVICE_ATTR(sfp_response, S_IRUGO | S_IWUSR, get_response, set_response ); +static DEVICE_ATTR(led_control, S_IRUGO | S_IWUSR, get_led_color, set_led_color); + +static struct attribute *ag9032v1_cpld_attrs[] = { + &dev_attr_swpld_reg_value.attr, + &dev_attr_swpld_reg_addr.attr, + &dev_attr_sfp_response.attr, + &dev_attr_sfp_present.attr, + &dev_attr_sfp_lpmode.attr, + &dev_attr_sfp_reset.attr, + &dev_attr_led_control.attr, + NULL, +}; + +static struct attribute_group ag9032v1_cpld_attr_grp = { + .attrs = ag9032v1_cpld_attrs, +}; + +static struct kobject *kobj_swpld; +static struct kobject *kobj_board; +static struct kobject *kobj_psu; +static struct kobject *kobj_hot_swap; +static struct kobject *kobj_controller_interrupt; +static struct kobject *kobj_BCM54616S; + +static ssize_t get_swpld_data(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev = kobj_to_dev(kobj_swpld); + struct cpld_platform_data *pdata = i2cdev->platform_data; + + + unsigned char reg; + int mask; + int value; + char note[150]; + + switch (attr->index) { + //attributes on BOARD + case SW_BOARD_ID: + reg = 0x00; + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = ret >> 4; + sprintf(note, "\n“0x00”: L9032NB-AL-R\n“0x01”: AK9032-R\n“0x02”: AG9032-R\n“0x03”: AG9032R-R\n“0x04”: AG9032 V1-R\n"); + return sprintf(buf, "0x%02x%s", value, note); + case SW_BOARD_VER: + reg = 0x00; + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = ret & 0x0F; + sprintf(note, "\n“0x00”: proto-A\n“0x01”: proto-B\n"); + return sprintf(buf, "0x%02x%s", value, note); + case SWPLD_VER: + reg = 0x01; + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = ret & 0xFF; + sprintf(note, " "); + return sprintf(buf, "0x%02x%s", value, note); + //other attributes + case SYS_RST ... QSFP32_MOD_INT: + reg = controller_interrupt_data[attr->index].reg_addr; + mask = controller_interrupt_data[attr->index].reg_mask; + sprintf(note, "\n%s\n",controller_interrupt_data[attr->index].reg_note); + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = (ret & (1 << mask)) >> mask; + return sprintf(buf, "%d%s", value, note); + default: + return sprintf(buf, "%d not found", attr->index); + } +} + +static ssize_t set_swpld_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + int ret; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev = kobj_to_dev(kobj_board->parent); + struct cpld_platform_data *pdata = i2cdev->platform_data; + unsigned char reg; + int mask; + int value; + char note[180]; + int data; + int val; + u8 mask_out; + + ret = kstrtoint(buf, 0, &val); + + if (ret) + { + return ret; + } + if (val > 1) + { + return -EINVAL; + } + + switch (attr->index) { + case SYS_RST ... MB_B_PLD_RST: + case HS1_PWR_OK ... HS2_PWR_OK: + case B54616_RST: + case QSFP_01TO08_MASK_INT... QSFP_25TO32_MASK_ABS: + reg = controller_interrupt_data[attr->index].reg_addr; + mask = controller_interrupt_data[attr->index].reg_mask; + break; + default: + return sprintf(buf, "%d not found", attr->index); + } + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + mask_out = ret & ~((u8)(1 << mask)); + data = mask_out | (val << mask); + i2c_smbus_write_byte_data(pdata[system_cpld].client, reg, (u8)(data & 0xff)); + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + return count; +} + +static SENSOR_DEVICE_ATTR(sw_board_id, S_IRUGO, get_swpld_data, NULL, SW_BOARD_ID); +static SENSOR_DEVICE_ATTR(sw_board_ver, S_IRUGO, get_swpld_data, NULL, SW_BOARD_VER); +static SENSOR_DEVICE_ATTR(swpld_ver, S_IRUGO, get_swpld_data, NULL, SWPLD_VER); +static SENSOR_DEVICE_ATTR(sys_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, SYS_RST); +static SENSOR_DEVICE_ATTR(B56960_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, B56960_RST); +static SENSOR_DEVICE_ATTR(mb_a_pld_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, MB_A_PLD_RST); +static SENSOR_DEVICE_ATTR(mb_b_pld_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, MB_B_PLD_RST); + +static struct attribute *ag9032v1_swpld_attrs_board[] = { + &sensor_dev_attr_sw_board_id.dev_attr.attr, + &sensor_dev_attr_sw_board_ver.dev_attr.attr, + &sensor_dev_attr_swpld_ver.dev_attr.attr, + &sensor_dev_attr_sys_rst.dev_attr.attr, + &sensor_dev_attr_B56960_rst.dev_attr.attr, + &sensor_dev_attr_mb_a_pld_rst.dev_attr.attr, + &sensor_dev_attr_mb_b_pld_rst.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(psu1_pwr_ok, S_IRUGO, get_swpld_data, NULL, PSU1_PWR_OK); +static SENSOR_DEVICE_ATTR(psu2_pwr_ok, S_IRUGO, get_swpld_data, NULL, PSU2_PWR_OK); + +static struct attribute *ag9032v1_swpld_attrs_psu[] = { + &sensor_dev_attr_psu1_pwr_ok.dev_attr.attr, + &sensor_dev_attr_psu2_pwr_ok.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(hs1_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, HS1_PWR_OK); +static SENSOR_DEVICE_ATTR(hs2_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, HS2_PWR_OK); + +static struct attribute *ag9032v1_swpld_attrs_hot_swap[] = { + &sensor_dev_attr_hs1_pwr_ok.dev_attr.attr, + &sensor_dev_attr_hs2_pwr_ok.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(B54616_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, B54616_RST ); +static SENSOR_DEVICE_ATTR(B54616_int, S_IRUGO, get_swpld_data, NULL, B54616_INT ); +static SENSOR_DEVICE_ATTR(B54616_mask_int, S_IRUGO, get_swpld_data, NULL, B54616_MASK_INT); + +static struct attribute *ag9032v1_swpld_attrs_BCM54616S[] = { + &sensor_dev_attr_B54616_rst.dev_attr.attr, + &sensor_dev_attr_B54616_int.dev_attr.attr, + &sensor_dev_attr_B54616_mask_int.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(pb_hs_int, S_IRUGO, get_swpld_data, NULL, PB_HS_INT); +static SENSOR_DEVICE_ATTR(mb_hs_int, S_IRUGO, get_swpld_data, NULL, MB_HS_INT); +static SENSOR_DEVICE_ATTR(pb_pwr_int, S_IRUGO, get_swpld_data, NULL, PB_PWR_INT); +static SENSOR_DEVICE_ATTR(mb_pwr_int, S_IRUGO, get_swpld_data, NULL, MB_PWR_INT); +static SENSOR_DEVICE_ATTR(fan_int, S_IRUGO, get_swpld_data, NULL, FAN_INT); +static SENSOR_DEVICE_ATTR(pb_hs_mask_int, S_IRUGO, get_swpld_data, NULL, PB_HS_MASK_INT); +static SENSOR_DEVICE_ATTR(mb_hs_mask_int, S_IRUGO, get_swpld_data, NULL, MB_HS_MASK_INT); +static SENSOR_DEVICE_ATTR(pb_pwr1_mask_int, S_IRUGO, get_swpld_data, NULL, PB_PWR1_MASK_INT); +static SENSOR_DEVICE_ATTR(pb_pwr2_mask_int, S_IRUGO, get_swpld_data, NULL, PB_PWR2_MASK_INT); +static SENSOR_DEVICE_ATTR(fan_mask_int, S_IRUGO, get_swpld_data, NULL, FAN_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_01to08_int, S_IRUGO, get_swpld_data, NULL, QSFP_01TO08_INT); +static SENSOR_DEVICE_ATTR(qsfp_08to16_int, S_IRUGO, get_swpld_data, NULL, QSFP_08TO16_INT); +static SENSOR_DEVICE_ATTR(qsfp_17to24_int, S_IRUGO, get_swpld_data, NULL, QSFP_17TO24_INT); +static SENSOR_DEVICE_ATTR(qsfp_25to32_int, S_IRUGO, get_swpld_data, NULL, QSFP_25TO32_INT); +static SENSOR_DEVICE_ATTR(qsfp_01to08_abs, S_IRUGO, get_swpld_data, NULL, QSFP_01TO08_ABS); +static SENSOR_DEVICE_ATTR(qsfp_08to16_abs, S_IRUGO, get_swpld_data, NULL, QSFP_08TO16_ABS); +static SENSOR_DEVICE_ATTR(qsfp_17to24_abs, S_IRUGO, get_swpld_data, NULL, QSFP_17TO24_ABS); +static SENSOR_DEVICE_ATTR(qsfp_25to32_abs, S_IRUGO, get_swpld_data, NULL, QSFP_25TO32_ABS); +static SENSOR_DEVICE_ATTR(qsfp_01to08_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_01TO08_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_08to16_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_08TO16_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_17to24_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_17TO24_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_25to32_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_25TO32_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_01to08_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_01TO08_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp_08to16_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_08TO16_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp_17to24_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_17TO24_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp_25to32_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_25TO32_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp01_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP01_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp02_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP02_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp03_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP03_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp04_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP04_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp05_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP05_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp06_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP06_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp07_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP07_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp08_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP08_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp09_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP09_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp10_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP10_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp11_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP11_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp12_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP12_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp13_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP13_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp14_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP14_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp15_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP15_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp16_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP16_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp17_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP17_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp18_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP18_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp19_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP19_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp20_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP20_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp21_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP21_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp22_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP22_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp23_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP23_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp24_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP24_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp25_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP25_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp26_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP26_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp27_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP27_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp28_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP28_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp29_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP29_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp30_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP30_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp31_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP31_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp32_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP32_MOD_INT); + +static struct attribute *ag9032v1_swpld_attrs_controller_interrupt[] = { + &sensor_dev_attr_pb_hs_int.dev_attr.attr, + &sensor_dev_attr_mb_hs_int.dev_attr.attr, + &sensor_dev_attr_pb_pwr_int.dev_attr.attr, + &sensor_dev_attr_mb_pwr_int.dev_attr.attr, + &sensor_dev_attr_fan_int.dev_attr.attr, + &sensor_dev_attr_pb_hs_mask_int.dev_attr.attr, + &sensor_dev_attr_mb_hs_mask_int.dev_attr.attr, + &sensor_dev_attr_pb_pwr1_mask_int.dev_attr.attr, + &sensor_dev_attr_pb_pwr2_mask_int.dev_attr.attr, + &sensor_dev_attr_fan_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_int.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_int.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_int.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_int.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp01_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp02_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp03_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp04_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp05_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp06_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp07_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp08_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp09_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp10_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp11_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp12_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp13_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp14_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp15_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp16_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp17_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp18_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp19_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp20_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp21_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp22_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp23_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp24_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp25_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp26_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp27_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp28_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp29_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp30_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp31_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp32_mod_int.dev_attr.attr, + NULL, +}; + +static struct attribute_group ag9032v1_swpld_attr_grp_board = { + .attrs = ag9032v1_swpld_attrs_board, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_psu = { + .attrs = ag9032v1_swpld_attrs_psu, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_hot_swap = { + .attrs = ag9032v1_swpld_attrs_hot_swap, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_BCM54616S = { + .attrs = ag9032v1_swpld_attrs_BCM54616S, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_controller_interrupt = { + .attrs = ag9032v1_swpld_attrs_controller_interrupt, +}; + +/* CPLD -- driver */ +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS6); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS6); + return -ENODEV; + } + + pdata[system_cpld].client = i2c_new_dummy(parent, pdata[system_cpld].reg_addr); + if (!pdata[system_cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[system_cpld].reg_addr); + goto error; + } + + kobj_swpld = &pdev->dev.kobj; + kobj_board = kobject_create_and_add("Board", &pdev->dev.kobj); + if (!kobj_board){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_psu = kobject_create_and_add("PSU", &pdev->dev.kobj); + if (!kobj_psu){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_hot_swap = kobject_create_and_add("HOT_SWAP", &pdev->dev.kobj); + if (!kobj_hot_swap){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_controller_interrupt = kobject_create_and_add("Controller_interrupt", &pdev->dev.kobj); + if (!kobj_controller_interrupt){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_BCM54616S = kobject_create_and_add("BCM54616S", &pdev->dev.kobj); + if (!kobj_BCM54616S){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + ret = sysfs_create_group(kobj_board, &ag9032v1_swpld_attr_grp_board); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_psu, &ag9032v1_swpld_attr_grp_psu); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_hot_swap, &ag9032v1_swpld_attr_grp_hot_swap); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_BCM54616S, &ag9032v1_swpld_attr_grp_BCM54616S); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_controller_interrupt, &ag9032v1_swpld_attr_grp_controller_interrupt); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; + +error: + kobject_put(kobj_swpld); + kobject_put(kobj_board); + kobject_put(kobj_psu); + kobject_put(kobj_hot_swap); + kobject_put(kobj_controller_interrupt); + kobject_put(kobj_BCM54616S); + i2c_unregister_device(pdata[system_cpld].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_grp); + sysfs_remove_group(kobj_board, &ag9032v1_swpld_attr_grp_board); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + kobject_put(kobj_swpld); + kobject_put(kobj_board); + kobject_put(kobj_psu); + kobject_put(kobj_hot_swap); + kobject_put(kobj_controller_interrupt); + kobject_put(kobj_BCM54616S); + if (pdata[system_cpld].client) { + if (!parent) { + parent = (pdata[system_cpld].client)->adapter; + } + i2c_unregister_device(pdata[system_cpld].client); + } + } + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-swpld", + }, +}; + +/*---------------- CPLD - end ------------- */ + +/*---------------- MUX - start ------------- */ + +struct swpld_mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; +}; + +struct swpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct swpld_mux_platform_data data; +}; +static struct swpld_mux_platform_data ag9032v1_swpld_mux_platform_data[] = { + { + .parent = BUS3, + .base_nr = BUS3_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS3_MUX_REG ,// the i2c register address which for select mux TEMP(FAN) + }, + { + .parent = BUS4, + .base_nr = BUS4_BASE_NUM , + .cpld = NULL, + .reg_addr = BUS4_MUX_REG , + }, + { + .parent = BUS5, + .base_nr = BUS5_BASE_NUM , + .cpld = NULL, + .reg_addr = BUS5_MUX_REG , + }, +}; + +static struct platform_device ag9032v1_swpld_mux[] = { + { + .name = "delta-ag9032v1-swpld-mux", + .id = 0, + .dev = { + .platform_data = &ag9032v1_swpld_mux_platform_data[0], + .release = device_release, + }, + }, + { + .name = "delta-ag9032v1-swpld-mux", + .id = 1, + .dev = { + .platform_data = &ag9032v1_swpld_mux_platform_data[1], + .release = device_release, + }, + }, + { + .name = "delta-ag9032v1-swpld-mux", + .id = 2, + .dev = { + .platform_data = &ag9032v1_swpld_mux_platform_data[2], + .release = device_release, + }, + }, +}; + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int swpld_mux_select(struct i2c_adapter *adap, void *data, u8 chan) +{ + struct swpld_mux *mux = data; + u8 swpld_mux_val=0; + + if ( mux->data.base_nr == BUS3_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = TEMP_FAN_VAL; + break; + case 1: + swpld_mux_val = FAN_EEPROM1_VAL; + break; + case 2: + swpld_mux_val = FAN_EEPROM2_VAL; + break; + case 3: + swpld_mux_val = FAN_EEPROM3_VAL; + break; + case 4: + swpld_mux_val = FAN_EEPROM4_VAL; + break; + case 5: + swpld_mux_val = FAN_EEPROM5_VAL; + break; + case 6: + swpld_mux_val = FANIO_CTL_VAL; + break; + case 7: + case 8: + swpld_mux_val = FAN_CTRL_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS4_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = PSU1_VAL; + break; + case 1: + swpld_mux_val = PSU2_VAL; + break; + case 2: + swpld_mux_val = HOT_SWAP1_VAL; + break; + case 3: + swpld_mux_val = HOT_SWAP2_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS5_BASE_NUM ){ + if (chan < 9){ + swpld_mux_val = (u8)(chan) + 0x01; + } + else if (8 < chan && chan < 19){ + swpld_mux_val = (u8)(chan - 9) + 0x10; + } + else if (18 < chan && chan < 29){ + swpld_mux_val = (u8)(chan - 19) + 0x20; + } + else if (28 < chan && chan < 39){ + swpld_mux_val = (u8)(chan - 29) + 0x30; + } + else{ + swpld_mux_val = 0x00; + } + } + else + { + swpld_mux_val = 0x00; + } + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int swpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct swpld_mux *mux = i2c_mux_priv(muxc); + u8 swpld_mux_val=0; + + if ( mux->data.base_nr == BUS3_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = TEMP_FAN_VAL; + break; + case 1: + swpld_mux_val = FAN_EEPROM1_VAL; + break; + case 2: + swpld_mux_val = FAN_EEPROM2_VAL; + break; + case 3: + swpld_mux_val = FAN_EEPROM3_VAL; + break; + case 4: + swpld_mux_val = FAN_EEPROM4_VAL; + break; + case 5: + swpld_mux_val = FAN_EEPROM5_VAL; + break; + case 6: + swpld_mux_val = FANIO_CTL_VAL; + break; + case 7: + case 8: + swpld_mux_val = FAN_CTRL_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS4_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = PSU1_VAL; + break; + case 1: + swpld_mux_val = PSU2_VAL; + break; + case 2: + swpld_mux_val = HOT_SWAP1_VAL; + break; + case 3: + swpld_mux_val = HOT_SWAP2_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS5_BASE_NUM ){ + if (chan < 9){ + swpld_mux_val = (u8)(chan) + 0x01; + } + else if (8 < chan && chan < 19){ + swpld_mux_val = (u8)(chan - 9) + 0x10; + } + else if (18 < chan && chan < 29){ + swpld_mux_val = (u8)(chan - 19) + 0x20; + } + else if (28 < chan && chan < 39){ + swpld_mux_val = (u8)(chan - 29) + 0x30; + } + else{ + swpld_mux_val = 0x00; + } + } + else + { + swpld_mux_val = 0x00; + } + + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); +} +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + case BUS5: + dev_num = BUS5_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + ret = -ENOMEM; + printk(KERN_ERR "Failed to allocate memory for mux\n"); + goto alloc_failed; + } + + mux->parent = parent; + mux->data = *pdata; + mux->child = kzalloc(sizeof(struct i2c_adapter *) * dev_num, GFP_KERNEL); + if (!mux->child) { + ret = -ENOMEM; + printk(KERN_ERR "Failed to allocate memory for device on mux\n"); + goto alloc_failed2; + } + + for (i = 0; i < dev_num; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + mux->child[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, + nr, i, class, + swpld_mux_select, NULL); + if (!mux->child[i]) { + ret = -ENODEV; + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + platform_set_drvdata(pdev, mux); + return 0; + +add_adapter_failed: + for (; i > 0; i--) + i2c_del_mux_adapter(mux->child[i - 1]); + kfree(mux->child); +alloc_failed2: + kfree(mux); +alloc_failed: + i2c_put_adapter(parent); + + return ret; +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + case BUS5: + dev_num = BUS5_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0, + swpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + + for (i = 0; i < dev_num; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + + return ret; +} +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + int i; + struct swpld_mux *mux = platform_get_drvdata(pdev); + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + case BUS5: + dev_num = BUS5_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + for (i = 0; i < dev_num; i++) + i2c_del_mux_adapter(mux->child[i]); + + platform_set_drvdata(pdev, NULL); + i2c_put_adapter(mux->parent); + kfree(mux->child); + kfree(mux); + + return 0; +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent=muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} +#endif + +static struct platform_driver swpld_mux_driver = { + .probe = swpld_mux_probe, + .remove = __exit_p(swpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-swpld-mux", + }, +}; +/*---------------- MUX - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_ag9032v1_platform_init(void) +{ +// struct i2c_client *client; + struct i2c_adapter *adapter; + struct cpld_platform_data *cpld_pdata; + struct swpld_mux_platform_data *swpld_mux_pdata; + int ret,i = 0; + printk("ag9032v1_platform module initialization\n"); + + //Use pca9547 in i2c_mux_pca954x.c + adapter = i2c_get_adapter(BUS1); + //client = i2c_new_device(adapter, &i2c_info_pca9547[0]); + i2c_client_9547 = i2c_new_device(adapter, &i2c_info_pca9547[0]); + + i2c_put_adapter(adapter); + + // set the CPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + // register the mux prob which call the CPLD + ret = platform_driver_register(&swpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_swpld_mux_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the CPLD + ret = platform_device_register(&ag9032v1_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_ag9032v1_cpld; + } + // link the CPLD and the Mux + cpld_pdata = ag9032v1_cpld.dev.platform_data; + + for (i = 0; i < ARRAY_SIZE(ag9032v1_swpld_mux); i++) + { + swpld_mux_pdata = ag9032v1_swpld_mux[i].dev.platform_data; + swpld_mux_pdata->cpld = cpld_pdata[system_cpld].client; + ret = platform_device_register(&ag9032v1_swpld_mux[i]); + if (ret) { + printk(KERN_WARNING "Fail to create swpld mux %d\n", i); + goto error_ag9032v1_swpld_mux; + } + } + + for (i = 0; i < ARRAY_SIZE(ag9032v1_i2c_device); i++) + { + ret = platform_device_register(&ag9032v1_i2c_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_ag9032v1_i2c_device; + } + } + + if (ret) + goto error_ag9032v1_swpld_mux; + + return 0; + +error_ag9032v1_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag9032v1_i2c_device[i]); + } + i = ARRAY_SIZE(ag9032v1_swpld_mux); +error_ag9032v1_swpld_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag9032v1_swpld_mux[i]); + } + platform_driver_unregister((struct platform_driver *) &ag9032v1_cpld); +error_ag9032v1_cpld: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld_mux_driver); +error_swpld_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit delta_ag9032v1_platform_exit(void) +{ + int i = 0; + + for ( i = 0; i < ARRAY_SIZE(ag9032v1_i2c_device); i++ ) { + platform_device_unregister(&ag9032v1_i2c_device[i]); + } + + for (i = 0; i < ARRAY_SIZE(ag9032v1_swpld_mux); i++) { + platform_device_unregister(&ag9032v1_swpld_mux[i]); + } + + platform_device_unregister(&ag9032v1_cpld); + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&cpld_driver); + platform_driver_unregister(&swpld_mux_driver); + + i2c_unregister_device(i2c_client_9547); +} + +module_init(delta_ag9032v1_platform_init); +module_exit(delta_ag9032v1_platform_exit); + +MODULE_DESCRIPTION("DNI ag9032v1 Platform Support"); +MODULE_AUTHOR("Neal Tai "); +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh index c5f897ff007..b199ff34944 100755 --- a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh @@ -5,5 +5,8 @@ #fan speed monitol start /usr/share/sonic/device/x86_64-delta_ag9032v1-r0/fancontrol.service /usr/share/sonic/device/x86_64-delta_ag9032v1-r0/fancontrol & +#set led status +/usr/local/bin/led_status.sh & + exit 0 diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh index 5685bd71f58..825e09aa4cf 100755 --- a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh @@ -5,7 +5,7 @@ FAN2_EEPROM="-y 32 0x52 0x0a" FAN3_EEPROM="-y 33 0x53 0x0a" FAN4_EEPROM="-y 34 0x54 0x0a" FAN5_EEPROM="-y 35 0x55 0x0a" -LED_CONTROL="/sys/devices/platform/delta-ag9032v1-cpld.0/led_control" +LED_CONTROL="/sys/devices/platform/delta-ag9032v1-swpld.0/led_control" FAN1_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan5_input" FAN1_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-38/38-002d/fan5_input" FAN2_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan4_input" diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init index f98363b3ea0..3734ab362a2 100755 --- a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init @@ -28,7 +28,6 @@ start) modprobe delta_ag9032v1_cpupld /usr/local/bin/ag9032v1_platform_init.sh - echo "done." ;; From 4715dbb796ec53674ffeeacf8e777d9d9bb27a73 Mon Sep 17 00:00:00 2001 From: Sun Yongfeng Date: Tue, 4 Sep 2018 16:40:14 +0800 Subject: [PATCH 07/57] [SNMP] fix issue #1874, ERR snmpd[34]: Error allocating more space for arpcache. Cache will continue to be limited to 4096 entries (#1989) --- src/snmpd/Makefile | 9 ++++- ...ng-logs-with-statfs-permission-denie.patch | 40 +++++++++++++++++++ ...eck-return-status-from-realloc.-Than.patch | 31 ++++++++++++++ src/snmpd/patch-5.7.3+dfsg/series | 2 + src/snmpd/statfs_error.patch | 22 ---------- 5 files changed, 81 insertions(+), 23 deletions(-) create mode 100644 src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch create mode 100644 src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch create mode 100644 src/snmpd/patch-5.7.3+dfsg/series delete mode 100644 src/snmpd/statfs_error.patch diff --git a/src/snmpd/Makefile b/src/snmpd/Makefile index b372f0d2245..e9645b93b68 100644 --- a/src/snmpd/Makefile +++ b/src/snmpd/Makefile @@ -23,7 +23,14 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : dpkg-source -x net-snmp_$(SNMPD_VERSION_FULL).dsc pushd net-snmp-$(SNMPD_VERSION) - patch -p0 < ../statfs_error.patch + git init + git add -f * + git commit -m "unmodified snmpd source" + + # Apply patches + stg init + stg import -s ../patch-$(SNMPD_VERSION)/series + fakeroot debian/rules -j$(SONIC_CONFIG_MAKE_JOBS) binary popd diff --git a/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch b/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch new file mode 100644 index 00000000000..f832d004407 --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch @@ -0,0 +1,40 @@ +From a1edbce39e46b5c8bd5bd7db17fc11fa30e7dd73 Mon Sep 17 00:00:00 2001 +From: pavel-shirshov +Date: Mon, 27 Aug 2018 16:50:16 +0800 +Subject: [PATCH] [SNMP] Stop spamming logs with statfs permission denied log + message #1668 + +--- + agent/mibgroup/hardware/fsys/fsys_mntctl.c | 2 -- + agent/mibgroup/hardware/fsys/fsys_mntent.c | 2 -- + 2 files changed, 4 deletions(-) + +diff --git a/agent/mibgroup/hardware/fsys/fsys_mntctl.c b/agent/mibgroup/hardware/fsys/fsys_mntctl.c +index 9fbb068..adc38d6 100644 +--- a/agent/mibgroup/hardware/fsys/fsys_mntctl.c ++++ b/agent/mibgroup/hardware/fsys/fsys_mntctl.c +@@ -163,8 +163,6 @@ netsnmp_fsys_arch_load( void ) + continue; + + if ( statfs( entry->path, &stat_buf ) < 0 ) { +- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); +- snmp_log_perror( tmpbuf ); + continue; + } + entry->units = stat_buf.f_bsize; +diff --git a/agent/mibgroup/hardware/fsys/fsys_mntent.c b/agent/mibgroup/hardware/fsys/fsys_mntent.c +index 94d23db..5ad5e43 100644 +--- a/agent/mibgroup/hardware/fsys/fsys_mntent.c ++++ b/agent/mibgroup/hardware/fsys/fsys_mntent.c +@@ -238,8 +238,6 @@ netsnmp_fsys_arch_load( void ) + if ( NSFS_STATFS( entry->path, &stat_buf ) < 0 ) + #endif + { +- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); +- snmp_log_perror( tmpbuf ); + continue; + } + entry->units = stat_buf.NSFS_SIZE; +-- +2.7.4 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch b/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch new file mode 100644 index 00000000000..ceb0c68352b --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch @@ -0,0 +1,31 @@ +From e370973f273ffc1b32673bc94c5a46f75a846d82 Mon Sep 17 00:00:00 2001 +From: Niels Baggesen +Date: Wed, 31 Aug 2016 21:43:36 +0200 +Subject: [PATCH] at.c: properly check return status from realloc. Thanks to + Daniel Eiland (bug 2678) + +--- + agent/mibgroup/mibII/at.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/agent/mibgroup/mibII/at.c b/agent/mibgroup/mibII/at.c +index f57ba2a..a73fb8c 100644 +--- a/agent/mibgroup/mibII/at.c ++++ b/agent/mibgroup/mibII/at.c +@@ -638,11 +638,12 @@ ARP_Scan_Init(void) + struct arptab *newtab = (struct arptab *) + realloc(at, (sizeof(struct arptab) * + (arptab_curr_max_size + ARP_CACHE_INCR))); +- if (newtab == at) { ++ if (newtab == NULL) { + snmp_log(LOG_ERR, + "Error allocating more space for arpcache. " + "Cache will continue to be limited to %d entries", + arptab_curr_max_size); ++ newtab = at; + break; + } else { + arptab_curr_max_size += ARP_CACHE_INCR; +-- +2.7.4 + diff --git a/src/snmpd/patch-5.7.3+dfsg/series b/src/snmpd/patch-5.7.3+dfsg/series new file mode 100644 index 00000000000..6da32966e73 --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/series @@ -0,0 +1,2 @@ +0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch +0002-at.c-properly-check-return-status-from-realloc.-Than.patch diff --git a/src/snmpd/statfs_error.patch b/src/snmpd/statfs_error.patch deleted file mode 100644 index a07b59bc917..00000000000 --- a/src/snmpd/statfs_error.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- agent/mibgroup/hardware/fsys/fsys_mntctl.c.old 2018-04-30 23:26:58.097636453 +0000 -+++ agent/mibgroup/hardware/fsys/fsys_mntctl.c 2018-04-30 23:27:36.189499479 +0000 -@@ -163,8 +163,6 @@ - continue; - - if ( statfs( entry->path, &stat_buf ) < 0 ) { -- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); -- snmp_log_perror( tmpbuf ); - continue; - } - entry->units = stat_buf.f_bsize; ---- agent/mibgroup/hardware/fsys/fsys_mntent.c.old 2018-04-30 23:26:54.569649140 +0000 -+++ agent/mibgroup/hardware/fsys/fsys_mntent.c 2018-04-30 23:27:22.001550497 +0000 -@@ -238,8 +238,6 @@ - if ( NSFS_STATFS( entry->path, &stat_buf ) < 0 ) - #endif - { -- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); -- snmp_log_perror( tmpbuf ); - continue; - } - entry->units = stat_buf.NSFS_SIZE; From 35d93f0c3b15044bdfc3168a1d91cf2957a05b36 Mon Sep 17 00:00:00 2001 From: Joe LeVeque Date: Tue, 4 Sep 2018 22:32:46 -0700 Subject: [PATCH 08/57] [build] Remove sudo calls from build process (#2015) * [build] Remove sudo calls from build process * Make regex more strict --- Makefile.work | 7 ++++--- README.md | 10 +++++++--- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/Makefile.work b/Makefile.work index 2dfab327486..43a2a3669f0 100644 --- a/Makefile.work +++ b/Makefile.work @@ -48,7 +48,8 @@ SLAVE_IMAGE = sonic-slave-$(USER) SLAVE_DIR = sonic-slave endif -INSMOD_OVERLAY := sudo modprobe overlay +OVERLAY_MODULE_CHECK := lsmod | grep "^overlay " > /dev/null 2>&1 || (echo "ERROR: Module 'overlay' not loaded. Try running 'sudo modprobe overlay'."; exit 1) + DOCKER_RUN := docker run --rm=true --privileged \ -v $(PWD):/sonic \ -w /sonic \ @@ -94,13 +95,13 @@ SONIC_BUILD_INSTRUCTION := make \ .DEFAULT_GOAL := all %:: + @$(OVERLAY_MODULE_CHECK) @docker inspect --type image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) &> /dev/null || \ { echo Image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) not found. Building... ; \ $(DOCKER_BASE_BUILD) ; } @docker inspect --type image $(SLAVE_IMAGE):$(SLAVE_TAG) &> /dev/null || \ { echo Image $(SLAVE_IMAGE):$(SLAVE_TAG) not found. Building... ; \ $(DOCKER_BUILD) ; } - @$(INSMOD_OVERLAY) ifeq "$(KEEP_SLAVE_ON)" "yes" ifdef SOURCE_FOLDER @$(DOCKER_RUN) -v $(SOURCE_FOLDER):/var/$(USER)/src $(SLAVE_IMAGE):$(SLAVE_TAG) bash -c "$(SONIC_BUILD_INSTRUCTION) $@; /bin/bash" @@ -116,13 +117,13 @@ sonic-slave-build : $(DOCKER_BUILD) sonic-slave-bash : + @$(OVERLAY_MODULE_CHECK) @docker inspect --type image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) &> /dev/null || \ { echo Image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) not found. Building... ; \ $(DOCKER_BASE_BUILD) ; } @docker inspect --type image $(SLAVE_IMAGE):$(SLAVE_TAG) &> /dev/null || \ { echo Image $(SLAVE_IMAGE):$(SLAVE_TAG) not found. Building... ; \ $(DOCKER_BUILD) ; } - @$(INSMOD_OVERLAY) @$(DOCKER_RUN) -t $(SLAVE_IMAGE):$(SLAVE_TAG) bash showtag: diff --git a/README.md b/README.md index 9b667661cd8..548fca5ab96 100644 --- a/README.md +++ b/README.md @@ -47,21 +47,25 @@ To clone the code repository recursively, assuming git version 1.9 or newer: To build SONiC installer image and docker images, run the following commands: + # Ensure the 'overlay' module is loaded on your development system + sudo modprobe overlay + + # Enter the source directory cd sonic-buildimage # (Optional) Checkout a specific branch. By default, it uses master branch git checkout [branch_name] - # Execute make init once after cloning the repo, or fetched remote repo with submodule updates + # Execute make init once after cloning the repo, or after fetching remote repo with submodule updates make init # Execute make configure once to configure ASIC make configure PLATFORM=[ASIC_VENDOR] - # build debian stretch required targets (optional) + # Build Debian Stretch required targets (Manual execution optional; will also be executed as part of the build) BLDENV=stretch make stretch - # build SONiC image + # Build SONiC image make all **NOTE**: From 30c254fbc2a1dcf8c02239dc6f62759ffe6d9f72 Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Tue, 4 Sep 2018 22:33:50 -0700 Subject: [PATCH 09/57] [arista] Update swi building recipe (#2014) --- build_image.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/build_image.sh b/build_image.sh index 757ea026f16..d1f9c2241ae 100755 --- a/build_image.sh +++ b/build_image.sh @@ -95,7 +95,7 @@ elif [ "$IMAGE_TYPE" = "aboot" ]; then zip -g $ABOOT_BOOT_IMAGE .imagehash rm .imagehash echo "SWI_VERSION=42.0.0" > version - echo "SWI_MAX_HWEPOCH=1" >> version + echo "SWI_MAX_HWEPOCH=2" >> version echo "SWI_VARIANT=US" >> version zip -g $OUTPUT_ABOOT_IMAGE version zip -g $ABOOT_BOOT_IMAGE version From dc22ed076a7dbb78bdde37ecc95f11f4b7af9924 Mon Sep 17 00:00:00 2001 From: lguohan Date: Wed, 5 Sep 2018 10:08:48 -0700 Subject: [PATCH 10/57] [platform-common]: update sonic-platform-common (#2018) 6d8c940 [sff8472] Fix incorrect VendorOUI decode type. (#11) Signed-off-by: Guohan Lu --- src/sonic-platform-common | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-platform-common b/src/sonic-platform-common index 664d6cc37b1..6d8c9402a28 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit 664d6cc37b1404ce076bf1addb62e55f93240258 +Subproject commit 6d8c9402a286b1ddf37bcb605119b751e2b736f7 From d3c1423d084d5ccbc0d6b05c6fd42c26f15a53dc Mon Sep 17 00:00:00 2001 From: Pradchaya P Date: Thu, 6 Sep 2018 00:10:13 +0700 Subject: [PATCH 11/57] [platform/dx010] Fix issing qsfp_reset sysfs file (#2007) * Fix qsfp_reset file missing. * [platform/dx010] Add systemd unit for platform init. --- .../debian/platform-modules-dx010.init | 1 - .../debian/platform-modules-dx010.install | 1 + .../debian/platform-modules-dx010.postinst | 3 + .../dx010/modules/dx010_cpld.c | 59 ++++++++++++++++++- .../systemd/platform-modules-dx010.service | 14 +++++ 5 files changed, 75 insertions(+), 3 deletions(-) create mode 100644 platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst create mode 100644 platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init index f32785a798c..2117ab22b40 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init @@ -33,7 +33,6 @@ case "$1" in start) echo -n "Setting up board... " - depmod -a modprobe i2c-dev modprobe i2c-mux-pca954x modprobe dx010_wdt diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install index 329b584dc42..b25d47022b0 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install @@ -1,2 +1,3 @@ dx010/scripts/dx010_check_qsfp.sh usr/local/bin dx010/cfg/dx010-modules.conf etc/modules-load.d +dx010/systemd/platform-modules-dx010.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst new file mode 100644 index 00000000000..baff704171c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable platform-modules-dx010.service +systemctl start platform-modules-dx010.service diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c index ab0692faab7..397361a5edd 100644 --- a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c @@ -30,6 +30,13 @@ #define DRIVER_NAME "dx010_cpld" +#define RESET0108 0x250 +#define RESET0910 0x251 +#define RESET1118 0x2d0 +#define RESET1921 0x2d1 +#define RESET2229 0x3d0 +#define RESET3032 0x3d1 + #define LPMOD0108 0x252 #define LPMOD0910 0x253 #define LPMOD1118 0x2d2 @@ -51,6 +58,7 @@ #define INT2229 0x3d6 #define INT3032 0x3d7 + #define LENGTH_PORT_CPLD 34 #define PORT_BANK1_START 1 #define PORT_BANK1_END 10 @@ -106,6 +114,53 @@ struct dx010_cpld_data { struct dx010_cpld_data *cpld_data; +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long reset = 0; + + mutex_lock(&cpld_data->cpld_lock); + + reset = + (inb(RESET3032) & 0x07) << (24+5) | + inb(RESET2229) << (24-3) | + (inb(RESET1921) & 0x07) << (16 + 2) | + inb(RESET1118) << (16-6) | + (inb(RESET0910) & 0x03 ) << 8 | + inb(RESET0108); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%8.8lx\n", reset & 0xffffffff); +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long reset; + int err; + + mutex_lock(&cpld_data->cpld_lock); + + err = kstrtoul(buf, 16, &reset); + if (err) + { + mutex_unlock(&cpld_data->cpld_lock); + return err; + } + + outb( (reset >> 0) & 0xFF, RESET0108); + outb( (reset >> 8) & 0x03, RESET0910); + outb( (reset >> 10) & 0xFF, RESET1118); + outb( (reset >> 18) & 0x07, RESET1921); + outb( (reset >> 21) & 0xFF, RESET2229); + outb( (reset >> 29) & 0x07, RESET3032); + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) { @@ -193,11 +248,13 @@ static ssize_t get_modirq(struct device *dev, struct device_attribute *devattr, return sprintf(buf,"0x%8.8lx\n", irq & 0xffffffff); } +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset); static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); static DEVICE_ATTR(qsfp_modirq, S_IRUGO, get_modirq, NULL); static struct attribute *dx010_lpc_attrs[] = { + &dev_attr_qsfp_reset.attr, &dev_attr_qsfp_lpmode.attr, &dev_attr_qsfp_modprs.attr, &dev_attr_qsfp_modirq.attr, @@ -247,7 +304,6 @@ static int i2c_read_eeprom(struct i2c_adapter *a, u16 addr, short temp; short portid, opcode, devaddr, cmdbyte0, ssrr, writedata, readdata; __u16 word_data; - char read_byte; int error = -EIO; mutex_lock(&cpld_data->cpld_lock); @@ -465,7 +521,6 @@ static int cel_dx010_lpc_drv_probe(struct platform_device *pdev) static int cel_dx010_lpc_drv_remove(struct platform_device *pdev) { int portid_count; - struct dx010_i2c_data *new_data; sysfs_remove_group(&pdev->dev.kobj, &dx010_lpc_attr_grp); diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service b/platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service new file mode 100644 index 00000000000..32827dcf0de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service @@ -0,0 +1,14 @@ + +[Unit] +Description=Celestica Seastone dx010 platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-dx010 start +ExecStop=-/etc/init.d/platform-modules-dx010 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target \ No newline at end of file From be9f3ad7c1aabcb1aecfd8212b1acbee5c9581e0 Mon Sep 17 00:00:00 2001 From: lguohan Date: Wed, 5 Sep 2018 15:28:32 -0700 Subject: [PATCH 12/57] [build]: use vfs storage driver to build dockers (#2016) seen issues to build dockers using aufs in ubuntu 18.04 Immedidate dockers are exported to docker file and then imported into sonic image. Thus, whether using vfs or aufs as the storage driver does not matter for the immediate build. Signed-off-by: Guohan Lu --- slave.mk | 2 ++ sonic-slave/Dockerfile | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/slave.mk b/slave.mk index 4f1998680b2..c0e22726711 100644 --- a/slave.mk +++ b/slave.mk @@ -385,6 +385,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) : $(TARGET_PATH)/%.g $(HEADER) # Apply series of patches if exist if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && QUILT_PATCHES=../$(notdir $($*.gz_PATH)).patch quilt push -a; popd; fi + docker info $(LOG) docker build --squash --no-cache \ --build-arg http_proxy=$(HTTP_PROXY) \ --build-arg https_proxy=$(HTTPS_PROXY) \ @@ -416,6 +417,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .pl $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_whls=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_WHEELS)))\n" | awk '!a[$$0]++')) $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_dbgs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DBG_PACKAGES)))\n" | awk '!a[$$0]++')) j2 $($*.gz_PATH)/Dockerfile.j2 > $($*.gz_PATH)/Dockerfile + docker info $(LOG) docker build --squash --no-cache \ --build-arg http_proxy=$(HTTP_PROXY) \ --build-arg https_proxy=$(HTTPS_PROXY) \ diff --git a/sonic-slave/Dockerfile b/sonic-slave/Dockerfile index 961df459d00..32218b44d1d 100644 --- a/sonic-slave/Dockerfile +++ b/sonic-slave/Dockerfile @@ -298,4 +298,4 @@ RUN add-apt-repository \ stable" RUN apt-get update RUN apt-get install -y docker-ce=17.03.2~ce-0~debian-jessie -RUN echo "DOCKER_OPTS=\"--experimental\"" >> /etc/default/docker +RUN echo "DOCKER_OPTS=\"--experimental --storage-driver=vfs\"" >> /etc/default/docker From 48f3b6c008f517a183f0e949a5aab30703eee52e Mon Sep 17 00:00:00 2001 From: pavel-shirshov Date: Wed, 5 Sep 2018 18:45:48 -0700 Subject: [PATCH 13/57] [sonic-swss]: Update sonic-swss. vxlan enhancements (#2021) --- src/sonic-swss | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-swss b/src/sonic-swss index 58a644794a2..29722e115b0 160000 --- a/src/sonic-swss +++ b/src/sonic-swss @@ -1 +1 @@ -Subproject commit 58a644794a2650599e1102425f3903f56ff53835 +Subproject commit 29722e115b019678219ad284457663fa1c947ff5 From 6af462ac5336edb1d3103f2311afae326c4a07ba Mon Sep 17 00:00:00 2001 From: paavaanan Date: Fri, 7 Sep 2018 11:57:23 +0530 Subject: [PATCH 14/57] Dell platform modules for S6100/Z9100 is added with systemd support (#2026) --- .../debian/platform-modules-s6100.install | 2 +- .../debian/platform-modules-z9100.install | 1 + .../s6100/systemd/platform-modules-s6100.service | 14 ++++++++++++++ .../z9100/scripts/platform_sensors.py | 8 ++++---- .../z9100/systemd/platform-modules-z9100.service | 13 +++++++++++++ 5 files changed, 33 insertions(+), 5 deletions(-) create mode 100644 platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service create mode 100644 platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install index f456acb9d81..2e57c0a045e 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install @@ -6,4 +6,4 @@ common/fstrim.timer etc/systemd/system common/fstrim.service etc/systemd/system s6100/scripts/platform_sensors.py usr/local/bin s6100/scripts/sensors usr/bin - +s6100/systemd/platform-modules-s6100.service etc/systemd/system/multi-user.target.wants diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install index 66d24e98e89..8425d8fc7a0 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install @@ -6,3 +6,4 @@ common/fstrim.service etc/systemd/system z9100/scripts/platform_sensors.py usr/local/bin z9100/scripts/sensors usr/bin z9100/cfg/z9100-modules.conf etc/modules-load.d +z9100/systemd/platform-modules-z9100.service etc/systemd/system/multi-user.target.wants diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service b/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service new file mode 100644 index 00000000000..9b5805d5cbb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service @@ -0,0 +1,14 @@ +[Unit] +Description=Dell S6100 Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=/usr/local/bin/iom_power_on.sh +ExecStart=/usr/local/bin/s6100_platform.sh init +ExecStop=/usr/local/bin/s6100_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py index 763e6577228..1457537918f 100755 --- a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py @@ -16,7 +16,7 @@ Z9100_MAX_PSUS = 2 S6100_MAX_IOMS = 4 -MAILBOX_DIR = "/sys/devices/platform/SMF.512/hwmon/hwmon1" +MAILBOX_DIR = "/sys/devices/platform/SMF.512/hwmon/hwmon0" # Get a mailbox register @@ -42,10 +42,10 @@ def get_pmc_register(reg_name): logging.basicConfig(level=logging.DEBUG) if (os.path.isdir(MAILBOX_DIR)): - print 'dell-s6100-lpc' - print 'Adapter: S6100 Platform Management Controller' + print 'dell-z9100-lpc' + print 'Adapter: Z9100 Platform Management Controller' else: - logging.error('S6100 Platform Management Controller module not loaded !') + logging.error('Z9100 Platform Management Controller module not loaded !') # sys.exit(0) # Print the information for temperature sensors diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service b/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service new file mode 100644 index 00000000000..00fbfa6803e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell Z9100 Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/z9100_platform.sh init +ExecStop=/usr/local/bin/z9100_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target From 588da73a7d6ad8bb588b2201285d1d7dfa2a0285 Mon Sep 17 00:00:00 2001 From: lguohan Date: Fri, 7 Sep 2018 10:40:20 -0700 Subject: [PATCH 15/57] [kernel]: update sonic linux kernel submodule (#2027) * a910776 2018-09-07 | import upstream optoe chunk offset fix (#60) [lguohan] * 5b4c0aa 2018-09-04 | enable GPIO_ICH (#59) [klhaung] Signed-off-by: Guohan Lu --- src/sonic-linux-kernel | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index c87ebef623b..a910776f051 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit c87ebef623b60455edbdd71e33ac2c204b9e681d +Subproject commit a910776f051945689daa02c0e476576df560491a From 3f049d33bf2c9f792f4cebd5d24dd9010a3562c0 Mon Sep 17 00:00:00 2001 From: Jipan Yang Date: Fri, 7 Sep 2018 12:25:38 -0700 Subject: [PATCH 16/57] =?UTF-8?q?Warm=20reboot:=20Don't=20load=20json=20co?= =?UTF-8?q?nifg=20like=20copp,=20ininip,=20ports=20and=20switch=20again=20?= =?UTF-8?q?upon=E2=80=A6=20(#1939)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Don't load json conifg like copp, ininip, ports and switch again upon swss warm start Signed-off-by: Jipan Yang * double check DB data exists in case only swss warm restart is configured at system reboot Signed-off-by: Jipan Yang * Double check existence of db data before skipping json load, and format update Signed-off-by: Jipan Yang --- dockers/docker-orchagent/swssconfig.sh | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/dockers/docker-orchagent/swssconfig.sh b/dockers/docker-orchagent/swssconfig.sh index 850a4afd1ef..7188703d23e 100755 --- a/dockers/docker-orchagent/swssconfig.sh +++ b/dockers/docker-orchagent/swssconfig.sh @@ -41,6 +41,18 @@ fast_reboot HWSKU=`sonic-cfggen -d -v "DEVICE_METADATA['localhost']['hwsku']"` +# Don't load json config if system warm start or +# swss docker warm start is enabled, the data already exists in appDB. +SYSTEM_WARM_START=`redis-cli -n 4 hget "WARM_RESTART|system" enable` +SWSS_WARM_START=`redis-cli -n 4 hget "WARM_RESTART|swss" enable` +if [[ "$SYSTEM_WARM_START" == "true" ]] || [[ "$SWSS_WARM_START" == "true" ]]; then + # We have to make sure db data has not been flushed. + RESTART_COUNT=`redis-cli -n 6 hget "WARM_RESTART_TABLE|orchagent" restart_count` + if [[ -n "$RESTART_COUNT" ]] && [[ "$RESTART_COUNT" != "0" ]]; then + exit 0 + fi +fi + SWSSCONFIG_ARGS="00-copp.config.json ipinip.json ports.json switch.json " for file in $SWSSCONFIG_ARGS; do From 22edc3389645535cb8487addbe41d990c3ec6baa Mon Sep 17 00:00:00 2001 From: lguohan Date: Fri, 7 Sep 2018 12:59:10 -0700 Subject: [PATCH 17/57] [broadcom]: upgrade SAI to 3.1.3.5-8 (#2028) Fix get_fdb_entry_attribute bridge port ID [Shuotian Cheng] Signed-off-by: Guohan Lu --- platform/broadcom/sai.mk | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk index 1ae99439fda..72ff4bba1a2 100644 --- a/platform/broadcom/sai.mk +++ b/platform/broadcom/sai.mk @@ -1,9 +1,9 @@ -BRCM_SAI = libsaibcm_3.1.3.5-7_amd64.deb -$(BRCM_SAI)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm_3.1.3.5-7_amd64.deb?sv=2015-04-05&sr=b&sig=0FaCT4a%2B07%2FkMIqZQF8NKk3UQL%2BU5M9icfe23F6rThY%3D&se=2155-07-10T08%3A53%3A11Z&sp=r" +BRCM_SAI = libsaibcm_3.1.3.5-8_amd64.deb +$(BRCM_SAI)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm_3.1.3.5-8_amd64.deb?sv=2015-04-05&sr=b&sig=vM4LXDn4RIIxfK6lNL2mkEAnSPyaNgEH2QAfHSySMEg%3D&se=2155-07-31T18%3A43%3A06Z&sp=r" -BRCM_SAI_DEV = libsaibcm-dev_3.1.3.5-7_amd64.deb +BRCM_SAI_DEV = libsaibcm-dev_3.1.3.5-8_amd64.deb $(eval $(call add_derived_package,$(BRCM_SAI),$(BRCM_SAI_DEV))) -$(BRCM_SAI_DEV)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm-dev_3.1.3.5-7_amd64.deb?sv=2015-04-05&sr=b&sig=aTEosIZH90NExzK3opDzVFB%2FhWATEggoxKaTYudoR3I%3D&se=2155-07-10T08%3A53%3A39Z&sp=r" +$(BRCM_SAI_DEV)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm-dev_3.1.3.5-8_amd64.deb?sv=2015-04-05&sr=b&sig=ehMedaC6GDviSVEhsCygfLS%2FG9gijkBjZT2y5WxByls%3D&se=2155-07-31T18%3A36%3A17Z&sp=r" SONIC_ONLINE_DEBS += $(BRCM_SAI) $(BRCM_SAI_DEV) $(BRCM_SAI_DEV)_DEPENDS += $(BRCM_SAI) From c4154eb9a96070ca57881c386c02527dbbbaaf92 Mon Sep 17 00:00:00 2001 From: padmanarayana Date: Sun, 9 Sep 2018 00:13:19 -0700 Subject: [PATCH 18/57] [devices]: Add GPIO interrupt enable for Z9100/S6100 and transceiver-plug-inout-event for Z9100 (#2025) --- .../plugins/sfputil.py | 70 ++ .../common/dell_ich.c | 1042 +++++++++++++++++ .../sonic-platform-modules-dell/debian/rules | 8 +- .../s6100/modules/Makefile | 2 +- .../s6100/modules/dell_s6100_iom_cpld.c | 218 ++++ .../s6100/scripts/s6100_platform.sh | 24 + .../z9100/modules/Makefile | 2 +- .../z9100/modules/dell_z9100_cpld.c | 218 ++++ .../z9100/scripts/z9100_platform.sh | 24 + 9 files changed, 1604 insertions(+), 4 deletions(-) create mode 100644 platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py index 5609abe9b49..1524c1bc015 100644 --- a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py +++ b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py @@ -4,7 +4,10 @@ # try: + import os + import logging import time + import select from sonic_sfp.sfputilbase import SfpUtilBase except ImportError as e: raise ImportError("%s - required module not found" % str(e)) @@ -337,3 +340,70 @@ def reset(self, port_num): reg_file.close() return True + + def get_register(self, reg_file): + retval = 'ERR' + + if (not os.path.isfile(reg_file)): + print reg_file, 'not found !' + return retval + + try: + with open(reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + def get_transceiver_change_event(self, timeout=0): + epoll = select.epoll() + port_dict = {} + try: + # We get notified when there is an SCI interrupt from GPIO SUS6 + fd = open("/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6", "r") + epoll.register(fd.fileno(), select.EPOLLIN) + events = epoll.poll(timeout=timeout if timeout != 0 else -1) + if events: + # Read the QSFP ABS interrupt & status registers + cpld2_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int") + cpld2_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta") + cpld3_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int") + cpld3_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta") + cpld4_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int") + cpld4_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta") + + if (cpld2_abs_int == 'ERR' or cpld2_abs_sta == 'ERR' or \ + cpld3_abs_int == 'ERR' or cpld3_abs_sta == 'ERR' or \ + cpld4_abs_int == 'ERR' or cpld4_abs_sta == 'ERR' ): + return False, {} + + cpld2_abs_int = int(cpld2_abs_int, 16) + cpld2_abs_sta = int(cpld2_abs_sta, 16) + cpld3_abs_int = int(cpld3_abs_int, 16) + cpld3_abs_sta = int(cpld3_abs_sta, 16) + cpld4_abs_int = int(cpld4_abs_int, 16) + cpld4_abs_sta = int(cpld4_abs_sta, 16) + + # Make it contiguous (discard reserved bits) + interrupt_reg = (cpld2_abs_int & 0xfff) | ((cpld3_abs_int & 0x3ff) << 12) | ((cpld4_abs_int & 0x3ff) << 22) + status_reg = (cpld2_abs_sta & 0xfff) | ((cpld3_abs_sta & 0x3ff) << 12) | ((cpld4_abs_sta & 0x3ff) << 22) + + port=self.port_start + while port <= self.port_end: + if interrupt_reg & (1< optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + return True, port_dict + finally: + fd.close() + epoll.close() + + return False, {} diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c b/platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c new file mode 100644 index 00000000000..8bfe4295cb6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c @@ -0,0 +1,1042 @@ +/* Copyright (c) 2018 Dell Inc. + * dell_ich.c - ICH driver for Dell Avoton/Rangeley switches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "dell_ich" + +#define AVOTON_PCU_DEVICE_ID 0x1f38 + +// GPIO registers +// GPIO Core Control/Access Registers in I/O Space +#define GPIO_SC_USE_SEL 0x0 +#define GPIO_SC_IO_SEL 0x4 +#define GPIO_SC_GP_LVL 0x8 +#define GPIO_SC_TPE 0xC +#define GPIO_SC_TNE 0x10 +#define GPIO_SC_TS 0x14 + +// GPIO SUS Control/Access Registers in I/O Space +#define GPIO_SUS_USE_SEL 0x80 +#define GPIO_SUS_IO_SEL 0x84 +#define GPIO_SUS_GP_LVL 0x88 +#define GPIO_SUS_TPE 0x8C +#define GPIO_SUS_TNE 0x90 +#define GPIO_SUS_TS 0x94 +#define GPIO_SUS_WAKE_EN 0x98 + +static const unsigned char avoton_gpio_regs[] = { + GPIO_SC_USE_SEL, + GPIO_SC_IO_SEL, + GPIO_SC_GP_LVL, + GPIO_SC_TPE, + GPIO_SC_TNE, + GPIO_SC_TS, + GPIO_SUS_USE_SEL, + GPIO_SUS_IO_SEL, + GPIO_SUS_GP_LVL, + GPIO_SUS_TPE, + GPIO_SUS_TNE, + GPIO_SUS_TS, + GPIO_SUS_WAKE_EN +}; + +#define GPIO_REG_LEN 0x4 + +#define GPIOS0_EN (1 << 0) +#define GPIOS1_EN (1 << 1) +#define GPIOS2_EN (1 << 2) +#define GPIOS3_EN (1 << 3) +#define GPIOS4_EN (1 << 4) +#define GPIOS5_EN (1 << 5) +#define GPIOS6_EN (1 << 6) +#define GPIOS7_EN (1 << 7) + +#define GPIOSUS0_EN (1 << 0) +#define GPIOSUS1_EN (1 << 1) +#define GPIOSUS2_EN (1 << 2) +#define GPIOSUS3_EN (1 << 3) +// GPIOSUS4_EN : unused +// GPIOSUS5_EN : unused +#define GPIOSUS6_EN (1 << 6) +#define GPIOSUS7_EN (1 << 7) + + +// GPE0a_EN - General Purpose Event 0 Enables +#define GPIO_GPE0a_EN_SUS0 (1 << 16) +#define GPIO_GPE0a_EN_SUS1 (1 << 17) +#define GPIO_GPE0a_EN_SUS2 (1 << 18) +#define GPIO_GPE0a_EN_SUS3 (1 << 19) +// GPIO_GPE0a_EN_SUS4 : unused +// GPIO_GPE0a_EN_SUS5 : unused +#define GPIO_GPE0a_EN_SUS6 (1 << 22) +#define GPIO_GPE0a_EN_SUS7 (1 << 23) + +#define GPIO_GPE0a_EN_CORE0 (1 << 24) +#define GPIO_GPE0a_EN_CORE1 (1 << 25) +#define GPIO_GPE0a_EN_CORE2 (1 << 26) +#define GPIO_GPE0a_EN_CORE3 (1 << 27) +#define GPIO_GPE0a_EN_CORE4 (1 << 28) +#define GPIO_GPE0a_EN_CORE5 (1 << 29) +#define GPIO_GPE0a_EN_CORE6 (1 << 30) +#define GPIO_GPE0a_EN_CORE7 (1 << 31) + +// GPE0a_STS - General Purpose Event 0 Status +// We're interested in only SUS6 for now +#define GPIO_GPE0a_STS_SUS6 (1 << 22) + +// GPIO_ROUT - GPIO_ROUT Register +#define GPIO_ROUT_OFFSET_SUS0 0 +#define GPIO_ROUT_OFFSET_SUS1 2 +#define GPIO_ROUT_OFFSET_SUS2 4 +#define GPIO_ROUT_OFFSET_SUS3 6 +// GPIO_ROUT_OFFSET_SUS4 : unused +// GPIO_ROUT_OFFSET_SUS5 : unused +#define GPIO_ROUT_OFFSET_SUS6 12 +#define GPIO_ROUT_OFFSET_SUS7 14 + +#define GPIO_ROUT_OFFSET_CORE0 16 +#define GPIO_ROUT_OFFSET_CORE1 18 +#define GPIO_ROUT_OFFSET_CORE2 20 +#define GPIO_ROUT_OFFSET_CORE3 22 +#define GPIO_ROUT_OFFSET_CORE4 24 +#define GPIO_ROUT_OFFSET_CORE5 26 +#define GPIO_ROUT_OFFSET_CORE6 28 +#define GPIO_ROUT_OFFSET_CORE7 30 + +enum GPIO_ROUT { + GPIO_NO_EFFECT = 0, + GPIO_SMI, + GPIO_SCI, + GPIO_RESERVED +}; + +/* + * GPIO resources + * defined as in drivers/gpio/gpio-ich.c + */ +#define ICH_RES_GPIO 0 +#define ICH_RES_GPE0 1 +static struct resource gpio_ich_res[] = { + /* GPIO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - GPE0 */ + { + .flags = IORESOURCE_IO, + }, +}; + +// ACPI registers +#define ACPI_GPE0a_STS 0x20 +#define ACPI_GPE0a_EN 0x28 + +// PMC registers +#define PMC_GPIO_ROUT 0x58 +#define PMC_REG_LEN 0x4 + +// lpc_ich_priv is derived from drivers/mfd/lpc_ich.c +struct lpc_ich_priv { + int chipset; + + int abase; /* ACPI base */ + int actrl_pbase; /* ACPI control or PMC base */ + int gbase; /* GPIO base */ + int gctrl; /* GPIO control */ + + int abase_save; /* Cached ACPI base value */ + int actrl_pbase_save; /* Cached ACPI control or PMC base value */ + int gctrl_save; /* Cached GPIO control value */ +}; + +#define ICH_RES_MEM_GCS_PMC 0 + +#define IO_REG_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define IO_REG_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct resource pmc_res = {.flags = IORESOURCE_MEM,}; + +static struct kobject *dell_kobj; +static unsigned short force_id; +module_param(force_id, ushort, 0); + +#define SMF_REG_ADDR 0x200 +#define SIO_REG_DEVID 0x1 +#define SIO_Z9100_ID 0x1 +#define SIO_S6100_ID 0x2 +#define SIO_S4200_ID 0x3 +#define SIO_S5148_ID 0x4 + +enum kinds { + z9100smf, s6100smf +}; + +struct dell_ich_data { + enum kinds kind; + struct resource *gpio_base, *acpi_base, *pmc_base; + int gpio_alloc,pmc_alloc; + unsigned int int_gpio_sus6_count; +}; + +// GPIO sysfs attributes + +static ssize_t get_sc_use_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_USE_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_use_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_USE_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_io_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_IO_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_io_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_IO_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_lvl(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_GP_LVL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_lvl(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_GP_LVL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_tpe(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TPE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_tpe(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TPE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_tne(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TNE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_tne(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TNE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_ts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TS,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_ts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TS,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_use_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_USE_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_use_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_USE_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_io_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_IO_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_io_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_IO_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_lvl(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_GP_LVL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_lvl(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_GP_LVL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_tpe(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TPE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_tpe(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TPE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_tne(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TNE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_tne(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TNE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_ts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TS,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_ts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TS,ich_data->gpio_base); + + return count; +} + +static DEVICE_ATTR(sc_use_sel, S_IRUGO | S_IWUSR, get_sc_use_sel, set_sc_use_sel); +static DEVICE_ATTR(sc_io_sel, S_IRUGO | S_IWUSR, get_sc_io_sel, set_sc_io_sel); +static DEVICE_ATTR(sc_gp_lvl, S_IRUGO | S_IWUSR, get_sc_gp_lvl, set_sc_gp_lvl); +static DEVICE_ATTR(sc_gp_tpe, S_IRUGO | S_IWUSR, get_sc_gp_tpe, set_sc_gp_tpe); +static DEVICE_ATTR(sc_gp_tne, S_IRUGO | S_IWUSR, get_sc_gp_tne, set_sc_gp_tne); +static DEVICE_ATTR(sc_gp_ts, S_IRUGO | S_IWUSR, get_sc_gp_ts, set_sc_gp_ts); +static DEVICE_ATTR(sus_use_sel, S_IRUGO | S_IWUSR, get_sus_use_sel,set_sus_use_sel); +static DEVICE_ATTR(sus_io_sel, S_IRUGO | S_IWUSR, get_sus_io_sel, set_sus_io_sel); +static DEVICE_ATTR(sus_gp_lvl, S_IRUGO | S_IWUSR, get_sus_gp_lvl, set_sus_gp_lvl); +static DEVICE_ATTR(sus_gp_tpe, S_IRUGO | S_IWUSR, get_sus_gp_tpe, set_sus_gp_tpe); +static DEVICE_ATTR(sus_gp_tne, S_IRUGO | S_IWUSR, get_sus_gp_tne, set_sus_gp_tne); +static DEVICE_ATTR(sus_gp_ts, S_IRUGO | S_IWUSR, get_sus_gp_ts, set_sus_gp_ts); + +static struct attribute *gpio_attrs[] = { + &dev_attr_sc_use_sel.attr, + &dev_attr_sc_io_sel.attr, + &dev_attr_sc_gp_lvl.attr, + &dev_attr_sc_gp_tpe.attr, + &dev_attr_sc_gp_tne.attr, + &dev_attr_sc_gp_ts.attr, + &dev_attr_sus_use_sel.attr, + &dev_attr_sus_io_sel.attr, + &dev_attr_sus_gp_lvl.attr, + &dev_attr_sus_gp_tpe.attr, + &dev_attr_sus_gp_tne.attr, + &dev_attr_sus_gp_ts.attr, + NULL, +}; + +static struct attribute_group gpio_attrs_group= { + .attrs = gpio_attrs, +}; + +// ACPI sysfs attributes + +static ssize_t get_gpe0a_sts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(ACPI_GPE0a_STS,ich_data->acpi_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_gpe0a_sts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,ACPI_GPE0a_STS,ich_data->acpi_base); + + return count; +} + +static ssize_t get_gpe0a_en(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(ACPI_GPE0a_EN,ich_data->acpi_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_gpe0a_en(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,ACPI_GPE0a_EN,ich_data->acpi_base); + + return count; +} + +static DEVICE_ATTR(gpe0a_sts, S_IRUGO | S_IWUSR, get_gpe0a_sts, set_gpe0a_sts); +static DEVICE_ATTR(gpe0a_en, S_IRUGO | S_IWUSR, get_gpe0a_en, set_gpe0a_en); + +static struct attribute *acpi_attrs[] = { + &dev_attr_gpe0a_sts.attr, + &dev_attr_gpe0a_en.attr, + NULL, +}; + +static struct attribute_group acpi_attrs_group= { + .attrs = acpi_attrs, +}; + +static ssize_t get_gpio_rout(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = readl(ich_data->pmc_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +// PMC sysfs attributes + +static ssize_t set_gpio_rout(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + writel(devdata,ich_data->pmc_base); + + return count; +} + +static DEVICE_ATTR(gpio_rout, S_IRUGO | S_IWUSR, get_gpio_rout, set_gpio_rout); + +static struct attribute *pmc_attrs[] = { + &dev_attr_gpio_rout.attr, + NULL, +}; + +static struct attribute_group pmc_attrs_group= { + .attrs = pmc_attrs, +}; + +// SCI interrupt sysfs attributes + +static ssize_t get_sci_int_gpio_sus6(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = ich_data->int_gpio_sus6_count; + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sci_int_gpio_sus6(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + ich_data->int_gpio_sus6_count = devdata; + + return count; +} + +static DEVICE_ATTR(sci_int_gpio_sus6, S_IRUGO | S_IWUSR, get_sci_int_gpio_sus6, set_sci_int_gpio_sus6); + +static struct attribute *sci_attrs[] = { + &dev_attr_sci_int_gpio_sus6.attr, + NULL, +}; + +static struct attribute_group sci_attrs_group= { + .attrs = sci_attrs, +}; + +static u32 dell_ich_sci_handler(void *context) +{ + unsigned int data; + struct device *dev = (struct device *)context; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!dev) return ACPI_INTERRUPT_NOT_HANDLED; + + ich_data = dev_get_platdata(dev); + if(!ich_data) return ACPI_INTERRUPT_NOT_HANDLED; + + data=IO_REG_READ(ACPI_GPE0a_STS,ich_data->acpi_base); + if(data & GPIO_GPE0a_STS_SUS6) { + // Clear the SUS6 status + IO_REG_WRITE(data,ACPI_GPE0a_STS,ich_data->acpi_base); + ich_data->int_gpio_sus6_count++; + // and notify the user space clients + sysfs_notify(&dev->kobj, NULL, "sci_int_gpio_sus6"); + return ACPI_INTERRUPT_HANDLED; + } + + return ACPI_INTERRUPT_NOT_HANDLED; +} + +/* + * Setup GPIO SUS6 to generate an SCI interrupt for optics detection + * This can be alternatively be setup using sysfs + */ +int setup_gpio_sus6_sci_interrupt(struct device *dev) +{ + int ret=0; + unsigned int data; + struct resource *acpi_base, *pmc_base, *gpio_base; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + gpio_base = ich_data->gpio_base; + acpi_base = ich_data->acpi_base; + pmc_base = ich_data->pmc_base; + + // Enable GPIOSUS6_EN + data = IO_REG_READ(GPIO_SUS_USE_SEL,gpio_base); + data |= GPIOSUS6_EN; + IO_REG_WRITE(data,GPIO_SUS_USE_SEL,gpio_base); + + // GPIOSUS6_EN is input + data = IO_REG_READ(GPIO_SUS_IO_SEL,gpio_base); + data |= GPIOSUS6_EN; + IO_REG_WRITE(data,GPIO_SUS_IO_SEL,gpio_base); + + // Trigger on positive edge for GPIOSUS6_EN + data = IO_REG_READ(GPIO_SUS_TPE,gpio_base); + data |= GPIOSUS6_EN; + IO_REG_WRITE(data,GPIO_SUS_TPE,gpio_base); + + // Enable GPE for SUS6 to generate an SCI + data=IO_REG_READ(ACPI_GPE0a_EN,acpi_base); + data|=GPIO_GPE0a_EN_SUS6; + IO_REG_WRITE(data,ACPI_GPE0a_EN,acpi_base); + + data=readl(pmc_base); + data=(data & ~(0x3 << GPIO_ROUT_OFFSET_SUS6)) | (GPIO_SCI << GPIO_ROUT_OFFSET_SUS6); + writel(data,pmc_base); + + ret = acpi_install_sci_handler(dell_ich_sci_handler,(void*)dev); + if(ret) { + pr_info("dell_ich acpi_install_sci_handler failed %d\n",ret); + return ret; + } + + return ret; +} + +static int dell_ich_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + struct pci_dev *lpc_ich_dev; + struct lpc_ich_priv *priv; + struct resource *res; + unsigned int base_addr_cfg, base_addr; + int ret,i; + + // Get the PCU device + lpc_ich_dev=pci_get_device(PCI_VENDOR_ID_INTEL,AVOTON_PCU_DEVICE_ID,NULL); + priv=(struct lpc_ich_priv*) pci_get_drvdata(lpc_ich_dev); + if(!priv) { + pr_info("dell_ich: Unable to retrieve private data\n"); + return -ENODEV; + } + + // Retrieve the GPIO Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->gbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + pr_info("dell_ich I/O space for GPIO uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &gpio_ich_res[ICH_RES_GPIO]; + res->start = base_addr; + res->end = res->start + 0x9c - 1; + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("dell_ich gpio resource conflict ret %d\n",ret); + } + + ich_data->gpio_base=res; + // Request regions for GPIO registers + for(i=0; istart+avoton_gpio_regs[i],GPIO_REG_LEN, "dell_ich_gpio")) { + pr_info("dell_ich: request_region failed for GPIO : %x\n",(unsigned int) res->start+avoton_gpio_regs[i]); + ret = -EBUSY; + goto probe_err; + } + ich_data->gpio_alloc |= (1<kobj, &gpio_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for GPIO %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + // Retrieve the ACPI Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + pr_info("dell_ich I/O space for ACPI uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &gpio_ich_res[ICH_RES_GPE0]; + res->start = base_addr; + res->end = base_addr + 0x40; + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("dell_ich acpi resource conflict ret %d\n",ret); + } + + // ACPI region is requested by pnp 00:01/ACPI GPE0_BLK + ich_data->acpi_base=res; + + /* Register sysfs hooks for ACPI */ + ret = sysfs_create_group(&dev->kobj, &acpi_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for ACPI %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + // Retrieve the PMC Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->actrl_pbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0xfffffe00; + pr_info("dell_ich base_addr_cfg %x base_addr %x\n",(int)base_addr_cfg,(int)base_addr); + if (!base_addr) { + pr_info("dell_ich PMC space for GPIO uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &pmc_res; + res->start = base_addr + PMC_GPIO_ROUT; + res->end = base_addr + PMC_GPIO_ROUT + PMC_REG_LEN - 1; + pr_info("dell_ich pmc res_start:end %x:%x\n",(int)res->start,(int)res->end); + + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("dell_ich acpi resource conflict ret %d\n",ret); + } + + if (!request_mem_region(res->start,resource_size(res),"dell_ich_pmc")) { + pr_info("dell_ich pmc request_region failed\n"); + ret = -EBUSY; + goto probe_err; + } else { + ich_data->pmc_alloc=1; + } + + ich_data->pmc_base = ioremap(res->start, resource_size(res)); + if(!ich_data->pmc_base) { + pr_info("dell_ich pmc ioremap failed\n"); + ret = -ENOMEM; + goto probe_err; + } + + /* Register sysfs hooks for pmc */ + ret = sysfs_create_group(&dev->kobj, &pmc_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for PMC %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + /* Register sysfs hooks for SCI interrupts*/ + ret = sysfs_create_group(&dev->kobj, &sci_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for SCI %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + if((ich_data->kind == z9100smf) || (ich_data->kind == s6100smf)) { + ret = setup_gpio_sus6_sci_interrupt(dev); + if (ret) { + pr_info("dell_ich unable to setup SCI interrupt %d\n",ret); + goto probe_err; + } + } + + return 0; + +probe_err: + pr_info("dell_ich dell_ich_probe failed with : %d\n",ret); + return ret; +} + +static int dell_ich_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + int i,ret; + + // Release GPIO regions + for(i=0; igpio_alloc & (1<gpio_base->start+avoton_gpio_regs[i], GPIO_REG_LEN); + } + } + + // Unmap and release PMC regions + if(ich_data->pmc_base) iounmap(ich_data->pmc_base); + if(ich_data->pmc_alloc) release_region(pmc_res.start, PMC_REG_LEN); + + ret = acpi_remove_sci_handler(dell_ich_sci_handler); + if(ret) { + pr_info("dell_ich acpi_remove_sci_handler failed %d\n",ret); + return ret; + } + + pr_info("dell_ich : dell_ich_remove done.\n"); + + return 0; +} + +static struct platform_driver dell_ich_driver= { + .driver = { + .name = DRV_NAME, + }, + .probe = dell_ich_probe, + .remove = dell_ich_remove, +}; + +int __init +init_ich_data(int smf_address, struct dell_ich_data *ich_data) +{ + int val; + + memset(ich_data, 0, sizeof(struct dell_ich_data)); + + if (force_id) + val = force_id; + else + val = inb(smf_address + SIO_REG_DEVID); + + switch (val) { + case SIO_Z9100_ID: + ich_data->kind = z9100smf; + break; + case SIO_S6100_ID: + ich_data->kind = s6100smf; + break; + default: + if (val != 0xffff) + pr_debug("unsupported chip ID: 0x%04x\n", val); + return -ENODEV; + } + + pr_info("dell_ich: found SMF for ID %#x\n", ich_data->kind); + + return (0); +} + +static struct platform_device *pdev; + +static int __init dell_ich_init(void) +{ + int err; + struct dell_ich_data ich_data; + + if (init_ich_data(SMF_REG_ADDR, &ich_data)) + return -ENODEV; + + err = platform_driver_register(&dell_ich_driver); + if (err) + goto exit; + + pdev = platform_device_alloc(DRV_NAME, 0); + if (!pdev) { + err = -ENOMEM; + pr_err("dell_ich: Device allocation failed\n"); + goto exit_unregister; + } + + err = platform_device_add_data(pdev, &ich_data, + sizeof(struct dell_ich_data)); + if (err) { + pr_err("dell_ich: Platform data allocation failed\n"); + goto exit_device_put; + } + + /* platform_device_add calls probe() */ + err = platform_device_add(pdev); + if (err) { + pr_err("dell_ich: Device addition failed (%d)\n", err); + goto exit_device_put; + } + + return 0; + +exit_device_put: + platform_device_put(pdev); +exit_unregister: + platform_driver_unregister(&dell_ich_driver); +exit: + pr_err("dell_ich: dell_ich_init failed (%d)\n", err); + return err; +} + +static void __exit dell_ich_exit(void) +{ + platform_device_unregister(pdev); + platform_driver_unregister(&dell_ich_driver); + + /*Remove sysfs dell_kobj*/ + kobject_put(dell_kobj); +} + +MODULE_AUTHOR("Padmanabhan Narayanan"); +MODULE_DESCRIPTION("ICH driver for Dell Avoton/Rangeley switches"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); +MODULE_PARM_DESC(force_id, "Override the detected device ID"); + +module_init(dell_ich_init); +module_exit(dell_ich_exit); diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/rules b/platform/broadcom/sonic-platform-modules-dell/debian/rules index 3386580a80a..860e46bf700 100755 --- a/platform/broadcom/sonic-platform-modules-dell/debian/rules +++ b/platform/broadcom/sonic-platform-modules-dell/debian/rules @@ -14,9 +14,11 @@ COMMON_DIR := common override_dh_auto_build: (for mod in $(MODULE_DIRS); do \ if [ $$mod = "s6100" ]; then \ - cp $(COMMON_DIR)/*.c $(MOD_SRC_DIR)/$${mod}/modules/dell_s6100_lpc.c; \ + cp $(COMMON_DIR)/dell_pmc.c $(MOD_SRC_DIR)/$${mod}/modules/dell_s6100_lpc.c; \ + cp $(COMMON_DIR)/dell_ich.c $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ elif [ $$mod = "z9100" ]; then \ - cp $(COMMON_DIR)/*.c $(MOD_SRC_DIR)/$${mod}/modules/dell_mailbox.c; \ + cp $(COMMON_DIR)/dell_pmc.c $(MOD_SRC_DIR)/$${mod}/modules/dell_mailbox.c; \ + cp $(COMMON_DIR)/dell_ich.c $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ fi; \ echo "making man page alias $$mod -> $$mod APIs";\ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ @@ -37,8 +39,10 @@ override_dh_clean: (for mod in $(MODULE_DIRS); do \ if [ $$mod = "s6100" ]; then \ rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_s6100_lpc.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ elif [ $$mod = "z9100" ]; then \ rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_mailbox.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ fi; \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ done) diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile index 0cdfbf5e67b..63242a5cf12 100644 --- a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile @@ -1,2 +1,2 @@ -obj-m := dell_s6100_iom_cpld.o dell_s6100_lpc.o +obj-m := dell_s6100_iom_cpld.o dell_s6100_lpc.o dell_ich.o diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c index 6cc28f707a1..7b9cf77a448 100644 --- a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c @@ -26,6 +26,21 @@ #define QSFP_MOD_PRS_REG0 0x16 #define QSFP_MOD_PRS_REG1 0x17 +//qsfp interrupt registers +#define QSFP_INT_STA_REG0 0x14 +#define QSFP_INT_STA_REG1 0x15 +#define QSFP_ABS_STA_REG0 0x16 +#define QSFP_ABS_STA_REG1 0x17 +#define QSFP_TRIG_MOD 0x20 +#define QSFP_INT_COMBINE 0x21 +#define QSFP_INT0 0x22 +#define QSFP_INT1 0x23 +#define QSFP_ABS_INT0 0x24 +#define QSFP_ABS_INT1 0x25 +#define QSFP_INT_MASK0 0x26 +#define QSFP_INT_MASK1 0x27 +#define QSFP_ABS_MASK0 0x28 +#define QSFP_ABS_MASK1 0x29 struct cpld_data { struct i2c_client *client; @@ -182,16 +197,219 @@ static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, c return count; } +static ssize_t get_int_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_trig_mod(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_TRIG_MOD); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t set_trig_mod(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_TRIG_MOD,(u8)(devdata & 0xff)); + + return count; +} + +static ssize_t get_int_combine(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_COMBINE); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t get_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_int_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_int_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK0,(u8)(devdata & 0xff)); + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_abs_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_abs_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK0,(u8)(devdata & 0xff)); + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + static DEVICE_ATTR(iom_cpld_vers,S_IRUGO,get_cpldver, NULL); static DEVICE_ATTR(qsfp_modprs, S_IRUGO,get_modprs, NULL); static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR,get_lpmode,set_lpmode); static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR,get_reset, set_reset); +static DEVICE_ATTR(qsfp_int_sta, S_IRUGO, get_int_sta, NULL); +static DEVICE_ATTR(qsfp_abs_sta, S_IRUGO, get_abs_sta, NULL); +static DEVICE_ATTR(qsfp_trig_mod, S_IRUGO | S_IWUSR, get_trig_mod, set_trig_mod); +static DEVICE_ATTR(qsfp_int_combine, S_IRUGO, get_int_combine, NULL); +static DEVICE_ATTR(qsfp_int, S_IRUGO, get_int, NULL); +static DEVICE_ATTR(qsfp_abs_int, S_IRUGO, get_abs_int, NULL); +static DEVICE_ATTR(qsfp_int_mask, S_IRUGO | S_IWUSR, get_int_mask, set_int_mask); +static DEVICE_ATTR(qsfp_abs_mask, S_IRUGO | S_IWUSR, get_abs_mask, set_abs_mask); static struct attribute *i2c_cpld_attrs[] = { &dev_attr_qsfp_lpmode.attr, &dev_attr_qsfp_reset.attr, &dev_attr_qsfp_modprs.attr, &dev_attr_iom_cpld_vers.attr, + &dev_attr_qsfp_int_sta.attr, + &dev_attr_qsfp_abs_sta.attr, + &dev_attr_qsfp_trig_mod.attr, + &dev_attr_qsfp_int_combine.attr, + &dev_attr_qsfp_int.attr, + &dev_attr_qsfp_abs_int.attr, + &dev_attr_qsfp_int_mask.attr, + &dev_attr_qsfp_abs_mask.attr, NULL, }; diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh index be143cb9efe..1d1e05f0425 100755 --- a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh @@ -171,11 +171,32 @@ switch_board_qsfp_lpmode() { echo $value > /sys/class/i2c-adapter/i2c-17/17-003e/qsfp_lpmode } +# Enable/Disable xcvr presence interrupts +xcvr_presence_interrupts() { + case $1 in + "enable") + for ((i=14;i<=17;i++)); + do + echo 0x0 > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + "disable") + for ((i=14;i<=17;i++)); + do + echo 0xffff > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + *) echo "s6100_platform: xcvr_presence_interrupts: invalid command !" + ;; + esac +} + init_devnum if [[ "$1" == "init" ]]; then modprobe i2c-dev modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe dell_ich modprobe dell_s6100_iom_cpld modprobe dell_s6100_lpc @@ -187,7 +208,9 @@ if [[ "$1" == "init" ]]; then switch_board_sfp "new_device" switch_board_qsfp "new_device" switch_board_qsfp_lpmode "disable" + xcvr_presence_interrupts "enable" elif [[ "$1" == "deinit" ]]; then + xcvr_presence_interrupts "disable" switch_board_sfp "delete_device" switch_board_cpld "delete_device" switch_board_mux "delete_device" @@ -200,6 +223,7 @@ elif [[ "$1" == "deinit" ]]; then modprobe -r dell_s6100_iom_cpld modprobe -r i2c-mux-pca954x modprobe -r i2c-dev + modprobe -r dell_ich else echo "s6100_platform : Invalid option !" fi diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile index 46da5beec39..24ef231b2a5 100644 --- a/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile @@ -1,2 +1,2 @@ -obj-m := dell_mailbox.o dell_z9100_cpld.o +obj-m := dell_mailbox.o dell_z9100_cpld.o dell_ich.o diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c index 01c3133354b..6198771ab45 100644 --- a/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c @@ -32,6 +32,21 @@ #define QSFP_MOD_PRS_REG0 0x16 #define QSFP_MOD_PRS_REG1 0x17 +//qsfp interrupt registers +#define QSFP_INT_STA_REG0 0x14 +#define QSFP_INT_STA_REG1 0x15 +#define QSFP_ABS_STA_REG0 0x16 +#define QSFP_ABS_STA_REG1 0x17 +#define QSFP_TRIG_MOD 0x20 +#define QSFP_INT_COMBINE 0x21 +#define QSFP_INT0 0x22 +#define QSFP_INT1 0x23 +#define QSFP_ABS_INT0 0x24 +#define QSFP_ABS_INT1 0x25 +#define QSFP_INT_MASK0 0x26 +#define QSFP_INT_MASK1 0x27 +#define QSFP_ABS_MASK0 0x28 +#define QSFP_ABS_MASK1 0x29 struct cpld_data { struct i2c_client *client; @@ -189,16 +204,219 @@ static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, c return count; } +static ssize_t get_int_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_trig_mod(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_TRIG_MOD); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t set_trig_mod(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_TRIG_MOD,(u8)(devdata & 0xff)); + + return count; +} + +static ssize_t get_int_combine(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_COMBINE); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t get_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_int_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_int_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_INT_MASK0,(u8)(devdata & 0xff)); + dell_z9100_iom_cpld_write(data,QSFP_INT_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_abs_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_abs_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_ABS_MASK0,(u8)(devdata & 0xff)); + dell_z9100_iom_cpld_write(data,QSFP_ABS_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + static DEVICE_ATTR(iom_cpld_vers,S_IRUGO,get_cpldver, NULL); static DEVICE_ATTR(qsfp_modprs, S_IRUGO,get_modprs, NULL); static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR,get_lpmode,set_lpmode); static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR,get_reset, set_reset); +static DEVICE_ATTR(qsfp_int_sta, S_IRUGO, get_int_sta, NULL); +static DEVICE_ATTR(qsfp_abs_sta, S_IRUGO, get_abs_sta, NULL); +static DEVICE_ATTR(qsfp_trig_mod, S_IRUGO | S_IWUSR, get_trig_mod, set_trig_mod); +static DEVICE_ATTR(qsfp_int_combine, S_IRUGO, get_int_combine, NULL); +static DEVICE_ATTR(qsfp_int, S_IRUGO, get_int, NULL); +static DEVICE_ATTR(qsfp_abs_int, S_IRUGO, get_abs_int, NULL); +static DEVICE_ATTR(qsfp_int_mask, S_IRUGO | S_IWUSR, get_int_mask, set_int_mask); +static DEVICE_ATTR(qsfp_abs_mask, S_IRUGO | S_IWUSR, get_abs_mask, set_abs_mask); static struct attribute *i2c_cpld_attrs[] = { &dev_attr_qsfp_lpmode.attr, &dev_attr_qsfp_reset.attr, &dev_attr_qsfp_modprs.attr, &dev_attr_iom_cpld_vers.attr, + &dev_attr_qsfp_int_sta.attr, + &dev_attr_qsfp_abs_sta.attr, + &dev_attr_qsfp_trig_mod.attr, + &dev_attr_qsfp_int_combine.attr, + &dev_attr_qsfp_int.attr, + &dev_attr_qsfp_abs_int.attr, + &dev_attr_qsfp_int_mask.attr, + &dev_attr_qsfp_abs_mask.attr, NULL, }; diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh index 6b62144eeda..e264ff6ce64 100755 --- a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh @@ -136,11 +136,32 @@ switch_board_qsfp() { esac } +# Enable/Disable xcvr presence interrupts +xcvr_presence_interrupts() { + case $1 in + "enable") + for ((i=14;i<=16;i++)); + do + echo 0x0 > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + "disable") + for ((i=14;i<=16;i++)); + do + echo 0xffff > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + *) echo "z9100_platform: xcvr_presence_interrupts: invalid command !" + ;; + esac +} + init_devnum if [[ "$1" == "init" ]]; then modprobe i2c-dev modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe dell_ich modprobe dell_mailbox modprobe dell_z9100_cpld @@ -151,7 +172,9 @@ if [[ "$1" == "init" ]]; then switch_board_qsfp_mux "new_device" switch_board_sfp "new_device" switch_board_qsfp "new_device" + xcvr_presence_interrupts "enable" elif [[ "$1" == "deinit" ]]; then + xcvr_presence_interrupts "disable" switch_board_sfp "delete_device" switch_board_cpld "delete_device" switch_board_mux "delete_device" @@ -164,6 +187,7 @@ elif [[ "$1" == "deinit" ]]; then modprobe -r dell_mailbox modprobe -r i2c-mux-pca954x modprobe -r i2c-dev + modprobe -r dell_ich else echo "z9100_platform : Invalid option !" fi From 2d43385927fe4ee43a56b21a573b43fc67575ef2 Mon Sep 17 00:00:00 2001 From: ironjosh Date: Tue, 11 Sep 2018 18:15:19 +0800 Subject: [PATCH 19/57] [baseimage] set default locale en_US.UTF-8 (#1988) * [baseimage] set default locale en_US.UTF-8 Signed-off-by: chenhu * [baseimage]set default locale to en_US.UTF-8, clean all other unused * [baseimage] update-locale after locale-gen * correct update-locale command line Signed-off-by: Guohan Lu --- build_debian.sh | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/build_debian.sh b/build_debian.sh index e893b9df403..78f40cc20c3 100755 --- a/build_debian.sh +++ b/build_debian.sh @@ -227,7 +227,14 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in hping3 \ python-scapy \ tcptraceroute \ - mtr-tiny + mtr-tiny \ + locales + +#Adds a locale to a debian system in non-interactive mode +sudo sed -i '/^#.* en_US.* /s/^#//' $FILESYSTEM_ROOT/etc/locale.gen && \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT locale-gen "en_US.UTF-8" +sudo LANG=en_US.UTF-8 DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT update-locale "LANG=en_US.UTF-8" +sudo LANG=C chroot $FILESYSTEM_ROOT bash -c "find /usr/share/i18n/locales/ ! -name 'en_US' -type f -exec rm -f {} +" # Install certain fundamental packages from stretch-backports in order to get # more up-to-date (but potentially less stable) versions From a06d28eaa09c20660f9618bbd0059f2089fee2a9 Mon Sep 17 00:00:00 2001 From: Shuotian Cheng Date: Tue, 11 Sep 2018 14:57:13 -0700 Subject: [PATCH 20/57] [common]: Update sonic-swss-common submodule (#2033) Signed-off-by: Shu0T1an ChenG --- src/sonic-swss-common | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-swss-common b/src/sonic-swss-common index 90855e07dff..23dc1b13982 160000 --- a/src/sonic-swss-common +++ b/src/sonic-swss-common @@ -1 +1 @@ -Subproject commit 90855e07dffa996d6f0ece6d728c41dbc4f83e60 +Subproject commit 23dc1b139823efa385be4c7a51de52f085572b77 From 860de856a83897f63933a570384ef7494ecbeca1 Mon Sep 17 00:00:00 2001 From: lguohan Date: Tue, 11 Sep 2018 14:57:29 -0700 Subject: [PATCH 21/57] [rsyslog]: use # to separate container name and program name in syslog message for syncd containers (#2031) previous commit f3ca7c422fc432e36a9c8653195b29fa04061cc6 missed syncd containers Signed-off-by: Guohan Lu --- platform/broadcom/docker-syncd-brcm/Dockerfile.j2 | 2 +- platform/cavium/docker-syncd-cavm/Dockerfile.j2 | 2 +- platform/centec/docker-syncd-centec/Dockerfile.j2 | 2 +- platform/marvell/docker-syncd-mrvl/Dockerfile.j2 | 2 +- platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 | 2 +- platform/nephos/docker-syncd-nephos/Dockerfile.j2 | 2 +- platform/p4/docker-sonic-p4/Dockerfile.j2 | 2 +- platform/vs/docker-sonic-vs/Dockerfile.j2 | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 index 8fab6c032b1..78c296d96d9 100755 --- a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/cavium/docker-syncd-cavm/Dockerfile.j2 b/platform/cavium/docker-syncd-cavm/Dockerfile.j2 index 9f6e872ff1e..5594c8e576b 100755 --- a/platform/cavium/docker-syncd-cavm/Dockerfile.j2 +++ b/platform/cavium/docker-syncd-cavm/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/centec/docker-syncd-centec/Dockerfile.j2 b/platform/centec/docker-syncd-centec/Dockerfile.j2 index 7fa2bd2ae0e..d5b9bc73eec 100755 --- a/platform/centec/docker-syncd-centec/Dockerfile.j2 +++ b/platform/centec/docker-syncd-centec/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 index 6e7c34d644d..ca48db80879 100755 --- a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 +++ b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 index 73a16fac2a4..971602a212f 100755 --- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 +++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/nephos/docker-syncd-nephos/Dockerfile.j2 b/platform/nephos/docker-syncd-nephos/Dockerfile.j2 index b25272be1a0..1553e2786cf 100755 --- a/platform/nephos/docker-syncd-nephos/Dockerfile.j2 +++ b/platform/nephos/docker-syncd-nephos/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/p4/docker-sonic-p4/Dockerfile.j2 b/platform/p4/docker-sonic-p4/Dockerfile.j2 index 971d7a962ed..09849a7ae14 100644 --- a/platform/p4/docker-sonic-p4/Dockerfile.j2 +++ b/platform/p4/docker-sonic-p4/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2 index a7cccfd60a3..3210a6814a5 100644 --- a/platform/vs/docker-sonic-vs/Dockerfile.j2 +++ b/platform/vs/docker-sonic-vs/Dockerfile.j2 @@ -1,7 +1,7 @@ FROM docker-config-engine ARG docker_container_name -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name\/%syslogtag%/;" /etc/rsyslog.conf +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive From 5c6948a90e76b0ccee63685cbe8f57584397d837 Mon Sep 17 00:00:00 2001 From: Shuotian Cheng Date: Tue, 11 Sep 2018 18:07:46 -0700 Subject: [PATCH 22/57] [minigraph]: Add PORTCHANNEL_MEMBER configurations (#2034) Signed-off-by: Shu0T1an ChenG --- src/sonic-config-engine/minigraph.py | 8 +++++--- src/sonic-config-engine/tests/test_cfggen.py | 9 +++++++-- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index a990ec6a206..b5fa98bc98d 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -176,6 +176,7 @@ def parse_dpg(dpg, hname): pcintfs = child.find(str(QName(ns, "PortChannelInterfaces"))) pc_intfs = [] pcs = {} + pc_members = {} intfs_inpc = [] # List to hold all the LAG member interfaces for pcintf in pcintfs.findall(str(QName(ns, "PortChannel"))): pcintfname = pcintf.find(str(QName(ns, "Name"))).text @@ -185,6 +186,7 @@ def parse_dpg(dpg, hname): for i, member in enumerate(pcmbr_list): pcmbr_list[i] = port_alias_map.get(member, member) intfs_inpc.append(pcmbr_list[i]) + pc_members[pcintfname + KEY_SEPARATOR + pcmbr_list[i]] = {'NULL': 'NULL'} if pcintf.find(str(QName(ns, "Fallback"))) != None: pcs[pcintfname] = {'members': pcmbr_list, 'fallback': pcintf.find(str(QName(ns, "Fallback"))).text} else: @@ -280,7 +282,7 @@ def parse_dpg(dpg, hname): except: print >> sys.stderr, "Warning: Ignoring Control Plane ACL %s without type" % aclname - return intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, acls + return intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, pc_members, acls return None, None, None, None, None, None, None @@ -443,7 +445,7 @@ def parse_xml(filename, platform=None, port_config_file=None): port_alias_map.update(alias_map) for child in root: if child.tag == str(QName(ns, "DpgDec")): - (intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, acls) = parse_dpg(child, hostname) + (intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, pc_members, acls) = parse_dpg(child, hostname) elif child.tag == str(QName(ns, "CpgDec")): (bgp_sessions, bgp_asn, bgp_peers_with_range) = parse_cpg(child, hostname) elif child.tag == str(QName(ns, "PngDec")): @@ -543,7 +545,7 @@ def parse_xml(filename, platform=None, port_config_file=None): pc['admin_status'] = 'up' results['PORTCHANNEL'] = pcs - + results['PORTCHANNEL_MEMBER'] = pc_members for pc_intf in pc_intfs.keys(): # remove portchannels not in PORTCHANNEL dictionary diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py index a4f35021e1d..fbb8ca6b21a 100644 --- a/src/sonic-config-engine/tests/test_cfggen.py +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -93,7 +93,7 @@ def test_minigraph_everflow(self): self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '2.2.2.2'}}") def test_minigraph_interfaces(self): - argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v \'INTERFACE.keys()\'' + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "INTERFACE.keys()"' output = self.run_script(argument) self.assertEqual(output.strip(), "[('Ethernet0', '10.0.0.58/31'), ('Ethernet0', 'FC00::75/126')]") @@ -117,11 +117,16 @@ def test_minigraph_portchannels(self): output = self.run_script(argument) self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet4'], 'mtu': '9100'}}") - def test_minigraph_portchannels_more_member(self): + def test_minigraph_portchannel_with_more_member(self): argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v PORTCHANNEL' output = self.run_script(argument) self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet112', 'Ethernet116', 'Ethernet120', 'Ethernet124'], 'mtu': '9100'}}") + def test_minigraph_portchannel_members(self): + argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v "PORTCHANNEL_MEMBER.keys()"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "['PortChannel01|Ethernet112', 'PortChannel01|Ethernet124', 'PortChannel01|Ethernet116', 'PortChannel01|Ethernet120']") + def test_minigraph_portchannel_interfaces(self): argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORTCHANNEL_INTERFACE.keys()"' output = self.run_script(argument) From 47c9542c6391563c6d7ce19c6773fc76bd2fa803 Mon Sep 17 00:00:00 2001 From: Taoyu Li Date: Tue, 11 Sep 2018 21:26:51 -0700 Subject: [PATCH 23/57] Don't reuse init_cfg.json from old image during upgrade (#2036) --- files/image_config/updategraph/updategraph | 3 --- 1 file changed, 3 deletions(-) diff --git a/files/image_config/updategraph/updategraph b/files/image_config/updategraph/updategraph index 96827f09f97..5a0304aa24e 100755 --- a/files/image_config/updategraph/updategraph +++ b/files/image_config/updategraph/updategraph @@ -44,9 +44,6 @@ if [ -f /tmp/pending_config_migration ]; then if [ "$enabled" = "true" ]; then echo "Use minigraph.xml from old system..." cp /etc/sonic/old_config/minigraph.xml /etc/sonic/ - if [ -f /etc/sonic/old_config/init_cfg.json ]; then - cp /etc/sonic/old_config/init_cfg.json /etc/sonic/ - fi if [ -f /etc/sonic/old_config/snmp.yml ]; then cp /etc/sonic/old_config/snmp.yml /etc/sonic/ fi From 5d23a43c4c10c9d12fd54af60dce20b8abef5ed6 Mon Sep 17 00:00:00 2001 From: Ying Xie Date: Wed, 12 Sep 2018 00:23:00 -0700 Subject: [PATCH 24/57] [make file] add document for KEEP_SLAVE_ON with stretch builds (#2035) * [make file] add document for KEEP_SLAVE_ON with stretch builds Signed-off-by: Ying Xie * Update Makefile.work --- Makefile.work | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Makefile.work b/Makefile.work index 43a2a3669f0..fff349dc759 100644 --- a/Makefile.work +++ b/Makefile.work @@ -13,7 +13,17 @@ # * SONIC_ENABLE_SYNCD_RPC: Enables rpc-based syncd builds. # * USERNAME: Desired username -- default at rules/config # * PASSWORD: Desired password -- default at rules/config -# * KEEP_SLAVE_ON: Keeps slave container up after building-process concludes. +# * KEEP_SLAVE_ON: Keeps slave container up and active after building process concludes. +# * Note that rm=true is still set, so once user quits from the docker +# * session, the docker will be removed. +# * Please note that with current Stretch build structure, +# * user of KEEP_SLAVE_ON feature will have to be conscious +# * about which docker to stay inside after build is done. +# * - If user desires to stay inside Stretch docker, please issue +# * make KEEP_SLAVE_ON=yes stretch +# * - If user desires to stay inside Jessie docker, please issue +# * (a successful "make stretch" may be needed before the following command) +# * make NOSTRETCH=1 KEEP_SLAVE_ON=yes # * SOURCE_FOLDER: host path to be mount as /var/$(USER)/src, only effective when KEEP_SLAVE_ON=yes # * SONIC_BUILD_JOBS: Specifying number of concurrent build job(s) to run # * KERNEL_PROCURE_METHOD: Specifying method of obtaining kernel Debian package: download or build From ac7e06debd2581676202d5fc12eefc58f22fae63 Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Thu, 13 Sep 2018 00:40:29 +0800 Subject: [PATCH 25/57] [devices]: add stubs for new API in SfpUtilBase for all devices (#2038) --- .../x86_64-accton_as5712_54x-r0/plugins/sfputil.py | 10 +++++++++- .../x86_64-accton_as7116_54x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-accton_as7212_54x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-accton_as7312_54x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-accton_as7312_54xs-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-accton_as7326_56x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-accton_as7512_32x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-accton_as7712_32x-r0/plugins/sfputil.py | 8 +++++++- .../x86_64-accton_as7716_32x-r0/plugins/sfputil.py | 10 +++++++++- .../x86_64-accton_as7716_32xb-r0/plugins/sfputil.py | 8 +++++++- .../x86_64-accton_as7816_64x-r0/plugins/sfputil.py | 8 +++++++- .../x86_64-centec_e582_48x6q-r0/plugins/sfputil.py | 8 ++++++++ .../dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py | 8 ++++++++ .../dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py | 8 ++++++++ device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py | 8 ++++++++ .../delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py | 8 ++++++++ device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-delta_et-6248brb-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s9100-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-inventec_d7032q28b-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-inventec_d7054q28b-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-inventec_d7264q28b-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py | 8 ++++++++ .../x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py | 8 ++++++++ device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py | 8 ++++++++ 35 files changed, 279 insertions(+), 5 deletions(-) diff --git a/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py index c30ba62c51b..9eee5b99fbd 100755 --- a/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py @@ -225,4 +225,12 @@ def reset(self, port_num): reg_file.write(reg_value) reg_file.close() - return True \ No newline at end of file + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py index 8abcd46ccb5..435dda79cc2 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py @@ -148,3 +148,11 @@ def qsfp_ports(self): @property def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py index 925c6cb0d73..fa706867a58 100755 --- a/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py @@ -125,3 +125,11 @@ def qsfp_ports(self): @property def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py index 956b6b352f9..aa889a3c4e4 100644 --- a/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py @@ -213,3 +213,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py index 956b6b352f9..aa889a3c4e4 100644 --- a/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py @@ -213,3 +213,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py index a09dd0d7c7b..4844d220158 100644 --- a/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py @@ -201,3 +201,11 @@ def set_low_power_mode(self, port_num, lpmode): def reset(self, port_num): raise NotImplementedError + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py index f2e59d40334..ac89ddb1922 100644 --- a/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py @@ -70,3 +70,11 @@ def qsfp_ports(self): @property def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py index fd117ee3886..5d1346e9b93 100644 --- a/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py @@ -125,4 +125,10 @@ def qsfp_ports(self): def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping - + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py index 7a36db7cf45..98e1278ca7d 100755 --- a/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py @@ -131,4 +131,12 @@ def reset(self, port_num): reg_file.write(reg_value) reg_file.close() - return True \ No newline at end of file + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py index d57f10e016d..b582602fa9b 100755 --- a/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py @@ -135,4 +135,10 @@ def reset(self, port_num): (status, output) = commands.getstatusoutput (mod_rst_cmd) return True - \ No newline at end of file + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py index 26c2b37c672..e0d3c46ab3a 100644 --- a/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py @@ -152,4 +152,10 @@ def qsfp_ports(self): def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping - + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py index 7bb1ac0d419..2695957bd5e 100644 --- a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py @@ -158,3 +158,11 @@ def reset(self, port_num): return False + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py index 1f2b9e9f61e..9275c4c9b6f 100644 --- a/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py +++ b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py @@ -173,3 +173,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py index d6fbcbcf694..90dd63fe4c1 100644 --- a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py +++ b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py @@ -431,3 +431,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py index 84a5e153b30..cbd723717af 100644 --- a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py @@ -190,3 +190,11 @@ def reset(self, port_num): status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py index 70d658e4018..86497741425 100644 --- a/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py +++ b/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py @@ -201,3 +201,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py index dc5f8037f26..748e2b6643f 100644 --- a/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py +++ b/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py @@ -173,3 +173,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py index 708c50819b0..4b33dd8b090 100644 --- a/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py +++ b/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py @@ -173,3 +173,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py b/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py index ac2b84bcbca..84a3bfc3dac 100644 --- a/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py +++ b/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py @@ -86,3 +86,11 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py index bef254484ac..f146b0e442a 100644 --- a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py @@ -145,3 +145,11 @@ def reset(self, port_num): val_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py index 076ecff4d42..5c0f4362ace 100644 --- a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py @@ -277,3 +277,11 @@ def reset(self, port_num): val_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py index 78793beec69..26355bf441e 100644 --- a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py @@ -254,3 +254,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py index f4ffc29bebc..377f4109db1 100644 --- a/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py @@ -280,3 +280,11 @@ def reset(self, port_num): val_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py index 387c8155eef..fecb54bf087 100644 --- a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py @@ -185,3 +185,11 @@ def reset(self, port_num): gpio_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py index e0f85a98118..45be2a0e466 100644 --- a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py @@ -288,3 +288,11 @@ def reset(self, port_num): val_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py index 4d5651c63a6..584b0e9716b 100644 --- a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py @@ -258,3 +258,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py index 70e5ebff403..57fd620bc41 100644 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py @@ -291,3 +291,11 @@ def reset(self, port_num): return True + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py index d9ef84c331c..57edb81cd10 100644 --- a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py @@ -298,3 +298,11 @@ def reset(self, port_num): return True + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py index 599c8dbd959..d109f49f2e7 100644 --- a/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py @@ -177,3 +177,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py index c2edefd2eb7..5dffdd0335b 100755 --- a/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py @@ -207,3 +207,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py index aa551932dc7..6f23ad01bd2 100755 --- a/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py @@ -217,3 +217,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py b/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py index 925c6cb0d73..fa706867a58 100755 --- a/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py @@ -125,3 +125,11 @@ def qsfp_ports(self): @property def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py index 17d4d2f95b5..33e98016384 100644 --- a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py @@ -180,3 +180,11 @@ def reset(self, port_num): reg_file.close() return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py index fb168a5d38c..851f4b90277 100755 --- a/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py +++ b/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py @@ -168,4 +168,12 @@ def qsfp_ports(self): def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + diff --git a/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py b/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py index 1c1e86bc5d6..549790bfb44 100644 --- a/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py +++ b/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py @@ -203,3 +203,11 @@ def get_eeprom_dict(self, port_num): sfp_data['dom'] = sfpd_obj.get_data_pretty() return sfp_data + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError From 0c2472a0405350d9010e1c0bc09f7d01e4f45f22 Mon Sep 17 00:00:00 2001 From: paavaanan Date: Fri, 14 Sep 2018 12:11:17 +0530 Subject: [PATCH 26/57] [device]: xcvrd support for Dell S6100 (#2041) --- .../plugins/sfputil.py | 123 +++++++++++++++++- .../plugins/sfputil.py | 4 +- 2 files changed, 118 insertions(+), 9 deletions(-) diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py index 90dd63fe4c1..c5337707eb1 100644 --- a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py +++ b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py @@ -432,10 +432,119 @@ def reset(self, port_num): return True - def get_transceiver_change_event(self): - """ - TODO: This function need to be implemented - when decide to support monitoring SFP(Xcvrd) - on this platform. - """ - raise NotImplementedError + + def get_register(self, reg_file): + retval = 'ERR' + + if (not os.path.isfile(reg_file)): + print reg_file, 'not found !' + return retval + + try: + with open(reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + def get_transceiver_change_event(self, timeout=0): + epoll = select.epoll() + port_dict = {} + try: + # We get notified when there is an SCI interrupt from GPIO SUS6 + fd = open("/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6", "r") + epoll.register(fd.fileno(), select.EPOLLIN) + events = epoll.poll(timeout=timeout if timeout != 0 else -1) + if events: + # Read the QSFP ABS interrupt & status registers + cpld2_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int") + cpld2_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta") + cpld3_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int") + cpld3_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta") + cpld4_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int") + cpld4_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta") + cpld5_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-17/17-003e/qsfp_abs_int") + cpld5_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-17/17-003e/qsfp_abs_sta") + + + if (cpld2_abs_int == 'read error' or cpld2_abs_sta == 'read error' or \ + cpld3_abs_int == 'read error' or cpld3_abs_sta == 'read error' or \ + cpld4_abs_int == 'read error' or cpld4_abs_sta == 'read error' or \ + cpld4_abs_int == 'read error' or cpld4_abs_sta == 'read error' ): + return False, {} + + cpld2_abs_int = int(cpld2_abs_int, 16) + cpld2_abs_sta = int(cpld2_abs_sta, 16) + cpld3_abs_int = int(cpld3_abs_int, 16) + cpld3_abs_sta = int(cpld3_abs_sta, 16) + cpld4_abs_int = int(cpld4_abs_int, 16) + cpld4_abs_sta = int(cpld4_abs_sta, 16) + cpld5_abs_int = int(cpld5_abs_int, 16) + cpld5_abs_sta = int(cpld5_abs_sta, 16) + + port=self.port_start + + while port >= self.iom1_port_start and port <= self.iom1_port_end: + + interrupt_reg = cpld2_abs_int + status_reg = cpld2_abs_sta + + if interrupt_reg & (1< optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + + while port >= self.iom2_port_start and port <= self.iom2_port_end: + + interrupt_reg = cpld4_abs_int + status_reg = cpld4_abs_sta + + if interrupt_reg & (1< optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + + while port >= self.iom3_port_start and port <= self.iom3_port_end: + + interrupt_reg = cpld3_abs_int + status_reg = cpld3_abs_sta + + if interrupt_reg & (1< optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + + while port >= self.iom4_port_start and port <= self.iom4_port_end: + + interrupt_reg = cpld5_abs_int + status_reg = cpld5_sta + + if interrupt_reg & (1< optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + return True, port_dict + finally: + fd.close() + epoll.close() + + return False, {} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py index 1524c1bc015..11be23b7e2d 100644 --- a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py +++ b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py @@ -393,8 +393,8 @@ def get_transceiver_change_event(self, timeout=0): port=self.port_start while port <= self.port_end: - if interrupt_reg & (1< optics is removed port_dict[port] = '0' else: From 6f496bda204a26708fd68987166a3fb559e4c2d2 Mon Sep 17 00:00:00 2001 From: klhaung <38268572+klhaung@users.noreply.github.com> Date: Fri, 14 Sep 2018 15:54:08 +0800 Subject: [PATCH 27/57] [device][platform] Update Inventec platform porting to support stretch (#2010) * [device][platform] d6254qs d6556 platform porting [device][platform] sensor and status led support for d7032q28b d7254q28b d7264q28b d6254qs d6556 [device][platform] qos support for d7032q28b d7254q28b [device][platform] service configuration files for d7032q28b d7254q28b d7264q28b d6254qs d6556 * remove binary files and remove non-supported attributes in config.bcm * remove gpio-ich here. file a PR in sonic-linux-kernel instead. * remove unnecessary comments * add GPL license --- .../INVENTEC-D6254QS/port_config.ini | 74 + .../INVENTEC-D6254QS/sai.profile | 2 + .../td2-d6254qs-72x10G.config.bcm | 160 + .../x86_64-inventec_d6254qs-r0/installer.conf | 4 + .../led_proc_init.soc | 136 + .../x86_64-inventec_d6254qs-r0/minigraph.xml | 144 + .../plugins/eeprom.py | 22 + .../plugins/psuutil.py | 84 + .../plugins/sfputil.py | 209 + .../x86_64-inventec_d6254qs-r0/sensors.conf | 15 + .../INVENTEC-D6556/port_config.ini | 57 + .../INVENTEC-D6556/sai.profile | 2 + .../x86_64-inventec_d6556-r0/installer.conf | 4 + .../led_proc_init.soc | 6 + .../x86_64-inventec_d6556-r0/minigraph.xml | 144 + .../plugins/eeprom.py | 22 + .../plugins/psuutil.py | 84 + .../plugins/sfputil.py | 211 + .../x86_64-inventec_d6556-r0/sensors.conf | 44 + .../INVENTEC-D7032Q28B-C32/buffers.json.j2 | 128 + .../INVENTEC-D7032Q28B-C32/qos.json | 143 + .../led_proc_init.soc | 4 +- .../minigraph.xml | 2 - .../x86_64-inventec_d7032q28b-r0/sensors.conf | 15 + .../INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 | 128 + .../INVENTEC-D7054Q28B-S48-Q6/qos.json | 143 + .../minigraph.xml | 2 - .../x86_64-inventec_d7054q28b-r0/sensors.conf | 44 + .../th2-d7264q28b-64x100g.config.bcm | 81 +- .../x86_64-inventec_d7264q28b-r0/sensors.conf | 44 + .../broadcom/platform-modules-inventec.mk | 14 +- .../common/utils/asic_monitor.py | 126 + .../common/utils/led_proc.py | 464 +- .../common/utils/platform_status.py | 64 + .../common/utils/transceiver_monitor.py | 199 +- .../d6254qs/modules/Makefile | 7 + .../d6254qs/modules/inv_cpld.c | 415 + .../d6254qs/modules/inv_eeprom.c | 181 + .../d6254qs/modules/inv_mux.c | 280 + .../d6254qs/modules/inv_mux.h | 45 + .../d6254qs/modules/inv_platform.c | 243 + .../d6254qs/modules/inv_psoc.c | 1004 ++ .../d6254qs/modules/inv_pthread.c | 1312 +++ .../d6254qs/modules/inv_swps.c | 3027 ++++++ .../d6254qs/modules/inv_swps.h | 1033 ++ .../d6254qs/modules/io_expander.c | 1885 ++++ .../d6254qs/modules/io_expander.h | 183 + .../d6254qs/modules/transceiver.c | 8388 ++++++++++++++++ .../d6254qs/modules/transceiver.h | 814 ++ .../d6254qs/utils/inventec_d6254_util.py | 239 + .../d6556/modules/Makefile | 6 + .../d6556/modules/inv_cpld.c | 526 ++ .../d6556/modules/inv_eeprom.c | 181 + .../d6556/modules/inv_mux.c | 281 + .../d6556/modules/inv_mux.h | 47 + .../d6556/modules/inv_platform.c | 215 + .../d6556/modules/inv_psoc.c | 994 ++ .../d6556/modules/inv_pthread.c | 1459 +++ .../d6556/modules/inv_swps.c | 3049 ++++++ .../d6556/modules/inv_swps.h | 1164 +++ .../d6556/modules/io_expander.c | 2046 ++++ .../d6556/modules/io_expander.h | 187 + .../d6556/modules/transceiver.c | 8389 +++++++++++++++++ .../d6556/modules/transceiver.h | 815 ++ .../d6556/utils/inventec_d6556_util.py | 238 + .../d7032q28b/modules/Makefile | 1 + .../d7032q28b/modules/inv_psoc.c | 2066 ++-- .../d7032q28b/modules/inv_pthread.c | 1305 +++ .../d7032q28b/utils/inventec_d7032_util.py | 7 +- .../d7054q28b/modules/Makefile | 1 + .../d7054q28b/modules/inv_psoc.c | 18 + .../d7054q28b/modules/inv_pthread.c | 1284 +++ .../d7054q28b/utils/inventec_d7054_util.py | 5 +- .../d7264q28b/modules/Makefile | 1 + .../d7264q28b/modules/inv_psoc.c | 31 +- .../d7264q28b/modules/inv_pthread.c | 1303 +++ .../d7264q28b/utils/inventec_d7264_util.py | 5 +- .../debian/changelog | 12 +- .../debian/control | 18 +- .../debian/platform-modules-d6254qs.init | 73 + .../debian/platform-modules-d6254qs.install | 6 + .../debian/platform-modules-d6556.init | 72 + .../debian/platform-modules-d6556.install | 6 + .../debian/platform-modules-d7032q28b.init | 10 + .../debian/platform-modules-d7032q28b.install | 3 + .../debian/platform-modules-d7054q28b.init | 10 + .../debian/platform-modules-d7054q28b.install | 4 +- .../debian/platform-modules-d7264q28b.init | 29 +- .../debian/platform-modules-d7264q28b.install | 4 + .../debian/platform-modules-d7264q28b.upstart | 5 - .../debian/rules | 4 +- .../systemd/platform-modules-d6254qs.service | 13 + .../systemd/platform-modules-d6556.service | 13 + .../platform-modules-d7032q28b.service | 13 + .../platform-modules-d7054q28b.service | 13 + .../platform-modules-d7264q28b.service | 13 + 96 files changed, 46694 insertions(+), 1332 deletions(-) create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/installer.conf create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py create mode 100644 device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf create mode 100644 device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini create mode 100644 device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile create mode 100644 device/inventec/x86_64-inventec_d6556-r0/installer.conf create mode 100644 device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc create mode 100644 device/inventec/x86_64-inventec_d6556-r0/minigraph.xml create mode 100644 device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py create mode 100644 device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py create mode 100644 device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py create mode 100644 device/inventec/x86_64-inventec_d6556-r0/sensors.conf create mode 100644 device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 create mode 100644 device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json create mode 100644 device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf create mode 100644 device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 create mode 100644 device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json create mode 100644 device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf create mode 100644 device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf create mode 100755 platform/broadcom/sonic-platform-modules-inventec/common/utils/asic_monitor.py create mode 100755 platform/broadcom/sonic-platform-modules-inventec/common/utils/platform_status.py create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_psoc.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_psoc.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c create mode 100644 platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init create mode 100644 platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install create mode 100644 platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init create mode 100644 platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install delete mode 100644 platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.upstart create mode 100644 platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service create mode 100644 platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service create mode 100644 platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service create mode 100644 platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service create mode 100644 platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini new file mode 100644 index 00000000000..24823135f4c --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini @@ -0,0 +1,74 @@ +# name lanes alias +Ethernet0 16 Ethernet0 +Ethernet4 15 Ethernet4 +Ethernet8 14 Ethernet8 +Ethernet12 13 Ethernet12 +Ethernet16 24 Ethernet16 +Ethernet20 23 Ethernet20 +Ethernet24 22 Ethernet24 +Ethernet28 21 Ethernet28 +Ethernet32 28 Ethernet32 +Ethernet36 27 Ethernet36 +Ethernet40 26 Ethernet40 +Ethernet44 25 Ethernet44 +Ethernet48 32 Ethernet48 +Ethernet52 31 Ethernet52 +Ethernet56 30 Ethernet56 +Ethernet60 29 Ethernet60 +Ethernet64 48 Ethernet64 +Ethernet68 47 Ethernet68 +Ethernet72 46 Ethernet72 +Ethernet76 45 Ethernet76 +Ethernet80 52 Ethernet80 +Ethernet84 51 Ethernet84 +Ethernet88 50 Ethernet88 +Ethernet92 49 Ethernet92 +Ethernet96 56 Ethernet96 +Ethernet100 55 Ethernet100 +Ethernet104 54 Ethernet104 +Ethernet108 53 Ethernet108 +Ethernet112 60 Ethernet112 +Ethernet116 59 Ethernet116 +Ethernet120 58 Ethernet120 +Ethernet124 57 Ethernet124 +Ethernet128 64 Ethernet128 +Ethernet132 63 Ethernet132 +Ethernet136 62 Ethernet136 +Ethernet140 61 Ethernet140 +Ethernet144 68 Ethernet144 +Ethernet148 67 Ethernet148 +Ethernet152 66 Ethernet152 +Ethernet156 65 Ethernet156 +Ethernet160 72 Ethernet160 +Ethernet164 71 Ethernet164 +Ethernet168 70 Ethernet168 +Ethernet172 69 Ethernet172 +Ethernet176 76 Ethernet176 +Ethernet180 75 Ethernet180 +Ethernet184 74 Ethernet184 +Ethernet188 73 Ethernet188 +Ethernet192 82 Ethernet192 +Ethernet196 84 Ethernet196 +Ethernet200 81 Ethernet200 +Ethernet204 83 Ethernet204 +Ethernet208 78 Ethernet208 +Ethernet212 80 Ethernet212 +Ethernet216 77 Ethernet216 +Ethernet220 79 Ethernet220 +Ethernet224 98 Ethernet224 +Ethernet228 100 Ethernet228 +Ethernet232 97 Ethernet232 +Ethernet236 99 Ethernet236 +Ethernet240 104 Ethernet240 +Ethernet244 102 Ethernet244 +Ethernet248 103 Ethernet248 +Ethernet252 101 Ethernet252 +Ethernet256 108 Ethernet256 +Ethernet260 106 Ethernet260 +Ethernet264 107 Ethernet264 +Ethernet268 105 Ethernet268 +Ethernet272 112 Ethernet272 +Ethernet276 110 Ethernet276 +Ethernet280 111 Ethernet280 +Ethernet284 109 Ethernet284 + diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile new file mode 100644 index 00000000000..3f549dd63b4 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-d6254qs-72x10G.config +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm new file mode 100644 index 00000000000..66b7172bce7 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm @@ -0,0 +1,160 @@ +os=unix +parity_enable=0 +pbmp_xport_xe.0=0x1fffffffffffffffffffffffffffffffe +miim_intr_enable=0 +schan_intr_enable=0 +bcm_stat_interval=2000000 +serdes_firmware_mode_xe=0x2 + +portmap_1=16:10 +portmap_2=15:10 +portmap_3=14:10 +portmap_4=13:10 +portmap_5=24:10 +portmap_6=23:10 +portmap_7=22:10 +portmap_8=21:10 +portmap_9=28:10 +portmap_10=27:10 +portmap_11=26:10 +portmap_12=25:10 +portmap_13=32:10 +portmap_14=31:10 +portmap_15=30:10 +portmap_16=29:10 +portmap_17=48:10 +portmap_18=47:10 +portmap_19=46:10 +portmap_20=45:10 +portmap_21=52:10 +portmap_22=51:10 +portmap_23=50:10 +portmap_24=49:10 +portmap_25=56:10 +portmap_26=55:10 +portmap_27=54:10 +portmap_28=53:10 +portmap_29=60:10 +portmap_30=59:10 +portmap_31=58:10 +portmap_32=57:10 +portmap_33=64:10 +portmap_34=63:10 +portmap_35=62:10 +portmap_36=61:10 +portmap_37=68:10 +portmap_38=67:10 +portmap_39=66:10 +portmap_40=65:10 +portmap_41=72:10 +portmap_42=71:10 +portmap_43=70:10 +portmap_44=69:10 +portmap_45=76:10 +portmap_46=75:10 +portmap_47=74:10 +portmap_48=73:10 + +portmap_49=82:10 +portmap_50=84:10 +portmap_51=81:10 +portmap_52=83:10 + +portmap_53=78:10 +portmap_54=80:10 +portmap_55=77:10 +portmap_56=79:10 + +portmap_57=98:10 +portmap_58=100:10 +portmap_59=97:10 +portmap_60=99:10 + +portmap_61=104:10 +portmap_62=102:10 +portmap_63=103:10 +portmap_64=101:10 + +portmap_65=108:10 +portmap_66=106:10 +portmap_67=107:10 +portmap_68=105:10 + +portmap_69=112:10 +portmap_70=110:10 +portmap_71=111:10 +portmap_72=109:10 + +xgxs_rx_lane_map_xe0=0x0123 +xgxs_rx_lane_map_xe1=0x0123 +xgxs_rx_lane_map_xe2=0x0123 +xgxs_rx_lane_map_xe3=0x0123 +xgxs_rx_lane_map_xe4=0x0123 +xgxs_rx_lane_map_xe5=0x0123 +xgxs_rx_lane_map_xe6=0x0123 +xgxs_rx_lane_map_xe7=0x0123 +xgxs_rx_lane_map_xe8=0x0123 +xgxs_rx_lane_map_xe9=0x0123 +xgxs_rx_lane_map_xe10=0x0123 +xgxs_rx_lane_map_xe11=0x0123 +xgxs_rx_lane_map_xe12=0x0123 +xgxs_rx_lane_map_xe13=0x0123 +xgxs_rx_lane_map_xe14=0x0123 +xgxs_rx_lane_map_xe15=0x0123 +xgxs_rx_lane_map_xe16=0x0123 +xgxs_rx_lane_map_xe17=0x0123 +xgxs_rx_lane_map_xe18=0x0123 +xgxs_rx_lane_map_xe19=0x0123 +xgxs_rx_lane_map_xe20=0x0123 +xgxs_rx_lane_map_xe21=0x0123 +xgxs_rx_lane_map_xe22=0x0123 +xgxs_rx_lane_map_xe23=0x0123 +xgxs_rx_lane_map_xe24=0x0123 +xgxs_rx_lane_map_xe25=0x0123 +xgxs_rx_lane_map_xe26=0x0123 +xgxs_rx_lane_map_xe27=0x0123 +xgxs_rx_lane_map_xe28=0x0123 +xgxs_rx_lane_map_xe29=0x0123 +xgxs_rx_lane_map_xe30=0x0123 +xgxs_rx_lane_map_xe31=0x0123 +xgxs_rx_lane_map_xe32=0x0123 +xgxs_rx_lane_map_xe33=0x0123 +xgxs_rx_lane_map_xe34=0x0123 +xgxs_rx_lane_map_xe35=0x0123 +xgxs_rx_lane_map_xe36=0x0123 +xgxs_rx_lane_map_xe37=0x0123 +xgxs_rx_lane_map_xe38=0x0123 +xgxs_rx_lane_map_xe39=0x0123 +xgxs_rx_lane_map_xe40=0x0123 +xgxs_rx_lane_map_xe41=0x0123 +xgxs_rx_lane_map_xe42=0x0123 +xgxs_rx_lane_map_xe43=0x0123 +xgxs_rx_lane_map_xe44=0x0123 +xgxs_rx_lane_map_xe45=0x0123 +xgxs_rx_lane_map_xe46=0x0123 +xgxs_rx_lane_map_xe47=0x0123 +xgxs_rx_lane_map_xe48=0x0123 +xgxs_rx_lane_map_xe49=0x0123 +xgxs_rx_lane_map_xe50=0x0123 +xgxs_rx_lane_map_xe51=0x0123 +xgxs_rx_lane_map_xe52=0x0123 +xgxs_rx_lane_map_xe53=0x0123 +xgxs_rx_lane_map_xe54=0x0123 +xgxs_rx_lane_map_xe55=0x0123 +xgxs_rx_lane_map_xe56=0x0123 +xgxs_rx_lane_map_xe57=0x0123 +xgxs_rx_lane_map_xe58=0x0123 +xgxs_rx_lane_map_xe59=0x0123 +xgxs_rx_lane_map_xe60=0x0123 +xgxs_rx_lane_map_xe61=0x0123 +xgxs_rx_lane_map_xe62=0x0123 +xgxs_rx_lane_map_xe63=0x0123 +xgxs_rx_lane_map_xe64=0x0123 +xgxs_rx_lane_map_xe65=0x0123 +xgxs_rx_lane_map_xe66=0x0123 +xgxs_rx_lane_map_xe67=0x0123 +xgxs_rx_lane_map_xe68=0x0123 +xgxs_rx_lane_map_xe69=0x0123 +xgxs_rx_lane_map_xe70=0x0123 +xgxs_rx_lane_map_xe71=0x0123 + diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/installer.conf b/device/inventec/x86_64-inventec_d6254qs-r0/installer.conf new file mode 100644 index 00000000000..6b489db6e16 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc new file mode 100644 index 00000000000..92423b23449 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc @@ -0,0 +1,136 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 + +led 0 stop +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +led 0 start + +led 1 stop +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +led 1 start diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml b/device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml new file mode 100644 index 00000000000..e2368e171b5 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml @@ -0,0 +1,144 @@ + + + + + + OCPSCH0104001MS + 10.10.1.26 + SONiC-Inventec-d6254qs + 10.10.1.25 + 1 + 10 + 3 + + + OCPSCH0104002MS + 10.10.2.26 + SONiC-Inventec-d6254qs + 10.10.2.25 + 1 + 10 + 3 + + + + + 64536 + SONiC-Inventec-d6254qs + + +
10.10.1.26
+ + + + +
10.10.2.26
+ + + + + + + + 64542 + OCPSCH0104001MS + + + + 64543 + OCPSCH0104002MS + + + + + + + + + + HostIP + Loopback0 + + 100.0.0.9/32 + + 100.0.0.9/32 + + + + + + + + SONiC-Inventec-d6254qs + + + + + + Ethernet0 + 10.10.1.25/30 + + + + Ethernet4 + 10.10.2.25/30 + + + + + + + + + + + + DeviceInterfaceLink + OCPSCH0104001MS + Ethernet24 + SONiC-Inventec-d6254qs + Ethernet0 + + + DeviceInterfaceLink + OCPSCH0104002MS + Ethernet24 + SONiC-Inventec-d6254qs + Ethernet4 + + + + + SONiC-Inventec-d6254qs + INVENTEC-D6254QS + + + + + + + SONiC-Inventec-d6254qs + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + + + + + SONiC-Inventec-d6254qs + INVENTEC-D6254QS + diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4bd3f7a2705 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/bus/i2c/devices/0-0066" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py new file mode 100644 index 00000000000..6cd470795fb --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py @@ -0,0 +1,209 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 53 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 48 + QSFP_PORT_END = 53 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 10, + 1: 11, + 2: 12, + 3: 13, + 4: 14, + 5: 15, + 6: 16, + 7: 17, + 8: 18, + 9: 19, + 10: 20, + 11: 21, + 12: 22, + 13: 23, + 14: 24, + 15: 25, + 16: 26, + 17: 27, + 18: 28, + 19: 29, + 20: 30, + 21: 31, + 22: 32, + 23: 33, + 24: 34, + 25: 35, + 26: 36, + 27: 37, + 28: 38, + 29: 39, + 30: 40, + 31: 41, + 32: 42, + 33: 43, + 34: 44, + 35: 45, + 36: 46, + 37: 47, + 38: 48, + 39: 49, + 40: 50, + 41: 51, + 42: 52, + 43: 53, + 44: 54, + 45: 55, + 46: 56, + 47: 57, + 48: 58, + 49: 59, + 50: 60, + 51: 61, + 52: 62, + 53: 63 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf b/device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf new file mode 100644 index 00000000000..653900cad36 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf @@ -0,0 +1,15 @@ +# libsensors configuration file +chip "inv_psoc-*" + ignore temp3 + ignore temp4 + label temp1 "CPU Board Temperature" + label temp2 "SW Board I Temperature" + label temp5 "SW Board II Temperature" + label temp6 "ASIC Temperature" + label in1 "PSU1 Voltage" + label in2 "PSU2 Voltage" + label curr1 "PSU1 Current" + label curr2 "PSU2 Current" + label power1 "PSU1 Power" + label power2 "PSU2 Power" + diff --git a/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini new file mode 100644 index 00000000000..4af8faabf67 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias +Ethernet0 1 Ethernet0 +Ethernet4 2 Ethernet4 +Ethernet8 3 Ethernet8 +Ethernet12 4 Ethernet12 +Ethernet16 5 Ethernet16 +Ethernet20 6 Ethernet20 +Ethernet24 7 Ethernet24 +Ethernet28 8 Ethernet28 +Ethernet32 13 Ethernet32 +Ethernet36 14 Ethernet36 +Ethernet40 15 Ethernet40 +Ethernet44 16 Ethernet44 +Ethernet48 21 Ethernet48 +Ethernet52 22 Ethernet52 +Ethernet56 23 Ethernet56 +Ethernet60 24 Ethernet60 +Ethernet64 29 Ethernet64 +Ethernet68 30 Ethernet68 +Ethernet72 31 Ethernet72 +Ethernet76 32 Ethernet76 +Ethernet80 33 Ethernet80 +Ethernet84 34 Ethernet84 +Ethernet88 35 Ethernet88 +Ethernet92 36 Ethernet92 +Ethernet96 41 Ethernet96 +Ethernet100 42 Ethernet100 +Ethernet104 43 Ethernet104 +Ethernet108 44 Ethernet108 +Ethernet112 49 Ethernet112 +Ethernet116 50 Ethernet116 +Ethernet120 51 Ethernet120 +Ethernet124 52 Ethernet124 +Ethernet128 57 Ethernet128 +Ethernet132 58 Ethernet132 +Ethernet136 59 Ethernet136 +Ethernet140 60 Ethernet140 +Ethernet144 61 Ethernet144 +Ethernet148 62 Ethernet148 +Ethernet152 63 Ethernet152 +Ethernet156 64 Ethernet156 +Ethernet160 65 Ethernet160 +Ethernet164 66 Ethernet164 +Ethernet168 67 Ethernet168 +Ethernet172 68 Ethernet172 +Ethernet176 69 Ethernet176 +Ethernet180 70 Ethernet180 +Ethernet184 71 Ethernet184 +Ethernet188 72 Ethernet188 +Ethernet192 77,78,79,80 Ethernet192 +Ethernet196 85,86,87,88 Ethernet196 +Ethernet200 93,94,95,96 Ethernet200 +Ethernet204 97,98,99,100 Ethernet204 +Ethernet208 105,106,107,108 Ethernet208 +Ethernet212 113,114,115,116 Ethernet212 +Ethernet216 121,122,123,124 Ethernet216 +Ethernet220 125,126,127,128 Ethernet220 diff --git a/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile new file mode 100644 index 00000000000..6f0bf54024a --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-d6556-48x25G-8x100G.config.bcm.inventec +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6556-r0/installer.conf b/device/inventec/x86_64-inventec_d6556-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc new file mode 100644 index 00000000000..d4c2fde64f9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +led auto off +led stop +m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/inventec/x86_64-inventec_d6556-r0/minigraph.xml b/device/inventec/x86_64-inventec_d6556-r0/minigraph.xml new file mode 100644 index 00000000000..50b3a05cfcc --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/minigraph.xml @@ -0,0 +1,144 @@ + + + + + + OCPSCH0104001MS + 10.10.1.26 + SONiC-Inventec-d6556 + 10.10.1.25 + 1 + 10 + 3 + + + OCPSCH0104002MS + 10.10.2.26 + SONiC-Inventec-d6556 + 10.10.2.25 + 1 + 10 + 3 + + + + + 64536 + SONiC-Inventec-d6556 + + +
10.10.1.26
+ + + + +
10.10.2.26
+ + + + + + + + 64542 + OCPSCH0104001MS + + + + 64543 + OCPSCH0104002MS + + + + + + + + + + HostIP + Loopback0 + + 100.0.0.9/32 + + 100.0.0.9/32 + + + + + + + + SONiC-Inventec-d6556 + + + + + + Ethernet0 + 10.10.1.25/30 + + + + Ethernet4 + 10.10.2.25/30 + + + + + + + + + + + + DeviceInterfaceLink + OCPSCH0104001MS + Ethernet24 + SONiC-Inventec-d6556 + Ethernet0 + + + DeviceInterfaceLink + OCPSCH0104002MS + Ethernet24 + SONiC-Inventec-d6556 + Ethernet4 + + + + + SONiC-Inventec-d6556 + INVENTEC-D6556 + + + + + + + SONiC-Inventec-d6556 + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + + + + + SONiC-Inventec-d6556 + INVENTEC-D6556 + diff --git a/device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py new file mode 100644 index 00000000000..855162f63b9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/class/hwmon/hwmon1" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py new file mode 100644 index 00000000000..155b956827f --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py @@ -0,0 +1,211 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 18, + 1: 19, + 2: 20, + 3: 21, + 4: 22, + 5: 23, + 6: 24, + 7: 25, + 8: 26, + 9: 27, + 10: 28, + 11: 29, + 12: 30, + 13: 31, + 14: 32, + 15: 33, + 16: 34, + 17: 35, + 18: 36, + 19: 37, + 20: 38, + 21: 39, + 22: 40, + 23: 41, + 24: 42, + 25: 43, + 26: 44, + 27: 45, + 28: 46, + 29: 47, + 30: 48, + 31: 49, + 32: 50, + 33: 51, + 34: 52, + 35: 53, + 36: 54, + 37: 55, + 38: 56, + 39: 57, + 40: 58, + 41: 59, + 42: 60, + 43: 61, + 44: 62, + 45: 63, + 46: 64, + 47: 65, + 48: 10, + 49: 11, + 50: 12, + 51: 13, + 52: 14, + 53: 15, + 54: 16, + 55: 17 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True diff --git a/device/inventec/x86_64-inventec_d6556-r0/sensors.conf b/device/inventec/x86_64-inventec_d6556-r0/sensors.conf new file mode 100644 index 00000000000..98a8e59b915 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/sensors.conf @@ -0,0 +1,44 @@ +# libsensors configuration file +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center Temperature" + + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 new file mode 100644 index 00000000000..864e3bd9870 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 @@ -0,0 +1,128 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "6000000", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"18432", + "xoff":"40560", + "size":"41808", + "dynamic_th":"-4", + "xon_offset":"2496" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"6000000" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json new file mode 100644 index 00000000000..926911ab59d --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json @@ -0,0 +1,143 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc index 39ae1f24792..92423b23449 100644 --- a/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc @@ -128,9 +128,9 @@ m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=61 m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 led 0 stop -led 0 prog 02 00 60 F1 12 00 DE F6 70 10 67 47 67 42 77 06 06 F2 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DE F4 70 34 86 F0 77 16 12 00 DE F8 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 00 00 00 +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 led 0 start led 1 stop -led 1 prog 02 00 60 F1 12 00 DE F6 70 10 67 47 67 42 77 06 06 F2 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DE F4 70 34 86 F0 77 16 12 00 DE F8 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 00 00 00 +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 led 1 start diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml b/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml index a582bfa49a2..1f1dd3dfe35 100644 --- a/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml @@ -93,7 +93,6 @@ - 40000 DeviceInterfaceLink OCPSCH0104001MS Ethernet24 @@ -101,7 +100,6 @@ Ethernet0 - 40000 DeviceInterfaceLink OCPSCH0104002MS Ethernet24 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf b/device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf new file mode 100644 index 00000000000..653900cad36 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf @@ -0,0 +1,15 @@ +# libsensors configuration file +chip "inv_psoc-*" + ignore temp3 + ignore temp4 + label temp1 "CPU Board Temperature" + label temp2 "SW Board I Temperature" + label temp5 "SW Board II Temperature" + label temp6 "ASIC Temperature" + label in1 "PSU1 Voltage" + label in2 "PSU2 Voltage" + label curr1 "PSU1 Current" + label curr2 "PSU2 Current" + label power1 "PSU1 Power" + label power2 "PSU2 Power" + diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 new file mode 100644 index 00000000000..ccf463c4052 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 @@ -0,0 +1,128 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "6000000", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"18432", + "xoff":"40560", + "size":"41808", + "dynamic_th":"-4", + "xon_offset":"2496" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"6000000" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json new file mode 100644 index 00000000000..9949a5903d8 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json @@ -0,0 +1,143 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml b/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml index 0e579ccbde1..7cd7dd75e60 100644 --- a/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml @@ -93,7 +93,6 @@ - 40000 DeviceInterfaceLink OCPSCH0104001MS Ethernet24 @@ -101,7 +100,6 @@ Ethernet0 - 40000 DeviceInterfaceLink OCPSCH0104002MS Ethernet24 diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf b/device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf new file mode 100644 index 00000000000..b3fd61236c9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf @@ -0,0 +1,44 @@ +# libsensors configuration file +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "NearPSU Temperature" + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" + diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm index 8ca378382c9..a7eaa1d6ac5 100644 --- a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm @@ -15,12 +15,12 @@ portmap_135=263:10 # 64 ports config for 100G # For Tomahawk FalconCore: -# Physical ports in FalconCore[0 - 15] must map to logical port[1 - 32] at any order -# Physical ports in FalconCore[16 - 31] must map to logical port[34 - 65] at any order -# Physical ports in FalconCore[32 - 47] must map to logical port[68 - 99] at any order -# Physical ports in FalconCore[48 - 63] must map to logical port[102 - 133] at any order +#Physical ports in FalconCore[0-15] must map to logical port[1-32] at any order +#Physical ports in FalconCore[16-31] must map to logical port[34-65] at any order +#Physical ports in FalconCore[32-47] must map to logical port[68-99] at any order +#Physical ports in FalconCore[48-63] must map to logical port[102-133] at any order -## FalconCore[0 - 15] +## FalconCore[0-15] portmap_1=9:100 portmap_2=1:100 portmap_3=13:100 @@ -38,7 +38,7 @@ portmap_14=49:100 portmap_15=61:100 portmap_16=53:100 -## FalconCore[16 - 31] +## FalconCore[16-31] portmap_34=73:100 portmap_35=65:100 portmap_36=77:100 @@ -839,3 +839,72 @@ dport_map_port_112=114 dport_map_port_113=115 dport_map_port_114=48 dport_map_port_115=49 + +## ce +## POST: 24(18) MAIN: 62(3E) PRE: 8(08) +serdes_preemphasis_1=0x183E08 +serdes_preemphasis_2=0x193E08 +serdes_preemphasis_5=0x173E08 +serdes_preemphasis_6=0x173E08 +serdes_preemphasis_9=0x163E07 +serdes_preemphasis_10=0x173E08 +serdes_preemphasis_13=0x154007 +serdes_preemphasis_14=0x154007 +serdes_preemphasis_34=0x134007 +serdes_preemphasis_35=0x144007 +serdes_preemphasis_38=0x133F07 +serdes_preemphasis_39=0x133F07 +serdes_preemphasis_42=0x133F07 +serdes_preemphasis_43=0x133F06 +serdes_preemphasis_46=0x113E06 +serdes_preemphasis_47=0x113E05 +serdes_preemphasis_68=0x103F06 +serdes_preemphasis_69=0x103F06 +serdes_preemphasis_72=0x113F06 +serdes_preemphasis_73=0x103F06 +serdes_preemphasis_76=0x124006 +serdes_preemphasis_77=0x124006 +serdes_preemphasis_80=0x144007 +serdes_preemphasis_81=0x144007 +serdes_preemphasis_102=0x144007 +serdes_preemphasis_103=0x144007 +serdes_preemphasis_106=0x153F08 +serdes_preemphasis_107=0x153F08 +serdes_preemphasis_110=0x164008 +serdes_preemphasis_111=0x164008 +serdes_preemphasis_114=0x184008 +serdes_preemphasis_115=0x184008 +serdes_preemphasis_3=0x184108 +serdes_preemphasis_4=0x184108 +serdes_preemphasis_7=0x173F08 +serdes_preemphasis_8=0x174108 +serdes_preemphasis_11=0x154007 +serdes_preemphasis_12=0x154007 +serdes_preemphasis_15=0x144007 +serdes_preemphasis_16=0x144007 +serdes_preemphasis_36=0x133F07 +serdes_preemphasis_37=0x133F07 +serdes_preemphasis_40=0x133F07 +serdes_preemphasis_41=0x123F07 +serdes_preemphasis_44=0x113F07 +serdes_preemphasis_45=0x113F07 +serdes_preemphasis_48=0x113F06 +serdes_preemphasis_49=0x103F06 +serdes_preemphasis_70=0x113F06 +serdes_preemphasis_71=0x103F06 +serdes_preemphasis_74=0x113F06 +serdes_preemphasis_75=0x113F06 +serdes_preemphasis_78=0x123F07 +serdes_preemphasis_79=0x134007 +serdes_preemphasis_82=0x144007 +serdes_preemphasis_83=0x144007 +serdes_preemphasis_104=0x164007 +serdes_preemphasis_105=0x154107 +serdes_preemphasis_108=0x174107 +serdes_preemphasis_109=0x163F07 +serdes_preemphasis_112=0x194107 +serdes_preemphasis_113=0x174107 +serdes_preemphasis_116=0x1B4108 +serdes_preemphasis_117=0x194108 + + diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf b/device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf new file mode 100644 index 00000000000..38072557730 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf @@ -0,0 +1,44 @@ +# libsensors configuration file +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center(U10) Temperature" + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" + diff --git a/platform/broadcom/platform-modules-inventec.mk b/platform/broadcom/platform-modules-inventec.mk index 2a6f32f923c..ead32e75a81 100644 --- a/platform/broadcom/platform-modules-inventec.mk +++ b/platform/broadcom/platform-modules-inventec.mk @@ -1,11 +1,15 @@ -# Inventec d7032q28b , d7054q28b and d7264q28b Platform modules +# Inventec platform modules INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION = 1.1.0 INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6254QS_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6556_PLATFORM_MODULE_VERSION = 1.1.0 INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION = 1.1.0 export INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION export INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION +export INVENTEC_D6254QS_PLATFORM_MODULE_VERSION +export INVENTEC_D6556_PLATFORM_MODULE_VERSION export INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION INVENTEC_D7032Q28B_PLATFORM_MODULE = platform-modules-d7032q28b_$(INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION)_amd64.deb @@ -18,6 +22,14 @@ INVENTEC_D7054Q28B_PLATFORM_MODULE = platform-modules-d7054q28b_$(INVENTEC_D7054 $(INVENTEC_D7054Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7054q28b-r0 $(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7054Q28B_PLATFORM_MODULE))) +INVENTEC_D6254QS_PLATFORM_MODULE = platform-modules-d6254qs_$(INVENTEC_D6254QS_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6254QS_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6254qs-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6254QS_PLATFORM_MODULE))) + +INVENTEC_D6556_PLATFORM_MODULE = platform-modules-d6556_$(INVENTEC_D6556_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6556_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6556-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6556_PLATFORM_MODULE))) + INVENTEC_D7264Q28B_PLATFORM_MODULE = platform-modules-d7264q28b_$(INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION)_amd64.deb $(INVENTEC_D7264Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7264q28b-r0 $(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7264Q28B_PLATFORM_MODULE))) diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/asic_monitor.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/asic_monitor.py new file mode 100755 index 00000000000..bcb05b9cb84 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/asic_monitor.py @@ -0,0 +1,126 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Inventec, Inc. +# +# Editor: James Huang ( Huang.James@inventec.com ) +# +""" +Usage: %(scriptName)s [options] command object + +Auto detecting the Chipset temperature and update + +options: + -h | --help : this help message + -d | --debug : run with debug mode + +""" + +try: + import os + import commands + import sys, getopt + import logging + import re + import time + import syslog + from sonic_sfp.bcmshell import bcmshell + +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +args = [] +INV_REDWOOD_PLATFORM = "SONiC-Inventec-d7032-100" +INV_CYPRESS_PLATFORM = "SONiC-Inventec-d7054" +INV_SEQUOIA_PLATFORM = "SONiC-Inventec-d7264" +INV_MAPLE_PLATFORM = "SONiC-Inventec-d6556" +INV_MAGNOLIA_PLATFORM = "SONiC-Inventec-d6254qs" + +PSOC_NAME = "name" +HWMON_PATH = "/sys/class/hwmon/" +SWITCH_TEMP_FILE_NAME = "switch_tmp" + +def log_message( level, string ): + syslog.openlog("asic_monitor", syslog.LOG_PID, facility=syslog.LOG_DAEMON) + syslog.syslog( level, string ) + +def initialLoop(): + + global bcm_obj + initialNotOK = True + + while initialNotOK : + try: + bcm_obj = BCMUtil() + bcm_obj.execute_command("echo") + initialNotOK = False + print bcm_obj + log_message( syslog.LOG_INFO, "BCMUtil Object initialed successfully" ) + except Exception, e: + print "Exception. The warning is {0}".format(str(e)) + time.sleep(10) + +class BCMUtil(bcmshell): + + asic_temperature = 0 + platform = None + + def get_platform(self): + if self.platform is None: + self.platform = os.popen("uname -n").read().strip() + return self.platform + + def get_asic_temperature( self ): + return self.asic_temperature + + def set_asic_temperature( self, temp ): + self.asic_temperature = temp + + def parsing_asic_temp(self): + content = self.run("show temp") + for line in content.split("\n"): + TempObject = re.search(r"(average current temperature is)\s+(?P\d+)\.(?P\d+)",line) + if TempObject is not None: + self.set_asic_temperature( int( TempObject.group("temperature_high") ) ) + + def execute_command(self, cmd): + return self.run(cmd) + + +def main(): + + global bcm_obj + initialLoop() + log_message( syslog.LOG_INFO, "Object initialed successfully" ) + + while 1 : + try: + bcm_obj.parsing_asic_temp() + for index in os.listdir(HWMON_PATH): + file_list = os.listdir("{0}/{1}/device/".format(HWMON_PATH,index)) + if PSOC_NAME in file_list : + with open( "{0}/{1}/device/{2}".format(HWMON_PATH, index, PSOC_NAME), 'rb') as readPtr: + content = readPtr.read().strip() + if bcm_obj.get_platform() == INV_SEQUOIA_PLATFORM : + if content == "inv_bmc" and SWITCH_TEMP_FILE_NAME in file_list : + os.system("echo {0} > {1}/{2}/device/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME )) + break + else : + if content == "inv_psoc" and SWITCH_TEMP_FILE_NAME in file_list : + print "echo {0} > {1}/{2}/device/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME ) + os.system("echo {0} > {1}/{2}/device/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME )) + break + except Exception, e: + log_message( syslog.LOG_WARNING, "Exception. The warning is {0}".format(str(e)) ) + initialLoop() + time.sleep(5) + + syslog.closelog() + del bcm_obj + +if __name__ == "__main__": + main() + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/led_proc.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/led_proc.py index 57c5dfc6035..bab0e2dafe7 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/common/utils/led_proc.py +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/led_proc.py @@ -1,5 +1,19 @@ #!/usr/bin/env python # +# Copyright (C) 2018 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . import os import time @@ -7,20 +21,28 @@ import re from sonic_sfp.bcmshell import bcmshell + # ===================================================================== # global variable init # ===================================================================== - +# port object +PORT_LIST = [] +# object is to execute bcm shell command +BCM_SHELL = None +SHELL_READY = False +# port status that is auto update by chip in data ram +STATUS_RX = 1<<0 +STATUS_TX = 1<<1 # define data ram address PORT_DATA_OFFSET_ADDR = 0xA0 -PORT_DATA_START_ADDR = 0xF2 -TOTAL_SCAN_BITS_ADDR = 0xF4 -SYNC_START_LEN_ADDR = 0xF6 -SYNC_STOP_LEN_ADDR = 0xF8 -# bit streaming rule for CPLD decode -TOTAL_SCAN_BITS = None -SYNC_S = None -SYNC_P = None +# define board type +INV_MAGNOLIA = "SONiC-Inventec-d6254qs" +INV_REDWOOD = "SONiC-Inventec-d7032-100" +INV_CYPRESS = "SONiC-Inventec-d7054" +INV_MAPLE = "SONiC-Inventec-d6556" +INV_SEQUOIA = "" +BOARD_TPYE = "" +EAGLE_CORE = [] # define port data for bit streaming BIT_LINK = None BIT_FAULT = None @@ -33,86 +55,41 @@ SPEED_40G = 40 SPEED_25G = 25 SPEED_10G = 10 -# the amount of LED processor -AMOUNT_LED_UP = None -# define board type -INV_REDWOOD = "SONiC-Inventec-d7032-100" -INV_CYPRESS = "SONiC-Inventec-d7054" -INV_SEQUOIA = "" -BOARD_TPYE = "" -EAGLE_CORE = [] - -PORT_LIST = [] - -# port status that is auto update by chip in data ram -# there are two byte to indicate each port status -''' -RX equ 0x0 ; received packet -TX equ 0x1 ; transmitted packet -COLL equ 0x2 ; collision indicator -SPEED_C equ 0x3 ; 100 Mbps -SPEED_M equ 0x4 ; 1000 Mbps -DUPLEX equ 0x5 ; half/full duplex -FLOW equ 0x6 ; flow control capable -LINKUP equ 0x7 ; link down/up status -LINKEN equ 0x8 ; link disabled/enabled status -ZERO equ 0xE ; always 0 -ONE equ 0xF ; always 1 -''' -STATUS_ENABLE = 1<<0 -STATUS_RX = 1<<0 -STATUS_TX = 1<<1 - -# object is to execute bcm shell command -BCM_SHELL = None - # ===================================================================== # class object # ===================================================================== -class Led(): - - up = None - pfw = None - - def __init__(self, led_number, program_fw): - self.up = led_number - self.pfw = program_fw - - def led_start(self): - BCM_SHELL.cmd("led {0} start".format(self.up)) - syslog.syslog(syslog.LOG_INFO, "Start Led({0})".format(self.up)) - - def led_stop(self): - BCM_SHELL.cmd("led {0} stop".format(self.up)) - syslog.syslog(syslog.LOG_INFO, "Stop Led({0})".format(self.up)) - - def load_prog(self): - BCM_SHELL.cmd("led {0} prog {1}".format(self.up, self.pfw)) - syslog.syslog(syslog.LOG_INFO, "Load Led({0}) program firmware".format(self.up)) - - def write_port_data(self, addr, data): - BCM_SHELL.cmd("setreg CMIC_LEDUP{0}_DATA_RAM({1}) {2}".format(self.up, addr, data)) - #syslog.syslog(syslog.LOG_DEBUG, "Write Led({0}) data_ram({1}): {2}".format(self.up, addr, data)) - - def read_data_ram(self, offset): - return_string = BCM_SHELL.run("getreg CMIC_LEDUP{0}_DATA_RAM({1})".format(self.up, offset)) - for line in return_string.split("\n"): - re_obj = re.search(r"\.+)\>",line) +class Port(): + + port_num = None + name = None + bcm_id = None + led_up = None + s_addr = None + write2_up = None + led_index = None + link_status = None + speed = None + + def write_data_ram(self, data): + BCM_SHELL.cmd("setreg CMIC_LEDUP{0}_DATA_RAM({1}) {2}".format(self.write2_up, self.led_index, data)) + + def read_data_ram(self): + r_string = BCM_SHELL.run("getreg CMIC_LEDUP{0}_DATA_RAM({1})".format(self.led_up, self.s_addr)) + for line in r_string.split("\n"): + re_obj = re.search(r"\.+)\>", line) if re_obj is not None: - #syslog.syslog(syslog.LOG_DEBUG, "Read Led({0}) data_ram({1}): {2}".format(self.up, offset, re_obj.group("data"))) + #syslog.syslog(syslog.LOG_DEBUG, "Read Led({0}) data_ram({1}): {2}".format(self.up, addr, re_obj.group("data"))) return int(re_obj.group("data"), 16) - return None # ===================================================================== # Function # ===================================================================== -def _remap_registers(): +def _remap_registers(fp): - fp = open('/usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/led_proc_init.soc', "r") content = fp.readlines() fp.close() err = False @@ -125,60 +102,13 @@ def _remap_registers(): syslog.syslog(syslog.LOG_ERR, "remap register abnormal: {0}".format(str(e))) if not err: - pass - #syslog.syslog(syslog.LOG_DEBUG, "remap Led registers successfully") - - - -def _update_port_list(): - - global PORT_LIST - PORT_LIST = [] - number = 0 - count = 0 - - content = BCM_SHELL.run("ps") - for line in content.split("\n"): - re_obj = re.search(r"(?P(xe|ce)\d+)\(\s*(?P\d+)\)\s+(?P(up|down|!ena)).+\s+(?P\d+)G",line) - if re_obj is not None: - if int(re_obj.group("bcm_id")) not in EAGLE_CORE: - PORT_LIST.append({"port_id":number, "name":re_obj.group("port_name"), "bcm_id":int(re_obj.group("bcm_id")), "link":re_obj.group("link"), "speed":int(re_obj.group("speed"))}) - number += 1 - - content = BCM_SHELL.run("led status") - for line in content.split("\n"): - re_obj = re.search(r"(?P\d+).+(?P\d)\:(?P\d+)",line) - if re_obj is not None: - if int(re_obj.group("bcm_id")) not in EAGLE_CORE: - PORT_LIST[count]["led_up"] = int(re_obj.group("led_up")) - PORT_LIST[count]["offset"] = int(re_obj.group("offset")) - count += 1 - - if number is not count: - PORT_LIST = [] - syslog.syslog(syslog.LOG_ERR, "The amount of port is not match") - else: - pass - #syslog.syslog(syslog.LOG_DEBUG, "update port list successfully") - - - -def _lookup_led_index(p): - - index = 0 - for port in PORT_LIST: - if p["bcm_id"] == port["bcm_id"]: - break - if p["led_up"] == port["led_up"]: - index += 1 - return index + PORT_DATA_OFFSET_ADDR + syslog.syslog(syslog.LOG_INFO, "remap Led registers successfully") -def _led_init(): +def _board_init(): global BOARD_TPYE - global AMOUNT_LED_UP global BIT_LINK global BIT_FAULT global BIT_TX @@ -193,24 +123,29 @@ def _led_init(): cmd = "uname -n" platform = os.popen(cmd).read() - if platform.rstrip() == INV_REDWOOD: + if platform.rstrip() == INV_MAGNOLIA: + BOARD_TPYE = "inventec_d6254qs" + BIT_RX = 1<<0 #0x01 + BIT_TX = 1<<1 #0x02 + BIT_SPEED1 = 1<<4 #0x10 + BIT_LINK = 1<<7 #0x80 + fp = open('/usr/share/sonic/device/x86_64-inventec_d6254qs-r0/led_proc_init.soc', "r") + _remap_registers(fp) + + elif platform.rstrip() == INV_REDWOOD: BOARD_TPYE = "inventec_d7032q28b" - AMOUNT_LED_UP = 2 BIT_RX = 1<<0 #0x01 BIT_TX = 1<<1 #0x02 BIT_SPEED0 = 1<<3 #0x08 BIT_SPEED1 = 1<<4 #0x10 BIT_FAULT = 1<<6 #0x40 BIT_LINK = 1<<7 #0x80 - TOTAL_SCAN_BITS = 32*1*4 - SYNC_S = 15 - SYNC_P = 3 EAGLE_CORE = [66, 100] - _remap_registers() + fp = open('/usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/led_proc_init.soc', "r") + _remap_registers(fp) elif platform.rstrip() == INV_CYPRESS: BOARD_TPYE = "inventec_d7054q28b" - AMOUNT_LED_UP = 2 BIT_LINK = 1<<0 #0x01 BIT_FAULT = 1<<1 #0x02 BIT_SPEED0 = 1<<2 #0x04 @@ -218,97 +153,220 @@ def _led_init(): elif platform.rstrip() == INV_SEQUOIA: BOARD_TPYE = "inventec_d7264q28b" - AMOUNT_LED_UP = 4 + + elif platform.rstrip() == INV_MAPLE: + BOARD_TPYE = "inventec_d6556" + fp = open('/usr/share/sonic/device/x86_64-inventec_d6556-r0/led_proc_init.soc', "r") + _remap_registers(fp) + #led process: m0 led process that is controlled by linkscan_led_fw.bin and custom_led.bin + syslog.syslog(syslog.LOG_INFO, "Found device: {0}".format(BOARD_TPYE)) + exit(0) else: BOARD_TPYE = "not found" + syslog.syslog(syslog.LOG_ERR, "Found device: {0}".format(BOARD_TPYE)) + exit(0) - syslog.syslog(syslog.LOG_INFO, "Device: {0}".format(BOARD_TPYE)) - #syslog.syslog(syslog.LOG_DEBUG, "led_amount: {0}".format(AMOUNT_LED_UP)) + syslog.syslog(syslog.LOG_INFO, "Found device: {0}".format(BOARD_TPYE)) -if __name__ == "__main__": +def _lookup_led_index(p): + + index = 0 + if BOARD_TPYE == "inventec_d6254qs": + if 0 <= p.port_num <= 47: + index = p.port_num + (p.port_num / 4) + p.write2_up = 0 + elif 48 <= p.port_num <= 71: + index = p.port_num - 48 + p.write2_up = 1 + if p.led_up == 0: + p.s_addr = p.port_num * 2 + elif p.led_up == 1: + p.s_addr = (p.port_num - 36) * 2 + + elif BOARD_TPYE == "inventec_d7032q28b": + p.write2_up = 0 + index = p.port_num + if 0 <= p.port_num <= 7: + p.s_addr = p.port_num * 8 + elif 8 <= p.port_num <= 23: + p.s_addr = (p.port_num - 8) * 8 + elif 24 <= p.port_num <= 31: + p.s_addr = (p.port_num - 16) * 8 + + else: + p.write2_up = p.led_up + for port in PORT_LIST: + if p.bcm_id == port.bcm_id: + break + if p.led_up == port.led_up: + index += 1 + + return PORT_DATA_OFFSET_ADDR + index + + +def _update_port_list(only_update): + + global PORT_LIST + number = 0 + count = 0 + + content = BCM_SHELL.run("ps") + for line in content.split("\n"): + re_obj = re.search(r"(?P(xe|ce)\d+)\(\s*(?P\d+)\)\s+(?P(up|down|!ena)).+\s+(?P\d+)G", line) + if re_obj is not None: + if int(re_obj.group("bcm_id")) not in EAGLE_CORE: + if only_update: + PORT_LIST[number].link_status = re_obj.group("link") + else: + # create port object while first time + port_obj = Port() + port_obj.port_num = number + port_obj.name = re_obj.group("port_name") + port_obj.bcm_id = int(re_obj.group("bcm_id")) + port_obj.link_status = re_obj.group("link") + port_obj.speed = int(re_obj.group("speed")) + PORT_LIST.append(port_obj) + number += 1 + + if not only_update: + content = BCM_SHELL.run("led status") + for line in content.split("\n"): + re_obj = re.search(r"(?P\d+).+(?P\d)\:", line) + if re_obj is not None: + if int(re_obj.group("bcm_id")) not in EAGLE_CORE: + PORT_LIST[count].led_up = int(re_obj.group("led_up")) + PORT_LIST[count].led_index = _lookup_led_index(PORT_LIST[count]) + count += 1 + + if number is not count: + PORT_LIST = [] + syslog.syslog(syslog.LOG_ERR, "The amount of port is not match") + - waitSyncd = True - retryCount = 0 - syslog.openlog("led_proc", syslog.LOG_PID, facility=syslog.LOG_DAEMON) + +def sync_bcmsh_socket(): + + global BCM_SHELL + global SHELL_READY + waitSyncd = True + retryCount = 0 while waitSyncd: + time.sleep(10) try: BCM_SHELL = bcmshell() + BCM_SHELL.run("Echo") waitSyncd = False except Exception, e: - syslog.syslog(syslog.LOG_WARNING, "{0}, Retry times({1})".format(str(e),retryCount)) + print "{0}, Retry times({1})".format(str(e),retryCount) + #syslog.syslog(syslog.LOG_DEBUG, "{0}, Retry times({1})".format(str(e),retryCount)) retryCount += 1 - time.sleep(5) - - - _led_init() - led_obj = [] - for idx in range(AMOUNT_LED_UP): - led_obj.append(Led(idx, "")) - #syslog.syslog(syslog.LOG_DEBUG, "create object led({0}) successfully".format(idx)) - - if BOARD_TPYE == "inventec_d7032q28b": - led_obj[idx].write_port_data(PORT_DATA_START_ADDR, PORT_DATA_OFFSET_ADDR) - led_obj[idx].write_port_data(TOTAL_SCAN_BITS_ADDR, TOTAL_SCAN_BITS) - led_obj[idx].write_port_data(SYNC_START_LEN_ADDR, SYNC_S) - led_obj[idx].write_port_data(SYNC_STOP_LEN_ADDR, SYNC_P) - - - reset_sec = 2 - count_down = 0 - queue_active = [] - port_data = None - while True: - if count_down == 0: - queue_active = [] - _update_port_list() - for port in PORT_LIST: - if port["link"] == "up": - queue_active.append(port) - else: - port_data = 0 - # redwood bit streaming for CPLD decode is only use led up0 - led_obj[0].write_port_data(PORT_DATA_OFFSET_ADDR + port["port_id"], port_data) - count_down = reset_sec - else: - for port in queue_active: - port_data = 0 - - if BOARD_TPYE == "inventec_d7032q28b": - port_data |= BIT_LINK - addr = 2*(port["offset"]-1) - byte1 = led_obj[port["led_up"]].read_data_ram(addr) - byte2 = led_obj[port["led_up"]].read_data_ram(addr+1) - if byte1&STATUS_RX: - port_data |= BIT_RX - if byte1&STATUS_TX: - port_data |= BIT_TX - if port["speed"] == SPEED_100G: - port_data |= BIT_SPEED0 - port_data |= BIT_SPEED1 - elif port["speed"] == SPEED_40G: - port_data |= BIT_SPEED1 - elif port["speed"] == SPEED_25G: - port_data |= BIT_SPEED0 + + syslog.syslog(syslog.LOG_INFO, "bcmshell socket create successfully") + + if SHELL_READY is False: + SHELL_READY = True + return + elif SHELL_READY is True: + update_led_status() + + + +def update_led_status(): + + led_thread = True # True/False (gate to turn on/off) + reset_sec = 2 + count_down = 0 + queue_active = [] + port_data = None + s_byte = None + + + # thread for keeping update port status in data ram + while led_thread: + try: + if count_down == 0: + queue_active = [] + _update_port_list(1) + for port in PORT_LIST: + if port.link_status == "up": + queue_active.append(port) else: - pass + port_data = 0 + port.write_data_ram(port_data) + count_down = reset_sec + else: + for port in queue_active: + port_data = 0 - # redwood bit streaming for CPLD decode is only use led up0 - led_obj[0].write_port_data(PORT_DATA_OFFSET_ADDR + port["port_id"], port_data) - continue + if BOARD_TPYE == "inventec_d6254qs": + s_byte = port.read_data_ram() + if s_byte&STATUS_RX: + port_data |= BIT_RX + if s_byte&STATUS_TX: + port_data |= BIT_TX + port_data |= BIT_LINK + + elif BOARD_TPYE == "inventec_d7032q28b": + s_byte = port.read_data_ram() + if s_byte&STATUS_RX: + port_data |= BIT_RX + if s_byte&STATUS_TX: + port_data |= BIT_TX + if port.speed == SPEED_100G: + port_data |= BIT_SPEED0 + port_data |= BIT_SPEED1 + elif port.speed == SPEED_40G: + port_data |= BIT_SPEED1 + elif port.speed == SPEED_25G: + port_data |= BIT_SPEED0 + else: + pass + port_data |= BIT_LINK + + elif BOARD_TPYE == "inventec_d7054q28b": + if port.speed != SPEED_100G and port.speed != SPEED_25G: + port_data |= BIT_SPEED0 + + # write data to update data ram for specific port + port.write_data_ram(port_data) + + time.sleep(0.5) + count_down -= 1 - elif BOARD_TPYE == "inventec_d7054q28b": - if port["speed"] != SPEED_100G and port["speed"] != SPEED_25G: - port_data |= BIT_SPEED0 + except Exception, e: + syslog.syslog(syslog.LOG_WARNING, "{0}".format(str(e))) + sync_bcmsh_socket() - led_index = _lookup_led_index(port) - led_obj[port["led_up"]].write_port_data(led_index, port_data) - time.sleep(0.5) - count_down -= 1 - syslog.closelog() +def debug_print(): + + for port in PORT_LIST: + output = "" + output += "name:{0} | ".format(port.name) + output += "port_num:{0} | ".format(port.port_num) + output += "bcm_id:{0} | ".format(port.bcm_id) + output += "link_status:{0} | ".format(port.link_status) + output += "speed:{0} | ".format(port.speed) + output += "led_up:{0} | ".format(port.led_up) + output += "s_addr:{0} | ".format(port.s_addr) + output += "write2_up:{0} | ".format(port.write2_up) + output += "led_index:{0} | ".format(port.led_index) + print output + +if __name__ == "__main__": + + syslog.openlog("led_proc", syslog.LOG_PID, facility=syslog.LOG_DAEMON) + + sync_bcmsh_socket() + _board_init() + _update_port_list(0) + #debug_print() + update_led_status() + + syslog.closelog() diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform_status.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform_status.py new file mode 100755 index 00000000000..f1e7f7fece7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform_status.py @@ -0,0 +1,64 @@ +#!/usr/bin/env python + +import os +import socket +from collections import OrderedDict + +# Purpose: Shutdown DUT upon receiving thermaltrip event from kernel (inv_pthread) + +NETLINK_KOBJECT_UEVENT = 15 + +class KernelEventMonitor(object): + + def __init__(self): + self.received_events = OrderedDict() + self.socket = socket.socket(socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + + def start(self): + self.socket.bind((os.getpid(), -1)) + + def stop(self): + self.socket.close() + + def __enter__(self): + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + self.stop() + + def __iter__(self): + while True: + for item in monitor.next_events(): + yield item + + def next_events(self): + data = self.socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + #check if we have an event and if we already received it + if event and event['SEQNUM'] not in self.received_events: + self.received_events[event['SEQNUM']] = None + if (len(self.received_events) > 100): + self.received_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + except ValueError: + pass + +if __name__ == '__main__': + with KernelEventMonitor() as monitor: + for event in monitor: + if event['SUBSYSTEM'] == 'platform_status': + print('subsystem is platform_status') + + # Receive thermaltrip event + if event['ACTION'] == 'remove' and event['DEVPATH'] == '/kernel/platform_status/fan': + os.system("shutdown -h now") + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/transceiver_monitor.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/transceiver_monitor.py index 6546a4e44ca..9e4a44c167f 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/common/utils/transceiver_monitor.py +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/transceiver_monitor.py @@ -1,5 +1,10 @@ #!/usr/bin/env python # +# Copyright (C) 2018 Inventec, Inc. +# +# Editor: James Huang ( Huang.James@inventec.com ) +# +# """ Usage: %(scriptName)s [options] command object @@ -32,6 +37,8 @@ INV_REDWOOD_PLATFORM = "SONiC-Inventec-d7032-100" INV_CYPRESS_PLATFORM = "SONiC-Inventec-d7054" INV_SEQUOIA_PLATFORM = "SONiC-Inventec-d7264" +INV_MAPLE_PLATFORM = "SONiC-Inventec-d6556" +INV_MAGNOLIA_PLATFORM = "SONiC-Inventec-d6254qs" transceiver_type_dict = { "FCBG110SD1C03": "SR", @@ -76,7 +83,29 @@ "L0HSF006-SD-R": "KR", "L0HSF007-SD-R": "KR", "L0HSF008-SD-R": "KR", - "L0HQF009-SD-R": "KR4" + "L0HQF009-SD-R": "KR4", + "FSPP-H7-M85-X3D": "SR", + "PT0-M3-4D33K-C2": "SR", + "RTXM228-551": "SR", + "RTXM330-003": "SR", + "RTXM330-030": "SR", + "MFA2P10-A005": "SR", + "QAB-OA03MC": "SR4", + "QAB-OA05MC": "SR4", + "RTXM320-571": "SR4", + "AFBR-89CDDZ": "SR4", + "RTXM420-550": "SR4", + "MMA1B00-C100D": "SR4", + "RTXM420-551": "SR4", + "E04025QTXA000": "SR4", + "LQ210PR-Oxxx": "SR4", + "TR-FC13L-N00": "SR4", + "SPQ-CE-LR-CDFL": "SR4", + "FIM37700/170": "SR4", + "FCBN425QE1C03": "SR4", + "TQS-Q14H8-XCAXX": "SR4", + "FPD-203R008-10/3": "SR4", + "LTA8531-PC+": "SR4" } initial_command = [] @@ -107,8 +136,9 @@ def get_port_to_bcm_mapping(self): else: return self.port_to_bcm_mapping - def show_port_to_bcm_mapping(self): - print self.port_to_bcm_mapping + def show_port_to_bcm_mapping(self): + for key,value in self.port_to_bcm_mapping.iteritems(): + print "{0}---{1}".format(key, value) def get_eagle_port(self): return self.eagle_list @@ -122,6 +152,8 @@ def parsing_eagle_port(self): self.eagle_list = [66,100] elif name == INV_SEQUOIA_PLATFORM: self.eagle_list = [66,100] + elif name == INV_MAPLE_PLATFORM: + self.eagle_list = [66,130] else: self.eagle_list = [] @@ -129,7 +161,8 @@ def get_sal_config_list(self): return self.sal_config_list def show_sal_config_list(self): - print self.sal_config_list + for key,value in self.sal_config_list.iteritems(): + print "{0}---{1}".format(key, value) def initial_sal_config_list( self ): content = self.run("config") @@ -164,7 +197,8 @@ def get_transceiver_port_mapping(self): return self.transceiver_port_mapping def show_transceiver_port_mapping(self): - print self.transceiver_port_mapping + for key,value in self.transceiver_port_mapping.iteritems(): + print "{0}---{1}".format(key, value) def get_bcm_port_name(self, index): if self.transceiver_port_mapping.has_key(index) and bcm_obj.get_sal_config_list().has_key(self.transceiver_port_mapping[index]["bcm"]): @@ -179,7 +213,8 @@ def get_port_to_i2c_mapping(self): return self.port_to_i2c_mapping def show_port_to_i2c_mapping(self): - print self.port_to_i2c_mapping + for key,value in self.port_to_i2c_mapping.iteritems(): + print "{0}---{1}".format(key, value) def get_eeprom_partNum(self, portNum): tempdict = dict() @@ -210,12 +245,12 @@ def get_transceiver_type(self, pn ): def set_transceiver_type( self, portNum, pn ): type = self.get_transceiver_type( pn ) if type is not None: - if bcm_obj.get_platform() == INV_SEQUOIA_PLATFORM: + if bcm_obj.get_platform() == INV_SEQUOIA_PLATFORM or bcm_obj.get_platform() == INV_MAPLE_PLATFORM : speed = bcm_obj.get_sal_config_list()[self.transceiver_port_mapping[portNum]["bcm"]]["speed"] bcm_obj.execute_command( "port %s if=%s speed=%d" % ( self.get_bcm_port_name(portNum), type, speed ) ) else: bcm_obj.execute_command( "port %s if=%s" % ( self.get_bcm_port_name(portNum), type ) ) - #print "Detecting port {0} need to change interface type {1} ({2})".format(self.get_bcm_port_name(portNum), type, self.get_transceiver_port_mapping()[portNum]["pn"]) + print "Detecting port {0}({1}) need to change interface type {2} ({3})".format( self.get_bcm_port_name(portNum), portNum, type, self.get_transceiver_port_mapping()[portNum]["pn"]) log_message("Detecting port {0} need to change interface type {1} ({2})".format(self.get_bcm_port_name(portNum), type, self.get_transceiver_port_mapping()[portNum]["pn"]) ) def initial_transceiver_port_mapping(self): @@ -229,57 +264,90 @@ def set_power_mode_for_QSFP(self): for index in self.get_port_to_i2c_mapping().keys(): if index >= self.qsfp_port_start and index <= self.qsfp_port_end : self.set_low_power_mode(index, False) + else: + # To set tx_disable + self.set_tx_disable(index) -def main(): - try: - global DEBUG - global transceiver_obj - global bcm_obj - - initalNotOK = True - retestCount = 0 - while initalNotOK : - try: - transceiver_obj = TransceiverUtil() - bcm_obj = BCMUtil() - initalNotOK = False - except Exception, e: - log_message("Exception. The warning is {0}, Retry again ({1})".format(str(e),retestCount) ) - retestCount = retestCount + 1 - time.sleep(5) - - log_message( "Object initialed successfully" ) + def set_tx_disable(self, port_num): + if port_num >= self.qsfp_port_start and port_num <= self.qsfp_port_end : + pass + else: + try: + tx_file = open("/sys/class/swps/port"+str(port_num)+"/tx_disable", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(tx_file.readline().rstrip()) + + # always set 0 to tx_disable field + if reg_value == 1 : + reg_value = 0 + tx_file.write(hex(reg_value)) + tx_file.close() - options, args = getopt.getopt(sys.argv[1:], 'hd', ['help', - 'debug' - ]) - for opt, arg in options: - if opt in ('-h', '--help'): - show_help() - elif opt in ('-d', '--debug'): - DEBUG = True - logging.basicConfig(level=logging.INFO) - else: - logging.info("no option") - - # Before loop, You could execute specific command to initial chip - for cmd_index in initial_command : - bcm_obj.execute_command(cmd_index) - - # Initial the sal config list - bcm_obj.parsing_eagle_port() - bcm_obj.initial_sal_config_list() - bcm_obj.parsing_port_list() - # bcm_obj.show_port_to_bcm_mapping() - # bcm_obj.show_sal_config_list() - # Initial the transceiver_obj - transceiver_obj.initial_transceiver_port_mapping() - # transceiver_obj.show_transceiver_port_mapping() - - transceiver_obj.set_power_mode_for_QSFP() +def main(): - while 1 : + global DEBUG + global transceiver_obj + global bcm_obj + + initalNotOK = True + retestCount = 0 + while initalNotOK : + try: + transceiver_obj = TransceiverUtil() + bcm_obj = BCMUtil() + initalNotOK = False + except Exception, e: + log_message("Exception. The warning is {0}, Retry again ({1})".format(str(e),retestCount) ) + retestCount = retestCount + 1 + time.sleep(5) + + log_message( "Object initialed successfully" ) + options, args = getopt.getopt(sys.argv[1:], 'hd', ['help', + 'debug' + ]) + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + else: + logging.info("no option") + + initalNotOK = True + while initalNotOK : + try : + # Before loop, You could execute specific command to initial chip + for cmd_index in initial_command : + bcm_obj.execute_command(cmd_index) + + # Initial the sal config list + bcm_obj.parsing_eagle_port() + bcm_obj.initial_sal_config_list() + # bcm_obj.show_sal_config_list() + bcm_obj.parsing_port_list() + #bcm_obj.show_port_to_bcm_mapping() + #bcm_obj.show_sal_config_list() + # transceiver_obj.show_port_to_i2c_mapping() + + # Initial the transceiver_obj + transceiver_obj.initial_transceiver_port_mapping() + # transceiver_obj.show_transceiver_port_mapping() + + initalNotOK = False + except Exception, e: + log_message("Exception. The warning is {0}".format(str(e)) ) + time.sleep(5) + + # Improve the power mode for QSFP ports + transceiver_obj.set_power_mode_for_QSFP() + + while 1 : + try: if bcm_obj.get_platform() == INV_SEQUOIA_PLATFORM: bcm_obj.parsing_port_list() for index in transceiver_obj.get_port_to_i2c_mapping().keys(): @@ -287,15 +355,17 @@ def main(): value = transceiver_obj.get_eeprom_partNum_from_parser_eeprom_dict(info) if transceiver_obj.get_transceiver_port_mapping().has_key(index) is not False and transceiver_obj.get_transceiver_port_mapping()[index]["pn"] <> value: transceiver_obj.get_transceiver_port_mapping()[index]["pn"] = value - transceiver_obj.set_transceiver_type(index,value) - #transceiver_obj.show_transceiver_port_mapping() - time.sleep(1) + transceiver_obj.set_transceiver_type(index,value) + transceiver_obj.set_tx_disable(index) + #transceiver_obj.show_transceiver_port_mapping() + # transceiver_obj.show_transceiver_port_mapping() + except Exception, e: + log_message("Exception. The warning is {0}".format(str(e)) ) + time.sleep(1) - except (Exception, KeyboardInterrupt) as e: - log_message("Terminating this python daemon ({0})".format(e)) - syslog.closelog() - del transceiver_obj - del bcm_obj + syslog.closelog() + del transceiver_obj + del bcm_obj if __name__ == "__main__": main() @@ -303,3 +373,6 @@ def main(): + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile new file mode 100644 index 00000000000..13fc34c230c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile @@ -0,0 +1,7 @@ +obj-m += inv_cpld.o inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += swps.o +obj-m += inv_pthread.o +swps-objs := inv_swps.o io_expander.o transceiver.o + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c new file mode 100644 index 00000000000..683ffa0ff3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c @@ -0,0 +1,415 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C + + + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "NA", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + /* + 0: off + 1: 0.5hz + 2: 1 hz + 3: 2 hz + 4~6: not define + 7: on + */ + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c new file mode 100644 index 00000000000..3d13f3b0471 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D7054 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c new file mode 100644 index 00000000000..a8a9a3c3df7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c @@ -0,0 +1,280 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +static struct mux_obj_s *mux_head_p = NULL; + + +/* ========== MUX object functions ========== + */ +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + return 0; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + + if (!gpio_is_valid(self->gpio_num)) { + SWPS_ERR("%s: GIPO:%d isn't valid\n", __func__, self->gpio_num); + return -1; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + SWPS_ERR("%s: gpio_request fail :%d :%d\n", + __func__, err, self->gpio_num); + return -1; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PAC9548: + case MUX_RST_GPIO_69_PAC9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + if (gpio_is_valid(mux_head_p->gpio_num)) { + gpio_free(mux_head_p->gpio_num); + } + kfree(mux_head_p); + mux_head_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +reset_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_mux_gpio(unsigned gpio){ + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_gpio(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl if HW add new features. + * (Ex: Port power-status control) + */ + mux_head_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!mux_head_p) { + SWPS_ERR("%s: kzalloc fail!\n", __func__); + return -1; + } + /* Initial MUX controller */ + if (_setup_muxctl_cb(mux_head_p, gpio) < 0){ + SWPS_ERR("%s: _setup_muxctl_cb fail!\n", __func__); + return -1; + } + if (mux_head_p->_init(mux_head_p) < 0) { + SWPS_ERR("%s: init() fail\n", __func__); + goto err_init_mux_gpio; + } + /* Setup default value */ + if (mux_head_p->_pull_high(mux_head_p) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + goto err_init_mux_gpio; + } + return 0; + +err_init_mux_gpio: + clean_mux_gpio(); + return -1; +} + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h new file mode 100644 index 00000000000..687a11b4e5b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h @@ -0,0 +1,45 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef INV_MUX_H +#define INV_MUX_H + + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PAC9548 (48) +#define MUX_RST_GPIO_69_PAC9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_505_PCA9548 (505) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS (1) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +struct mux_obj_s { + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_gpio(void); +int reset_mux_gpio(void); +int init_mux_gpio(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c new file mode 100644 index 00000000000..e69b526f455 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c @@ -0,0 +1,243 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = 2,}, {.adap_id = 3,}, + {.adap_id = 4,}, {.adap_id = 5,}, + {.adap_id = 6,}, {.adap_id = 7,}, + {.adap_id = 8,}, {.adap_id = 9,}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = 10,}, {.adap_id = 11,}, + {.adap_id = 12,}, {.adap_id = 13,}, + {.adap_id = 14,}, {.adap_id = 15,}, + {.adap_id = 16,}, {.adap_id = 17,}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = 18,}, {.adap_id = 19,}, + {.adap_id = 20,}, {.adap_id = 21,}, + {.adap_id = 22,}, {.adap_id = 23,}, + {.adap_id = 24,}, {.adap_id = 25,}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = 26,}, {.adap_id = 27,}, + {.adap_id = 28,}, {.adap_id = 29,}, + {.adap_id = 30,}, {.adap_id = 31,}, + {.adap_id = 32,}, {.adap_id = 33,}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = 34,}, {.adap_id = 35,}, + {.adap_id = 36,}, {.adap_id = 37,}, + {.adap_id = 38,}, {.adap_id = 39,}, + {.adap_id = 40,}, {.adap_id = 41,}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = 42,}, {.adap_id = 43,}, + {.adap_id = 44,}, {.adap_id = 45,}, + {.adap_id = 46,}, {.adap_id = 47,}, + {.adap_id = 48,}, {.adap_id = 49,}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = 50,}, {.adap_id = 51,}, + {.adap_id = 52,}, {.adap_id = 53,}, + {.adap_id = 54,}, {.adap_id = 55,}, + {.adap_id = 56,}, {.adap_id = 57,}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = 58,}, {.adap_id = 59,}, + {.adap_id = 60,}, {.adap_id = 61,}, + {.adap_id = 62,}, {.adap_id = 63,}, + {.adap_id = 64,}, {.adap_id = 65,}, +}; + +//no i2c device driver attach to mux 7 + + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + + +static struct i2c_board_info xlp_i2c_device_info0[] __initdata = { + {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld + {"pca9548", 0, 0x71, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info1[] __initdata = { + {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld +}; + +static struct i2c_board_info xlp_i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info xlp_i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info xlp_i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info xlp_i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {0, ARRAY_SIZE(xlp_i2c_device_info0), xlp_i2c_device_info0 }, //smbus 0 + + {2, ARRAY_SIZE(xlp_i2c_device_info2), xlp_i2c_device_info2 }, //mux 0 + {3, ARRAY_SIZE(xlp_i2c_device_info3), xlp_i2c_device_info3 }, //mux 1 + {4, ARRAY_SIZE(xlp_i2c_device_info4), xlp_i2c_device_info4 }, //mux 2 + {5, ARRAY_SIZE(xlp_i2c_device_info5), xlp_i2c_device_info5 }, //mux 3 + {6, ARRAY_SIZE(xlp_i2c_device_info6), xlp_i2c_device_info6 }, //mux 4 + {7, ARRAY_SIZE(xlp_i2c_device_info7), xlp_i2c_device_info7 }, //mux 5 + {8, ARRAY_SIZE(xlp_i2c_device_info8), xlp_i2c_device_info8 }, //mux 6 +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct i2c_gpio_platform_data i2c_gpio_platdata = { + .scl_pin = 8, + .sda_pin = 9, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device magnolia_device_i2c_gpio = { + .name = "i2c-gpio", + .id = 0, // adapter number + .dev.platform_data = &i2c_gpio_platdata, +}; + +#define PLAT_MAX_I2C_CLIENTS 32 +static struct i2c_client *plat_i2c_client[PLAT_MAX_I2C_CLIENTS]; +static int num_i2c_clients = 0; +static int plat_i2c_client_add(struct i2c_client *e) +{ + if (num_i2c_clients >= PLAT_MAX_I2C_CLIENTS) + return -1; + + plat_i2c_client[num_i2c_clients] = e; + num_i2c_clients++; + return num_i2c_clients; +} + +static void plat_i2c_client_remove_all(void) +{ + int i; + for (i = num_i2c_clients-1; i >= 0; i--) + i2c_unregister_device(plat_i2c_client[i]); +} + +static int __init plat_magnolia_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j; + + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +#define FAN_NUM 4 +#define PSU_NUM 2 + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; + + u8 psu1_vendor[16]; + u8 psu2_vendor[16]; + u8 psu1_model[20]; + u8 psu2_model[20]; + u8 psu1_version[8]; + u8 psu2_version[8]; + u8 psu1_date[6]; + u8 psu2_date[6]; + u8 psu1_sn[20]; + u8 psu2_sn[20]; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + u8 reserve0; //offset: 3 + + u8 fw_upgrade; //offset: 4 + + //i2c bridge + u8 i2c_st; //offset: 5 + u8 i2c_ctl; //offset: 6 + u8 i2c_addr; //offset: 7 + u8 i2c_data[0x20]; //offset: 8 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[FAN_NUM]; //offset: 2a + u8 pwm_psu[PSU_NUM]; //offset: 2e + + //fan rpm + u16 fan[FAN_NUM*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[PSU_NUM]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + +/* Each client has this additional data */ +struct psoc_data { + struct device *hwmon_dev; + struct mutex update_lock; + u32 diag; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t psoc_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t psoc_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +#if 0 +static u32 psoc_read32(struct i2c_client *client, u8 offset) +{ + u32 value = 0; + u8 buf[4]; + + if( psoc_i2c_read(client, buf, offset, 4) == 4) + value = (buf[0]<<24 | buf[1]<<16 | buf[2]<<8 | buf[3]); + + return value; +} +#endif + +static u16 psoc_read16(struct i2c_client *client, u8 offset) +{ + u16 value = 0; + u8 buf[2]; + + if(psoc_i2c_read(client, buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(struct i2c_client *client, u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_i2c_read(client, &buf, offset, 1) == 1) + value = buf; + + return value; +} + +//PSOC i2c bridge regsters +#define PSOC_I2C_STATUS 0x05 +#define PSOC_I2C_CNTRL 0x06 +#define PSOC_I2C_ADDR 0x07 +#define PSOC_I2C_DATA 0x08 + +//status bit definition +#define PSOC_I2C_START (1 << 0) +#define PSOC_PMB_SEL (1 << 7) + +//addr bits definition +#define PSOC_I2C_READ (1 << 0) + +//PMBUS registers definition +#define PMBUS_READ_VIN (0x88) +#define PMBUS_READ_IIN (0x89) +#define PMBUS_READ_VOUT (0x8B) +#define PMBUS_READ_IOUT (0x8C) +#define PMBUS_READ_POUT (0x96) +#define PMBUS_READ_PIN (0x97) + +#define PMBUS_MFR_ID (0x99) +#define PMBUS_MFR_MODEL (0x9A) +#define PMBUS_MFR_REVISION (0x9B) +#define PMBUS_MFR_DATE (0x9D) +#define PMBUS_MFR_SERIAL (0x9E) + +static int psoc_i2c_bridge_read(struct i2c_client *client, + unsigned char bus, + unsigned char chip, + char *addr, int alen, + unsigned char *data, int len ) +{ + unsigned char txdata[28], rxdata[28]; + int index, timeout; + + txdata[PSOC_I2C_STATUS] = 0; /* the status */ + txdata[PSOC_I2C_CNTRL] = ((alen & 3) << 5) | (len & 0x1f); /* the sizes */ + txdata[PSOC_I2C_ADDR] = (chip << 1) | PSOC_I2C_READ; /* read address */ + for(index = 0; index < alen; index++) + txdata[PSOC_I2C_DATA + index] = addr[index]; /* the chip address */ + for(; index < alen+len; index++) + txdata[PSOC_I2C_DATA + index] = 0; /* clear the chip data */ + + psoc_i2c_write(client, &txdata[PSOC_I2C_CNTRL], PSOC_I2C_CNTRL, 2 + alen + len); + + //delay a while ??? + //--------------------------------------------------------------------- + //start write + txdata[PSOC_I2C_STATUS] = PSOC_I2C_START | PSOC_PMB_SEL; /* the start bit for the PM bus */ + psoc_i2c_write(client, &txdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //delay a while + timeout = 40; //40*20==>800 ms + do { + psoc_i2c_read(client, &rxdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //check rxdata[5] error bit(1) and complete bit(0) ,TBD + if((rxdata[PSOC_I2C_STATUS] & 0x2) == 0x2) { + //printk("i2c bridge fail!!!\n"); + timeout = 0; + break; + } + if((rxdata[PSOC_I2C_STATUS] & PSOC_I2C_START) == 0) { + /* comand complete */ + psoc_i2c_read(client, &rxdata[PSOC_I2C_DATA+alen], PSOC_I2C_DATA+alen, len); + break; + } + + //delay + msleep(20); + } while(timeout--); + + if(timeout <= 0) { + return -1; + } + + //--------------------------------------------------------------------- + + for(index=0; index < len; index++) { + data[index] = rxdata[PSOC_I2C_DATA + alen + index]; + } + + return 0; +} + + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, &byte, PSOC_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PWM_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PWM_OFFSET; + + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + + if(data->diag) { + mutex_lock(&data->update_lock); + psoc_i2c_write(client, &pwm, offset, 1); + mutex_unlock(&data->update_lock); + } + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index*2 + RPM_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u16 temp = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&temp, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); + + mutex_lock(&data->update_lock); + psoc_i2c_write(client, (u8*)&temp2, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 diag_flag = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + data->diag = (diag_flag & 0x80)?1:0; + status = sprintf (buf, "%d\n", data->diag); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + data->diag = diag; + + mutex_lock(&data->update_lock); + psoc_i2c_read(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_i2c_write(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, VERSION_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 bit = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, FAN_LED_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(data->diag) { + mutex_lock(&data->update_lock); + led_state = psoc_read8(client, FAN_LED_OFFSET); + if(v) led_state |= (1<update_lock); + } + + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 reg = attr->index & 0xFF; + u8 len = ((attr->index & 0xFF00) >> 8); + u8 chip = (attr->index >> 16)? 0x59:0x58; + u8 bus = 1; + unsigned char value[2] = {0,0};; + + if (len == 2) + { + mutex_lock(&data->update_lock); + psoc_i2c_bridge_read(client, bus, chip, ®, 1, value, 2); + mutex_unlock(&data->update_lock); + + status = value[1]<<8 | value[0]; + //status1 = value[1]<<8 | value[0]; + + return sprintf(buf, "%ld\n", pmbus_reg2data_linear(status, (reg==PMBUS_READ_VOUT)?1:0) ); + } + else + { //len is not defined. + u8 tmpbuf[32]; + mutex_lock(&data->update_lock); + //length of block read + psoc_i2c_bridge_read(client, bus, chip, ®, 1, &len, 1); + //data included length + psoc_i2c_bridge_read(client, bus, chip, ®, 1, tmpbuf, len+1); + mutex_unlock(&data->update_lock); + + memcpy(buf, tmpbuf+1, len); + buf[len]='\n'; + + return len+1; + } +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = (attr->index & 0xFF) + PSU_INFO_OFFSET; + u8 len = (attr->index >> 8)& 0xFF; + u8 rxbuf[21] = {0}; + if (len == 2) + { + mutex_lock(&data->update_lock); + status = psoc_read16(client, offset); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); + } + else + { + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client,rxbuf,offset,len); + mutex_unlock(&data->update_lock); + return sprintf(buf, "%s \n",rxbuf); + } +} + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9); + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); + +static SENSOR_DEVICE_ATTR(psu1_vin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu1_iin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu1_vendor, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu1_model, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu1_version, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu1_date, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu1_sn, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psu2_vin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu2_iin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu2_vendor, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu2_model, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu2_version, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu2_date, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu2_sn, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_pout)); + + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vendor, S_IRUGO, show_psu_psoc, 0, (0x10<<8)|PSOC_PSU_OFF(psu1_vendor)); +static SENSOR_DEVICE_ATTR(psoc_psu1_model, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu1_model)); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_psu_psoc, 0, (0x08<<8)|PSOC_PSU_OFF(psu1_version)); +static SENSOR_DEVICE_ATTR(psoc_psu1_date, S_IRUGO, show_psu_psoc, 0, (0x06<<8)|PSOC_PSU_OFF(psu1_date)); +static SENSOR_DEVICE_ATTR(psoc_psu1_sn, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu1_sn)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vendor, S_IRUGO, show_psu_psoc, 0, (0x10<<8)|PSOC_PSU_OFF(psu2_vendor)); +static SENSOR_DEVICE_ATTR(psoc_psu2_model, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu2_model)); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_psu_psoc, 0, (0x08<<8)|PSOC_PSU_OFF(psu2_version)); +static SENSOR_DEVICE_ATTR(psoc_psu2_date, S_IRUGO, show_psu_psoc, 0, (0x06<<8)|PSOC_PSU_OFF(psu2_date)); +static SENSOR_DEVICE_ATTR(psoc_psu2_sn, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu2_sn)); + +static struct attribute *psoc_attributes[] = { + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, + + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, + + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + + //psu + &sensor_dev_attr_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psu1_model.dev_attr.attr, + &sensor_dev_attr_psu1_version.dev_attr.attr, + &sensor_dev_attr_psu1_date.dev_attr.attr, + &sensor_dev_attr_psu1_sn.dev_attr.attr, + &sensor_dev_attr_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psu2_model.dev_attr.attr, + &sensor_dev_attr_psu2_version.dev_attr.attr, + &sensor_dev_attr_psu2_date.dev_attr.attr, + &sensor_dev_attr_psu2_sn.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + + //psu_psoc, new added on psoc 1.9 + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + //add info + &sensor_dev_attr_psoc_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_model.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_date.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_sn.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_model.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_date.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_sn.dev_attr.attr, + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +psoc_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psoc_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psoc_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->diag = 0; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psoc_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psoc_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int psoc_remove(struct i2c_client *client) +{ + struct psoc_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &psoc_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id psoc_ids[] = { + { "inv_psoc", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, psoc_ids); + +static struct i2c_driver psoc_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psoc", + }, + .probe = psoc_probe, + .remove = psoc_remove, + .id_table = psoc_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_psoc_init(void) +{ + return i2c_add_driver(&psoc_driver); +} + +static void __exit inv_psoc_exit(void) +{ + i2c_del_driver(&psoc_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c new file mode 100644 index 00000000000..7d3287a591c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c @@ -0,0 +1,1312 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/***************************** + Magnolia platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + +#define INV_PTHREAD_KERNEL_MODULE (1) +#define SWITCH_HEALTH_LED_CHANGE_VIA_GPIO (1) + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + + if (ret < 0) { + return ret; + } + + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("253", 3, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 253 to /sys/class/gpio/export failed\n"); + return; + } + + printk("[p_thread] Write 253 to /sys/class/gpio/export\n"); + + ret = inventec_store_attr("out", 3, "/sys/class/gpio/gpio253/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio253/direction failed\n"); + return; + } + + //pull high and then low + ret = inventec_store_attr("1", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 1 to sys/class/gpio/gpio253/value failed\n"); + } + + //pull low + ret = inventec_store_attr("0", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 0 to sys/class/gpio/gpio253/value failed\n"); + } + + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c new file mode 100644 index 00000000000..eff030df0a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c @@ -0,0 +1,3027 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p->vendor_name); + kfree(transvr_obj_p->vendor_pn); + kfree(transvr_obj_p->vendor_rev); + kfree(transvr_obj_p->vendor_sn); + kfree(transvr_obj_p->worker_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + platform_p->id = PLATFORM_SETTINGS; + for (i=0; iname, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + PLATFORM_SETTINGS); + goto err_get_platform_type_2; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2;; + } + } + return 0; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_CYPRESS_NABC: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_gpio(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_gpio(); +err_init_mux: + clean_port_obj(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_obj(); + clean_ioexp_objs(); + clean_mux_gpio(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h new file mode 100644 index 00000000000..8e1451d6149 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h @@ -0,0 +1,1033 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.7" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAGNOLIA + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + + +#endif /* INV_SWPS_H */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c new file mode 100644 index 00000000000..9f1bbd0e4f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c @@ -0,0 +1,1885 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_NABC: + return &ioexp_map_cypress_nabc; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + case IOEXP_TYPE_CYPRESS_NABC: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} + + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h new file mode 100644 index 00000000000..82fef3f7feb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h @@ -0,0 +1,183 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_CYPRESS_NABC (10103) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c new file mode 100644 index 00000000000..e7f3cf70fa6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c @@ -0,0 +1,8388 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[0], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h new file mode 100644 index 00000000000..42e1938670f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h @@ -0,0 +1,814 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py new file mode 100644 index 00000000000..31cf736dafb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py @@ -0,0 +1,239 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6254]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#'echo pca9548 0x71> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-2/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-3/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-4/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-5/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-6/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-7/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-8/new_device', +'echo inv_eeprom 0x53 > /sys/bus/i2c/devices/i2c-0/new_device'] +#'echo inv_psoc 0x66> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo inv_cpld 0x55> /sys/bus/i2c/devices/i2c-0/new_device'] + +drivers =[ +'gpio_ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_platform', +'inv_psoc', +'inv_cpld', +'swps', +'inv_pthread'] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(10,18): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(18,26): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(26,34): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(34,42): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(42,50): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(50,58): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(58,64): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " D6254 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile new file mode 100644 index 00000000000..c13abd37e12 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile @@ -0,0 +1,6 @@ +obj-m += inv_cpld.o inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += swps.o +obj-m += inv_pthread.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c new file mode 100644 index 00000000000..5ee4b26cdab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c @@ -0,0 +1,526 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_BIOSCS_OFFSET 0x04 +#define CPLD_PSUFANLED_OFFSET 0x75 + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_BIOSCS_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld BIOS_CS fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0] & 0x01); + + return strlen(buf); +} + +static ssize_t set_bios_cs(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + if(temp) byte |= 0x01; + else byte &= ~(0x01); + cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "4 Hz", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +static char* status_psufan_str[] = { + "OFF", //00 + "ON", //01 + "1 Hz", //10 + "2 Hz", //11 +}; + +static ssize_t show_psufan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 red_status, grn_status, byte; + int shift = (attr->index == 0)?0:2; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSUFANLED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte>>shift) & 0x33; + grn_status = byte >> 4; + red_status = byte & 0x03; + + return sprintf (buf, "0x%02x: Green %s , Red %s\n", byte, status_psufan_str[grn_status],status_psufan_str[red_status]); +} + +static ssize_t set_psufan_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int shift = (attr->index == 0)?0:2; + int mask = (attr->index == 0)?0xcc:0x33; + u8 temp = simple_strtol(buf, NULL, 16) & 0x33; + u8 byte = 0; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_PSUFANLED_OFFSET, 1); + byte &= mask; + byte |= (temp<update_lock); + + return count; +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static SENSOR_DEVICE_ATTR(fan_led, S_IWUSR|S_IRUGO, show_psufan_led, set_psufan_led, 0); +static SENSOR_DEVICE_ATTR(psu_led, S_IWUSR|S_IRUGO, show_psufan_led, set_psufan_led, 1); + +static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_psu_led.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +static struct attribute *cpld2_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + +// printk("+%s \n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + if(id->driver_data==1) // CPLD2 + status = sysfs_create_group(&client->dev.kobj, &cpld2_group); + else // default CPLD1 + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld" , 0, }, + { "inv_cpld2", 1, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c new file mode 100644 index 00000000000..7bb167d2e74 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D6556 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c new file mode 100644 index 00000000000..a303527bec4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c @@ -0,0 +1,281 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +static struct mux_obj_s *mux_head_p = NULL; + + +/* ========== MUX object functions ========== + */ +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + return 0; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + + if (!gpio_is_valid(self->gpio_num)) { + SWPS_ERR("%s: GIPO:%d isn't valid\n", __func__, self->gpio_num); + return -1; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + SWPS_ERR("%s: gpio_request fail :%d :%d\n", + __func__, err, self->gpio_num); + return -1; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PAC9548: + case MUX_RST_GPIO_69_PAC9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PAC9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + if (gpio_is_valid(mux_head_p->gpio_num)) { + gpio_free(mux_head_p->gpio_num); + } + kfree(mux_head_p); + mux_head_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +reset_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_mux_gpio(unsigned gpio){ + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_gpio(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl if HW add new features. + * (Ex: Port power-status control) + */ + mux_head_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!mux_head_p) { + SWPS_ERR("%s: kzalloc fail!\n", __func__); + return -1; + } + /* Initial MUX controller */ + if (_setup_muxctl_cb(mux_head_p, gpio) < 0){ + SWPS_ERR("%s: _setup_muxctl_cb fail!\n", __func__); + return -1; + } + if (mux_head_p->_init(mux_head_p) < 0) { + SWPS_ERR("%s: init() fail\n", __func__); + goto err_init_mux_gpio; + } + /* Setup default value */ + if (mux_head_p->_pull_high(mux_head_p) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + goto err_init_mux_gpio; + } + return 0; + +err_init_mux_gpio: + clean_mux_gpio(); + return -1; +} + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h new file mode 100644 index 00000000000..f981a304644 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h @@ -0,0 +1,47 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_MUX_H +#define INV_MUX_H + + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PAC9548 (48) +#define MUX_RST_GPIO_69_PAC9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PAC9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS (1) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +struct mux_obj_s { + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_gpio(void); +int reset_mux_gpio(void); +int init_mux_gpio(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c new file mode 100644 index 00000000000..26bd47300da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c @@ -0,0 +1,215 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(2),}, {.adap_id = bus_id(3),}, + {.adap_id = bus_id(4),}, {.adap_id = bus_id(5),}, + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, +}; + +//no i2c device driver attach to mux 7 + + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {bus_id(1), ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //mux root + + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //mux 0 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //mux 1 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //mux 2 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux 3 + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux 4 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux 5 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux 6 +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 238, + .sda_pin = 255, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device device_i2c_gpio0 = { + .name = "i2c-gpio", + .id = 1, // adapter number + .dev.platform_data = &i2c_gpio_platdata0, +}; + +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j,k; + + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl( inl(0x533) | (1<<2), 0x533); + outl( inl(0x541) | (1<<3), 0x541); + outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7) + outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + + ret = platform_device_register(&device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: device_i2c_gpio0 register fail %d\n", ret); + } + mdelay(500); //wait for device_i2c_gpio register successfully + + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define SWITCH_TEMPERATURE_SOCK "/proc/switch/temp" +#define PSOC_POLLING_PERIOD 1000 + +#include +#include +#include +#include + +#define IPMI_MAX_INTF (4) +#define NETFN_OEM 0x30 +#define CMD_GETDATA 0x31 +#define CMD_SETDATA 0x32 +#define FAN_NUM 4 +#define PSU_NUM 2 + +#define FAN_CLEI_SUPPORT 1 +#define PSU_CLEI_SUPPORT 0 + +#define PSU1 0x5800 +#define PSU2 0x5900 +#define BMC_PMBusNumber 3 +#define PMBus_Vendor 0x99 +#define PMBus_Serial 0x9E +#define PMBus_Temp2 0x8E +#define PMBus_Version 0x9B +#define MaxLeng_Result 0x40 + +#define BMC_FanCLEIBusNumber 9 +#define DEVICE_CLEI_ADDR 0x52,0x53,0x54,0x55,0x56,0x50,0x51 + +#define MAX_IPMI_RECV_LENGTH 0xff +static char CLEI_ADDR[]={DEVICE_CLEI_ADDR}; +struct task_struct *kthread_auto_update; +static long pmbus_reg2data_linear(int data, int linear16); +struct ipmi_result{ + char result[MAX_IPMI_RECV_LENGTH]; + int result_length; +}; + +DEFINE_MUTEX(ipmi_mutex); +DEFINE_MUTEX(ipmi2_mutex); +static struct ipmi_result ipmiresult; +static struct device *hwmon_dev; +static struct kobject *device_kobj; +static ipmi_user_t ipmi_mh_user = NULL; +static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data); +static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; + +static atomic_t dummy_count = ATOMIC_INIT(0); +static void dummy_smi_free(struct ipmi_smi_msg *msg) +{ + atomic_dec(&dummy_count); +} +static void dummy_recv_free(struct ipmi_recv_msg *msg) +{ + atomic_dec(&dummy_count); +} +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) clei { + u8 issue_number[3]; + u8 abbreviation_number[9]; + u8 fc_number[10]; + u8 clei_code[10]; + u8 product_year_and_month[5]; + u8 label_location_code[2]; + u8 serial_number[5]; + u8 pcb_revision[5]; + u8 vendor_name[10]; + u8 reserved[5]; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + + // BYTE[03:20] - voltage + u16 voltage[15]; //offset: 0x03-0x20 + + // BYTE[21:27] - ExtFan + u8 led_ctl2; //offset: 21 + u8 ext_pwm; //offset: 22 + u16 ext_rpm[2]; //offset: 23 + u8 gpi_fan2; //offset: 27 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[4]; //offset: 2a + u8 pwm_psu[2]; //offset: 2e + + //fan rpm + u16 fan[4*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[2]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + +#define PWM2_OFFSET PSOC_OFF(ext_pwm) +#define RPM2_OFFSET PSOC_OFF(ext_rpm) +#define FAN_LED2_OFFSET PSOC_OFF(led_ctl2) +#define FAN_GPI2_OFFSET PSOC_OFF(gpi_fan2) + +#define CLEI_OFF(m) offsetof(struct clei, m) +#define FAN1_CLEI_INDEX 0 +#define FAN2_CLEI_INDEX 1 +#define FAN3_CLEI_INDEX 2 +#define FAN4_CLEI_INDEX 3 +#define FAN5_CLEI_INDEX 4 +#define PSU1_CLEI_INDEX 5 +#define PSU2_CLEI_INDEX 6 + +static void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data) +{ + struct ipmi_result *msg_result = recv_msg->user_msg_data; + + if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) { + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + } + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + int timeout; + + //wait previous command finish at least 50msec + timeout=50; + while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); } + if(timeout==0) { return -1; } + mutex_lock(&ipmi_mutex); + mutex_lock(&ipmi2_mutex); + + if(ipmi_mh_user == NULL) { + for (i=0,rv=1; i0) { usleep_range(1000,1100);} + if(timeout==0) { + mutex_unlock(&ipmi2_mutex); + return -1; + } + else { + *result_length=ipmiresult.result_length; + memcpy(result,ipmiresult.result,*result_length); + mutex_unlock(&ipmi2_mutex); + return 0; + } + } + return 0; +} +EXPORT_SYMBOL(start_ipmi_command); + +static ssize_t psoc_ipmi_read(u8 *buf, u8 offset, size_t count) +{ + uint8_t data[2]; + int result_len=0; + int rv; + + data[0] = offset; + data[1] = count; + + rv=start_ipmi_command(NETFN_OEM, CMD_GETDATA,data,2, buf, &result_len); + + return result_len; +} + +static ssize_t psoc_ipmi_write(char *buf, unsigned offset, size_t count) +{ + uint8_t data[count+1],result[1]; + int result_len; + + data[0] = offset; + memcpy(&data[1],buf,count); + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,data,count+1, result, &result_len); + return count; +} + + +static u16 psoc_read16(u8 offset) +{ + u16 value = 0; + u8 buf[]={0,0}; + + if(psoc_ipmi_read(buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_ipmi_read(&buf, offset, 1) == 1) + value = buf; + + return value; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 byte=0; + int shift = (attr->index == 0)?3:0; + + status = psoc_ipmi_read(&byte, PSOC_PSU_OFFSET, 1); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +static ssize_t show_ipmi_pmbus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + uint8_t data[4],result[MaxLeng_Result]; + int result_len=0; + + data[0] = BMC_PMBusNumber; + data[1] = (attr->index & 0xFF00 ) >>7; + data[3] = attr->index & 0xff; + if(data[3]==PMBus_Temp2) + {data[2]=2;} + else + {data[2]=MaxLeng_Result;} + + if(start_ipmi_command(0x06, 0x52,data,4, result, &result_len)==0) + { + if(data[3]==PMBus_Temp2) + { + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(result[0] | (result[1]<<8), 0 )); + } + result[result[0]+1]='\0'; + return sprintf(buf, "%s\n",&result[1] ); + } + else + { + return 0; + } +} + +static ssize_t show_clei(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 device_index = attr->index & 0xFF; + + uint8_t data[5],result[MaxLeng_Result]; + int result_len=0; + + data[0] = (device_index<=FAN5_CLEI_INDEX) ? BMC_FanCLEIBusNumber:BMC_PMBusNumber; + data[1] = CLEI_ADDR[device_index]<<1; + data[2] = sizeof(struct clei); + data[3] = (device_index<=FAN5_CLEI_INDEX) ? 0x00 : 0x01; //PSU CLEI will start from 0x0100 + data[4] = 0; + + if(start_ipmi_command(0x06, 0x52,data,5, result, &result_len)==0) + { + if(result_len < sizeof(struct clei)) memset(result, 0, sizeof(struct clei)); + sprintf (buf, "Issue Number: %.3s\n", &result[CLEI_OFF(issue_number)]); + sprintf (buf, "%sAbbreviation Number: %.9s\n", buf, &result[CLEI_OFF(abbreviation_number)]); + sprintf (buf, "%sFC Number: %.10s\n", buf, &result[CLEI_OFF(fc_number)]); + sprintf (buf, "%sCLEI Code: %.10s\n", buf, &result[CLEI_OFF(clei_code)]); + sprintf (buf, "%sProduct Year and Month: %.5s\n", buf, &result[CLEI_OFF(product_year_and_month)]); + sprintf (buf, "%s2D Label Location Code: %.2s\n", buf, &result[CLEI_OFF(label_location_code)]); + sprintf (buf, "%sSerial Number: %.5s\n", buf, &result[CLEI_OFF(serial_number)]); + sprintf (buf, "%sPCB Revision: %.5s\n", buf, &result[CLEI_OFF(pcb_revision)]); + sprintf (buf, "%sVendor Name: %.10s\n", buf, &result[CLEI_OFF(vendor_name)]); + return strlen(buf); + } + else + { + return sprintf(buf, "NONE\n"); + } +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + + status = psoc_read8(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + psoc_ipmi_write(&pwm, offset, 1); + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u16 temp = 0; + + status = psoc_ipmi_read((u8*)&temp, SWITCH_TMP_OFFSET, 2); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u8 diag_flag = 0; + + status = psoc_ipmi_read((u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + + status = sprintf (buf, "%d\n", ((diag_flag & 0x80)?1:0)); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + + psoc_ipmi_read((u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_ipmi_write((u8*)&value, DIAG_FLAG_OFFSET, 1); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + + status = psoc_read16(VERSION_OFFSET); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 bit = attr->index; + + if(bit < 8) { status = psoc_read8(FAN_LED_OFFSET); } +#if FAN_NUM>4 + if(bit >= 8) { status = psoc_read8(FAN_LED2_OFFSET); bit-=8; } +#endif + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(attr->index < 8) { led_state = psoc_read8(FAN_LED_OFFSET ); } +#if FAN_NUM>4 + if(attr->index >= 8) { led_state = psoc_read8(FAN_LED2_OFFSET); bit-=8; } +#endif + if(v) led_state |= (1<index < 8) { psoc_ipmi_write(&led_state, FAN_LED_OFFSET, 1);} +#if FAN_NUM>4 + if(attr->index >= 8) { psoc_ipmi_write(&led_state, FAN_LED2_OFFSET,1);} +#endif + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + + status = psoc_read8(offset); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index + PSU_INFO_OFFSET; + + status = psoc_read16(offset); + + if((strstr(attr->dev_attr.attr.name, "vout")!=NULL)|(strstr(attr->dev_attr.attr.name, "in3")!=NULL)|(strstr(attr->dev_attr.attr.name, "in4")!=NULL)) { + offset=1; + } + else { + offset=0; + } + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, offset )); +} + +static ssize_t show_name(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return sprintf(buf, "inv_psoc\n"); +} + +static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); +static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3 + PWM_OFFSET); +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0 + PWM2_OFFSET); +#endif +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm6, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm7, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5 + PWM_OFFSET); + +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu2, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); + +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(fan9_input , S_IRUGO, show_rpm, 0,0*2 + RPM2_OFFSET); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_rpm, 0,1*2 + RPM2_OFFSET); +#endif + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fan_led_grn5, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 8); +static SENSOR_DEVICE_ATTR(fan_led_red5, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 12); +static SENSOR_DEVICE_ATTR(fan_gpi2, S_IRUGO, show_value8, 0, FAN_GPI2_OFFSET); +#endif + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(curr3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(power3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(curr4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(power4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +//IPMI +static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vendor, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Vendor); +static SENSOR_DEVICE_ATTR(psoc_psu1_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Version); + +static SENSOR_DEVICE_ATTR(thermal2_psu2, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(temp10_input, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu2_vendor, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Vendor); +static SENSOR_DEVICE_ATTR(psoc_psu2_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Version); + +//CLEI +#if FAN_CLEI_SUPPORT +static SENSOR_DEVICE_ATTR(fan1_clei, S_IRUGO, show_clei, 0, FAN1_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan2_clei, S_IRUGO, show_clei, 0, FAN2_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan3_clei, S_IRUGO, show_clei, 0, FAN3_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan4_clei, S_IRUGO, show_clei, 0, FAN4_CLEI_INDEX ); +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(fan5_clei, S_IRUGO, show_clei, 0, FAN5_CLEI_INDEX ); +#endif +#endif + +#if PSU_CLEI_SUPPORT +static SENSOR_DEVICE_ATTR(psu1_clei, S_IRUGO, show_clei, 0, PSU1_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(psu2_clei, S_IRUGO, show_clei, 0, PSU2_CLEI_INDEX ); +#endif + +static struct attribute *psoc_attributes[] = { + //name + &dev_attr_name.attr, + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + &sensor_dev_attr_temp7_input.dev_attr.attr, + &sensor_dev_attr_temp8_input.dev_attr.attr, + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + &sensor_dev_attr_pwm6.dev_attr.attr, + &sensor_dev_attr_pwm7.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan12_input.dev_attr.attr, + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, +#if FAN_NUM >4 + &sensor_dev_attr_fan_led_grn5.dev_attr.attr, + &sensor_dev_attr_fan_led_red5.dev_attr.attr, + &sensor_dev_attr_fan_gpi2.dev_attr.attr, +#endif + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + + + //psu_psoc + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_curr3_input.dev_attr.attr, + &sensor_dev_attr_power3_input.dev_attr.attr, + &sensor_dev_attr_in4_input.dev_attr.attr, + &sensor_dev_attr_curr4_input.dev_attr.attr, + &sensor_dev_attr_power4_input.dev_attr.attr, + + //ipmi_i2c_command + &sensor_dev_attr_thermal2_psu1.dev_attr.attr, + &sensor_dev_attr_temp9_input.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + + &sensor_dev_attr_thermal2_psu2.dev_attr.attr, + &sensor_dev_attr_temp10_input.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + + //clei +#if FAN_CLEI_SUPPORT + &sensor_dev_attr_fan1_clei.dev_attr.attr, + &sensor_dev_attr_fan2_clei.dev_attr.attr, + &sensor_dev_attr_fan3_clei.dev_attr.attr, + &sensor_dev_attr_fan4_clei.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_fan5_clei.dev_attr.attr, +#endif +#endif + +#if PSU_CLEI_SUPPORT + &sensor_dev_attr_psu1_clei.dev_attr.attr, + &sensor_dev_attr_psu2_clei.dev_attr.attr, +#endif + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +//================================= +static void check_switch_temp(void) +{ + static struct file *f; + mm_segment_t old_fs; + + set_fs(get_ds()); + f = filp_open(SWITCH_TEMPERATURE_SOCK,O_RDONLY,0644); + if(IS_ERR(f)) { + return; + } + else { + char temp_str[]={0,0,0,0,0,0,0}; + loff_t pos = 0; + u16 temp2 = 0; + old_fs = get_fs(); + set_fs(KERNEL_DS); + vfs_read(f, temp_str,6,&pos); + temp2 = ((simple_strtoul(temp_str,NULL,10)/1000) <<8 ) & 0xFF00 ; + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + } + filp_close(f,NULL); + set_fs(old_fs); +} + +static int psoc_polling_thread(void *p) +{ + while (!kthread_should_stop()) + { + check_switch_temp(); + set_current_state(TASK_INTERRUPTIBLE); + if(kthread_should_stop()) + break; + + schedule_timeout(msecs_to_jiffies(PSOC_POLLING_PERIOD)); + } + return 0; +} + +static int __init inv_psoc_init(void) +{ + int ret; + + hwmon_dev = hwmon_device_register(NULL); + if (IS_ERR(hwmon_dev)) { + goto fail_hwmon_device_register; + } + + device_kobj = kobject_create_and_add("device", &hwmon_dev->kobj); + if(!device_kobj) { + goto fail_hwmon_device_register; + } + + ret = sysfs_create_group(device_kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + ret = sysfs_create_group(&hwmon_dev->kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + kthread_auto_update = kthread_run(psoc_polling_thread,NULL,"BMC_DRIVER"); + if (IS_ERR(kthread_auto_update)) { + goto fail_create_group_hwmon; + } + return ret; + +fail_create_group_hwmon: + hwmon_device_unregister(hwmon_dev); +fail_hwmon_device_register: + return -ENOMEM; +} + +static void __exit inv_psoc_exit(void) +{ + kthread_stop(kthread_auto_update); + if(ipmi_mh_user!=NULL) {ipmi_destroy_user(ipmi_mh_user);} + if(hwmon_dev != NULL) hwmon_device_unregister(hwmon_dev); + sysfs_remove_group(device_kobj, &psoc_group); +} + +MODULE_AUTHOR("Ting.Jack "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c new file mode 100644 index 00000000000..e3b180cd5ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c @@ -0,0 +1,1459 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/***************************** + Maple platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +int status_led_psu_control(void); +ssize_t status_fan_led(const char *freq); +ssize_t status_psu_led(const char *freq); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + +#define INV_PTHREAD_KERNEL_MODULE (1) + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + char hwmon_dev_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + + sprintf(hwmon_dev_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + inventec_show_attr(hwmon_buf, hwmon_dev_path); + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unnormal") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; + +static char psu_0_dev_path_state[MAX_PATH_SIZE]; +static char psu_1_dev_path_state[MAX_PATH_SIZE]; + +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + + sprintf(&psu_0_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "psu0" ); + sprintf(&psu_1_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "psu1" ); + +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_psu_led("0x20"); + return 1; + } + return 0; +} + +int status_led_psu_control(void) +{ + int retVal = 0; //no issue + + char buf[MAX_ACC_SIZE]; + + int normal_psu_cnt = 0; //normal + + int fault_psu_cnt = 0; + + //read fan status one by one + //read psu 0 status + if (inventec_show_attr(&buf[0], psu_0_dev_path_state) > 0) + { + if(buf[0] == '0') //normal + { + normal_psu_cnt = normal_psu_cnt + 1; + } + else if (buf[0] == '4') // psu fault + { + fault_psu_cnt = fault_psu_cnt + 1; + } + + //Check 2nd psu + if(inventec_show_attr(&buf[0], psu_1_dev_path_state) > 0) + { + if(buf[0] == '0') //normal + { + normal_psu_cnt = normal_psu_cnt + 1; + } + else if (buf[0] == '4') // psu fault + { + fault_psu_cnt = fault_psu_cnt + 1; + } + } + } + + if (normal_psu_cnt == 0) + { + status_psu_led("0"); + retVal = 1; + } + else + { + if( fault_psu_cnt > 0) + { + status_psu_led("0x01"); //Red lit + retVal = 1; + } + else if (normal_psu_cnt == 1) + { + status_psu_led("0x20"); // Green blink + retVal = 1; + } + else if (normal_psu_cnt == 2) + { + status_psu_led("0x10"); // Green Lit + retVal = 0; + } + } + + return retVal; +} + + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define STATUS_LED_FAN_PATH "/sys/class/hwmon/hwmon%d/device/fan_led" +#define STATUS_LED_PSU_PATH "/sys/class/hwmon/hwmon%d/device/psu_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char status_led_fan_path[MAX_PATH_SIZE]; +static char status_led_psu_path[MAX_PATH_SIZE]; + +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&status_led_fan_path[0], STATUS_LED_FAN_PATH, get_hwm_cpld()); + sprintf(&status_led_psu_path[0], STATUS_LED_PSU_PATH, get_hwm_cpld()); + + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + + if (ret < 0) { + return ret; + } + + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +//status led: FAN & PSU +ssize_t +status_fan_led(const char *freq) +{ + ssize_t ret; + ret = inventec_store_attr(freq, strlen(freq), &status_led_fan_path[0]); + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_psu_led(const char *freq) +{ + ssize_t ret; + ret = inventec_store_attr(freq, strlen(freq), &status_led_psu_path[0]); + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("253", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 253 to /sys/class/gpio/export failed\n"); + return; + } + + printk("[p_thread] Write 253 to /sys/class/gpio/export\n"); + + ret = inventec_store_attr("out", 3, "/sys/class/gpio/gpio253/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio253/direction failed\n"); + return; + } + + //pull high and then low + ret = inventec_store_attr("1", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 1 to sys/class/gpio/gpio253/value failed\n"); + } + + //pull low + ret = inventec_store_attr("0", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 0 to sys/class/gpio/gpio253/value failed\n"); + } + + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + bool fan_issue = false; + bool psu_issue = false; + bool psu_number_issue = false; + + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) //has at least one failed fan + { + psus_control(0); //now we have separate led for FAN and PSU + fan_issue = true; + } + + if (psus_control(1) > 0) + { + psu_issue = true; + } + + if (status_led_psu_control() > 0) + { + psu_number_issue = true; + } + + if(fan_issue || psu_issue || psu_number_issue) + { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c new file mode 100644 index 00000000000..cbb22fba297 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c @@ -0,0 +1,3049 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p->vendor_name); + kfree(transvr_obj_p->vendor_pn); + kfree(transvr_obj_p->vendor_rev); + kfree(transvr_obj_p->vendor_sn); + kfree(transvr_obj_p->worker_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_MAPLE: + platform_p->id = PLATFORM_SETTINGS; + for (i=0; iname, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + PLATFORM_SETTINGS); + goto err_get_platform_type_2; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_MAPLE + case PLATFORM_TYPE_MAPLE: + gpio_rest_mux = maple_gpio_rest_mux; + ioexp_layout = maple_ioexp_layout; + port_layout = maple_port_layout; + ioexp_total = ARRAY_SIZE(maple_ioexp_layout); + port_total = ARRAY_SIZE(maple_port_layout); + break; +#endif + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2;; + } + } + return 0; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_MAPLE_NABC: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_gpio(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_gpio(); +err_init_mux: + clean_port_obj(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_obj(); + clean_ioexp_objs(); + clean_mux_gpio(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h new file mode 100644 index 00000000000..d28a0a3c968 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h @@ -0,0 +1,1164 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.9" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_MAPLE (201) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAPLE + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE) + #define SWPS_MAPLE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_MAPLE, "Maple" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PAC9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHI_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration + * =========================================================== + */ +#ifdef SWPS_MAPLE +unsigned maple_gpio_rest_mux = 249; + +struct inv_ioexp_layout_s maple_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, +}; +#endif + +#endif /* INV_SWPS_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c new file mode 100644 index 00000000000..4564b5855fd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c @@ -0,0 +1,2046 @@ +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_NABC: + return &ioexp_map_cypress_nabc; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_MAPLE_NABC: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} + + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h new file mode 100644 index 00000000000..1af909e2466 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h @@ -0,0 +1,187 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_CYPRESS_NABC (10103) +#define IOEXP_TYPE_MAPLE_NABC (10104) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c new file mode 100644 index 00000000000..6fe8f599fb4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c @@ -0,0 +1,8389 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[0], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h new file mode 100644 index 00000000000..f17b7fde71b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h @@ -0,0 +1,815 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ +#define BCM_CHIP_TYPE_TRIDENT_3 (31003) /* Maple */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py new file mode 100644 index 00000000000..2ca077945f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV: ', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6556]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +instantiate = [ +'echo inv_eeprom 0x53 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo inv_cpld 0x55 > /sys/bus/i2c/devices/i2c-0/new_device'] + + +drivers =[ +'gpio_ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_platform', +'inv_psoc', +'inv_cpld', +'swps', +'inv_pthread'] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + + for i in range(10,18): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(18,26): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(26,34): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(34,42): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(42,50): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(50,58): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(58,66): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print "D6556 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile index c43c4774522..b596d1c4bc4 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile @@ -2,6 +2,7 @@ obj-m += inv_cpld.o inv_psoc.o obj-m += inv_platform.o obj-m += inv_eeprom.o obj-m += swps.o +obj-m += inv_pthread.o swps-objs := inv_swps.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_psoc.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_psoc.c index fec3d25dc3d..d32d1e1daa1 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_psoc.c +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_psoc.c @@ -1,1024 +1,1042 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -//#include "I2CHostCommunication.h" - -#define USE_SMBUS 1 - -//#define offsetof(st, m) ((size_t)(&((st *)0)->m)) -#define FAN_NUM 5 -#define PSU_NUM 2 - -struct __attribute__ ((__packed__)) psoc_psu_layout { - u16 psu1_iin; - u16 psu2_iin; - u16 psu1_iout; - u16 psu2_iout; - - u16 psu1_pin; - u16 psu2_pin; - u16 psu1_pout; - u16 psu2_pout; - - u16 psu1_vin; - u16 psu2_vin; - u16 psu1_vout; - u16 psu2_vout; -}; - -struct __attribute__ ((__packed__)) psoc_layout { - u8 ctl; //offset: 0 - u16 switch_temp; //offset: 1 - u8 reserve1; //offset: 3 - - u8 fw_upgrade; //offset: 4 - - //i2c bridge - u8 i2c_st; //offset: 5 - u8 i2c_ctl; //offset: 6 - u8 i2c_addr; //offset: 7 - u8 i2c_data[0x20]; //offset: 8 - - //gpo - u8 led_grn; //offset: 28 - u8 led_red; //offset: 29 - - //pwm duty - u8 pwm[FAN_NUM]; //offset: 2a - u8 pwm_psu[PSU_NUM]; //offset: 2f - - //fan rpm - u16 fan[FAN_NUM*2]; //offset: 31 - //u16 fan_psu[PSU_NUM]; - - //gpi - u8 gpi_fan; //offset: 45 - - //psu state - u8 psu_state; //offset: 46 - - //temperature - u16 temp[5]; //offset: 47 - u16 temp_psu[PSU_NUM]; //offset: 51 - - //version - u8 version[2]; //offset: 55 - - u8 reserve2[3]; //offset: 57 - struct psoc_psu_layout psu_info; //offset: 5a -}; - - -/* definition */ -#define PSOC_OFF(m) offsetof(struct psoc_layout, m) -#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) - -#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) //0x01 -#define PWM_OFFSET PSOC_OFF(pwm) -#define PWM_PSU_OFFSET PSOC_OFF(pwm_psu) -#define THERMAL_OFFSET PSOC_OFF(temp) -#define RPM_OFFSET PSOC_OFF(fan) -//#define RPM_PSU_OFFSET PSOC_OFF(fan_psu) -#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) -#define FAN_LED_OFFSET PSOC_OFF(led_grn) -#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) -#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) -#define VERSION_OFFSET PSOC_OFF(version) -#define PSU_INFO_OFFSET PSOC_OFF(psu_info) - - -/* Each client has this additional data */ -struct psoc_data { - struct device *hwmon_dev; - struct mutex update_lock; - u32 diag; -}; - -/*-----------------------------------------------------------------------*/ - -static ssize_t psoc_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) -{ -#if USE_SMBUS - int i; - - for(i=0; iaddr; - msg[0].buf = msgbuf; - msg[0].len = 1; - - msg[1].addr = client->addr; - msg[1].flags = I2C_M_RD; - msg[1].buf = buf; - msg[1].len = count; - - status = i2c_transfer(client->adapter, msg, 2); - - if(status == 2) - status = count; - - return status; -#endif -} - -static ssize_t psoc_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) -{ -#if USE_SMBUS - int i; - - for(i=0; iaddr; - msg.flags = 0; - - /* msg.buf is u8 and casts will mask the values */ - msg.buf = writebuf; - - msg.buf[i++] = offset; - memcpy(&msg.buf[i], buf, count); - msg.len = i + count; - - status = i2c_transfer(client->adapter, &msg, 1); - if (status == 1) - status = count; - - return status; -#endif -} - -static u32 psoc_read32(struct i2c_client *client, u8 offset) -{ - u32 value = 0; - u8 buf[4]; - - if( psoc_i2c_read(client, buf, offset, 4) == 4) - value = (buf[0]<<24 | buf[1]<<16 | buf[2]<<8 | buf[3]); - - return value; -} - -static u16 psoc_read16(struct i2c_client *client, u8 offset) -{ - u16 value = 0; - u8 buf[2]; - - if(psoc_i2c_read(client, buf, offset, 2) == 2) - value = (buf[0]<<8 | buf[1]<<0); - - return value; -} - -static u8 psoc_read8(struct i2c_client *client, u8 offset) -{ - u8 value = 0; - u8 buf = 0; - - if(psoc_i2c_read(client, &buf, offset, 1) == 1) - value = buf; - - return value; -} - -static int psoc_write_value(struct i2c_client *client, unsigned offset, u16 value) -{ - //TBD - return 0; -} - - -//PSOC i2c bridge regsters -#define PSOC_I2C_STATUS PSOC_OFF(i2c_st) -#define PSOC_I2C_CNTRL PSOC_OFF(i2c_ctl) -#define PSOC_I2C_ADDR PSOC_OFF(i2c_addr) -#define PSOC_I2C_DATA PSOC_OFF(i2c_data) - -//status bit definition -#define PSOC_I2C_START (1 << 0) -#define PSOC_PMB_SEL (1 << 7) - -//addr bits definition -#define PSOC_I2C_READ (1 << 0) - -//PMBUS registers definition -#define PMBUS_READ_VIN (0x88) -#define PMBUS_READ_IIN (0x89) -#define PMBUS_READ_VOUT (0x8B) -#define PMBUS_READ_IOUT (0x8C) -#define PMBUS_READ_POUT (0x96) -#define PMBUS_READ_PIN (0x97) - -#define PMBUS_MFR_ID (0x99) -#define PMBUS_MFR_MODEL (0x9A) -#define PMBUS_MFR_REVISION (0x9B) -#define PMBUS_MFR_DATE (0x9D) -#define PMBUS_MFR_SERIAL (0x9E) - -static int psoc_i2c_bridge_read(struct i2c_client *client, - unsigned char bus, - unsigned char chip, - char *addr, int alen, - unsigned char *data, int len ) -{ - unsigned char txdata[28], rxdata[28]; - int index, timeout; - - txdata[PSOC_I2C_STATUS] = 0; /* the status */ - txdata[PSOC_I2C_CNTRL] = ((alen & 3) << 5) | (len & 0x1f); /* the sizes */ - txdata[PSOC_I2C_ADDR] = (chip << 1) | PSOC_I2C_READ; /* read address */ - for(index = 0; index < alen; index++) - txdata[PSOC_I2C_DATA + index] = addr[index]; /* the chip address */ - for(; index < alen+len; index++) - txdata[PSOC_I2C_DATA + index] = 0; /* clear the chip data */ - - psoc_i2c_write(client, &txdata[PSOC_I2C_CNTRL], PSOC_I2C_CNTRL, 2 + alen + len); - - //delay a while ??? - //--------------------------------------------------------------------- - //start write - txdata[PSOC_I2C_STATUS] = PSOC_I2C_START; /* the start bit*/ - if(bus) - txdata[PSOC_I2C_STATUS] |= PSOC_PMB_SEL;/* bus id */ - psoc_i2c_write(client, &txdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); - - //delay a while - timeout = 40; //40*20==>800 ms - do { - psoc_i2c_read(client, &rxdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); - - //check rxdata[5] error bit(1) and complete bit(0) ,TBD - if((rxdata[PSOC_I2C_STATUS] & 0x2) == 0x2) { - //printk("i2c bridge fail!!!\n"); - timeout = 0; - break; - } - if((rxdata[PSOC_I2C_STATUS] & PSOC_I2C_START) == 0) { - /* comand complete */ - psoc_i2c_read(client, &rxdata[PSOC_I2C_DATA+alen], PSOC_I2C_DATA+alen, len); - break; - } - - //delay - msleep(20); - } while(timeout--); - - if(timeout <= 0) { - return -1; - } - - //--------------------------------------------------------------------- - - for(index=0; index < len; index++) { - data[index] = rxdata[PSOC_I2C_DATA + alen + index]; - } - - return 0; -} - - -/* -CPLD report the PSU0 status -000 = PSU normal operation -100 = PSU fault -010 = PSU unpowered -111 = PSU not installed - -7 6 | 5 4 3 | 2 1 0 ----------------------- - | psu1 | psu0 -*/ -static char* psu_str[] = { - "normal", //000 - "NA", //001 - "unpowered", //010 - "NA", //011 - "fault", //100 - "NA", //101 - "NA", //110 - "not installed", //111 -}; - -static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, - char *buf) -{ - u32 status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 byte; - int shift = (attr->index == 0)?3:0; - - mutex_lock(&data->update_lock); - status = psoc_i2c_read(client, &byte, PSOC_PSU_OFFSET, 1); - mutex_unlock(&data->update_lock); - - byte = (byte >> shift) & 0x7; - - status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); - - return strlen(buf); -} - -/*-----------------------------------------------------------------------*/ - -/* sysfs attributes for hwmon */ - -static ssize_t show_thermal(struct device *dev, struct device_attribute *da, - char *buf) -{ - u16 status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 offset = attr->index * 2 + THERMAL_OFFSET; - - mutex_lock(&data->update_lock); - - status = psoc_read16(client, offset); - status = __swab16(status); - - mutex_unlock(&data->update_lock); - - return sprintf(buf, "%d\n", - (s8)(status>>8) * 1000 ); -} - - -static ssize_t show_pwm(struct device *dev, struct device_attribute *da, - char *buf) -{ - int status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 offset = attr->index; - - mutex_lock(&data->update_lock); - - status = psoc_read8(client, offset); - - mutex_unlock(&data->update_lock); - - return sprintf(buf, "%d\n", - status); -} - -static ssize_t set_pwm(struct device *dev, - struct device_attribute *devattr, - const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 offset = attr->index; - - u8 pwm = simple_strtol(buf, NULL, 10); - if(pwm > 255) pwm = 255; - - if(data->diag) { - mutex_lock(&data->update_lock); - psoc_i2c_write(client, &pwm, offset, 1); - mutex_unlock(&data->update_lock); - } - - return count; -} - - -static ssize_t show_rpm(struct device *dev, struct device_attribute *da, - char *buf) -{ - int status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 offset = attr->index; - - mutex_lock(&data->update_lock); - - status = psoc_read16(client, offset); - status = __swab16(status); - - mutex_unlock(&data->update_lock); - - return sprintf(buf, "%d\n", - status); -} -static ssize_t show_fan_type(struct device *dev, struct device_attribute *da, - char *buf) -{ - u8 status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 index = attr->index; - int type = -1; - - mutex_lock(&data->update_lock); - status = psoc_read8(client, FAN_GPI_OFFSET); - mutex_unlock(&data->update_lock); - - if( (status & 1<update_lock); - status = psoc_i2c_read(client, (u8*)&temp, SWITCH_TMP_OFFSET, 2); - status = __swab16(status); - mutex_unlock(&data->update_lock); - - status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); - - return strlen(buf); -} - -static ssize_t set_switch_tmp(struct device *dev, - struct device_attribute *devattr, - const char *buf, size_t count) -{ - //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - - long temp = simple_strtol(buf, NULL, 10); - u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; - - //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); - - mutex_lock(&data->update_lock); - psoc_i2c_write(client, (u8*)&temp2, SWITCH_TMP_OFFSET, 2); - mutex_unlock(&data->update_lock); - - return count; -} - -static ssize_t show_diag(struct device *dev, struct device_attribute *da, - char *buf) -{ - u16 status; - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 diag_flag = 0; - - mutex_lock(&data->update_lock); - status = psoc_i2c_read(client, (u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); - mutex_unlock(&data->update_lock); - - data->diag = (diag_flag & 0x80)?1:0; - status = sprintf (buf, "%d\n", data->diag); - - return strlen(buf); -} - -static ssize_t set_diag(struct device *dev, - struct device_attribute *devattr, - const char *buf, size_t count) -{ - //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 value = 0; - u8 diag = simple_strtol(buf, NULL, 10); - - diag = diag?1:0; - data->diag = diag; - - mutex_lock(&data->update_lock); - psoc_i2c_read(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); - if(diag) value |= (1<<7); - else value &= ~(1<<7); - psoc_i2c_write(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); - mutex_unlock(&data->update_lock); - - return count; -} - -static ssize_t show_version(struct device *dev, struct device_attribute *da, - char *buf) -{ - u16 status; - //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - - mutex_lock(&data->update_lock); - - status = psoc_read16(client, VERSION_OFFSET); - - mutex_unlock(&data->update_lock); - - return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); -} - - -static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, - char *buf) -{ - int status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 bit = attr->index; - - mutex_lock(&data->update_lock); - - status = psoc_read8(client, FAN_LED_OFFSET); - - mutex_unlock(&data->update_lock); - - return sprintf(buf, "%d\n", - (status & (1<index; - u8 led_state = 0; - - u8 v = simple_strtol(buf, NULL, 10); - - if(data->diag) { - mutex_lock(&data->update_lock); - led_state = psoc_read8(client, FAN_LED_OFFSET); - if(v) led_state |= (1<update_lock); - } - - return count; -} - -static ssize_t show_value8(struct device *dev, struct device_attribute *da, - char *buf) -{ - int status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 offset = attr->index; - - mutex_lock(&data->update_lock); - - status = psoc_read8(client, offset); - - mutex_unlock(&data->update_lock); - - return sprintf(buf, "0x%02X\n", status ); -} - -static long pmbus_reg2data_linear(int data, int linear16) -{ - s16 exponent; - s32 mantissa; - long val; - - if (linear16) { /* LINEAR16 */ - exponent = -9; - mantissa = (u16) data; - } else { /* LINEAR11 */ - exponent = ((s16)data) >> 11; - exponent = ((s16)( data & 0xF800) ) >> 11; - mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; - } - - //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); - val = mantissa; - - /* scale result to micro-units for power sensors */ - val = val * 1000L; - - if (exponent >= 0) - val <<= exponent; - else - val >>= -exponent; - - return val; -} - -static ssize_t show_psu(struct device *dev, struct device_attribute *da, - char *buf) -{ - int status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 reg = attr->index & 0xFF; - u8 len = ((attr->index & 0xFF00) >> 8); - u8 chip = (attr->index >> 16)? 0x59:0x58; - u8 bus = 1; - unsigned char value[2] = {0,0};; - - if (len == 2) - { - mutex_lock(&data->update_lock); - psoc_i2c_bridge_read(client, bus, chip, ®, 1, value, 2); - mutex_unlock(&data->update_lock); - - status = value[1]<<8 | value[0]; - //status1 = value[1]<<8 | value[0]; - - return sprintf(buf, "%ld\n", pmbus_reg2data_linear(status, (reg==PMBUS_READ_VOUT)?1:0) ); - } - else - { //len is not defined. - u8 tmpbuf[32]; - mutex_lock(&data->update_lock); - //length of block read - psoc_i2c_bridge_read(client, bus, chip, ®, 1, &len, 1); - //data included length - psoc_i2c_bridge_read(client, bus, chip, ®, 1, tmpbuf, len+1); - mutex_unlock(&data->update_lock); - - memcpy(buf, tmpbuf+1, len); - buf[len]='\n'; - - return len+1; - } -} - -static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, - char *buf) -{ - u16 status; - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct i2c_client *client = to_i2c_client(dev); - struct psoc_data *data = i2c_get_clientdata(client); - u8 offset = attr->index + PSU_INFO_OFFSET; - - mutex_lock(&data->update_lock); - status = psoc_read16(client, offset); - mutex_unlock(&data->update_lock); - - return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); -} - - -static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); -static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); -static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); -static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); -static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); -static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); -static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); - -static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+0); -static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+1); -static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+2); -static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+3); -#if (FAN_NUM >= 5) -static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+4); -#endif -static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_PSU_OFFSET+0); -static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_PSU_OFFSET+1); - -static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); -static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); - -static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7*2 + RPM_OFFSET); -#if (FAN_NUM >= 5) -static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); -#endif -static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); -static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); - -static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); - -static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); -static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); - -static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); -static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); -static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); -static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); -static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); -static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); -static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); -static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); - -static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); -static SENSOR_DEVICE_ATTR(fan1_type, S_IRUGO, show_fan_type, 0, 0); -static SENSOR_DEVICE_ATTR(fan2_type, S_IRUGO, show_fan_type, 0, 1); -static SENSOR_DEVICE_ATTR(fan3_type, S_IRUGO, show_fan_type, 0, 2); -static SENSOR_DEVICE_ATTR(fan4_type, S_IRUGO, show_fan_type, 0, 3); - -static SENSOR_DEVICE_ATTR(psu1_vin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VIN); -static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VOUT); -static SENSOR_DEVICE_ATTR(psu1_iin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IIN); -static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IOUT); -static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_PIN); -static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_POUT); - -static SENSOR_DEVICE_ATTR(psu1_vendor, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_ID); -static SENSOR_DEVICE_ATTR(psu1_model, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_MODEL); -static SENSOR_DEVICE_ATTR(psu1_version, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_REVISION); -static SENSOR_DEVICE_ATTR(psu1_date, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_DATE); -static SENSOR_DEVICE_ATTR(psu1_sn, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_SERIAL); - -static SENSOR_DEVICE_ATTR(psu2_vin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VIN); -static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VOUT); -static SENSOR_DEVICE_ATTR(psu2_iin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IIN); -static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IOUT); -static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_PIN); -static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_POUT); - -static SENSOR_DEVICE_ATTR(psu2_vendor, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_ID); -static SENSOR_DEVICE_ATTR(psu2_model, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_MODEL); -static SENSOR_DEVICE_ATTR(psu2_version, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_REVISION); -static SENSOR_DEVICE_ATTR(psu2_date, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_DATE); -static SENSOR_DEVICE_ATTR(psu2_sn, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_SERIAL); - -static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); -static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); -static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); -static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); -static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); -static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); - - -static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); -static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); -static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); -static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); -static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); -static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); - -static struct attribute *psoc_attributes[] = { - //thermal - &sensor_dev_attr_temp1_input.dev_attr.attr, - &sensor_dev_attr_temp2_input.dev_attr.attr, - &sensor_dev_attr_temp3_input.dev_attr.attr, - &sensor_dev_attr_temp4_input.dev_attr.attr, - &sensor_dev_attr_temp5_input.dev_attr.attr, - - &sensor_dev_attr_thermal_psu1.dev_attr.attr, - &sensor_dev_attr_thermal_psu2.dev_attr.attr, - - - //pwm - &sensor_dev_attr_pwm1.dev_attr.attr, - &sensor_dev_attr_pwm2.dev_attr.attr, - &sensor_dev_attr_pwm3.dev_attr.attr, - &sensor_dev_attr_pwm4.dev_attr.attr, -#if (FAN_NUM >= 5) - //&sensor_dev_attr_pwm5.dev_attr.attr, -#endif - &sensor_dev_attr_pwm_psu1.dev_attr.attr, - &sensor_dev_attr_pwm_psu2.dev_attr.attr, - - //rpm - &sensor_dev_attr_fan1_input.dev_attr.attr, - &sensor_dev_attr_fan2_input.dev_attr.attr, - &sensor_dev_attr_fan3_input.dev_attr.attr, - &sensor_dev_attr_fan4_input.dev_attr.attr, - &sensor_dev_attr_fan5_input.dev_attr.attr, - &sensor_dev_attr_fan6_input.dev_attr.attr, - &sensor_dev_attr_fan7_input.dev_attr.attr, - &sensor_dev_attr_fan8_input.dev_attr.attr, -#if (FAN_NUM >= 5) - //&sensor_dev_attr_fan9_input.dev_attr.attr, - //&sensor_dev_attr_fan10_input.dev_attr.attr, -#endif - - &sensor_dev_attr_rpm_psu1.dev_attr.attr, - &sensor_dev_attr_rpm_psu2.dev_attr.attr, - - //switch temperature - &sensor_dev_attr_switch_tmp.dev_attr.attr, - - //diag flag - &sensor_dev_attr_diag.dev_attr.attr, - - //version - &sensor_dev_attr_version.dev_attr.attr, - - //fan led - &sensor_dev_attr_fan_led_grn1.dev_attr.attr, - &sensor_dev_attr_fan_led_grn2.dev_attr.attr, - &sensor_dev_attr_fan_led_grn3.dev_attr.attr, - &sensor_dev_attr_fan_led_grn4.dev_attr.attr, - &sensor_dev_attr_fan_led_red1.dev_attr.attr, - &sensor_dev_attr_fan_led_red2.dev_attr.attr, - &sensor_dev_attr_fan_led_red3.dev_attr.attr, - &sensor_dev_attr_fan_led_red4.dev_attr.attr, - - //fan GPI - &sensor_dev_attr_fan_gpi.dev_attr.attr, - - //fan type - &sensor_dev_attr_fan1_type.dev_attr.attr, - &sensor_dev_attr_fan2_type.dev_attr.attr, - &sensor_dev_attr_fan3_type.dev_attr.attr, - &sensor_dev_attr_fan4_type.dev_attr.attr, - - //psu - &sensor_dev_attr_psu1_vin.dev_attr.attr, - &sensor_dev_attr_psu1_vout.dev_attr.attr, - &sensor_dev_attr_psu1_iin.dev_attr.attr, - &sensor_dev_attr_psu1_iout.dev_attr.attr, - &sensor_dev_attr_psu1_pin.dev_attr.attr, - &sensor_dev_attr_psu1_pout.dev_attr.attr, - &sensor_dev_attr_psu2_vin.dev_attr.attr, - &sensor_dev_attr_psu2_vout.dev_attr.attr, - &sensor_dev_attr_psu2_iin.dev_attr.attr, - &sensor_dev_attr_psu2_iout.dev_attr.attr, - &sensor_dev_attr_psu2_pin.dev_attr.attr, - &sensor_dev_attr_psu2_pout.dev_attr.attr, - - &sensor_dev_attr_psu1_vendor.dev_attr.attr, - &sensor_dev_attr_psu1_model.dev_attr.attr, - &sensor_dev_attr_psu1_version.dev_attr.attr, - &sensor_dev_attr_psu1_date.dev_attr.attr, - &sensor_dev_attr_psu1_sn.dev_attr.attr, - &sensor_dev_attr_psu2_vendor.dev_attr.attr, - &sensor_dev_attr_psu2_model.dev_attr.attr, - &sensor_dev_attr_psu2_version.dev_attr.attr, - &sensor_dev_attr_psu2_date.dev_attr.attr, - &sensor_dev_attr_psu2_sn.dev_attr.attr, - - &sensor_dev_attr_psu0.dev_attr.attr, - &sensor_dev_attr_psu1.dev_attr.attr, - - //psu_psoc, new added on psoc 1.9 - &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, - &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, - &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, - &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, - &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, - &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, - &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, - &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, - &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, - &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, - &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, - &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, - - NULL -}; - -static const struct attribute_group psoc_group = { - .attrs = psoc_attributes, -}; - -/*-----------------------------------------------------------------------*/ - -/* device probe and removal */ - -static int -psoc_probe(struct i2c_client *client, const struct i2c_device_id *id) -{ - struct psoc_data *data; - int status; - - printk("+%s\n", __func__); - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) - return -EIO; - - data = kzalloc(sizeof(struct psoc_data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); - data->diag = 0; - - /* Register sysfs hooks */ - status = sysfs_create_group(&client->dev.kobj, &psoc_group); - if (status) - goto exit_free; - - data->hwmon_dev = hwmon_device_register(&client->dev); - if (IS_ERR(data->hwmon_dev)) { - status = PTR_ERR(data->hwmon_dev); - goto exit_remove; - } - - dev_info(&client->dev, "%s: sensor '%s'\n", - dev_name(data->hwmon_dev), client->name); - - return 0; - -exit_remove: - sysfs_remove_group(&client->dev.kobj, &psoc_group); -exit_free: - i2c_set_clientdata(client, NULL); - kfree(data); - return status; -} - -static int psoc_remove(struct i2c_client *client) -{ - struct psoc_data *data = i2c_get_clientdata(client); - - hwmon_device_unregister(data->hwmon_dev); - sysfs_remove_group(&client->dev.kobj, &psoc_group); - i2c_set_clientdata(client, NULL); - kfree(data); - return 0; -} - -static const struct i2c_device_id psoc_ids[] = { - { "inv_psoc", 0, }, - { /* LIST END */ } -}; -MODULE_DEVICE_TABLE(i2c, psoc_ids); - -static struct i2c_driver psoc_driver = { - .class = I2C_CLASS_HWMON, - .driver = { - .name = "inv_psoc", - }, - .probe = psoc_probe, - .remove = psoc_remove, - .id_table = psoc_ids, -}; - -/*-----------------------------------------------------------------------*/ - -/* module glue */ - -static int __init inv_psoc_init(void) -{ - return i2c_add_driver(&psoc_driver); -} - -static void __exit inv_psoc_exit(void) -{ - i2c_del_driver(&psoc_driver); -} - -MODULE_AUTHOR("eddie.lan "); -MODULE_DESCRIPTION("inv psoc driver"); -MODULE_LICENSE("GPL"); - -module_init(inv_psoc_init); -module_exit(inv_psoc_exit); +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +//#define offsetof(st, m) ((size_t)(&((st *)0)->m)) +#define FAN_NUM 5 +#define PSU_NUM 2 + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + u8 reserve1; //offset: 3 + + u8 fw_upgrade; //offset: 4 + + //i2c bridge + u8 i2c_st; //offset: 5 + u8 i2c_ctl; //offset: 6 + u8 i2c_addr; //offset: 7 + u8 i2c_data[0x20]; //offset: 8 + + //gpo + u8 led_grn; //offset: 28 + u8 led_red; //offset: 29 + + //pwm duty + u8 pwm[FAN_NUM]; //offset: 2a + u8 pwm_psu[PSU_NUM]; //offset: 2f + + //fan rpm + u16 fan[FAN_NUM*2]; //offset: 31 + //u16 fan_psu[PSU_NUM]; + + //gpi + u8 gpi_fan; //offset: 45 + + //psu state + u8 psu_state; //offset: 46 + + //temperature + u16 temp[5]; //offset: 47 + u16 temp_psu[PSU_NUM]; //offset: 51 + + //version + u8 version[2]; //offset: 55 + + u8 reserve2[3]; //offset: 57 + struct psoc_psu_layout psu_info; //offset: 5a +}; + + +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) //0x01 +#define PWM_OFFSET PSOC_OFF(pwm) +#define PWM_PSU_OFFSET PSOC_OFF(pwm_psu) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +//#define RPM_PSU_OFFSET PSOC_OFF(fan_psu) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_grn) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + + +/* Each client has this additional data */ +struct psoc_data { + struct device *hwmon_dev; + struct mutex update_lock; + u32 diag; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t psoc_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t psoc_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +static u32 psoc_read32(struct i2c_client *client, u8 offset) +{ + u32 value = 0; + u8 buf[4]; + + if( psoc_i2c_read(client, buf, offset, 4) == 4) + value = (buf[0]<<24 | buf[1]<<16 | buf[2]<<8 | buf[3]); + + return value; +} + +static u16 psoc_read16(struct i2c_client *client, u8 offset) +{ + u16 value = 0; + u8 buf[2]; + + if(psoc_i2c_read(client, buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(struct i2c_client *client, u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_i2c_read(client, &buf, offset, 1) == 1) + value = buf; + + return value; +} + +static int psoc_write_value(struct i2c_client *client, unsigned offset, u16 value) +{ + //TBD + return 0; +} + + +//PSOC i2c bridge regsters +#define PSOC_I2C_STATUS PSOC_OFF(i2c_st) +#define PSOC_I2C_CNTRL PSOC_OFF(i2c_ctl) +#define PSOC_I2C_ADDR PSOC_OFF(i2c_addr) +#define PSOC_I2C_DATA PSOC_OFF(i2c_data) + +//status bit definition +#define PSOC_I2C_START (1 << 0) +#define PSOC_PMB_SEL (1 << 7) + +//addr bits definition +#define PSOC_I2C_READ (1 << 0) + +//PMBUS registers definition +#define PMBUS_READ_VIN (0x88) +#define PMBUS_READ_IIN (0x89) +#define PMBUS_READ_VOUT (0x8B) +#define PMBUS_READ_IOUT (0x8C) +#define PMBUS_READ_POUT (0x96) +#define PMBUS_READ_PIN (0x97) + +#define PMBUS_MFR_ID (0x99) +#define PMBUS_MFR_MODEL (0x9A) +#define PMBUS_MFR_REVISION (0x9B) +#define PMBUS_MFR_DATE (0x9D) +#define PMBUS_MFR_SERIAL (0x9E) + +static int psoc_i2c_bridge_read(struct i2c_client *client, + unsigned char bus, + unsigned char chip, + char *addr, int alen, + unsigned char *data, int len ) +{ + unsigned char txdata[28], rxdata[28]; + int index, timeout; + + txdata[PSOC_I2C_STATUS] = 0; /* the status */ + txdata[PSOC_I2C_CNTRL] = ((alen & 3) << 5) | (len & 0x1f); /* the sizes */ + txdata[PSOC_I2C_ADDR] = (chip << 1) | PSOC_I2C_READ; /* read address */ + for(index = 0; index < alen; index++) + txdata[PSOC_I2C_DATA + index] = addr[index]; /* the chip address */ + for(; index < alen+len; index++) + txdata[PSOC_I2C_DATA + index] = 0; /* clear the chip data */ + + psoc_i2c_write(client, &txdata[PSOC_I2C_CNTRL], PSOC_I2C_CNTRL, 2 + alen + len); + + //delay a while ??? + //--------------------------------------------------------------------- + //start write + txdata[PSOC_I2C_STATUS] = PSOC_I2C_START; /* the start bit*/ + if(bus) + txdata[PSOC_I2C_STATUS] |= PSOC_PMB_SEL;/* bus id */ + psoc_i2c_write(client, &txdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //delay a while + timeout = 40; //40*20==>800 ms + do { + psoc_i2c_read(client, &rxdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //check rxdata[5] error bit(1) and complete bit(0) ,TBD + if((rxdata[PSOC_I2C_STATUS] & 0x2) == 0x2) { + //printk("i2c bridge fail!!!\n"); + timeout = 0; + break; + } + if((rxdata[PSOC_I2C_STATUS] & PSOC_I2C_START) == 0) { + /* comand complete */ + psoc_i2c_read(client, &rxdata[PSOC_I2C_DATA+alen], PSOC_I2C_DATA+alen, len); + break; + } + + //delay + msleep(20); + } while(timeout--); + + if(timeout <= 0) { + return -1; + } + + //--------------------------------------------------------------------- + + for(index=0; index < len; index++) { + data[index] = rxdata[PSOC_I2C_DATA + alen + index]; + } + + return 0; +} + + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, &byte, PSOC_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + status = __swab16(status); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + + if(data->diag) { + mutex_lock(&data->update_lock); + psoc_i2c_write(client, &pwm, offset, 1); + mutex_unlock(&data->update_lock); + } + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + status = __swab16(status); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} +static ssize_t show_fan_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 index = attr->index; + int type = -1; + + mutex_lock(&data->update_lock); + status = psoc_read8(client, FAN_GPI_OFFSET); + mutex_unlock(&data->update_lock); + + if( (status & 1<update_lock); + status = psoc_i2c_read(client, (u8*)&temp, SWITCH_TMP_OFFSET, 2); + status = __swab16(status); + mutex_unlock(&data->update_lock); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); + + mutex_lock(&data->update_lock); + psoc_i2c_write(client, (u8*)&temp2, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 diag_flag = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + data->diag = (diag_flag & 0x80)?1:0; + status = sprintf (buf, "%d\n", data->diag); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + data->diag = diag; + + mutex_lock(&data->update_lock); + psoc_i2c_read(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_i2c_write(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, VERSION_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 bit = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, FAN_LED_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(data->diag) { + mutex_lock(&data->update_lock); + led_state = psoc_read8(client, FAN_LED_OFFSET); + if(v) led_state |= (1<update_lock); + } + + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 reg = attr->index & 0xFF; + u8 len = ((attr->index & 0xFF00) >> 8); + u8 chip = (attr->index >> 16)? 0x59:0x58; + u8 bus = 1; + unsigned char value[2] = {0,0};; + + if (len == 2) + { + mutex_lock(&data->update_lock); + psoc_i2c_bridge_read(client, bus, chip, ®, 1, value, 2); + mutex_unlock(&data->update_lock); + + status = value[1]<<8 | value[0]; + //status1 = value[1]<<8 | value[0]; + + return sprintf(buf, "%ld\n", pmbus_reg2data_linear(status, (reg==PMBUS_READ_VOUT)?1:0) ); + } + else + { //len is not defined. + u8 tmpbuf[32]; + mutex_lock(&data->update_lock); + //length of block read + psoc_i2c_bridge_read(client, bus, chip, ®, 1, &len, 1); + //data included length + psoc_i2c_bridge_read(client, bus, chip, ®, 1, tmpbuf, len+1); + mutex_unlock(&data->update_lock); + + memcpy(buf, tmpbuf+1, len); + buf[len]='\n'; + + return len+1; + } +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PSU_INFO_OFFSET; + + mutex_lock(&data->update_lock); + status = psoc_read16(client, offset); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); +} + + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+3); +#if (FAN_NUM >= 5) +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+4); +#endif +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_PSU_OFFSET+0); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_PSU_OFFSET+1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7*2 + RPM_OFFSET); +#if (FAN_NUM >= 5) +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); +#endif +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(fan1_type, S_IRUGO, show_fan_type, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_type, S_IRUGO, show_fan_type, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_type, S_IRUGO, show_fan_type, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_type, S_IRUGO, show_fan_type, 0, 3); + +static SENSOR_DEVICE_ATTR(psu1_vin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu1_iin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu1_vendor, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu1_model, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu1_version, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu1_date, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu1_sn, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psu2_vin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu2_iin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu2_vendor, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu2_model, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu2_version, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu2_date, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu2_sn, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); + + + +static struct attribute *psoc_attributes[] = { + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if (FAN_NUM >= 5) + //&sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if (FAN_NUM >= 5) + //&sensor_dev_attr_fan9_input.dev_attr.attr, + //&sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, + + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + + //fan type + &sensor_dev_attr_fan1_type.dev_attr.attr, + &sensor_dev_attr_fan2_type.dev_attr.attr, + &sensor_dev_attr_fan3_type.dev_attr.attr, + &sensor_dev_attr_fan4_type.dev_attr.attr, + + //psu + &sensor_dev_attr_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psu1_model.dev_attr.attr, + &sensor_dev_attr_psu1_version.dev_attr.attr, + &sensor_dev_attr_psu1_date.dev_attr.attr, + &sensor_dev_attr_psu1_sn.dev_attr.attr, + &sensor_dev_attr_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psu2_model.dev_attr.attr, + &sensor_dev_attr_psu2_version.dev_attr.attr, + &sensor_dev_attr_psu2_date.dev_attr.attr, + &sensor_dev_attr_psu2_sn.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + //psu_psoc, new added on psoc 1.9 + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + // Add new fields which matching standard + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +psoc_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psoc_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psoc_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->diag = 0; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psoc_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psoc_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int psoc_remove(struct i2c_client *client) +{ + struct psoc_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &psoc_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id psoc_ids[] = { + { "inv_psoc", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, psoc_ids); + +static struct i2c_driver psoc_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psoc", + }, + .probe = psoc_probe, + .remove = psoc_remove, + .id_table = psoc_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_psoc_init(void) +{ + return i2c_add_driver(&psoc_driver); +} + +static void __exit inv_psoc_exit(void) +{ + i2c_del_driver(&psoc_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c new file mode 100644 index 00000000000..b0f905d6a7d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c @@ -0,0 +1,1305 @@ +/***************************** + Redwood platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + +#define INV_PTHREAD_KERNEL_MODULE (1) +#define SWITCH_HEALTH_LED_CHANGE_VIA_GPIO (1) + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + + if (ret < 0) { + return ret; + } + + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("253", 3, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 253 to /sys/class/gpio/export failed\n"); + return; + } + + printk("[p_thread] Write 253 to /sys/class/gpio/export\n"); + + ret = inventec_store_attr("out", 3, "/sys/class/gpio/gpio253/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio253/direction failed\n"); + return; + } + + //pull high and then low + ret = inventec_store_attr("1", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 1 to sys/class/gpio/gpio253/value failed\n"); + } + + //pull low + ret = inventec_store_attr("0", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 0 to sys/class/gpio/gpio253/value failed\n"); + } + + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + // switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py index f6f5e46c553..6625efc00ed 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py @@ -124,7 +124,8 @@ def exec_cmd(cmd, show): 'inv_platform', 'inv_psoc', 'inv_cpld', -'swps'] +'swps', +'inv_pthread'] @@ -134,6 +135,9 @@ def system_install(): #remove default drivers to avoid modprobe order conflicts status, output = exec_cmd("rmmod i2c_ismt ", 1) status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich",1) + status, output = exec_cmd("insmod /lib/modules/3.16.0-5-amd64/extra/gpio-ich.ko gpiobase=0",1) + #install drivers for i in range(0,len(drivers)): status, output = exec_cmd("modprobe "+drivers[i], 1) @@ -196,6 +200,7 @@ def install(): def uninstall(): global FORCE + exec_cmd("rmmod gpio_ich",1) #uninstall drivers for i in range(len(drivers)-1,-1,-1): status, output = exec_cmd("rmmod "+drivers[i], 1) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile index aeffa437658..37cbc2f4e8b 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile @@ -1,5 +1,6 @@ obj-m += inv_cpld.o inv_psoc.o obj-m += inv_platform.o +obj-m += inv_pthread.o obj-m += inv_eeprom.o obj-m += swps.o swps-objs := inv_swps.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_psoc.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_psoc.c index d6eb6fd2d98..8b14419e050 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_psoc.c +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_psoc.c @@ -802,6 +802,7 @@ static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8); static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9); static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); @@ -831,6 +832,14 @@ static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); + + //IPMI static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_i2c, 0, PSU1 | PMBus_Temp2); static SENSOR_DEVICE_ATTR(psoc_psu1_vender, S_IRUGO, show_ipmi_i2c, 0, PSU1 | PMBus_Vender); @@ -880,6 +889,7 @@ static struct attribute *psoc_attributes[] = { //switch temperature &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, //diag flag &sensor_dev_attr_diag.dev_attr.attr, @@ -917,6 +927,14 @@ static struct attribute *psoc_attributes[] = { &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + // Add new fields which matching standard + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + //ipmi_command &sensor_dev_attr_thermal2_psu1.dev_attr.attr, &sensor_dev_attr_psoc_psu1_vender.dev_attr.attr, diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c new file mode 100644 index 00000000000..4ca41e432be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c @@ -0,0 +1,1284 @@ +/***************************** + Cypress platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INV_PTHREAD_KERNEL_MODULE + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("57", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 57 to /sys/class/gpio/export failed\n"); + return; + } + ret = inventec_store_attr("low", 3, "/sys/class/gpio/gpio57/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio57/direction failed\n"); + return; + } + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py index 7fbb707f418..246893ba05b 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py @@ -127,13 +127,14 @@ def exec_cmd(cmd, show): 'inv_platform', 'inv_psoc', 'inv_cpld', +'inv_pthread', 'swps'] def system_install(): global FORCE - + #install drivers for i in range(0,len(drivers)): status, output = exec_cmd("modprobe "+drivers[i], 1) @@ -209,7 +210,7 @@ def install(): if FORCE == 0: return status else: - print " D7032 devices detected...." + print " D7054 devices detected...." return def uninstall(): diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile index aeffa437658..37cbc2f4e8b 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile @@ -1,5 +1,6 @@ obj-m += inv_cpld.o inv_psoc.o obj-m += inv_platform.o +obj-m += inv_pthread.o obj-m += inv_eeprom.o obj-m += swps.o swps-objs := inv_swps.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_psoc.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_psoc.c index 7372c0eb3a2..c7ab224d028 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_psoc.c +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_psoc.c @@ -50,7 +50,6 @@ DEFINE_MUTEX(ipmi_mutex); DEFINE_MUTEX(ipmi2_mutex); static struct ipmi_result ipmiresult; static struct device *hwmon_dev; -static struct kobject *device_kobj; static ipmi_user_t ipmi_mh_user = NULL; static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data); static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; @@ -588,6 +587,7 @@ static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8); static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9); static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); @@ -618,6 +618,13 @@ static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); + //IPMI static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); static SENSOR_DEVICE_ATTR(psoc_psu1_vender, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Vender); @@ -665,7 +672,7 @@ static struct attribute *psoc_attributes[] = { //switch temperature &sensor_dev_attr_switch_tmp.dev_attr.attr, - + &sensor_dev_attr_temp6_input.dev_attr.attr, //diag flag &sensor_dev_attr_diag.dev_attr.attr, @@ -702,6 +709,14 @@ static struct attribute *psoc_attributes[] = { &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + // Add new fields which matching standard + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + //ipmi_i2c_command &sensor_dev_attr_thermal2_psu1.dev_attr.attr, &sensor_dev_attr_psoc_psu1_vender.dev_attr.attr, @@ -732,13 +747,8 @@ static int __init inv_psoc_init(void) if (IS_ERR(hwmon_dev)) { goto fail_hwmon_device_register; } - - device_kobj = kobject_create_and_add("device", &hwmon_dev->kobj); - if(!device_kobj) { - goto fail_hwmon_device_register; - } - - ret = sysfs_create_group(device_kobj, &psoc_group); + + ret = sysfs_create_group(&hwmon_dev->kobj, &psoc_group); if (ret) { goto fail_create_group_hwmon; } @@ -754,9 +764,10 @@ static int __init inv_psoc_init(void) static void __exit inv_psoc_exit(void) { + sysfs_remove_group(&hwmon_dev->kobj, &psoc_group); + if(ipmi_mh_user!=NULL) {ipmi_destroy_user(ipmi_mh_user);} if(hwmon_dev != NULL) hwmon_device_unregister(hwmon_dev); - sysfs_remove_group(device_kobj, &psoc_group); } MODULE_AUTHOR("Ting.Jack "); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c new file mode 100644 index 00000000000..a45db7423f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c @@ -0,0 +1,1303 @@ +/***************************** + Sequoia platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INV_PTHREAD_KERNEL_MODULE + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; +static int hwm_cpld2 = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_cpld2", 9) == 0) { + hwm_cpld2 = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_PSOC_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/%s" +#define PSU_CPLD_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_CPLD_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_PSOC_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +void sys_ready(void) +{ + ssize_t ret; + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + SYSFS_LOG("[p_thread] set ctl fail"); + } + SYSFS_LOG("[p_thread] set ctl successfully"); +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sys_ready(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("57", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 57 to /sys/class/gpio/export failed\n"); + return; + } + ret = inventec_store_attr("low", 3, "/sys/class/gpio/gpio57/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio57/direction failed\n"); + return; + } + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py index 18853b7b240..fea26decf2a 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py @@ -115,6 +115,7 @@ def exec_cmd(cmd, show): 'echo inv_eeprom 0x53> /sys/bus/i2c/devices/i2c-0/new_device'] drivers =[ +'gpio-ich', 'lpc_ich', 'i2c-i801', 'i2c-mux', @@ -124,9 +125,9 @@ def exec_cmd(cmd, show): 'inv_platform', 'inv_psoc', 'inv_cpld', +'inv_pthread', 'swps'] - def system_install(): global FORCE @@ -213,7 +214,7 @@ def install(): status = system_install() if status: if FORCE == 0: - return status + return status else: print " D7264 devices detected...." return diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/changelog b/platform/broadcom/sonic-platform-modules-inventec/debian/changelog index e49ed14c3e2..46aebb02ec8 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/changelog @@ -1,7 +1,17 @@ sonic-inventec-platform-modules (1.1.0) unstable; urgency=low * Add support for Inventec d7264 - -- developer Tue, 17 Apr 2018 15:27:30 +0800 + -- alvin lin Thu, 12 Jul 2018 16:00:00 +0800 + +sonic-inventec-platform-modules (1.1.0) unstable; urgency=low + * Add support for Inventec d6556 + + -- alvin lin Thu, 12 Jul 2018 16:00:00 +0800 + +sonic-inventec-platform-modules (1.1.0) unstable; urgency=low + * Add support for Inventec d6254 + + -- alvin lin Wed, 09 May 2018 16:00:00 +0800 sonic-inventec-platform-modules (1.1.0) unstable; urgency=low * Add support for Inventec d7054 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/control b/platform/broadcom/sonic-platform-modules-inventec/debian/control index 9368de788ce..464211650fa 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/control +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/control @@ -6,16 +6,26 @@ Build-Depends: debhelper (>= 8.0.0), bzip2 Standards-Version: 3.9.3 Package: platform-modules-d7032q28b -Architecture: amd64 -Depends: linux-image-3.16.0-5-amd64 +Architecture: amd64 +Depends: linux-image-4.9.0-7-amd64 Description: kernel modules for platform devices such as fan, led Package: platform-modules-d7054q28b Architecture: amd64 -Depends: linux-image-3.16.0-5-amd64 +Depends: linux-image-4.9.0-7-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d6254qs +Architecture: amd64 +Depends: linux-image-4.9.0-7-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d6556 +Architecture: amd64 +Depends: linux-image-4.9.0-7-amd64 Description: kernel modules for platform devices such as fan, led Package: platform-modules-d7264q28b Architecture: amd64 -Depends: linux-image-3.16.0-5-amd64 +Depends: linux-image-4.9.0-7-amd64 Description: kernel modules for platform devices such as fan, led diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init new file mode 100644 index 00000000000..92405e28fd2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init @@ -0,0 +1,73 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6254qs board. +### END INIT INFO + +DIR=/usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +LED_DAEMON=$DIR/led_proc.py +LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +ASIC_DAEMON_NAM=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + /usr/local/bin/inventec_d6254_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d6254_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6254qs.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install new file mode 100644 index 00000000000..c4c32c02b29 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install @@ -0,0 +1,6 @@ +d6254qs/utils/inventec_d6254_util.py usr/local/bin +common/utils/transceiver_monitor.py usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +common/utils/led_proc.py usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +common/utils/asic_monitor.py usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +common/utils/platform_status.py usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +systemd/platform-modules-d6254qs.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init new file mode 100644 index 00000000000..fc6ba5a261b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init @@ -0,0 +1,72 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6556 board. +### END INIT INFO + +DIR=/usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +LED_DAEMON=$DIR/led_proc.py +LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + /usr/local/bin/inventec_d6556_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d6556_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6556.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install new file mode 100644 index 00000000000..f9e9de9a8b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install @@ -0,0 +1,6 @@ +d6556/utils/inventec_d6556_util.py usr/local/bin +common/utils/transceiver_monitor.py usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +common/utils/led_proc.py usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +common/utils/asic_monitor.py usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +common/utils/platform_status.py usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +systemd/platform-modules-d6556.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init index 97fee8c3ad5..bcc9610abed 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init @@ -16,19 +16,29 @@ MONITOR_DAEMON=$DIR/transceiver_monitor.py MONITOR_DAEMON_NAME=transceiver_monitor LED_DAEMON=$DIR/led_proc.py LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status # The process ID of the script when it runs is stored here: MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid do_monitor_start() { /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS } do_monitor_stop() { /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 } case "$1" in diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install index c716a9d0d8b..49ef07def38 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install @@ -1,3 +1,6 @@ d7032q28b/utils/inventec_d7032_util.py usr/local/bin common/utils/transceiver_monitor.py usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/plugins common/utils/led_proc.py usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/plugins +common/utils/asic_monitor.py usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/plugins +common/utils/platform_status.py usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/plugins +systemd/platform-modules-d7032q28b.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init index a6e3e88f20d..809ad625555 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init @@ -16,19 +16,29 @@ MONITOR_DAEMON=$DIR/transceiver_monitor.py MONITOR_DAEMON_NAME=transceiver_monitor LED_DAEMON=$DIR/led_proc.py LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status # The process ID of the script when it runs is stored here: MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid do_monitor_start() { /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS } do_monitor_stop() { /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 } case "$1" in diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install index 699a5ef4141..0ffc0a4f92a 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install @@ -1,4 +1,6 @@ d7054q28b/utils/inventec_d7054_util.py usr/local/bin common/utils/transceiver_monitor.py usr/share/sonic/device/x86_64-inventec_d7054q28b-r0/plugins common/utils/led_proc.py usr/share/sonic/device/x86_64-inventec_d7054q28b-r0/plugins - +common/utils/asic_monitor.py usr/share/sonic/device/x86_64-inventec_d7054q28b-r0/plugins +common/utils/platform_status.py usr/share/sonic/device/x86_64-inventec_d7054q28b-r0/plugins +systemd/platform-modules-d7054q28b.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init index 87c145a9545..606c7a7cdd0 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init @@ -8,21 +8,48 @@ # Should-Stop: # Default-Start: S # Default-Stop: 0 6 -# Short-Description: Setup Inventec d7054q28b board. +# Short-Description: Setup Inventec d7264q28b board. ### END INIT INFO +DIR=/usr/share/sonic/device/x86_64-inventec_d7264q28b-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + case "$1" in start) echo -n "Setting up board... " depmod -a /usr/local/bin/inventec_d7264_util.py -f install + do_monitor_${1} echo "done." ;; stop) /usr/local/bin/inventec_d7264_util.py -f clean + do_monitor_${1} echo "done." ;; diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install index dba76a7d05c..66e77e1ddf8 100644 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install @@ -1 +1,5 @@ d7264q28b/utils/inventec_d7264_util.py usr/local/bin +common/utils/transceiver_monitor.py usr/share/sonic/device/x86_64-inventec_d7264q28b-r0/plugins +common/utils/asic_monitor.py usr/share/sonic/device/x86_64-inventec_d7264q28b-r0/plugins +common/utils/platform_status.py usr/share/sonic/device/x86_64-inventec_d7264q28b-r0/plugins +systemd/platform-modules-d7264q28b.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.upstart b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.upstart deleted file mode 100644 index a438cb7bc7e..00000000000 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.upstart +++ /dev/null @@ -1,5 +0,0 @@ -description "SONiC platform service" - -respawn - -exec /usr/local/bin/inventec_d7264_util.py -f install diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/rules b/platform/broadcom/sonic-platform-modules-inventec/debian/rules index 9c3dcf4df8a..2e396e16782 100755 --- a/platform/broadcom/sonic-platform-modules-inventec/debian/rules +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/rules @@ -14,10 +14,10 @@ export INSTALL_MOD_DIR:=extra KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= d7032q28b d7054q28b d7264q28b +MODULE_DIRS:= d7032q28b d7054q28b d6254qs d6556 d7264q28b %: - dh $@ + dh $@ --with=systemd override_dh_auto_build: (for mod in $(MODULE_DIRS); do \ diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service new file mode 100644 index 00000000000..b7aa6dc0e1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d6254qs Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d6254qs start +ExecStop=-/etc/init.d/platform-modules-d6254qs stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service new file mode 100644 index 00000000000..6fbd6711ede --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7032q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d6556 start +ExecStop=-/etc/init.d/platform-modules-d6556 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service new file mode 100644 index 00000000000..b96374b343f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7032q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7032q28b start +ExecStop=-/etc/init.d/platform-modules-d7032q28b stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service new file mode 100644 index 00000000000..0c2d463598a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7054q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7054q28b start +ExecStop=-/etc/init.d/platform-modules-d7054q28b stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service new file mode 100644 index 00000000000..a4cda393435 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7032q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7264q28b start +ExecStop=-/etc/init.d/platform-modules-d7264q28b stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target From ea28f3aa4499ea201179a8b4ee5dc5b920a22cef Mon Sep 17 00:00:00 2001 From: Taoyu Li Date: Sat, 15 Sep 2018 22:15:02 -0700 Subject: [PATCH 28/57] [sonic-cfggen] Add support to generate sample t1 config (#2039) * [sonic-cfggen] Add support to generate sample t1 config * Fix typo * Fix space issue * Add list of preset messages in help message * Utilize choice support of argparse * Fix missing module in setup.py --- src/sonic-config-engine/config_samples.py | 66 +++++++++++++++++++++++ src/sonic-config-engine/setup.py | 2 +- src/sonic-config-engine/sonic-cfggen | 7 +++ 3 files changed, 74 insertions(+), 1 deletion(-) create mode 100644 src/sonic-config-engine/config_samples.py diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py new file mode 100644 index 00000000000..6cb417b9a50 --- /dev/null +++ b/src/sonic-config-engine/config_samples.py @@ -0,0 +1,66 @@ +#!/usr/bin/env python +import os +import sys +from natsort import natsorted + +def generate_t1_sample_config(data): + data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' + data['DEVICE_METADATA']['localhost']['bgp_asn'] = '65100' + data['LOOPBACK_INTERFACE'] = {"Loopback0|10.1.0.1/32": {}} + data['BGP_NEIGHBOR'] = {} + data['DEVICE_NEIGHBOR'] = {} + data['INTERFACE'] = {} + port_count = 0 + total_port_amount = len(data['PORT']) + for port in natsorted(data['PORT'].keys()): + data['PORT'][port]['admin_status'] = 'up' + data['PORT'][port]['mtu'] = '9100' + local_addr = '10.0.{}.{}'.format(2 * port_count / 256, 2 * port_count % 256) + peer_addr = '10.0.{}.{}'.format(2 * port_count / 256, 2 * port_count % 256 + 1) + peer_name='ARISTA{0:02d}{1}'.format(1+port_count%(total_port_amount/2), 'T2' if port_count < (total_port_amount/2) else 'T0') + peer_asn = 65200 if port_count < total_port_amount/2 else 64001 + port_count - total_port_amount/2 + data['INTERFACE']['{}|{}/31'.format(port, local_addr)] = {} + data['BGP_NEIGHBOR'][peer_addr] = { + 'rrclient': 0, + 'name': peer_name, + 'local_addr': local_addr, + 'nhopself': 0, + 'holdtime': '180', + 'asn': str(peer_asn), + 'keepalive': '60' + } + port_count += 1 + return data; + +def generate_empty_config(data): + new_data = {'DEVICE_METADATA': data['DEVICE_METADATA']} + if not new_data['DEVICE_METADATA']['localhost'].has_key('hostname'): + new_data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + if not new_data['DEVICE_METADATA']['localhost'].has_key('type'): + new_data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' + return new_data + +def generate_l2_config(data): + if not data['DEVICE_METADATA']['localhost'].has_key('hostname'): + data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + if not data['DEVICE_METADATA']['localhost'].has_key('type'): + data['DEVICE_METADATA']['localhost']['type'] = 'ToRRouter' + data['VLAN'] = {'Vlan1000': {'vlanid': '1000'}} + data['VLAN_MEMBER'] = {} + for port in natsorted(data['PORT'].keys()): + data['VLAN_MEMBER']['Vlan1000|{}'.format(port)] = {'tagging_mode': 'untagged'} + return data + +_sample_generators = { + 't1': generate_t1_sample_config, + 'l2': generate_l2_config, + 'empty': generate_empty_config + } + +def get_available_config(): + return _sample_generators.keys() + +def generate_sample_config(data, setting_name): + return _sample_generators[setting_name.lower()](data) + diff --git a/src/sonic-config-engine/setup.py b/src/sonic-config-engine/setup.py index 1d0c7f99fa4..8375b6af89a 100755 --- a/src/sonic-config-engine/setup.py +++ b/src/sonic-config-engine/setup.py @@ -16,7 +16,7 @@ def get_test_suite(): author='Taoyu Li', author_email='taoyl@microsoft.com', url='https://github.com/Azure/sonic-buildimage', - py_modules=['portconfig', 'minigraph', 'openconfig_acl', 'sonic_platform'], + py_modules=['portconfig', 'minigraph', 'openconfig_acl', 'sonic_platform', 'config_samples'], scripts=['sonic-cfggen'], install_requires=['lxml', 'jinja2>=2.10', 'netaddr', 'ipaddr', 'pyyaml', 'pyangbind==0.6.0'], test_suite='setup.get_test_suite', diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen index bdb3c804fc7..463b69c8f16 100755 --- a/src/sonic-config-engine/sonic-cfggen +++ b/src/sonic-config-engine/sonic-cfggen @@ -31,6 +31,8 @@ from portconfig import get_port_config from sonic_platform import get_machine_info from sonic_platform import get_platform_info from sonic_platform import get_system_mac +from config_samples import generate_sample_config +from config_samples import get_available_config from swsssdk import ConfigDBConnector from collections import OrderedDict from natsort import natsorted @@ -156,6 +158,7 @@ def main(): group.add_argument("--var-json", help="print the value of a variable, in json format") group.add_argument("--write-to-db", help="write config into configdb", action='store_true') group.add_argument("--print-data", help="print all data", action='store_true') + group.add_argument("--preset", help="generate sample configuration from a preset template", choices=get_available_config()) args = parser.parse_args() platform = get_platform_info(get_machine_info()) @@ -244,6 +247,10 @@ def main(): if args.print_data: print(json.dumps(FormatConverter.to_serialized(data), indent=4, cls=minigraph_encoder)) + if args.preset != None: + data = generate_sample_config(data, args.preset) + print(json.dumps(FormatConverter.to_serialized(data), indent=4, cls=minigraph_encoder)) + if __name__ == "__main__": main() From 51a8d8ecfa0ad11961aeb7140d6b6ef20602e29f Mon Sep 17 00:00:00 2001 From: Marian Pritsak Date: Mon, 17 Sep 2018 03:10:03 +0300 Subject: [PATCH 29/57] [docker-orchagent]: Upgrade iproute2 to v4.9 (#2052) Signed-off-by: Marian Pritsak --- dockers/docker-orchagent/Dockerfile.j2 | 2 ++ platform/barefoot/docker-orchagent-bfn.mk | 2 +- platform/broadcom/docker-orchagent-brcm.mk | 2 +- platform/cavium/docker-orchagent-cavm.mk | 2 +- platform/centec/docker-orchagent-centec.mk | 2 +- platform/marvell/docker-orchagent-mrvl.mk | 2 +- platform/mellanox/docker-orchagent-mlnx.mk | 2 +- platform/nephos/docker-orchagent-nephos.mk | 2 +- 8 files changed, 9 insertions(+), 7 deletions(-) diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2 index dc70bbcbded..61cb094ba70 100755 --- a/dockers/docker-orchagent/Dockerfile.j2 +++ b/dockers/docker-orchagent/Dockerfile.j2 @@ -15,6 +15,8 @@ RUN apt-get install -f -y ndisc6 ## TODO: implicitly install dependencies RUN apt-get -y install libjemalloc1 +RUN apt-get install -y libelf1 libmnl0 + COPY \ {% for deb in docker_orchagent_debs.split(' ') -%} debs/{{ deb }}{{' '}} diff --git a/platform/barefoot/docker-orchagent-bfn.mk b/platform/barefoot/docker-orchagent-bfn.mk index f13fa63d6f2..67069a6060c 100644 --- a/platform/barefoot/docker-orchagent-bfn.mk +++ b/platform/barefoot/docker-orchagent-bfn.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_BFN = docker-orchagent-bfn.gz $(DOCKER_ORCHAGENT_BFN)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_BFN)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_BFN)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_BFN)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_BFN) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_BFN) diff --git a/platform/broadcom/docker-orchagent-brcm.mk b/platform/broadcom/docker-orchagent-brcm.mk index 06697396745..5b4cd31f8b3 100644 --- a/platform/broadcom/docker-orchagent-brcm.mk +++ b/platform/broadcom/docker-orchagent-brcm.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_BRCM = docker-orchagent-brcm.gz $(DOCKER_ORCHAGENT_BRCM)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_BRCM)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_BRCM)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_BRCM) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_BRCM) diff --git a/platform/cavium/docker-orchagent-cavm.mk b/platform/cavium/docker-orchagent-cavm.mk index a171a6c801d..6513fbabf4f 100644 --- a/platform/cavium/docker-orchagent-cavm.mk +++ b/platform/cavium/docker-orchagent-cavm.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_CAVM = docker-orchagent-cavm.gz $(DOCKER_ORCHAGENT_CAVM)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_CAVM)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_CAVM)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_CAVM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_CAVM) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_CAVM) diff --git a/platform/centec/docker-orchagent-centec.mk b/platform/centec/docker-orchagent-centec.mk index e1d7fd6cf0d..c6ee277f7ed 100644 --- a/platform/centec/docker-orchagent-centec.mk +++ b/platform/centec/docker-orchagent-centec.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_CENTEC = docker-orchagent-centec.gz $(DOCKER_ORCHAGENT_CENTEC)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_CENTEC)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_CENTEC)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_CENTEC)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_CENTEC) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_CENTEC) diff --git a/platform/marvell/docker-orchagent-mrvl.mk b/platform/marvell/docker-orchagent-mrvl.mk index f2cb0c997d7..1106aedac05 100644 --- a/platform/marvell/docker-orchagent-mrvl.mk +++ b/platform/marvell/docker-orchagent-mrvl.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_MRVL = docker-orchagent-mrvl.gz $(DOCKER_ORCHAGENT_MRVL)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_MRVL)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_MRVL)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_MRVL) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_MRVL) diff --git a/platform/mellanox/docker-orchagent-mlnx.mk b/platform/mellanox/docker-orchagent-mlnx.mk index 6dda3c446b0..f43f986527a 100644 --- a/platform/mellanox/docker-orchagent-mlnx.mk +++ b/platform/mellanox/docker-orchagent-mlnx.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_MLNX = docker-orchagent-mlnx.gz $(DOCKER_ORCHAGENT_MLNX)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_MLNX)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_MLNX)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_MLNX) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_MLNX) diff --git a/platform/nephos/docker-orchagent-nephos.mk b/platform/nephos/docker-orchagent-nephos.mk index b21e69d6cf8..098a94772b5 100644 --- a/platform/nephos/docker-orchagent-nephos.mk +++ b/platform/nephos/docker-orchagent-nephos.mk @@ -2,7 +2,7 @@ DOCKER_ORCHAGENT_NEPHOS = docker-orchagent-nephos.gz $(DOCKER_ORCHAGENT_NEPHOS)_PATH = $(DOCKERS_PATH)/docker-orchagent -$(DOCKER_ORCHAGENT_NEPHOS)_DEPENDS += $(SWSS) $(REDIS_TOOLS) +$(DOCKER_ORCHAGENT_NEPHOS)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(IPROUTE2) $(DOCKER_ORCHAGENT_NEPHOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_NEPHOS) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT_NEPHOS) From f7024424bb19de16ae6964bc85a4caf3d2b050eb Mon Sep 17 00:00:00 2001 From: Shuotian Cheng Date: Mon, 17 Sep 2018 20:23:36 -0700 Subject: [PATCH 30/57] [minigraph]: Add min_links attribute to PORTCHANNEL configuration table (#2053) The default min_links value is the ceiling value of 75% of total number of members. Signed-off-by: Shu0T1an ChenG --- src/sonic-config-engine/minigraph.py | 5 +++-- src/sonic-config-engine/tests/test_cfggen.py | 4 ++-- src/sonic-config-engine/tests/test_minigraph_case.py | 2 +- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index b5fa98bc98d..a978f5906eb 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -1,5 +1,6 @@ #!/usr/bin/env python import calendar +import math import os import sys import socket @@ -188,9 +189,9 @@ def parse_dpg(dpg, hname): intfs_inpc.append(pcmbr_list[i]) pc_members[pcintfname + KEY_SEPARATOR + pcmbr_list[i]] = {'NULL': 'NULL'} if pcintf.find(str(QName(ns, "Fallback"))) != None: - pcs[pcintfname] = {'members': pcmbr_list, 'fallback': pcintf.find(str(QName(ns, "Fallback"))).text} + pcs[pcintfname] = {'members': pcmbr_list, 'fallback': pcintf.find(str(QName(ns, "Fallback"))).text, 'min_links': str(int(math.ceil(len() * 0.75)))} else: - pcs[pcintfname] = {'members': pcmbr_list} + pcs[pcintfname] = {'members': pcmbr_list, 'min_links': str(int(math.ceil(len(pcmbr_list) * 0.75)))} vlanintfs = child.find(str(QName(ns, "VlanInterfaces"))) vlan_intfs = [] diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py index fbb8ca6b21a..7ffdf61a405 100644 --- a/src/sonic-config-engine/tests/test_cfggen.py +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -115,12 +115,12 @@ def test_minigraph_vlan_interfaces(self): def test_minigraph_portchannels(self): argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v PORTCHANNEL' output = self.run_script(argument) - self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet4'], 'mtu': '9100'}}") + self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'min_links': '1', 'members': ['Ethernet4'], 'mtu': '9100'}}") def test_minigraph_portchannel_with_more_member(self): argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v PORTCHANNEL' output = self.run_script(argument) - self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet112', 'Ethernet116', 'Ethernet120', 'Ethernet124'], 'mtu': '9100'}}") + self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'min_links': '3', 'members': ['Ethernet112', 'Ethernet116', 'Ethernet120', 'Ethernet124'], 'mtu': '9100'}}") def test_minigraph_portchannel_members(self): argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v "PORTCHANNEL_MEMBER.keys()"' diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py index 6a4849c7148..67a82abb09b 100644 --- a/src/sonic-config-engine/tests/test_minigraph_case.py +++ b/src/sonic-config-engine/tests/test_minigraph_case.py @@ -87,7 +87,7 @@ def test_minigraph_vlan_interfaces(self): def test_minigraph_portchannels(self): argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v PORTCHANNEL' output = self.run_script(argument) - self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet4'], 'mtu': '9100'}}") + self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'min_links': '1', 'members': ['Ethernet4'], 'mtu': '9100'}}") def test_minigraph_console_port(self): argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v CONSOLE_PORT' From ef4ee9f242c55c751e4f46a2d98ad6f39730bd93 Mon Sep 17 00:00:00 2001 From: Joe LeVeque Date: Tue, 18 Sep 2018 01:23:50 -0700 Subject: [PATCH 31/57] [sonic-py-swsssdk] Update submodule (#2054) --- src/sonic-py-swsssdk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-py-swsssdk b/src/sonic-py-swsssdk index 6272b5f7abb..9d36ad3b4d0 160000 --- a/src/sonic-py-swsssdk +++ b/src/sonic-py-swsssdk @@ -1 +1 @@ -Subproject commit 6272b5f7abb743411c703dac46eb39f951b57818 +Subproject commit 9d36ad3b4d0850429a021d79b12ffcc194642d96 From 514b38f348f396737901c51e8b6d2f5b32d05ab6 Mon Sep 17 00:00:00 2001 From: Volodymyr Samotiy Date: Wed, 19 Sep 2018 23:14:10 +0300 Subject: [PATCH 32/57] [mellanox]: Integrate CRIU tool to SYNCD docker container (#2061) Signed-off-by: Volodymyr Samotiy --- platform/mellanox/criu.mk | 8 ++++++++ platform/mellanox/criu/Makefile | 14 ++++++++++++++ platform/mellanox/docker-syncd-mlnx.mk | 3 ++- platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 | 2 +- sonic-slave/Dockerfile | 15 ++++++++++++++- 5 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 platform/mellanox/criu.mk create mode 100644 platform/mellanox/criu/Makefile diff --git a/platform/mellanox/criu.mk b/platform/mellanox/criu.mk new file mode 100644 index 00000000000..01a425bb2a8 --- /dev/null +++ b/platform/mellanox/criu.mk @@ -0,0 +1,8 @@ +CRIU_VERSION = 3.10 + +export CRIU_VERSION + +CRIU = criu_$(CRIU_VERSION)-1_amd64.deb +$(CRIU)_SRC_PATH = $(PLATFORM_PATH)/criu +$(CRIU)_DEPENDS += $(LIBNL3_DEV) +SONIC_MAKE_DEBS += $(CRIU) diff --git a/platform/mellanox/criu/Makefile b/platform/mellanox/criu/Makefile new file mode 100644 index 00000000000..e9d49b56904 --- /dev/null +++ b/platform/mellanox/criu/Makefile @@ -0,0 +1,14 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = criu_$(CRIU_VERSION)-1_amd64.deb + +CRIU_DEPS = iptables,protobuf-c-compiler,protobuf-compiler,python-protobuf,libprotobuf-c1,python-future,python-ipaddr,libnet1,pkg-config,asciidoc,xmlto + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf criu + git clone -b v$(CRIU_VERSION) https://github.com/checkpoint-restore/criu.git + pushd criu + RUNDIR=/run/criu make + sudo checkinstall --default --install=no --fstrans=no --pkgversion=$(CRIU_VERSION) --maintainer='@' --requires=$(CRIU_DEPS) --pakdir=$(DEST) diff --git a/platform/mellanox/docker-syncd-mlnx.mk b/platform/mellanox/docker-syncd-mlnx.mk index 6ac895d2eb9..5ad6f6dccf1 100644 --- a/platform/mellanox/docker-syncd-mlnx.mk +++ b/platform/mellanox/docker-syncd-mlnx.mk @@ -2,7 +2,7 @@ DOCKER_SYNCD_MLNX = docker-syncd-mlnx.gz $(DOCKER_SYNCD_MLNX)_PATH = $(PLATFORM_PATH)/docker-syncd-mlnx -$(DOCKER_SYNCD_MLNX)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MLNX_SFPD) +$(DOCKER_SYNCD_MLNX)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MLNX_SFPD) $(CRIU) $(DOCKER_SYNCD_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX) ifneq ($(ENABLE_SYNCD_RPC),y) @@ -13,3 +13,4 @@ $(DOCKER_SYNCD_MLNX)_CONTAINER_NAME = syncd $(DOCKER_SYNCD_MLNX)_RUN_OPT += --net=host --privileged -t $(DOCKER_SYNCD_MLNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_MLNX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_MLNX)_RUN_OPT += --tmpfs /run/criu diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 index 971602a212f..bf301f179a4 100755 --- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 +++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 @@ -14,7 +14,7 @@ debs/{{ deb }}{{' '}} {%- endfor -%} debs/ -RUN apt-get install -y libxml2 +RUN apt-get install -y --no-install-recommends libxml2 iptables libbsd0 protobuf-c-compiler protobuf-compiler python-protobuf libprotobuf-c1 python-future python-ipaddr libnet1 pkg-config asciidoc xmlto RUN dpkg -i \ {% for deb in docker_syncd_mlnx_debs.split(' ') -%} diff --git a/sonic-slave/Dockerfile b/sonic-slave/Dockerfile index 32218b44d1d..c284161c7ed 100644 --- a/sonic-slave/Dockerfile +++ b/sonic-slave/Dockerfile @@ -230,7 +230,20 @@ RUN apt-get update && apt-get install -y \ # For bash texi2html \ # For initramfs - bash-completion + bash-completion \ +#For Mellanox CRIU build + libprotobuf-dev \ + libprotobuf-c0-dev \ + protobuf-c-compiler \ + protobuf-compiler \ + python-protobuf \ + pkg-config \ + libnet1-dev \ + libnet-dev \ + libaio-dev \ + asciidoc \ + xmlto \ + checkinstall # For linux build RUN apt-get -y build-dep linux From 5e082133cdd1ee8c9c9d19a0ba1b5999890ea914 Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Wed, 19 Sep 2018 13:25:54 -0700 Subject: [PATCH 33/57] [arista] update arista drivers submodule (#2059) --- platform/barefoot/sonic-platform-modules-arista | 2 +- platform/broadcom/platform-modules-arista.mk | 2 -- platform/broadcom/sonic-platform-modules-arista | 2 +- 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index 1133dc7c957..f705fe15585 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit 1133dc7c957bcca5305aab5abf569d0d90605aa4 +Subproject commit f705fe155859084d7df916e580659394e1516f6c diff --git a/platform/broadcom/platform-modules-arista.mk b/platform/broadcom/platform-modules-arista.mk index 73d86bda4e3..480aa0cf839 100644 --- a/platform/broadcom/platform-modules-arista.mk +++ b/platform/broadcom/platform-modules-arista.mk @@ -23,5 +23,3 @@ export ARISTA_PLATFORM_MODULE ARISTA_PLATFORM_MODULE_PYTHON2 ARISTA_PLATFORM_MOD export ARISTA_SCD_DRIVER_CONFIG=m SONIC_STRETCH_DEBS += $(ARISTA_PLATFORM_MODULE) - -export ARISTA_SCD_DRIVER_CONFIG=m diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index 1133dc7c957..f705fe15585 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit 1133dc7c957bcca5305aab5abf569d0d90605aa4 +Subproject commit f705fe155859084d7df916e580659394e1516f6c From 8a5e6ac47d31ee5b513a6cf856e0e32fa1e58a42 Mon Sep 17 00:00:00 2001 From: Marian Pritsak Date: Thu, 20 Sep 2018 08:18:39 +0300 Subject: [PATCH 34/57] [docker-orchagent]: Add vrfmgrd to supervisorctl (#2055) * [docker-orchagent]: Add vrfmgrd to supervisorctl Signed-off-by: Marian Pritsak * [sonic-vs]: Add vrfmgrd to supervisorctl Signed-off-by: Marian Pritsak --- dockers/docker-orchagent/start.sh | 2 ++ dockers/docker-orchagent/supervisord.conf | 8 ++++++++ platform/vs/docker-sonic-vs/start.sh | 2 ++ platform/vs/docker-sonic-vs/supervisord.conf | 8 ++++++++ 4 files changed, 20 insertions(+) diff --git a/dockers/docker-orchagent/start.sh b/dockers/docker-orchagent/start.sh index 9249dc5c072..a0d4ad646b2 100755 --- a/dockers/docker-orchagent/start.sh +++ b/dockers/docker-orchagent/start.sh @@ -32,6 +32,8 @@ supervisorctl start buffermgrd supervisorctl start enable_counters +supervisorctl start vrfmgrd + # Start arp_update when VLAN exists VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'` if [ "$VLAN" != "" ]; then diff --git a/dockers/docker-orchagent/supervisord.conf b/dockers/docker-orchagent/supervisord.conf index 8f96037f11b..6a0b18cb70d 100644 --- a/dockers/docker-orchagent/supervisord.conf +++ b/dockers/docker-orchagent/supervisord.conf @@ -107,3 +107,11 @@ autostart=false autorestart=false stdout_logfile=syslog stderr_logfile=syslog + +[program:vrfmgrd] +command=/usr/bin/vrfmgrd +priority=14 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/vs/docker-sonic-vs/start.sh b/platform/vs/docker-sonic-vs/start.sh index d16e9535c21..6180c0b66b1 100755 --- a/platform/vs/docker-sonic-vs/start.sh +++ b/platform/vs/docker-sonic-vs/start.sh @@ -52,6 +52,8 @@ supervisorctl start zebra supervisorctl start buffermgrd +supervisorctl start vrfmgrd + # Start arp_update when VLAN exists VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'` if [ "$VLAN" != "" ]; then diff --git a/platform/vs/docker-sonic-vs/supervisord.conf b/platform/vs/docker-sonic-vs/supervisord.conf index 1f6dfad60cf..29283c7102a 100644 --- a/platform/vs/docker-sonic-vs/supervisord.conf +++ b/platform/vs/docker-sonic-vs/supervisord.conf @@ -138,3 +138,11 @@ autostart=false autorestart=false stdout_logfile=syslog stderr_logfile=syslog + +[program:vrfmgrd] +command=/usr/bin/vrfmgrd +priority=18 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog From 7ece396592bad0c5e10fb6583d8da62dafa53536 Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Thu, 20 Sep 2018 00:19:40 -0700 Subject: [PATCH 35/57] Add SWI_DEFAULT support in boot0 (#2056) Currently setting the next boot image is the same as setting a default image. With this change SWI_DEFAULT= will be considered the default image and SWI= the next image. When executing the boot0 SWI= will be overriden by SWI_DEFAULT= if it exists and create in with the value of SWI= otherwise. --- files/Aboot/boot0.j2 | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2 index 4bb1a279ff3..b1f29ac8954 100644 --- a/files/Aboot/boot0.j2 +++ b/files/Aboot/boot0.j2 @@ -48,7 +48,6 @@ kernel_params="kernel-params" aboot_machine="arista_unknown" - # extract mount point from the swi path, e.g., /mnt/flash/sonic.swi --> /mnt/flash if [ -z "$target_path" ]; then if [ -z "$swipath" ]; then @@ -61,6 +60,7 @@ image_path="$target_path/$image_name" cmdline_base="$target_path/kernel-params-base" cmdline_image="$image_path/kernel-cmdline" +boot_config="$target_path/boot-config" bootconfigvars="KERNEL INITRD CONSOLESPEED PASSWORD NETDEV NETAUTO NETIP NETMASK NETGW NETDOMAIN NETDNS NETHW memtest" flash_re=" /mnt/flash| /host" @@ -88,6 +88,33 @@ clean_flash() { done } +update_boot_config() { + local key="$1" + local value="$2" + + if grep "$key" "$boot_config" 2>&1 > /dev/null; then + sed -i "s#^$key=.*\$#$key=$value#" "$boot_config" + else + echo "$key=$value" >> "$boot_config" + fi +} + +get_boot_config() { + local key="$1" + + sed -n "s#^$key=##p" "$boot_config" || : +} + +update_next_boot() { + local default="$(get_boot_config SWI_DEFAULT)" + + if [ -z "$default" ]; then + echo "warning: no variable SWI_DEFAULT available" + else + update_boot_config SWI "$default" + fi +} + extract_image() { mkdir -p "$image_path" @@ -114,7 +141,9 @@ extract_image() { fi ## use new reduced-size boot swi - echo "SWI=flash:$image_name/{{ ABOOT_BOOT_IMAGE }}" > "$target_path/boot-config" + local swi_boot_path="flash:$image_name/{{ ABOOT_BOOT_IMAGE }}" + update_boot_config SWI "$swi_boot_path" + update_boot_config SWI_DEFAULT "$swi_boot_path" ## Remove installer swi as it has lots of redundunt contents rm -f "$swipath" @@ -320,6 +349,7 @@ fi # chainloading using kexec if $do_kexec; then + update_next_boot run_kexec fi From c8a799716c51fc108f95ae9c649f56685f365c69 Mon Sep 17 00:00:00 2001 From: lguohan Date: Fri, 21 Sep 2018 00:32:26 -0700 Subject: [PATCH 36/57] [submodules]: update swss, swss-common, sairedis (#2062) swss: * 13df5a9 2018-09-19 | [cfgmgr]: Add vrfmgrd (#621) (HEAD, origin/master, origin/HEAD) [Marian Pritsak] * 54a7c9a 2018-09-18 | [portsorch]: Remove m_ifindex from Port class (#624) [Shuotian Cheng] * e765c12 2018-09-17 | [aclorch]: Remove error message when match not found (#618) [stepanblyschak] * 07f4cd8 2018-09-14 | Enable vxlan test (#620) [pavel-shirshov] * 9fda944 2018-09-14 | Warm reboot: Add support for orchagent pre-shutdown warm-restart state check (#562) [Jipan Yang] * 41e61bd 2018-09-14 | Warm reboot: port state sync up (#557) [Jipan Yang] * bf38bec 2018-09-14 | [vxlan tunnel]: Don't create encap mapper. Currently not supported (#613) [pavel-shirshov] * 528295d 2018-09-14 | [mirrororch]: Remove the queue initialization for different platforms (#614) [Shuotian Cheng] * 5af88ab 2018-09-14 | Temporarily disable two test cases to unblock others (#617) [Qi Luo] * 60a9d61 2018-09-08 | Support warm-restart for neighsyncd (#599) [zhenggen-xu] * 387eac6 2018-09-08 | [mirrororch]: Change Mellanox GRE type to 0x8949 (#610) [Shuotian Cheng] * 7114352 2018-09-07 | Store mirror session state in StateDB (#609) [Qi Luo] * fa2b5d9 2018-09-06 | [test]: Mark VLAN related mirror test invalid in Debian Jessie (#608) [Shuotian Cheng] * 6d40d85 2018-09-06 | [mirrororch]: Fix bug: return false when SAI API call fails (#607) [Shuotian Cheng] * cbc5a05 2018-09-05 | [mirrororch]: Enable mirror session destination to point into VLAN (#595) [Shuotian Cheng] swss-common: * c6c9a9b 2018-09-19 | Add new macro STATE_FDB_TABLE_NAME (#233) (HEAD, origin/master, origin/HEAD) [Qi Luo] * 41b6e18 2018-09-13 | NotificationProducer.send() returns the number of clients that received the message (#231) [Qi Luo] sairedis: * 5ef97ca 2018-09-11 | Fix findBridgeVlanForPortVlan for 1Q bridge (#345) (HEAD) [Qi Luo] * e402ff6 2018-09-11 | update SAI header (#344) [lguohan] * fd75e54 2018-09-11 | sairedis: add while loop to make syncd processEvent() handle as many entries as possible in one event call (#335) [Dong Zhang] * 50e1915 2018-08-29 | [misc]: Fix typos (#342) [Shuotian Cheng] * 2322375 2018-08-29 | Use syncd -u option (#341) [Qi Luo] * 2c2a13c 2018-08-28 | Cleanup usage (#340) [Qi Luo] * 7cd75c0 2018-08-26 | [saimeta]: Fix typo: > then -> >; don't exists -> doesn't exist (#339) [Shuotian Cheng] Signed-off-by: Guohan Lu --- src/sonic-sairedis | 2 +- src/sonic-swss | 2 +- src/sonic-swss-common | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/sonic-sairedis b/src/sonic-sairedis index 1c06195cc64..5ef97caffc4 160000 --- a/src/sonic-sairedis +++ b/src/sonic-sairedis @@ -1 +1 @@ -Subproject commit 1c06195cc64f59120bb84ba9ffbd9051ec9214dc +Subproject commit 5ef97caffc427c9b6f8cbee3804a3e1d7de6e3c4 diff --git a/src/sonic-swss b/src/sonic-swss index 29722e115b0..13df5a98d4a 160000 --- a/src/sonic-swss +++ b/src/sonic-swss @@ -1 +1 @@ -Subproject commit 29722e115b019678219ad284457663fa1c947ff5 +Subproject commit 13df5a98d4a6375a778b6216cff886a0c474aa9a diff --git a/src/sonic-swss-common b/src/sonic-swss-common index 23dc1b13982..c6c9a9b3ea7 160000 --- a/src/sonic-swss-common +++ b/src/sonic-swss-common @@ -1 +1 @@ -Subproject commit 23dc1b139823efa385be4c7a51de52f085572b77 +Subproject commit c6c9a9b3ea7bd1d0db9ddb9d5efadff6caa2a9e6 From 0e85986088a97135dc4472d49c1f2fa8bc264318 Mon Sep 17 00:00:00 2001 From: Jipan Yang Date: Fri, 21 Sep 2018 10:44:28 -0700 Subject: [PATCH 37/57] Add Tag info to docker label meta data (#2058) * Add Tag info to docker label meta data Signed-off-by: Jipan Yang * Move DIRTY_SUFFIX to sonic_get_version() Signed-off-by: Jipan Yang --- functions.sh | 1 + slave.mk | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/functions.sh b/functions.sh index 01f645ca72c..3605877834f 100644 --- a/functions.sh +++ b/functions.sh @@ -51,6 +51,7 @@ docker_try_rmi() { } sonic_get_version() { + DIRTY_SUFFIX="$(date +%Y%m%d\.%H%M%S)" local describe=$(git describe --tags) local latest_tag=$(git describe --tags --abbrev=0) local branch_name=$(git rev-parse --abbrev-ref HEAD) diff --git a/slave.mk b/slave.mk index c0e22726711..bb1d86be48d 100644 --- a/slave.mk +++ b/slave.mk @@ -9,6 +9,7 @@ SHELL = /bin/bash USER = $(shell id -un) UID = $(shell id -u) GUID = $(shell id -g) +SONIC_GET_VERSION=$(shell . functions.sh && sonic_get_version) .SECONDEXPANSION: @@ -393,6 +394,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) : $(TARGET_PATH)/%.g --build-arg uid=$(UID) \ --build-arg guid=$(GUID) \ --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ + --label Tag=$(SONIC_GET_VERSION) \ -t $* $($*.gz_PATH) $(LOG) docker save $* | gzip -c > $@ # Clean up @@ -425,6 +427,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .pl --build-arg uid=$(UID) \ --build-arg guid=$(GUID) \ --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ + --label Tag=$(SONIC_GET_VERSION) \ -t $* $($*.gz_PATH) $(LOG) docker save $* | gzip -c > $@ # Clean up @@ -514,9 +517,6 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ chmod +x sonic_debian_extension.sh, ) - DIRTY_SUFFIX="$(shell date +%Y%m%d\.%H%M%S)" - export DIRTY_SUFFIX - USERNAME="$(USERNAME)" \ PASSWORD="$(PASSWORD)" \ ./build_debian.sh $(LOG) From 792e2dfbf3fddf415b2729ed61a0a3165faa5aa5 Mon Sep 17 00:00:00 2001 From: Shuotian Cheng Date: Fri, 21 Sep 2018 21:56:44 -0700 Subject: [PATCH 38/57] [broadcom]: Update SAI to 3.1.3.5-10 (#2068) * Fix Trident2 parity error correction bug * VXLAN decapsulation implementation Signed-off-by: Shu0T1an ChenG --- platform/broadcom/sai.mk | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk index 72ff4bba1a2..55e0e0631e3 100644 --- a/platform/broadcom/sai.mk +++ b/platform/broadcom/sai.mk @@ -1,9 +1,9 @@ -BRCM_SAI = libsaibcm_3.1.3.5-8_amd64.deb -$(BRCM_SAI)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm_3.1.3.5-8_amd64.deb?sv=2015-04-05&sr=b&sig=vM4LXDn4RIIxfK6lNL2mkEAnSPyaNgEH2QAfHSySMEg%3D&se=2155-07-31T18%3A43%3A06Z&sp=r" +BRCM_SAI = libsaibcm_3.1.3.5-10_amd64.deb +$(BRCM_SAI)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm_3.1.3.5-10_amd64.deb?sv=2015-04-05&sr=b&sig=knKdBT4t%2B%2F8JvPe5wfCJPsJ1JU1kSsCBzMBFQHtXoAg%3D&se=2032-05-30T19%3A33%3A41Z&sp=r" -BRCM_SAI_DEV = libsaibcm-dev_3.1.3.5-8_amd64.deb +BRCM_SAI_DEV = libsaibcm-dev_3.1.3.5-10_amd64.deb $(eval $(call add_derived_package,$(BRCM_SAI),$(BRCM_SAI_DEV))) -$(BRCM_SAI_DEV)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm-dev_3.1.3.5-8_amd64.deb?sv=2015-04-05&sr=b&sig=ehMedaC6GDviSVEhsCygfLS%2FG9gijkBjZT2y5WxByls%3D&se=2155-07-31T18%3A36%3A17Z&sp=r" +$(BRCM_SAI_DEV)_URL = "https://sonicstorage.blob.core.windows.net/packages/bcmsai/libsaibcm-dev_3.1.3.5-10_amd64.deb?sv=2015-04-05&sr=b&sig=aYTN5yyq9dy4uz%2FctVXhuG9qqLs%2FefT4lJFmheRAk7I%3D&se=2032-05-30T19%3A34%3A34Z&sp=r" SONIC_ONLINE_DEBS += $(BRCM_SAI) $(BRCM_SAI_DEV) $(BRCM_SAI_DEV)_DEPENDS += $(BRCM_SAI) From 51fec6eebd81990d305bf0068a2babd90b9e5be3 Mon Sep 17 00:00:00 2001 From: Jonathan Tsai Date: Sat, 22 Sep 2018 12:57:10 +0800 Subject: [PATCH 39/57] [Quanta/device] Correct IX1B platform name to fit ONIE rule (#2065) * Change platform name from x86_64-quanta_ix1b_32x-r0 to x86_64-quanta_ix1b_rglbmc-r0 --- .../Quanta-IX1B-32X/port_config.ini | 0 .../Quanta-IX1B-32X/sai.profile | 0 .../Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm | 0 .../installer.conf | 0 .../led_proc_init.soc | 0 .../minigraph.xml | 0 .../plugins/eeprom.py | 0 .../plugins/psuutil.py | 0 .../plugins/sfputil.py | 0 platform/broadcom/platform-modules-quanta.mk | 2 +- 10 files changed, 1 insertion(+), 1 deletion(-) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/Quanta-IX1B-32X/port_config.ini (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/Quanta-IX1B-32X/sai.profile (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/installer.conf (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/led_proc_init.soc (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/minigraph.xml (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/plugins/eeprom.py (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/plugins/psuutil.py (100%) rename device/quanta/{x86_64-quanta_ix1b_32x-r0 => x86_64-quanta_ix1b_rglbmc-r0}/plugins/sfputil.py (100%) diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/Quanta-IX1B-32X/port_config.ini b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/port_config.ini similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/Quanta-IX1B-32X/port_config.ini rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/port_config.ini diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/Quanta-IX1B-32X/sai.profile b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/sai.profile similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/Quanta-IX1B-32X/sai.profile rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/sai.profile diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/installer.conf b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/installer.conf similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/installer.conf rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/installer.conf diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/led_proc_init.soc similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/led_proc_init.soc rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/led_proc_init.soc diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/minigraph.xml b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/minigraph.xml similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/minigraph.xml rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/minigraph.xml diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/eeprom.py similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/eeprom.py rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/eeprom.py diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/psuutil.py similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/psuutil.py rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/psuutil.py diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/sfputil.py similarity index 100% rename from device/quanta/x86_64-quanta_ix1b_32x-r0/plugins/sfputil.py rename to device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/sfputil.py diff --git a/platform/broadcom/platform-modules-quanta.mk b/platform/broadcom/platform-modules-quanta.mk index e1c633cd08f..747c4142590 100755 --- a/platform/broadcom/platform-modules-quanta.mk +++ b/platform/broadcom/platform-modules-quanta.mk @@ -7,7 +7,7 @@ export QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION QUANTA_IX1B_32X_PLATFORM_MODULE = sonic-platform-quanta-ix1b-32x_$(QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION)_amd64.deb $(QUANTA_IX1B_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-quanta $(QUANTA_IX1B_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) -$(QUANTA_IX1B_32X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix1b_32x-r0 +$(QUANTA_IX1B_32X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix1b_rglbmc-r0 SONIC_DPKG_DEBS += $(QUANTA_IX1B_32X_PLATFORM_MODULE) SONIC_STRETCH_DEBS += $(QUANTA_IX1B_32X_PLATFORM_MODULE) From 018b5899be9bde8ead1337ca5a4c3a38329d5bcb Mon Sep 17 00:00:00 2001 From: Taoyu Li Date: Fri, 21 Sep 2018 22:01:10 -0700 Subject: [PATCH 40/57] [updategraph] add support to use preset config instead of default minigraph (#2050) * [updategraph] add support to use preset config instead of default minigraph * Fix variable case * Remove default minigraph case * Remove default minigraphs and add default_sku files --- .../x86_64-accton_as5712_54x-r0/default_sku | 1 + .../x86_64-accton_as5712_54x-r0/minigraph.xml | 1274 ------------ .../x86_64-accton_as7116_54x-r0/default_sku | 1 + .../x86_64-accton_as7116_54x-r0/minigraph.xml | 68 - .../x86_64-accton_as7212_54x-r0/default_sku | 1 + .../x86_64-accton_as7212_54x-r0/minigraph.xml | 1074 ---------- .../x86_64-accton_as7312_54x-r0/default_sku | 1 + .../x86_64-accton_as7312_54x-r0/minigraph.xml | 1184 ----------- .../x86_64-accton_as7312_54xs-r0/default_sku | 1 + .../minigraph.xml | 1184 ----------- .../x86_64-accton_as7326_56x-r0/default_sku | 1 + .../x86_64-accton_as7326_56x-r0/minigraph.xml | 1184 ----------- .../x86_64-accton_as7512_32x-r0/default_sku | 1 + .../x86_64-accton_as7512_32x-r0/minigraph.xml | 1079 ---------- .../x86_64-accton_as7712_32x-r0/default_sku | 1 + .../x86_64-accton_as7712_32x-r0/minigraph.xml | 1074 ---------- .../x86_64-accton_as7716_32x-r0/default_sku | 1 + .../x86_64-accton_as7716_32x-r0/minigraph.xml | 1074 ---------- .../x86_64-accton_as7716_32xb-r0/default_sku | 1 + .../minigraph.xml | 1074 ---------- .../x86_64-accton_as7816_64x-r0/default_sku | 1 + .../x86_64-accton_as7816_64x-r0/minigraph.xml | 848 -------- .../x86_64-arista_7050_qx32/default_sku | 1 + .../x86_64-arista_7050_qx32/minigraph.xml | 1079 ---------- .../x86_64-arista_7050_qx32s/default_sku | 1 + .../x86_64-arista_7050_qx32s/minigraph.xml | 240 --- .../x86_64-arista_7060_cx32s/default_sku | 1 + .../x86_64-arista_7060_cx32s/minigraph.xml | 1079 ---------- .../arista/x86_64-arista_7170_64c/default_sku | 1 + .../x86_64-arista_7170_64c/minigraph.xml | 70 - .../x86_64-arista_7260cx3_64/default_sku | 1 + .../x86_64-arista_7260cx3_64/minigraph.xml | 848 -------- .../default_sku | 1 + .../minigraph.xml | 1079 ---------- .../default_sku | 1 + .../minigraph.xml | 1079 ---------- .../celestica/x86_64-cel_e1031-r0/default_sku | 1 + .../x86_64-cel_e1031-r0/minigraph.xml | 810 -------- .../x86_64-cel_seastone-r0/default_sku | 1 + .../x86_64-cel_seastone-r0/minigraph.xml | 1253 ------------ .../x86_64-centec_e582_48x6q-r0/default_sku | 1 + .../x86_64-ew_es6220_x48q2h4-r0/default_sku | 1 + .../x86_64-ew_es6220_x48q2h4-r0/minigraph.xml | 1049 ---------- .../x86_64-dell_s6000_s1220-r0/default_sku | 1 + .../x86_64-dell_s6000_s1220-r0/minigraph.xml | 1079 ---------- .../x86_64-dell_s6100_c2538-r0/default_sku | 1 + .../x86_64-dell_s6100_c2538-r0/minigraph.xml | 774 -------- .../x86_64-dell_z9100_c2538-r0/default_sku | 1 + .../x86_64-dell_z9100_c2538-r0/minigraph.xml | 1079 ---------- .../default_sku | 1 + .../minigraph.xml | 1541 --------------- .../delta/x86_64-delta_ag5648-r0/default_sku | 1 + .../x86_64-delta_ag5648-r0/minigraph.xml | 1184 ----------- .../x86_64-delta_ag9032v1-r0/default_sku | 1 + .../x86_64-delta_ag9032v1-r0/minigraph.xml | 1079 ---------- .../delta/x86_64-delta_ag9064-r0/default_sku | 1 + .../x86_64-delta_ag9064-r0/minigraph.xml | 848 -------- .../x86_64-delta_et-6248brb-r0/default_sku | 1 + .../x86_64-delta_et-6248brb-r0/minigraph.xml | 766 ------- .../x86_64-ew_es6220_x48q2h4-r0/default_sku | 1 + .../x86_64-facebook_wedge100-r0/default_sku | 1 + .../x86_64-facebook_wedge100-r0/minigraph.xml | 151 -- .../x86_64-ingrasys_s8810_32q-r0/default_sku | 1 + .../minigraph.xml | 121 -- .../x86_64-ingrasys_s8900_54xc-r0/default_sku | 1 + .../minigraph.xml | 121 -- .../x86_64-ingrasys_s8900_64xc-r0/default_sku | 1 + .../minigraph.xml | 359 ---- .../x86_64-ingrasys_s9100-r0/default_sku | 1 + .../x86_64-ingrasys_s9100-r0/minigraph.xml | 151 -- .../x86_64-ingrasys_s9130_32x-r0/default_sku | 1 + .../minigraph.xml | 69 - .../x86_64-ingrasys_s9180_32x-r0/default_sku | 1 + .../minigraph.xml | 151 -- .../x86_64-ingrasys_s9200_64x-r0/default_sku | 1 + .../minigraph.xml | 151 -- .../x86_64-ingrasys_s9230_64x-r0/default_sku | 1 + .../minigraph.xml | 69 - .../x86_64-ingrasys_s9280_64x-r0/default_sku | 1 + .../minigraph.xml | 151 -- .../x86_64-inventec_d7032q28b-r0/default_sku | 1 + .../minigraph.xml | 144 -- .../x86_64-inventec_d7054q28b-r0/default_sku | 1 + .../minigraph.xml | 144 -- .../x86_64-inventec_d7264q28b-r0/default_sku | 1 + .../minigraph.xml | 144 -- .../x86_64-marvell_slm5401_54x-r0/default_sku | 1 + .../minigraph.xml | 1074 ---------- .../x86_64-mlnx_lssn2700-r0/default_sku | 1 + .../x86_64-mlnx_lssn2700-r0/minigraph.xml | 1079 ---------- .../x86_64-mlnx_msn2010-r0/default_sku | 1 + .../x86_64-mlnx_msn2010-r0/minigraph.xml | 855 -------- .../x86_64-mlnx_msn2100-r0/default_sku | 1 + .../x86_64-mlnx_msn2100-r0/minigraph.xml | 578 ------ .../x86_64-mlnx_msn2410-r0/default_sku | 1 + .../x86_64-mlnx_msn2410-r0/minigraph.xml | 1199 ----------- .../x86_64-mlnx_msn2700-r0/default_sku | 1 + .../x86_64-mlnx_msn2700-r0/minigraph.xml | 1079 ---------- .../x86_64-mlnx_msn2740-r0/default_sku | 1 + .../x86_64-mlnx_msn2740-r0/minigraph.xml | 1079 ---------- .../x86_64-mlnx_x86-r5.0.1400/default_sku | 1 + .../default_sku | 1 + .../minigraph.xml | 1074 ---------- .../x86_64-quanta_ix1b_32x-r0/default_sku | 1 + device/wnc/x86_64-wnc_osw1800-r0/default_sku | 1 + .../wnc/x86_64-wnc_osw1800-r0/minigraph.xml | 1761 ----------------- files/image_config/updategraph/updategraph | 35 +- 107 files changed, 67 insertions(+), 39780 deletions(-) create mode 100644 device/accton/x86_64-accton_as5712_54x-r0/default_sku delete mode 100755 device/accton/x86_64-accton_as5712_54x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7116_54x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7212_54x-r0/default_sku delete mode 100755 device/accton/x86_64-accton_as7212_54x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7312_54x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7312_54x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7312_54xs-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7312_54xs-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7326_56x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7512_32x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7512_32x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7712_32x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7712_32x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7716_32x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7716_32x-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7716_32xb-r0/default_sku delete mode 100755 device/accton/x86_64-accton_as7716_32xb-r0/minigraph.xml create mode 100644 device/accton/x86_64-accton_as7816_64x-r0/default_sku delete mode 100644 device/accton/x86_64-accton_as7816_64x-r0/minigraph.xml create mode 100644 device/arista/x86_64-arista_7050_qx32/default_sku delete mode 100644 device/arista/x86_64-arista_7050_qx32/minigraph.xml create mode 100644 device/arista/x86_64-arista_7050_qx32s/default_sku delete mode 100644 device/arista/x86_64-arista_7050_qx32s/minigraph.xml create mode 100644 device/arista/x86_64-arista_7060_cx32s/default_sku delete mode 100644 device/arista/x86_64-arista_7060_cx32s/minigraph.xml create mode 100644 device/arista/x86_64-arista_7170_64c/default_sku delete mode 100644 device/arista/x86_64-arista_7170_64c/minigraph.xml create mode 100644 device/arista/x86_64-arista_7260cx3_64/default_sku delete mode 100644 device/arista/x86_64-arista_7260cx3_64/minigraph.xml create mode 100644 device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku delete mode 100644 device/barefoot/x86_64-accton_wedge100bf_32x-r0/minigraph.xml create mode 100644 device/barefoot/x86_64-accton_wedge100bf_65x-r0/default_sku delete mode 100644 device/barefoot/x86_64-accton_wedge100bf_65x-r0/minigraph.xml create mode 100644 device/celestica/x86_64-cel_e1031-r0/default_sku delete mode 100644 device/celestica/x86_64-cel_e1031-r0/minigraph.xml create mode 100644 device/celestica/x86_64-cel_seastone-r0/default_sku delete mode 100644 device/celestica/x86_64-cel_seastone-r0/minigraph.xml create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/default_sku create mode 100644 device/centec/x86_64-ew_es6220_x48q2h4-r0/default_sku delete mode 100644 device/centec/x86_64-ew_es6220_x48q2h4-r0/minigraph.xml create mode 100644 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- - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - switch1 - - - - - - - - - - - - - switch1 - Accton-AS7116-54X - - - - - - - switch1 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - switch1 - Accton-AS7116-54X - diff --git a/device/accton/x86_64-accton_as7212_54x-r0/default_sku b/device/accton/x86_64-accton_as7212_54x-r0/default_sku new file mode 100644 index 00000000000..d8a1bd55cd4 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/default_sku @@ -0,0 +1 @@ +AS7212-54x t1 diff --git a/device/accton/x86_64-accton_as7212_54x-r0/minigraph.xml b/device/accton/x86_64-accton_as7212_54x-r0/minigraph.xml deleted file mode 100755 index 8dd87023110..00000000000 --- a/device/accton/x86_64-accton_as7212_54x-r0/minigraph.xml +++ /dev/null @@ -1,1074 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - switch1 - 10.0.0.32 - 1 - 180 - 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10.0.0.49 - switch1 - 10.0.0.48 - 1 - 180 - 60 - - - switch1 - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - switch1 - 10.0.0.50 - 1 - 180 - 60 - - - switch1 - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - switch1 - 10.0.0.52 - 1 - 180 - 60 - - - switch1 - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - switch1 - 10.0.0.54 - 1 - 180 - 60 - - - switch1 - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - switch1 - 10.0.0.56 - 1 - 180 - 60 - - - switch1 - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - switch1 - 10.0.0.58 - 1 - 180 - 60 - - - switch1 - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - switch1 - 10.0.0.60 - 1 - 180 - 60 - - - switch1 - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - switch1 - 10.0.0.62 - 1 - 180 - 60 - - - switch1 - 10.0.0.30 - ARISTA16T2 - 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- - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - switch1 - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - switch1 - AS7212-54x - - - - - - - switch1 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - switch1 - AS7212-54x - diff --git a/device/accton/x86_64-accton_as7312_54x-r0/default_sku b/device/accton/x86_64-accton_as7312_54x-r0/default_sku new file mode 100644 index 00000000000..c3c21a98f0e --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7312-54X t1 diff --git a/device/accton/x86_64-accton_as7312_54x-r0/minigraph.xml b/device/accton/x86_64-accton_as7312_54x-r0/minigraph.xml deleted file mode 100644 index a967047b237..00000000000 --- a/device/accton/x86_64-accton_as7312_54x-r0/minigraph.xml +++ /dev/null @@ -1,1184 +0,0 @@ - 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Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet31 - ARISTA16T0 - Ethernet1 - - - - - sonic - Accton-AS7312-54XS - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - sonic - Accton-AS7312-54XS - diff --git a/device/accton/x86_64-accton_as7326_56x-r0/default_sku b/device/accton/x86_64-accton_as7326_56x-r0/default_sku new file mode 100644 index 00000000000..922268da79b --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7326-56X t1 diff --git a/device/accton/x86_64-accton_as7326_56x-r0/minigraph.xml b/device/accton/x86_64-accton_as7326_56x-r0/minigraph.xml deleted file mode 100644 index 0aa3f02144e..00000000000 --- a/device/accton/x86_64-accton_as7326_56x-r0/minigraph.xml +++ /dev/null @@ -1,1184 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - 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Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet3 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet5 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet6 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet7 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet9 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet10 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet11 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet13 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet14 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet15 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet17 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet18 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet19 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet21 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet22 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet23 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet25 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet26 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet27 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet29 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet30 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet31 - ARISTA16T0 - Ethernet1 - - - - - sonic - Accton-AS7326-56X - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - sonic - Accton-AS7326-56X - diff --git a/device/accton/x86_64-accton_as7512_32x-r0/default_sku b/device/accton/x86_64-accton_as7512_32x-r0/default_sku new file mode 100644 index 00000000000..45eb53f68a9 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/default_sku @@ -0,0 +1 @@ +AS7512 t1 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/minigraph.xml b/device/accton/x86_64-accton_as7512_32x-r0/minigraph.xml deleted file mode 100644 index ac05be93960..00000000000 --- a/device/accton/x86_64-accton_as7512_32x-r0/minigraph.xml +++ /dev/null @@ -1,1079 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - ARISTA01T2 - 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- - - - - - - - - - - - - - - - HostIP - Loopback0 - - 100.1.0.1/32 - - 100.1.0.1/32 - - - - - - - ManagementIP1 - Management0 - - 172.24.37.166/18 - - 172.24.37.166/18 - - - - - - - sonic - - - - - - - - - - - - - - - - - - sonic - Arista-7170-64C - - - - - - - - sonic - Arista-7170-64C - diff --git a/device/arista/x86_64-arista_7260cx3_64/default_sku b/device/arista/x86_64-arista_7260cx3_64/default_sku new file mode 100644 index 00000000000..959766d95f5 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/default_sku @@ -0,0 +1 @@ +Arista-7260CX3-C64 t1 diff --git a/device/arista/x86_64-arista_7260cx3_64/minigraph.xml b/device/arista/x86_64-arista_7260cx3_64/minigraph.xml deleted file mode 100644 index 2c632dacc47..00000000000 --- a/device/arista/x86_64-arista_7260cx3_64/minigraph.xml +++ /dev/null @@ -1,848 +0,0 @@ - - - - - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - sonic - - - - - - Ethernet1/1 - 10.0.0.0/31 - - - - Ethernet2/1 - 10.0.0.2/31 - - - - Ethernet3/1 - 10.0.0.4/31 - - - - Ethernet4/1 - 10.0.0.6/31 - - - - Ethernet5/1 - 10.0.0.8/31 - - - - Ethernet6/1 - 10.0.0.10/31 - - - - Ethernet7/1 - 10.0.0.12/31 - - - - Ethernet8/1 - 10.0.0.14/31 - - - - Ethernet9/1 - 10.0.0.16/31 - - - - Ethernet10/1 - 10.0.0.18/31 - - - - Ethernet11/1 - 10.0.0.20/31 - - - - Ethernet12/1 - 10.0.0.22/31 - - - - Ethernet13/1 - 10.0.0.24/31 - - - - Ethernet14/1 - 10.0.0.26/31 - - - - Ethernet15/1 - 10.0.0.28/31 - - - - Ethernet16/1 - 10.0.0.30/31 - - - - Ethernet17/1 - 10.0.0.32/31 - - - - Ethernet18/1 - 10.0.0.34/31 - - - - Ethernet19/1 - 10.0.0.36/31 - - - - Ethernet20/1 - 10.0.0.38/31 - - - - Ethernet21/1 - 10.0.0.40/31 - - - - Ethernet22/1 - 10.0.0.42/31 - - - - Ethernet23/1 - 10.0.0.44/31 - - - - Ethernet24/1 - 10.0.0.46/31 - - - - Ethernet25/1 - 10.0.0.48/31 - - - - Ethernet26/1 - 10.0.0.50/31 - - - - Ethernet27/1 - 10.0.0.52/31 - - - - Ethernet28/1 - 10.0.0.54/31 - - - - Ethernet29/1 - 10.0.0.56/31 - - - - Ethernet30/1 - 10.0.0.58/31 - - - - Ethernet31/1 - 10.0.0.60/31 - - - - Ethernet32/1 - 10.0.0.62/31 - - - - Ethernet33/1 - 10.0.0.64/31 - - - - Ethernet34/1 - 10.0.0.66/31 - - - - Ethernet35/1 - 10.0.0.68/31 - - - - Ethernet36/1 - 10.0.0.70/31 - - - - Ethernet37/1 - 10.0.0.72/31 - - - - Ethernet38/1 - 10.0.0.74/31 - - - - Ethernet39/1 - 10.0.0.76/31 - - - - Ethernet40/1 - 10.0.0.78/31 - - - - Ethernet41/1 - 10.0.0.80/31 - - - - Ethernet42/1 - 10.0.0.82/31 - - - - Ethernet43/1 - 10.0.0.84/31 - - - - Ethernet44/1 - 10.0.0.86/31 - - - - Ethernet45/1 - 10.0.0.88/31 - - - - Ethernet46/1 - 10.0.0.90/31 - - - - Ethernet47/1 - 10.0.0.92/31 - - - - Ethernet48/1 - 10.0.0.94/31 - - - - Ethernet49/1 - 10.0.0.96/31 - - - - Ethernet50/1 - 10.0.0.98/31 - - - - Ethernet51/1 - 10.0.0.100/31 - - - - Ethernet52/1 - 10.0.0.102/31 - - - - Ethernet53/1 - 10.0.0.104/31 - - - - Ethernet54/1 - 10.0.0.106/31 - - - - Ethernet55/1 - 10.0.0.108/31 - - - - Ethernet56/1 - 10.0.0.110/31 - - - - Ethernet57/1 - 10.0.0.112/31 - - - - Ethernet58/1 - 10.0.0.114/31 - - - - Ethernet59/1 - 10.0.0.116/31 - - - - Ethernet60/1 - 10.0.0.118/31 - - - - Ethernet61/1 - 10.0.0.120/31 - - - - Ethernet62/1 - 10.0.0.122/31 - - - - Ethernet63/1 - 10.0.0.124/31 - - - - Ethernet64/1 - 10.0.0.126/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic-target - Ethernet1/1 - sonic - Ethernet1/1 - - - DeviceInterfaceLink - sonic-target - Ethernet2/1 - sonic - Ethernet2/1 - - - DeviceInterfaceLink - sonic-target - Ethernet3/1 - sonic - Ethernet3/1 - - - DeviceInterfaceLink - sonic-target - Ethernet4/1 - sonic - Ethernet4/1 - - - DeviceInterfaceLink - sonic-target - Ethernet5/1 - sonic - Ethernet5/1 - - - DeviceInterfaceLink - sonic-target - Ethernet6/1 - sonic - Ethernet6/1 - - - DeviceInterfaceLink - sonic-target - Ethernet7/1 - sonic - Ethernet7/1 - - - DeviceInterfaceLink - sonic-target - Ethernet8/1 - sonic - Ethernet8/1 - - - DeviceInterfaceLink - sonic-target - Ethernet9/1 - sonic - Ethernet9/1 - - - DeviceInterfaceLink - sonic-target - Ethernet10/1 - sonic - Ethernet10/1 - - - DeviceInterfaceLink - sonic-target - Ethernet11/1 - sonic - Ethernet11/1 - - - DeviceInterfaceLink - sonic-target - Ethernet12/1 - sonic - Ethernet12/1 - - - DeviceInterfaceLink - sonic-target - Ethernet13/1 - sonic - Ethernet13/1 - - - DeviceInterfaceLink - sonic-target - Ethernet14/1 - sonic - Ethernet14/1 - - - DeviceInterfaceLink - sonic-target - Ethernet15/1 - sonic - Ethernet15/1 - - - DeviceInterfaceLink - sonic-target - Ethernet16/1 - sonic - Ethernet16/1 - - - DeviceInterfaceLink - sonic-target - Ethernet17/1 - sonic - Ethernet17/1 - - - DeviceInterfaceLink - sonic-target - Ethernet18/1 - sonic - Ethernet18/1 - - - DeviceInterfaceLink - sonic-target - Ethernet19/1 - sonic - Ethernet19/1 - - - DeviceInterfaceLink - sonic-target - Ethernet20/1 - sonic - Ethernet20/1 - - - DeviceInterfaceLink - sonic-target - Ethernet21/1 - sonic - Ethernet21/1 - - - DeviceInterfaceLink - sonic-target - Ethernet22/1 - sonic - Ethernet22/1 - - - DeviceInterfaceLink - sonic-target - Ethernet23/1 - sonic - Ethernet23/1 - - - DeviceInterfaceLink - sonic-target - Ethernet24/1 - sonic - Ethernet24/1 - - - DeviceInterfaceLink - sonic-target - Ethernet25/1 - sonic - Ethernet25/1 - - - DeviceInterfaceLink - sonic-target - Ethernet26/1 - sonic - Ethernet26/1 - - - DeviceInterfaceLink - sonic-target - Ethernet27/1 - sonic - Ethernet27/1 - - - DeviceInterfaceLink - sonic-target - Ethernet28/1 - sonic - Ethernet28/1 - - - DeviceInterfaceLink - sonic-target - Ethernet29/1 - sonic - Ethernet29/1 - - - DeviceInterfaceLink - sonic-target - Ethernet30/1 - sonic - Ethernet30/1 - - - DeviceInterfaceLink - sonic-target - Ethernet31/1 - sonic - Ethernet31/1 - - - DeviceInterfaceLink - sonic-target - Ethernet32/1 - sonic - Ethernet32/1 - - - DeviceInterfaceLink - sonic-target - Ethernet33/1 - sonic - Ethernet33/1 - - - DeviceInterfaceLink - sonic-target - Ethernet34/1 - sonic - Ethernet34/1 - - - DeviceInterfaceLink - sonic-target - Ethernet35/1 - sonic - Ethernet35/1 - - - DeviceInterfaceLink - sonic-target - Ethernet36/1 - sonic - Ethernet36/1 - - - DeviceInterfaceLink - sonic-target - Ethernet37/1 - sonic - Ethernet37/1 - - - DeviceInterfaceLink - sonic-target - Ethernet38/1 - sonic - Ethernet38/1 - - - DeviceInterfaceLink - sonic-target - Ethernet39/1 - sonic - Ethernet39/1 - - - DeviceInterfaceLink - sonic-target - Ethernet40/1 - sonic - Ethernet40/1 - - - DeviceInterfaceLink - sonic-target - Ethernet41/1 - sonic - Ethernet41/1 - - - DeviceInterfaceLink - sonic-target - Ethernet42/1 - sonic - Ethernet42/1 - - - DeviceInterfaceLink - sonic-target - Ethernet43/1 - sonic - Ethernet43/1 - - - DeviceInterfaceLink - sonic-target - Ethernet44/1 - sonic - Ethernet44/1 - - - DeviceInterfaceLink - sonic-target - Ethernet45/1 - sonic - Ethernet45/1 - - - DeviceInterfaceLink - sonic-target - Ethernet46/1 - sonic - Ethernet46/1 - - - DeviceInterfaceLink - sonic-target - Ethernet47/1 - sonic - Ethernet47/1 - - - DeviceInterfaceLink - sonic-target - Ethernet48/1 - sonic - Ethernet48/1 - - - DeviceInterfaceLink - sonic-target - Ethernet49/1 - sonic - Ethernet49/1 - - - DeviceInterfaceLink - sonic-target - Ethernet50/1 - sonic - Ethernet50/1 - - - DeviceInterfaceLink - sonic-target - Ethernet51/1 - sonic - Ethernet51/1 - - - DeviceInterfaceLink - sonic-target - Ethernet52/1 - sonic - Ethernet52/1 - - - DeviceInterfaceLink - sonic-target - Ethernet53/1 - sonic - Ethernet53/1 - - - DeviceInterfaceLink - sonic-target - Ethernet54/1 - sonic - Ethernet54/1 - - - DeviceInterfaceLink - sonic-target - Ethernet55/1 - sonic - Ethernet55/1 - - - DeviceInterfaceLink - sonic-target - Ethernet56/1 - sonic - Ethernet56/1 - - - DeviceInterfaceLink - sonic-target - Ethernet57/1 - sonic - Ethernet57/1 - - - DeviceInterfaceLink - sonic-target - Ethernet58/1 - sonic - Ethernet58/1 - - - DeviceInterfaceLink - sonic-target - Ethernet59/1 - sonic - Ethernet59/1 - - - DeviceInterfaceLink - sonic-target - Ethernet60/1 - sonic - Ethernet60/1 - - - DeviceInterfaceLink - sonic-target - Ethernet61/1 - sonic - Ethernet61/1 - - - DeviceInterfaceLink - sonic-target - Ethernet62/1 - sonic - Ethernet62/1 - - - DeviceInterfaceLink - sonic-target - Ethernet63/1 - sonic - Ethernet63/1 - - - DeviceInterfaceLink - sonic-target - Ethernet64/1 - sonic - Ethernet64/1 - - - - - sonic - Arista-7260CX3-C64 - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - sonic - Arista-7260CX3-C64 - diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku new file mode 100644 index 00000000000..e2f0630cc57 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku @@ -0,0 +1 @@ +montara t1 diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/minigraph.xml b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/minigraph.xml deleted file mode 100644 index 60d93ad69d6..00000000000 --- a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/minigraph.xml +++ /dev/null @@ -1,1079 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - switch - 10.0.0.32 - 1 - 180 - 60 - - - switch - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - switch - 10.0.0.34 - 1 - 180 - 60 - - - switch - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - switch - 10.0.0.36 - 1 - 180 - 60 - - - switch - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - switch - 10.0.0.38 - 1 - 180 - 60 - - - switch - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - switch - 10.0.0.40 - 1 - 180 - 60 - - - switch - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - switch - 10.0.0.42 - 1 - 180 - 60 - - - switch - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - switch - 10.0.0.44 - 1 - 180 - 60 - - - switch - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - switch - 10.0.0.46 - 1 - 180 - 60 - - - switch - 10.0.0.14 - ARISTA08T2 - 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10.0.0.33
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10.0.0.1
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10.0.0.35
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10.0.0.39
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10.0.0.7
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10.0.0.41
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10.0.0.9
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10.0.0.11
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10.0.0.45
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10.0.0.13
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10.0.0.47
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10.0.0.15
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10.0.0.49
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10.0.0.17
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10.0.0.19
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10.0.0.23
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10.0.0.57
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10.0.0.25
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10.0.0.27
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- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - switch - - - - - - Ethernet0 - 10.0.0.0/31 - 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10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - switch - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet48 - ARISTA13T2 - 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10.0.0.33
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10.0.0.1
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10.0.0.35
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10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - switch - - - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - switch - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - switch - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - switch - mavericks - - ` - - - - - switch - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - switch - mavericks - diff --git a/device/celestica/x86_64-cel_e1031-r0/default_sku b/device/celestica/x86_64-cel_e1031-r0/default_sku new file mode 100644 index 00000000000..89a0aac4181 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/default_sku @@ -0,0 +1 @@ +Celestica-E1031-T48S4 t1 diff --git a/device/celestica/x86_64-cel_e1031-r0/minigraph.xml b/device/celestica/x86_64-cel_e1031-r0/minigraph.xml deleted file mode 100644 index 7b24807718a..00000000000 --- a/device/celestica/x86_64-cel_e1031-r0/minigraph.xml +++ /dev/null @@ -1,810 +0,0 @@ - - - - - - ARISTA01T1 - 10.0.0.1 - sonic - 10.0.0.0 - 1 - 180 - 60 - - - ARISTA02T1 - 10.0.0.5 - sonic - 10.0.0.4 - 1 - 180 - 60 - - - ARISTA03T1 - 10.0.0.9 - sonic - 10.0.0.8 - 1 - 180 - 60 - - - ARISTA04T1 - 10.0.0.13 - sonic - 10.0.0.12 - 1 - 180 - 60 - - - ARISTA01T1 - FC00::2 - sonic - FC00::1 - 1 - 180 - 60 - - - ARISTA02T1 - FC00::A - sonic - FC00::9 - 1 - 180 - 60 - - - ARISTA03T1 - FC00::12 - sonic - FC00::11 - 1 - 180 - 60 - - - ARISTA04T1 - FC00::1A - sonic - FC00::19 - 1 - 180 - 60 - - - - - 64601 - sonic - - - BGPPeer -
10.0.0.1
- - - - - - BGPPeer -
10.0.0.5
- - - - - - BGPPeer -
10.0.0.9
- - - - - - BGPPeer -
10.0.0.13
- - - - - - BGPPeer -
FC00::2
- - - - - - BGPPeer -
FC00::A
- - - - - - BGPPeer -
FC00::12
- - - - - - BGPPeer -
FC00::1A
- - - - - - - - - 64802 - ARISTA01T1 - - - - 64802 - ARISTA02T1 - - - - 64802 - ARISTA03T1 - - - - 64802 - ARISTA04T1 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - HostIP1 - Loopback0 - - FC00:1::32/128 - - FC00:1::32/128 - - - - - HostIP - eth0 - - 10.251.0.243/23 - - 10.251.0.243/23 - - - - - - sonic - - - - VlanInterface - Vlan2 - etp1;etp2;etp3;etp4;etp5;etp6;etp7;etp8;etp9;etp10;etp11;etp12;etp13;etp14;etp15;etp16;etp17;etp18;etp19;etp20;etp21;etp22;etp23;etp24;etp25;etp26;etp27;etp28;etp29;etp30;etp31;etp32;etp33;etp34;etp35;etp36;etp37;etp38;etp39;etp40;etp41;etp42;etp43;etp44;etp45;etp46;etp47;etp48 - False - 0.0.0.0/0 - - 2 - 2 - 172.0.0.0/26 - - - - - IPInterface - - etp49 - 10.0.0.0/31 - - - IPInterface - - etp50 - 10.0.0.4/31 - - - IPInterface - - etp51 - 10.0.0.8/31 - - - IPInterface - - etp52 - 10.0.0.12/31 - - - IPInterface - - etp49 - FC00::1/126 - - - IPInterface - - etp50 - FC00::9/126 - - - IPInterface - - etp51 - FC00::11/126 - - - IPInterface - - etp52 - FC00::19/126 - - - IPInterface - - Vlan2 - 172.0.0.1/26 - - - - - - - - - - - - DeviceInterfaceLink - true - 10000 - ARISTA01T1 - Ethernet1 - true - sonic - etp49 - - - DeviceInterfaceLink - true - 10000 - ARISTA02T1 - Ethernet1 - true - sonic - etp50 - - - DeviceInterfaceLink - true - 10000 - ARISTA03T1 - Ethernet1 - true - sonic - etp51 - - - DeviceInterfaceLink - true - 10000 - ARISTA04T1 - Ethernet1 - true - sonic - etp52 - - - DeviceInterfaceLink - true - 1000 - sonic - etp1 - true - server-01 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp2 - true - server-02 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp3 - true - server-03 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp4 - true - server-04 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp5 - true - server-05 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp6 - true - server-06 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp7 - true - server-07 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp8 - true - server-08 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp9 - true - server-09 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp10 - true - server-10 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp11 - true - server-11 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp12 - true - server-12 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp13 - true - server-13 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp14 - true - server-14 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp15 - true - server-15 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp16 - true - server-16 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp17 - true - server-17 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp18 - true - server-18 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp19 - true - server-19 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp20 - true - server-20 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp21 - true - server-21 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp22 - true - server-22 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp23 - true - server-23 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp24 - true - server-24 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp25 - true - server-25 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp26 - true - server-26 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp27 - true - server-27 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp28 - true - server-28 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp29 - true - server-29 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp30 - true - server-30 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp31 - true - server-31 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp32 - true - server-32 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp33 - true - server-33 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp34 - true - server-34 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp35 - true - server-35 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp36 - true - server-36 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp37 - true - server-37 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp38 - true - server-38 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp39 - true - server-39 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp40 - true - server-40 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp41 - true - server-41 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp42 - true - server-42 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp43 - true - server-43 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp44 - true - server-44 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp45 - true - server-45 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp46 - true - server-46 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp47 - true - server-47 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - etp48 - true - server-48 - 0 - - - - - sonic - Celestica-E1031-T48S4 - - 10.251.0.243 - - - - - sonic - Celestica-E1031-T48S4 - diff --git a/device/celestica/x86_64-cel_seastone-r0/default_sku b/device/celestica/x86_64-cel_seastone-r0/default_sku new file mode 100644 index 00000000000..0c95475c850 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/default_sku @@ -0,0 +1 @@ +Seastone-DX010 t1 diff --git a/device/celestica/x86_64-cel_seastone-r0/minigraph.xml b/device/celestica/x86_64-cel_seastone-r0/minigraph.xml deleted file mode 100644 index 2590e4f50c2..00000000000 --- a/device/celestica/x86_64-cel_seastone-r0/minigraph.xml +++ /dev/null @@ -1,1253 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - sonic - 10.0.0.34 - 1 - 180 - 60 - - - sonic - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - sonic - 10.0.0.36 - 1 - 180 - 60 - - - sonic - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - sonic - 10.0.0.38 - 1 - 180 - 60 - - - sonic - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - sonic - 10.0.0.40 - 1 - 180 - 60 - - - sonic - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - sonic - 10.0.0.42 - 1 - 180 - 60 - - - sonic - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - sonic - 10.0.0.44 - 1 - 180 - 60 - - - sonic - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - sonic - 10.0.0.46 - 1 - 180 - 60 - - - sonic - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - ARISTA09T0 - 10.0.0.49 - sonic - 10.0.0.48 - 1 - 180 - 60 - - - sonic - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - sonic - 10.0.0.50 - 1 - 180 - 60 - - - sonic - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - sonic - 10.0.0.52 - 1 - 180 - 60 - - - sonic - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - sonic - 10.0.0.54 - 1 - 180 - 60 - - - sonic - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - sonic - 10.0.0.56 - 1 - 180 - 60 - - - sonic - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - sonic - 10.0.0.58 - 1 - 180 - 60 - - - sonic - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - sonic - 10.0.0.60 - 1 - 180 - 60 - - - sonic - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - sonic - 10.0.0.62 - 1 - 180 - 60 - - - sonic - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - sonic - - -
10.0.0.33
- - - - -
10.0.0.1
- - - - -
10.0.0.35
- - - - -
10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
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sonic - hundredGigE1/11 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/12 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/13 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/14 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/15 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/16 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/17 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/18 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/19 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/20 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/21 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/22 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/23 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/24 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/25 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/26 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/27 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/28 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/29 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/30 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/31 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - hundredGigE1/32 - ARISTA16T0 - Ethernet1 - - - - - sonic - Delta-ag9032v1 - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - sonic - Delta-ag9032v1 - diff --git a/device/delta/x86_64-delta_ag9064-r0/default_sku b/device/delta/x86_64-delta_ag9064-r0/default_sku new file mode 100644 index 00000000000..5de7fcd3733 --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/default_sku @@ -0,0 +1 @@ +Delta-ag9064 t1 diff --git a/device/delta/x86_64-delta_ag9064-r0/minigraph.xml b/device/delta/x86_64-delta_ag9064-r0/minigraph.xml deleted file mode 100644 index 7a2ece42228..00000000000 --- a/device/delta/x86_64-delta_ag9064-r0/minigraph.xml +++ /dev/null @@ -1,848 +0,0 @@ - - - - - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - sonic - - - - - - Ethernet1/1 - 10.0.0.0/31 - - - - Ethernet2/1 - 10.0.0.2/31 - - - - Ethernet3/1 - 10.0.0.4/31 - - - - Ethernet4/1 - 10.0.0.6/31 - - - - Ethernet5/1 - 10.0.0.8/31 - - - - Ethernet6/1 - 10.0.0.10/31 - - - - Ethernet7/1 - 10.0.0.12/31 - - - - Ethernet8/1 - 10.0.0.14/31 - - - - Ethernet9/1 - 10.0.0.16/31 - - - - Ethernet10/1 - 10.0.0.18/31 - - - - Ethernet11/1 - 10.0.0.20/31 - - - - Ethernet12/1 - 10.0.0.22/31 - - - - Ethernet13/1 - 10.0.0.24/31 - - - - Ethernet14/1 - 10.0.0.26/31 - - - - Ethernet15/1 - 10.0.0.28/31 - - - - Ethernet16/1 - 10.0.0.30/31 - - - - Ethernet17/1 - 10.0.0.32/31 - - - - Ethernet18/1 - 10.0.0.34/31 - - - - Ethernet19/1 - 10.0.0.36/31 - - - - Ethernet20/1 - 10.0.0.38/31 - - - - Ethernet21/1 - 10.0.0.40/31 - - - - Ethernet22/1 - 10.0.0.42/31 - - - - Ethernet23/1 - 10.0.0.44/31 - - - - Ethernet24/1 - 10.0.0.46/31 - - - - Ethernet25/1 - 10.0.0.48/31 - - - - Ethernet26/1 - 10.0.0.50/31 - - - - Ethernet27/1 - 10.0.0.52/31 - - - - Ethernet28/1 - 10.0.0.54/31 - - - - Ethernet29/1 - 10.0.0.56/31 - - - - Ethernet30/1 - 10.0.0.58/31 - - - - Ethernet31/1 - 10.0.0.60/31 - - - - Ethernet32/1 - 10.0.0.62/31 - - - - Ethernet33/1 - 10.0.0.64/31 - - - - Ethernet34/1 - 10.0.0.66/31 - - - - Ethernet35/1 - 10.0.0.68/31 - - - - Ethernet36/1 - 10.0.0.70/31 - - - - Ethernet37/1 - 10.0.0.72/31 - - - - Ethernet38/1 - 10.0.0.74/31 - - - - Ethernet39/1 - 10.0.0.76/31 - - - - Ethernet40/1 - 10.0.0.78/31 - - - - Ethernet41/1 - 10.0.0.80/31 - - - - Ethernet42/1 - 10.0.0.82/31 - - - - Ethernet43/1 - 10.0.0.84/31 - - - - Ethernet44/1 - 10.0.0.86/31 - - - - Ethernet45/1 - 10.0.0.88/31 - - - - Ethernet46/1 - 10.0.0.90/31 - - - - Ethernet47/1 - 10.0.0.92/31 - - - - Ethernet48/1 - 10.0.0.94/31 - - - - Ethernet49/1 - 10.0.0.96/31 - - - - Ethernet50/1 - 10.0.0.98/31 - - - - Ethernet51/1 - 10.0.0.100/31 - - - - Ethernet52/1 - 10.0.0.102/31 - - - - Ethernet53/1 - 10.0.0.104/31 - - - - Ethernet54/1 - 10.0.0.106/31 - - - - Ethernet55/1 - 10.0.0.108/31 - - - - Ethernet56/1 - 10.0.0.110/31 - - - - Ethernet57/1 - 10.0.0.112/31 - - - - Ethernet58/1 - 10.0.0.114/31 - - - - Ethernet59/1 - 10.0.0.116/31 - - - - Ethernet60/1 - 10.0.0.118/31 - - - - Ethernet61/1 - 10.0.0.120/31 - - - - Ethernet62/1 - 10.0.0.122/31 - - - - Ethernet63/1 - 10.0.0.124/31 - - - - Ethernet64/1 - 10.0.0.126/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic-target - Ethernet1/1 - sonic - Ethernet1/1 - - - DeviceInterfaceLink - sonic-target - Ethernet2/1 - sonic - Ethernet2/1 - - - DeviceInterfaceLink - sonic-target - Ethernet3/1 - sonic - Ethernet3/1 - - - DeviceInterfaceLink - sonic-target - Ethernet4/1 - sonic - Ethernet4/1 - - - DeviceInterfaceLink - sonic-target - Ethernet5/1 - sonic - Ethernet5/1 - - - DeviceInterfaceLink - sonic-target - Ethernet6/1 - sonic - Ethernet6/1 - - - DeviceInterfaceLink - sonic-target - Ethernet7/1 - sonic - Ethernet7/1 - - - DeviceInterfaceLink - sonic-target - Ethernet8/1 - sonic - Ethernet8/1 - - - DeviceInterfaceLink - sonic-target - Ethernet9/1 - sonic - Ethernet9/1 - - - DeviceInterfaceLink - sonic-target - Ethernet10/1 - sonic - Ethernet10/1 - - - DeviceInterfaceLink - sonic-target - Ethernet11/1 - sonic - Ethernet11/1 - - - DeviceInterfaceLink - sonic-target - Ethernet12/1 - sonic - Ethernet12/1 - - - DeviceInterfaceLink - sonic-target - Ethernet13/1 - sonic - Ethernet13/1 - - - DeviceInterfaceLink - sonic-target - Ethernet14/1 - sonic - Ethernet14/1 - - - DeviceInterfaceLink - sonic-target - Ethernet15/1 - sonic - Ethernet15/1 - - - DeviceInterfaceLink - sonic-target - Ethernet16/1 - sonic - Ethernet16/1 - - - DeviceInterfaceLink - sonic-target - Ethernet17/1 - sonic - Ethernet17/1 - - - DeviceInterfaceLink - sonic-target - Ethernet18/1 - sonic - Ethernet18/1 - - - DeviceInterfaceLink - sonic-target - Ethernet19/1 - sonic - Ethernet19/1 - - - DeviceInterfaceLink - sonic-target - Ethernet20/1 - sonic - Ethernet20/1 - - - DeviceInterfaceLink - sonic-target - Ethernet21/1 - sonic - Ethernet21/1 - - - DeviceInterfaceLink - sonic-target - Ethernet22/1 - sonic - Ethernet22/1 - - - DeviceInterfaceLink - sonic-target - Ethernet23/1 - sonic - Ethernet23/1 - - - DeviceInterfaceLink - sonic-target - Ethernet24/1 - sonic - Ethernet24/1 - - - DeviceInterfaceLink - sonic-target - Ethernet25/1 - sonic - Ethernet25/1 - - - DeviceInterfaceLink - sonic-target - Ethernet26/1 - sonic - Ethernet26/1 - - - DeviceInterfaceLink - sonic-target - Ethernet27/1 - sonic - Ethernet27/1 - - - DeviceInterfaceLink - sonic-target - Ethernet28/1 - sonic - Ethernet28/1 - - - DeviceInterfaceLink - sonic-target - Ethernet29/1 - sonic - Ethernet29/1 - - - DeviceInterfaceLink - sonic-target - Ethernet30/1 - sonic - Ethernet30/1 - - - DeviceInterfaceLink - sonic-target - Ethernet31/1 - sonic - Ethernet31/1 - - - DeviceInterfaceLink - sonic-target - Ethernet32/1 - sonic - Ethernet32/1 - - - DeviceInterfaceLink - sonic-target - Ethernet33/1 - sonic - Ethernet33/1 - - - DeviceInterfaceLink - sonic-target - Ethernet34/1 - sonic - Ethernet34/1 - - - DeviceInterfaceLink - sonic-target - Ethernet35/1 - sonic - Ethernet35/1 - - - DeviceInterfaceLink - sonic-target - Ethernet36/1 - sonic - Ethernet36/1 - - - DeviceInterfaceLink - sonic-target - Ethernet37/1 - sonic - Ethernet37/1 - - - DeviceInterfaceLink - sonic-target - Ethernet38/1 - sonic - Ethernet38/1 - - - DeviceInterfaceLink - sonic-target - Ethernet39/1 - sonic - Ethernet39/1 - - - DeviceInterfaceLink - sonic-target - Ethernet40/1 - sonic - Ethernet40/1 - - - DeviceInterfaceLink - sonic-target - Ethernet41/1 - sonic - Ethernet41/1 - - - DeviceInterfaceLink - sonic-target - Ethernet42/1 - sonic - Ethernet42/1 - - - DeviceInterfaceLink - sonic-target - Ethernet43/1 - sonic - Ethernet43/1 - - - DeviceInterfaceLink - sonic-target - Ethernet44/1 - sonic - Ethernet44/1 - - - DeviceInterfaceLink - sonic-target - Ethernet45/1 - sonic - Ethernet45/1 - - - DeviceInterfaceLink - sonic-target - Ethernet46/1 - sonic - Ethernet46/1 - - - DeviceInterfaceLink - sonic-target - Ethernet47/1 - sonic - Ethernet47/1 - - - DeviceInterfaceLink - sonic-target - Ethernet48/1 - sonic - Ethernet48/1 - - - DeviceInterfaceLink - sonic-target - Ethernet49/1 - sonic - Ethernet49/1 - - - DeviceInterfaceLink - sonic-target - Ethernet50/1 - sonic - Ethernet50/1 - - - DeviceInterfaceLink - sonic-target - Ethernet51/1 - sonic - Ethernet51/1 - - - DeviceInterfaceLink - sonic-target - Ethernet52/1 - sonic - Ethernet52/1 - - - DeviceInterfaceLink - sonic-target - Ethernet53/1 - sonic - Ethernet53/1 - - - DeviceInterfaceLink - sonic-target - Ethernet54/1 - sonic - Ethernet54/1 - - - DeviceInterfaceLink - sonic-target - Ethernet55/1 - sonic - Ethernet55/1 - - - DeviceInterfaceLink - sonic-target - Ethernet56/1 - sonic - Ethernet56/1 - - - DeviceInterfaceLink - sonic-target - Ethernet57/1 - sonic - Ethernet57/1 - - - DeviceInterfaceLink - sonic-target - Ethernet58/1 - sonic - Ethernet58/1 - - - DeviceInterfaceLink - sonic-target - Ethernet59/1 - sonic - Ethernet59/1 - - - DeviceInterfaceLink - sonic-target - Ethernet60/1 - sonic - Ethernet60/1 - - - DeviceInterfaceLink - sonic-target - Ethernet61/1 - sonic - Ethernet61/1 - - - DeviceInterfaceLink - sonic-target - Ethernet62/1 - sonic - Ethernet62/1 - - - DeviceInterfaceLink - sonic-target - Ethernet63/1 - sonic - Ethernet63/1 - - - DeviceInterfaceLink - sonic-target - Ethernet64/1 - sonic - Ethernet64/1 - - - - - sonic - Delta-ag9064 - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - sonic - Delta-ag9064 - diff --git a/device/delta/x86_64-delta_et-6248brb-r0/default_sku b/device/delta/x86_64-delta_et-6248brb-r0/default_sku new file mode 100644 index 00000000000..ce1cdf6e4c6 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/default_sku @@ -0,0 +1 @@ +Delta-et-6248brb t1 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/minigraph.xml b/device/delta/x86_64-delta_et-6248brb-r0/minigraph.xml deleted file mode 100644 index 98318a86259..00000000000 --- a/device/delta/x86_64-delta_et-6248brb-r0/minigraph.xml +++ /dev/null @@ -1,766 +0,0 @@ - - - - - - ARISTA01T1 - 10.0.0.1 - sonic - 10.0.0.0 - 1 - 180 - 60 - - - ARISTA02T1 - 10.0.0.5 - sonic - 10.0.0.4 - 1 - 180 - 60 - - - ARISTA03T1 - 10.0.0.9 - sonic - 10.0.0.8 - 1 - 180 - 60 - - - ARISTA04T1 - 10.0.0.13 - sonic - 10.0.0.12 - 1 - 180 - 60 - - - ARISTA01T1 - FC00::2 - sonic - FC00::1 - 1 - 180 - 60 - - - ARISTA02T1 - FC00::A - sonic - FC00::9 - 1 - 180 - 60 - - - ARISTA03T1 - FC00::12 - sonic - FC00::11 - 1 - 180 - 60 - - - ARISTA04T1 - FC00::1A - sonic - FC00::19 - 1 - 180 - 60 - - - - - 64601 - sonic - - - BGPPeer -
10.0.0.1
- - - - - - BGPPeer -
10.0.0.5
- - - - - - BGPPeer -
10.0.0.9
- - - - - - BGPPeer -
10.0.0.13
- - - - - - BGPPeer -
FC00::2
- - - - - - BGPPeer -
FC00::A
- - - - - - BGPPeer -
FC00::12
- - - - - - BGPPeer -
FC00::1A
- - - - - - - - - 64802 - ARISTA01T1 - - - - 64802 - ARISTA02T1 - - - - 64802 - ARISTA03T1 - - - - 64802 - ARISTA04T1 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - HostIP1 - Loopback0 - - FC00:1::32/128 - - FC00:1::32/128 - - - - - HostIP - eth0 - - 10.251.0.243/23 - - 10.251.0.243/23 - - - - - - sonic - - - - VlanInterface - Vlan2 - Ethernet0;Ethernet1;Ethernet2;Ethernet3;Ethernet4;Ethernet5;Ethernet6;Ethernet7;Ethernet8;Ethernet9;Ethernet10;Ethernet11;Ethernet12;Ethernet13;Ethernet14;Ethernet15;Ethernet16;Ethernet17;Ethernet18;Ethernet19;Ethernet20;Ethernet21;Ethernet22;Ethernet23;Ethernet24;Ethernet25;Ethernet26;Ethernet27;Ethernet28;Ethernet29;Ethernet30;Ethernet31;Ethernet32;Ethernet33;Ethernet34;Ethernet35;Ethernet36;Ethernet37;Ethernet38;Ethernet39;Ethernet40;Ethernet41;Ethernet42;Ethernet43;Ethernet44;Ethernet45;Ethernet46;Ethernet47 - False - 0.0.0.0/0 - - 2 - 2 - 172.0.0.0/26 - - - - - IPInterface - - Ethernet48 - 10.0.0.0/31 - - - IPInterface - - Ethernet49 - 10.0.0.4/31 - - - IPInterface - - Ethernet48 - FC00::1/126 - - - IPInterface - - Ethernet49 - FC00::9/126 - - - IPInterface - - Vlan2 - 172.0.0.1/26 - - - - - - - - - - - - DeviceInterfaceLink - true - 10000 - ARISTA01T1 - Ethernet1 - true - sonic - Ethernet48 - - - DeviceInterfaceLink - true - 10000 - ARISTA02T1 - Ethernet1 - true - sonic - Ethernet49 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet0 - true - server-01 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet1 - true - server-02 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet2 - true - server-03 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet3 - true - server-04 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet4 - true - server-05 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet5 - true - server-06 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet6 - true - server-07 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet7 - true - server-08 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet8 - true - server-09 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet9 - true - server-10 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet10 - true - server-11 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet11 - true - server-12 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet12 - true - server-13 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet13 - true - server-14 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet14 - true - server-15 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet15 - true - server-16 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet16 - true - server-17 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet17 - true - server-18 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet18 - true - server-19 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet19 - true - server-20 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet20 - true - server-21 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet21 - true - server-22 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet22 - true - server-23 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet23 - true - server-24 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet24 - true - server-25 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet25 - true - server-26 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet26 - true - server-27 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet27 - true - server-28 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet28 - true - server-29 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet29 - true - server-30 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet30 - true - server-31 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet31 - true - server-32 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet32 - true - server-33 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet33 - true - server-34 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet34 - true - server-35 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet35 - true - server-36 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet36 - true - server-37 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet37 - true - server-38 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet38 - true - server-39 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet39 - true - server-40 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet40 - true - server-41 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet41 - true - server-42 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet42 - true - server-43 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet43 - true - server-44 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet44 - true - server-45 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet45 - true - server-46 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet46 - true - server-47 - 0 - - - DeviceInterfaceLink - true - 1000 - sonic - Ethernet47 - true - server-48 - 0 - - - - - sonic - Delta-et-6248brb - - 10.251.0.243 - - - - - sonic - Delta-et-6248brb - diff --git a/device/embedway/x86_64-ew_es6220_x48q2h4-r0/default_sku b/device/embedway/x86_64-ew_es6220_x48q2h4-r0/default_sku new file mode 100644 index 00000000000..0f663505d7a --- /dev/null +++ b/device/embedway/x86_64-ew_es6220_x48q2h4-r0/default_sku @@ -0,0 +1 @@ +OSW1800-48x6q t1 diff --git a/device/facebook/x86_64-facebook_wedge100-r0/default_sku b/device/facebook/x86_64-facebook_wedge100-r0/default_sku new file mode 100644 index 00000000000..e8fafcb709d --- /dev/null +++ b/device/facebook/x86_64-facebook_wedge100-r0/default_sku @@ -0,0 +1 @@ +Facebook-W100-C32 t1 diff --git a/device/facebook/x86_64-facebook_wedge100-r0/minigraph.xml b/device/facebook/x86_64-facebook_wedge100-r0/minigraph.xml deleted file mode 100644 index 2e9c121e0b3..00000000000 --- a/device/facebook/x86_64-facebook_wedge100-r0/minigraph.xml +++ /dev/null @@ -1,151 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - SONiC-Facebook-Wedge100 - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - SONiC-Facebook-Wedge100 - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - SONiC-Facebook-Wedge100 - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - SONiC-Facebook-Wedge100 - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - SONiC-Facebook-Wedge100 - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - SONiC-Facebook-Wedge100 - Ethernet4 - - - - - SONiC-Facebook-Wedge100 - Facebook-W100-C32 - - - - - - - SONiC-Facebook-Wedge100 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - SONiC-Facebook-Wedge100 - Facebook-W100-C32 - diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/default_sku new file mode 100644 index 00000000000..fe68cd87d18 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S8810-32Q t1 diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/minigraph.xml deleted file mode 100644 index 991591585cc..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/minigraph.xml +++ /dev/null @@ -1,121 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.30 - OCPSCH01040HHLF - 10.10.1.29 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.30 - OCPSCH01040HHLF - 10.10.2.29 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040HHLF - - -
10.10.1.30
- - - - -
10.10.2.30
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.10/32 - - 100.0.0.10/32 - - - - - - - - OCPSCH01040HHLF - - - - - - Ethernet48 - 10.10.1.29/30 - - - - Ethernet52 - 10.10.2.29/30 - - - - - - - - - - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet48 - OCPSCH01040HHLF - Ethernet48 - - - 40000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet0 - OCPSCH01040HHLF - Ethernet52 - - - - - OCPSCH01040HHLF - INGRASYS-S8810-32Q - - - - OCPSCH01040HHLF - INGRASYS-S8810-32Q - diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/default_sku new file mode 100644 index 00000000000..ba80569555d --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S8900-54XC t1 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/minigraph.xml deleted file mode 100644 index 98c87eb8af0..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/minigraph.xml +++ /dev/null @@ -1,121 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.30 - OCPSCH01040HHLF - 10.10.1.29 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.30 - OCPSCH01040HHLF - 10.10.2.29 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040HHLF - - -
10.10.1.30
- - - - -
10.10.2.30
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.10/32 - - 100.0.0.10/32 - - - - - - - - OCPSCH01040HHLF - - - - - - Ethernet48 - 10.10.1.29/30 - - - - Ethernet52 - 10.10.2.29/30 - - - - - - - - - - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet48 - OCPSCH01040HHLF - Ethernet48 - - - 40000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet0 - OCPSCH01040HHLF - Ethernet52 - - - - - OCPSCH01040HHLF - INGRASYS-S8900-54XC - - - - OCPSCH01040HHLF - INGRASYS-S8900-54XC - diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/default_sku new file mode 100644 index 00000000000..3002ec5856f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S8900-64XC t1 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/minigraph.xml deleted file mode 100644 index 8a7d765cefc..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/minigraph.xml +++ /dev/null @@ -1,359 +0,0 @@ - - - - - - BGPSession - OCPSCH0104001MS - 10.10.1.2 - OCPSCH01040AALF - 10.10.1.1 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.6 - OCPSCH01040BBLF - 10.10.1.5 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.10 - OCPSCH01040CCLF - 10.10.1.9 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.14 - OCPSCH01040DDLF - 10.10.1.13 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.18 - OCPSCH01040EELF - 10.10.1.17 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.22 - OCPSCH01040FFLF - 10.10.1.21 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.26 - OCPSCH01040GGLF - 10.10.1.25 - 1 - 10 - 3 - - - BGPSession - OCPSCH0104001MS - 10.10.1.30 - OCPSCH01040HHLF - 10.10.1.29 - 1 - 10 - 3 - - - - - 64542 - OCPSCH0104001MS - - - BGPPeer -
10.10.1.2
- - - - - BGPPeer -
10.10.1.6
- - - - - BGPPeer -
10.10.1.10
- - - - - BGPPeer -
10.10.1.14
- - - - - BGPPeer -
10.10.1.18
- - - - - BGPPeer -
10.10.1.22
- - - - - BGPPeer -
10.10.1.26
- - - - - BGPPeer -
10.10.1.30
- - - - - - - - 64536 - OCPSCH01040AALF - - - - 64536 - OCPSCH01040BBLF - - - - 64536 - OCPSCH01040CCLF - - - - 64536 - OCPSCH01040DDLF - - - - 64536 - OCPSCH01040EELF - - - - 64536 - OCPSCH01040FFLF - - - - 64536 - OCPSCH01040GGLF - - - - 64536 - OCPSCH01040HHLF - - - - - - - - - - LoopbackInterface - HostIP - Loopback0 - - 100.0.0.1/32 - - 100.0.0.1/32 - - - - - - - - OCPSCH0104001MS - - - - VlanInterface - Vlan851 - Ethernet0;Ethernet1;Ethernet2;Ethernet3;Ethernet96;Ethernet100;Ethernet104;Ethernet108 - False - 0.0.0.0/0 - - 851 - 10.20.1.0/24 - - - - - IPInterface - - Vlan851 - 10.20.1.1/24 - - - IPInterface - - Ethernet48 - 10.10.1.2/30 - - - IPInterface - - Ethernet52 - 10.10.1.6/30 - - - IPInterface - - Ethernet56 - 10.10.1.10/30 - - - IPInterface - - Ethernet60 - 10.10.1.14/30 - - - IPInterface - - Ethernet64 - 10.10.1.18/30 - - - IPInterface - - Ethernet68 - 10.10.1.22/30 - - - IPInterface - - Ethernet72 - 10.10.1.26/30 - - - IPInterface - - Ethernet76 - 10.10.1.30/30 - - - - - - - - - - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet48 - OCPSCH01040AALF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet52 - OCPSCH01040BBLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet56 - OCPSCH01040CCLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet60 - OCPSCH01040DDLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet64 - OCPSCH01040EELF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet68 - OCPSCH01040FFLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet72 - OCPSCH01040GGLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet76 - OCPSCH01040HHLF - Ethernet48 - - - - - OCPSCH0104001MS - INGRASYS-S8900-64XC - - - - - - - - OCPSCH0104001MS - INGRASYS-S8900-64XC - diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9100-r0/default_sku new file mode 100644 index 00000000000..1a78c849d5e --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9100-C32 t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9100-r0/minigraph.xml deleted file mode 100644 index 0c4dec50942..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s9100-r0/minigraph.xml +++ /dev/null @@ -1,151 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - OCPSCH01040GGLF - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - OCPSCH01040GGLF - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040GGLF - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - OCPSCH01040GGLF - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - OCPSCH01040GGLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - OCPSCH01040GGLF - Ethernet4 - - - - - OCPSCH01040GGLF - INGRASYS-S9100-C32 - - - - - - - OCPSCH01040GGLF - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - OCPSCH01040GGLF - INGRASYS-S9100-C32 - diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/default_sku new file mode 100644 index 00000000000..2464f73308e --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9130-32X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml deleted file mode 100644 index 949ea6641b0..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml +++ /dev/null @@ -1,69 +0,0 @@ - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - OCPSCH01040GGLF - - - - - - - - - - - - - - OCPSCH01040GGLF - INGRASYS-S9130-32X - - - - - - - OCPSCH01040GGLF - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - OCPSCH01040GGLF - INGRASYS-S9130-32X - diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/default_sku new file mode 100644 index 00000000000..984f54a96e2 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9180-32X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/minigraph.xml deleted file mode 100644 index 803ae39d22c..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/minigraph.xml +++ /dev/null @@ -1,151 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - OCPSCH01040GGLF - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - OCPSCH01040GGLF - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040GGLF - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - OCPSCH01040GGLF - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - 100000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - OCPSCH01040GGLF - Ethernet0 - - - 100000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - OCPSCH01040GGLF - Ethernet4 - - - - - OCPSCH01040GGLF - INGRASYS-S9180-32X - - - - - - - OCPSCH01040GGLF - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - OCPSCH01040GGLF - INGRASYS-S9180-32X - diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/default_sku new file mode 100644 index 00000000000..30331b0d9fc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9200-64X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/minigraph.xml deleted file mode 100644 index 2b05e9ed15b..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/minigraph.xml +++ /dev/null @@ -1,151 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - OCPSCH01040GGLF - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - OCPSCH01040GGLF - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040GGLF - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - OCPSCH01040GGLF - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - OCPSCH01040GGLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - OCPSCH01040GGLF - Ethernet4 - - - - - OCPSCH01040GGLF - INGRASYS-S9200-64X - - - - - - - OCPSCH01040GGLF - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - OCPSCH01040GGLF - INGRASYS-S9200-64X - diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/default_sku new file mode 100644 index 00000000000..46ddac21550 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9230-64X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/minigraph.xml deleted file mode 100644 index 048bbbdd156..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/minigraph.xml +++ /dev/null @@ -1,69 +0,0 @@ - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - OCPSCH01040GGLF - - - - - - - - - - - - - - OCPSCH01040GGLF - INGRASYS-S9230-64X - - - - - - - OCPSCH01040GGLF - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - OCPSCH01040GGLF - INGRASYS-S9230-64X - diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/default_sku new file mode 100644 index 00000000000..68e0c87eb0a --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9280-64X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/minigraph.xml deleted file mode 100644 index ffc71df148e..00000000000 --- a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/minigraph.xml +++ /dev/null @@ -1,151 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - OCPSCH01040GGLF - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - OCPSCH01040GGLF - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040GGLF - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - OCPSCH01040GGLF - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - 100000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - OCPSCH01040GGLF - Ethernet0 - - - 100000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - OCPSCH01040GGLF - Ethernet4 - - - - - OCPSCH01040GGLF - INGRASYS-S9280-64X - - - - - - - OCPSCH01040GGLF - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - OCPSCH01040GGLF - INGRASYS-S9280-64X - diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/default_sku b/device/inventec/x86_64-inventec_d7032q28b-r0/default_sku new file mode 100644 index 00000000000..505f1765e6e --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7032Q28B-C32 t1 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml b/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml deleted file mode 100644 index 1f1dd3dfe35..00000000000 --- a/device/inventec/x86_64-inventec_d7032q28b-r0/minigraph.xml +++ /dev/null @@ -1,144 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - SONiC-Inventec-d7032-100 - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - SONiC-Inventec-d7032-100 - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - SONiC-Inventec-d7032-100 - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - SONiC-Inventec-d7032-100 - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - SONiC-Inventec-d7032-100 - Ethernet0 - - - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - SONiC-Inventec-d7032-100 - Ethernet4 - - - - - SONiC-Inventec-d7032-100 - INVENTEC-D7032Q28B-C32 - - - - - - - SONiC-Inventec-d7032-100 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - SONiC-Inventec-d7032-100 - INVENTEC-D7032Q28B-C32 - diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/default_sku b/device/inventec/x86_64-inventec_d7054q28b-r0/default_sku new file mode 100644 index 00000000000..3b1520a5e17 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7054Q28B-S48-Q6 t1 diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml b/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml deleted file mode 100644 index 7cd7dd75e60..00000000000 --- a/device/inventec/x86_64-inventec_d7054q28b-r0/minigraph.xml +++ /dev/null @@ -1,144 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - SONiC-Inventec-d7054 - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - SONiC-Inventec-d7054 - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - SONiC-Inventec-d7054 - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - SONiC-Inventec-d7054 - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - SONiC-Inventec-d7054 - Ethernet0 - - - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - SONiC-Inventec-d7054 - Ethernet4 - - - - - SONiC-Inventec-d7054 - INVENTEC-D7054Q28B-S48-Q6 - - - - - - - SONiC-Inventec-d7054 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - SONiC-Inventec-d7054 - INVENTEC-D7054Q28B-S48-Q6 - diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/default_sku b/device/inventec/x86_64-inventec_d7264q28b-r0/default_sku new file mode 100644 index 00000000000..134ade2e2cd --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7264Q28B t1 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/minigraph.xml b/device/inventec/x86_64-inventec_d7264q28b-r0/minigraph.xml deleted file mode 100644 index b68f712b262..00000000000 --- a/device/inventec/x86_64-inventec_d7264q28b-r0/minigraph.xml +++ /dev/null @@ -1,144 +0,0 @@ - - - - - - OCPSCH0104001MS - 10.10.1.26 - SONiC-Inventec-d7264 - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - SONiC-Inventec-d7264 - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - SONiC-Inventec-d7264 - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - - - - - - - - HostIP - Loopback0 - - 100.0.0.9/32 - - 100.0.0.9/32 - - - - - - - - SONiC-Inventec-d7264 - - - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - - - - - - - - - - - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - SONiC-Inventec-d7264 - Ethernet0 - - - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - SONiC-Inventec-d7264 - Ethernet4 - - - - - SONiC-Inventec-d7264 - INVENTEC-D7264Q28B - - - - - - - SONiC-Inventec-d7264 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - SONiC-Inventec-d7264 - INVENTEC-D7264Q28B - diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/default_sku b/device/marvell/x86_64-marvell_slm5401_54x-r0/default_sku new file mode 100644 index 00000000000..8ace9a8abce --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/default_sku @@ -0,0 +1 @@ +SLM5401-54x t1 diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/minigraph.xml b/device/marvell/x86_64-marvell_slm5401_54x-r0/minigraph.xml deleted file mode 100755 index 3fc83ef7fc6..00000000000 --- a/device/marvell/x86_64-marvell_slm5401_54x-r0/minigraph.xml +++ /dev/null @@ -1,1074 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - switch1 - 10.0.0.32 - 1 - 180 - 60 - - - switch1 - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - switch1 - 10.0.0.34 - 1 - 180 - 60 - - - switch1 - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - switch1 - 10.0.0.36 - 1 - 180 - 60 - - - switch1 - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - switch1 - 10.0.0.38 - 1 - 180 - 60 - - - switch1 - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - switch1 - 10.0.0.40 - 1 - 180 - 60 - - - switch1 - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - switch1 - 10.0.0.42 - 1 - 180 - 60 - - - switch1 - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - switch1 - 10.0.0.44 - 1 - 180 - 60 - - - switch1 - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - switch1 - 10.0.0.46 - 1 - 180 - 60 - - - switch1 - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - ARISTA09T0 - 10.0.0.49 - switch1 - 10.0.0.48 - 1 - 180 - 60 - - - switch1 - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - switch1 - 10.0.0.50 - 1 - 180 - 60 - - - switch1 - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - switch1 - 10.0.0.52 - 1 - 180 - 60 - - - switch1 - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - switch1 - 10.0.0.54 - 1 - 180 - 60 - - - switch1 - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - switch1 - 10.0.0.56 - 1 - 180 - 60 - - - switch1 - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - switch1 - 10.0.0.58 - 1 - 180 - 60 - - - switch1 - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - switch1 - 10.0.0.60 - 1 - 180 - 60 - - - switch1 - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - switch1 - 10.0.0.62 - 1 - 180 - 60 - - - switch1 - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - switch1 - - -
10.0.0.33
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10.0.0.1
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10.0.0.35
- - - - -
10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - switch1 - - - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - switch1 - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - switch1 - SLM5401-54x - - - - - - - switch1 - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - switch1 - SLM5401-54x - diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/default_sku b/device/mellanox/x86_64-mlnx_lssn2700-r0/default_sku new file mode 100644 index 00000000000..22e3116d2db --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/default_sku @@ -0,0 +1 @@ +LS-SN2700 t1 diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/minigraph.xml b/device/mellanox/x86_64-mlnx_lssn2700-r0/minigraph.xml deleted file mode 100644 index 40eb5252610..00000000000 --- a/device/mellanox/x86_64-mlnx_lssn2700-r0/minigraph.xml +++ /dev/null @@ -1,1079 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - sonic - 10.0.0.34 - 1 - 180 - 60 - - - sonic - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - sonic - 10.0.0.36 - 1 - 180 - 60 - - - sonic - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - sonic - 10.0.0.38 - 1 - 180 - 60 - - - sonic - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - sonic - 10.0.0.40 - 1 - 180 - 60 - - - sonic - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - sonic - 10.0.0.42 - 1 - 180 - 60 - - - sonic - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - sonic - 10.0.0.44 - 1 - 180 - 60 - - - sonic - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - sonic - 10.0.0.46 - 1 - 180 - 60 - - - sonic - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - ARISTA09T0 - 10.0.0.49 - sonic - 10.0.0.48 - 1 - 180 - 60 - - - sonic - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - sonic - 10.0.0.50 - 1 - 180 - 60 - - - sonic - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - sonic - 10.0.0.52 - 1 - 180 - 60 - - - sonic - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - sonic - 10.0.0.54 - 1 - 180 - 60 - - - sonic - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - sonic - 10.0.0.56 - 1 - 180 - 60 - - - sonic - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - sonic - 10.0.0.58 - 1 - 180 - 60 - - - sonic - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - sonic - 10.0.0.60 - 1 - 180 - 60 - - - sonic - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - sonic - 10.0.0.62 - 1 - 180 - 60 - - - sonic - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - sonic - - -
10.0.0.33
- - - - -
10.0.0.1
- - - - -
10.0.0.35
- - - - -
10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - sonic - - - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - sonic - LS-SN2700 - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - sonic - LS-SN2700 - diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2010-r0/default_sku new file mode 100644 index 00000000000..558120a701d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2010 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/minigraph.xml b/device/mellanox/x86_64-mlnx_msn2010-r0/minigraph.xml deleted file mode 100644 index 580cdff142f..00000000000 --- a/device/mellanox/x86_64-mlnx_msn2010-r0/minigraph.xml +++ /dev/null @@ -1,855 +0,0 @@ - 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- - - - -
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- - - - -
10.0.0.35
- - - - -
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- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - sonic - - - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet84 - ARISTA06T0 - Ethernet1 - - - - - sonic - ACS-MSN2010 - - - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - sonic - ACS-MSN2010 - - diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2100-r0/default_sku new file mode 100644 index 00000000000..5d7c94c0bc8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2100 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/minigraph.xml b/device/mellanox/x86_64-mlnx_msn2100-r0/minigraph.xml deleted file mode 100644 index d902d6eac4d..00000000000 --- a/device/mellanox/x86_64-mlnx_msn2100-r0/minigraph.xml +++ /dev/null @@ -1,578 +0,0 @@ - - - - - - sonic - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - sonic - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - sonic - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - sonic - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - sonic - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - sonic - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - sonic - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - sonic - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - sonic - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - sonic - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - sonic - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - sonic - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - sonic - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - sonic - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - sonic - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - sonic - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - sonic - - -
10.0.0.1
- - - - -
10.0.0.3
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10.0.0.5
- - - - -
10.0.0.7
- - - - -
10.0.0.9
- - - - -
10.0.0.11
- - - - -
10.0.0.13
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10.0.0.15
- - - - -
10.0.0.17
- - - - -
10.0.0.19
- - - - -
10.0.0.21
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10.0.0.23
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10.0.0.25
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10.0.0.27
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10.0.0.29
- - - - -
10.0.0.31
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- - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - - - sonic - ACS-MSN2700 - - ` - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - - - - - sonic - ACS-MSN2100 - diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2410-r0/default_sku new file mode 100644 index 00000000000..ac04d6adf5f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2410 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/minigraph.xml b/device/mellanox/x86_64-mlnx_msn2410-r0/minigraph.xml deleted file mode 100644 index 8b417c35353..00000000000 --- a/device/mellanox/x86_64-mlnx_msn2410-r0/minigraph.xml +++ /dev/null @@ -1,1199 +0,0 @@ - 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10.0.0.5
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10.0.0.39
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10.0.0.7
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10.0.0.41
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10.0.0.9
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10.0.0.43
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10.0.0.11
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10.0.0.45
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10.0.0.13
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10.0.0.47
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10.0.0.15
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10.0.0.49
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10.0.0.17
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10.0.0.51
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10.0.0.19
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10.0.0.53
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10.0.0.21
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10.0.0.55
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10.0.0.23
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10.0.0.57
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10.0.0.25
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10.0.0.59
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10.0.0.27
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10.0.0.61
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10.0.0.29
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10.0.0.63
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10.0.0.31
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- - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 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- - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - sonic - ACS-MSN2740 - - ` - - - - - sonic - - - DhcpResources - - - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - sonic - ACS-MSN2740 - diff --git a/device/mellanox/x86_64-mlnx_x86-r5.0.1400/default_sku b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/default_sku new file mode 100644 index 00000000000..9641115a494 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/default_sku @@ -0,0 +1 @@ +ACS-MSN2740 t1 diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/default_sku b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/default_sku new file mode 100644 index 00000000000..b533cbe35c5 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/default_sku @@ -0,0 +1 @@ +MiTAC-LY1200-B32H0-C3 t1 diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml deleted file mode 100644 index 210eac2fd62..00000000000 --- a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml +++ /dev/null @@ -1,1074 +0,0 @@ - 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- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - 64016 - ARISTA17T0 - - - - 65200 - ARISTA17T2 - - - - 64016 - ARISTA18T0 - - - - 65200 - ARISTA18T2 - - - - 64016 - ARISTA19T0 - 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10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - Ethernet128 - 10.0.0.64/31 - - - - Ethernet132 - 10.0.0.66/31 - - - - Ethernet136 - 10.0.0.68/31 - - - - Ethernet140 - 10.0.0.70/31 - - - - Ethernet144 - 10.0.0.72/31 - - - - Ethernet148 - 10.0.0.74/31 - - - - Ethernet152 - 10.0.0.76/31 - - - - Ethernet156 - 10.0.0.78/31 - - - - Ethernet160 - 10.0.0.80/31 - - - - Ethernet164 - 10.0.0.82/31 - - - - Ethernet168 - 10.0.0.84/31 - - - - Ethernet172 - 10.0.0.86/31 - - - - Ethernet176 - 10.0.0.88/31 - - - - Ethernet180 - 10.0.0.90/31 - - - - Ethernet184 - 10.0.0.92/31 - - - - Ethernet188 - 10.0.0.94/31 - - - - Ethernet192 - 10.0.0.96/31 - - - - Ethernet196 - 10.0.0.98/31 - - - - Ethernet200 - 10.0.0.100/31 - - - - Ethernet204 - 10.0.0.102/31 - - - - Ethernet208 - 10.0.0.104/31 - - - - Ethernet212 - 10.0.0.106/31 - - - - - - - - - - - - DeviceInterfaceLink - switch2 - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet64 - ARISTA17T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet68 - ARISTA18T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet72 - ARISTA19T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet76 - ARISTA20T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet80 - ARISTA21T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet84 - ARISTA22T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet88 - ARISTA23T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet92 - ARISTA24T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet96 - ARISTA25T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet100 - ARISTA26T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet104 - ARISTA27T2 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet108 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet112 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet116 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet120 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet124 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet128 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet132 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet136 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet140 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet144 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet148 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet152 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet156 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet160 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet164 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet168 - ARISTA16T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet172 - ARISTA17T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet176 - ARISTA18T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet180 - ARISTA19T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet184 - ARISTA20T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet188 - ARISTA21T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet192 - ARISTA22T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet196 - ARISTA23T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet200 - ARISTA24T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet204 - ARISTA25T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet208 - ARISTA26T0 - Ethernet1 - - - DeviceInterfaceLink - switch2 - Ethernet212 - ARISTA27T0 - Ethernet1 - - - - - switch2 - OSW1800-48x6q - - - - - - - switch2 - - - DhcpResources - - 192.168.1.111 - - - NtpResources - - 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org - - - SyslogResources - - 192.0.0.1 - - - ErspanDestinationIpv4 - - 2.2.2.2 - - - - - - - switch2 - OSW1800-48x6q - diff --git a/files/image_config/updategraph/updategraph b/files/image_config/updategraph/updategraph index 5a0304aa24e..4c084fa8c27 100755 --- a/files/image_config/updategraph/updategraph +++ b/files/image_config/updategraph/updategraph @@ -17,21 +17,6 @@ reload_minigraph() config qos reload } -copy_default_minigraph() -{ - . /host/machine.conf - if [ -n "$aboot_platform" ]; then - platform=$aboot_platform - elif [ -n "$onie_platform" ]; then - platform=$onie_platform - else - echo "Unknown sonic platform." - exit 1 - fi - echo "Copying default minigraph..." - cp /usr/share/sonic/device/$platform/minigraph.xml /etc/sonic/ -} - if [ ! -f /etc/sonic/updategraph.conf ]; then echo "No updategraph.conf found, generating a default one." @@ -66,9 +51,12 @@ fi if [ -f /tmp/pending_config_initialization ]; then rm -f /tmp/pending_config_initialization if [ "$enabled" != "true" ]; then - copy_default_minigraph - reload_minigraph - sonic-cfggen -d --print-data > /etc/sonic/config_db.json + PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + PRESET=(`head -n 1 /usr/share/sonic/device/$PLATFORM/default_sku`) + sonic-cfggen -H -k ${PRESET[0]} --preset ${PRESET[1]} > /etc/sonic/config_db.json + redis-cli -n $CONFIG_DB_INDEX FLUSHDB + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db + redis-cli -n $CONFIG_DB_INDEX SET "CONFIG_DB_INITIALIZED" "1" exit 0 fi fi @@ -103,12 +91,13 @@ if [ "$src" = "dhcp" ]; then fi if [ "`cat /tmp/dhcp_graph_url`" = "N/A" ]; then echo "'N/A' found in DHCP response. Skipping graph update and generating an empty configuration." - if [ ! -f /etc/sonic/minigraph.xml ]; then - copy_default_minigraph + PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + if [ -f /etc/sonic/minigraph.xml ]; then + sonic-cfggen -H -m /etc/sonic/minigraph.xml --preset empty > /tmp/device_meta.json + else + PRESET=(`head -n 1 /usr/share/sonic/device/$PLATFORM/default_sku`) + sonic-cfggen -H -k ${PRESET[0]} --preset empty > /tmp/device_meta.json fi - echo '{"DEVICE_METADATA":' > /tmp/device_meta.json - sonic-cfggen -H -m /etc/sonic/minigraph.xml --var-json DEVICE_METADATA >> /tmp/device_meta.json - echo '}' >> /tmp/device_meta.json if [ -f /etc/sonic/init_cfg.json ]; then sonic-cfggen -j /tmp/device_meta.json -j /etc/sonic/init_cfg.json --print-data > /etc/sonic/config_db.json else From 715806c906c1199da4f85d208041c172a4fdc593 Mon Sep 17 00:00:00 2001 From: "Kevin(Shengkai) Wang" Date: Sun, 23 Sep 2018 07:24:12 +0800 Subject: [PATCH 41/57] [mellanox]: Add support for Mellanox MSN2010 (#2069) * [device]: Add support for Mellanox MSN2010 MSN2010 runs on Spectrum silicon and has 22 ports: 18 25GbE and 4 100GbE * [device]: Fix a potential qos config issue for MSN2700 Signed-off-by: Kevin Wang --- .../ACS-MSN2010/buffers.json.j2 | 1 + .../ACS-MSN2010/buffers_defaults_t0.j2 | 1 + .../ACS-MSN2010/buffers_defaults_t1.j2 | 1 + .../ACS-MSN2010/pg_profile_lookup.ini | 1 + .../ACS-MSN2010/port_config.ini | 56 ++-- .../ACS-MSN2010/qos.json.j2 | 1 + .../ACS-MSN2010/sai_2010.xml | 243 ++++++++++++++++++ .../x86_64-mlnx_msn2010-r0/plugins/psuutil.py | 5 +- .../x86_64-mlnx_msn2010-r0/plugins/sfputil.py | 57 +++- .../ACS-MSN2700/qos.json.j2 | 3 + 10 files changed, 339 insertions(+), 30 deletions(-) create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..7bcae62336f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..a437d613434 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini new file mode 120000 index 00000000000..3c97f3dcb16 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini index 1cb2cb69c59..987720e3b12 100644 --- a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini @@ -1,23 +1,33 @@ -# name lanes -Ethernet0 0 -Ethernet4 4 -Ethernet8 8 -Ethernet12 12 -Ethernet16 16 -Ethernet20 20 -Ethernet24 24 -Ethernet28 28 -Ethernet32 32 -Ethernet36 36 -Ethernet40 40 -Ethernet44 44 -Ethernet48 48 -Ethernet52 52 -Ethernet56 56 -Ethernet60 60 -Ethernet64 64 -Ethernet68 68 -Ethernet72 72,73,74,75 -Ethernet76 76,77,78,79 -Ethernet80 80,81,82,83 -Ethernet84 84,85,86,87 \ No newline at end of file +# name lanes index +Ethernet0 0 0 +Ethernet4 4 1 +Ethernet8 8 2 +Ethernet12 12 3 +Ethernet16 16 4 +Ethernet20 20 5 +Ethernet24 24 6 +Ethernet28 28 7 +Ethernet32 32 8 +Ethernet36 36 9 +Ethernet40 40 10 +Ethernet44 44 11 +Ethernet48 48 12 +Ethernet52 52 13 +Ethernet56 56 14 +Ethernet60 60 15 +Ethernet64 64 16 +Ethernet68 68 17 +Ethernet72 72 18 +Ethernet76 73 18 +Ethernet80 74 18 +Ethernet84 75 18 +Ethernet88 76 19 +Ethernet92 77 19 +Ethernet96 78 19 +Ethernet100 79 19 +Ethernet104 80 20 +Ethernet108 81 20 +Ethernet112 82 20 +Ethernet116 83 20 +Ethernet120 84 21 +Ethernet124 86 21 diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml new file mode 100644 index 00000000000..8f4af640ddd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml @@ -0,0 +1,243 @@ + + + + + + 00:02:03:04:05:00 + + + 32 + + + + + 1 + 32 + 1 + + + 0 + + + 939524096 + + + 2 + 33 + 1 + 0 + 939524096 + + + 3 + 34 + 1 + 0 + 939524096 + + + 4 + 35 + 1 + 0 + 939524096 + + + 5 + 36 + 1 + 0 + 4096 + + + 6 + 37 + 1 + 0 + 4096 + + + 7 + 38 + 1 + 0 + 4096 + + + 8 + 39 + 1 + 0 + 4096 + + + 9 + 40 + 1 + 0 + 4096 + + + 10 + 41 + 1 + 0 + 4096 + + + 11 + 42 + 1 + 0 + 4096 + + + 12 + 43 + 1 + 0 + 4096 + + + 13 + 44 + 1 + 0 + 4096 + + + 14 + 45 + 1 + 0 + 4096 + + + 15 + 46 + 1 + 0 + 4096 + + + 16 + 47 + 1 + 0 + 4096 + + + 17 + 48 + 1 + 0 + 4096 + + + 18 + 49 + 1 + 0 + 4096 + + + 19 + 1 + 3 + 0 + 4096 + + + 20 + 1 + 4 + 0 + 4096 + + + 21 + 1 + 5 + 0 + 4096 + + + 22 + 1 + 6 + 0 + 4096 + + + 23 + 1 + 7 + 0 + 4096 + + + 24 + 1 + 8 + 0 + 4096 + + + 25 + 1 + 9 + 0 + 4096 + + + 26 + 1 + 10 + 0 + 4096 + + + 27 + 1 + 11 + 0 + 4096 + + + 28 + 1 + 12 + 0 + 4096 + + + 29 + 1 + 13 + 0 + 4096 + + + 30 + 1 + 14 + 0 + 4096 + + + 31 + 1 + 15 + 0 + 4096 + + + 32 + 1 + 16 + 0 + 4096 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py index b1900d173f5..d89a046940d 100644 --- a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py @@ -64,10 +64,11 @@ def get_psu_presence(self, index): if index is None: return False + status = 0 try: with open(self.psu_path + self.psu_presence.format(index), 'r') as presence_status: - return True + status = int(presence_status.read()) except IOError: return False - return False + return status == 1 diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py index d15c1194328..77831b54d2f 100644 --- a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py @@ -10,18 +10,28 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" - PORT_START = 0 - PORT_END = 55 - PORTS_IN_BLOCK = 56 - + PORT_END = 21 + PORTS_IN_BLOCK = 22 + QSFP_PORT_START = 18 EEPROM_OFFSET = 1 _port_to_eeprom_mapping = {} + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + sfpd_status_tbl = None + @property def port_start(self): return self.PORT_START @@ -32,7 +42,7 @@ def port_end(self): @property def qsfp_ports(self): - return range(0, self.PORTS_IN_BLOCK + 1) + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) @property def port_to_eeprom_mapping(self): @@ -46,6 +56,7 @@ def __init__(self): SfpUtilBase.__init__(self) + def get_presence(self, port_num): # Check for invalid port_num if port_num < self.port_start or port_num > self.port_end: @@ -149,3 +160,39 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + self.sfpd_status_tbl = swsscommon.Table(self.state_db, 'MLNX_SFPD_TASK') + + # Check the liveness of mlnx-sfpd, if it failed, return false + keys = self.sfpd_status_tbl.getKeys() + if 'LIVENESS' not in keys: + return False, phy_port_dict + + (state, c) = self.db_sel.select(timeout) + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 index a11c77f7cc2..55fd79a875e 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 @@ -177,6 +177,9 @@ } }, "QUEUE": { + "{{ port_names_active }}|0-1" : { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" + }, "{{ port_names_active }}|3-4" : { "scheduler" : "[SCHEDULER|scheduler.0]", "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" From cfe01f19e4d8fcac23310868dddd02ae5047c3ba Mon Sep 17 00:00:00 2001 From: Ying Xie Date: Mon, 24 Sep 2018 16:35:01 -0700 Subject: [PATCH 42/57] Separate syncd service from swss service (#2051) * [swss.sh] refactor ssh service script code - Move checks and waits to helper functions. - Remove early returns from code stream Signed-off-by: Ying Xie * [swss.sh] Add debug log for service state changes Signed-off-by: Ying Xie * [syncd] Separate out syncd service from swss service Still make them start/stop/restart synchronously so existing scripts continue working. Signed-off-by: Ying Xie * Remove extra 'After' in swss service and remove syncd docker warm boot code Syncd warm boot needs more thinking, we can put it back once the work flow has been defined and ready for coding/testing. * [syncd] syncd start/stop/restart shouldn't affect swss state Semi-detach syncd service state change from swss: - swss state change still chase syncd service to follow except warm boot - syncd state change will only affect itself. Signed-off-by: Ying Xie * add missing '{' --- .../build_templates/sonic_debian_extension.j2 | 3 +- files/build_templates/swss.service.j2 | 5 - files/build_templates/syncd.service.j2 | 24 +++ files/scripts/swss.sh | 144 +++++++++++------- files/scripts/syncd.sh | 123 +++++++++++++++ 5 files changed, 242 insertions(+), 57 deletions(-) create mode 100644 files/build_templates/syncd.service.j2 create mode 100755 files/scripts/syncd.sh diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 index 318c83f5f21..9217e77bff6 100644 --- a/files/build_templates/sonic_debian_extension.j2 +++ b/files/build_templates/sonic_debian_extension.j2 @@ -293,8 +293,9 @@ sudo LANG=C chroot $FILESYSTEM_ROOT fuser -km /sys || true sudo LANG=C chroot $FILESYSTEM_ROOT umount -lf /sys {% endif %} -# Copy swss service script +# Copy swss and syncd service script sudo LANG=C cp $SCRIPTS_DIR/swss.sh $FILESYSTEM_ROOT/usr/local/bin/swss.sh +sudo LANG=C cp $SCRIPTS_DIR/syncd.sh $FILESYSTEM_ROOT/usr/local/bin/syncd.sh # Copy systemd timer configuration # It implements delayed start of services diff --git a/files/build_templates/swss.service.j2 b/files/build_templates/swss.service.j2 index 61fff9721ae..8b8d7b42d1e 100644 --- a/files/build_templates/swss.service.j2 +++ b/files/build_templates/swss.service.j2 @@ -8,11 +8,6 @@ Requires=nps-modules-4.9.0-7-amd64.service {% endif %} After=database.service updategraph.service After=interfaces-config.service -{% if sonic_asic_platform == 'broadcom' %} -After=opennsl-modules-4.9.0-7-amd64.service -{% elif sonic_asic_platform == 'nephos' %} -After=nps-modules-4.9.0-7-amd64.service -{% endif %} [Service] User=root diff --git a/files/build_templates/syncd.service.j2 b/files/build_templates/syncd.service.j2 new file mode 100644 index 00000000000..38b208e74b0 --- /dev/null +++ b/files/build_templates/syncd.service.j2 @@ -0,0 +1,24 @@ +[Unit] +Description=syncd service +Requires=database.service updategraph.service +{% if sonic_asic_platform == 'broadcom' %} +Requires=opennsl-modules-4.9.0-7-amd64.service +{% elif sonic_asic_platform == 'nephos' %} +Requires=nps-modules-4.9.0-7-amd64.service +{% endif %} +After=database.service updategraph.service +After=interfaces-config.service +{% if sonic_asic_platform == 'broadcom' %} +After=opennsl-modules-4.9.0-7-amd64.service +{% elif sonic_asic_platform == 'nephos' %} +After=nps-modules-4.9.0-7-amd64.service +{% endif %} + +[Service] +User=root +Environment=sonic_asic_platform={{ sonic_asic_platform }} +ExecStart=/usr/local/bin/syncd.sh start +ExecStop=/usr/local/bin/syncd.sh stop + +[Install] +WantedBy=multi-user.target diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh index 0873deb37c8..22f1f0d668d 100755 --- a/files/scripts/swss.sh +++ b/files/scripts/swss.sh @@ -1,6 +1,56 @@ #!/bin/bash -start() { +SERVICE="swss" +PEER="syncd" +DEBUGLOG="/tmp/swss-syncd-debug.log" +LOCKFILE="/tmp/swss-syncd-lock" + +function debug() +{ + /bin/echo `date` "- $1" >> ${DEBUGLOG} +} + +function lock_service_state_change() +{ + debug "Locking ${LOCKFILE} from ${SERVICE} service" + + exec {LOCKFD}>${LOCKFILE} + /usr/bin/flock -x ${LOCKFD} + trap "/usr/bin/flock -u ${LOCKFD}" 0 2 3 15 + + debug "Locked ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" +} + +function unlock_service_state_change() +{ + debug "Unlocking ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" + /usr/bin/flock -u ${LOCKFD} +} + +function check_warm_boot() +{ + SYSTEM_WARM_START=`/usr/bin/redis-cli -n 4 hget "WARM_RESTART|system" enable` + SERVICE_WARM_START=`/usr/bin/redis-cli -n 4 hget "WARM_RESTART|${SERVICE}" enable` + if [[ x"$SYSTEM_WARM_START" == x"true" ]] || [[ x"$SERVICE_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + else + WARM_BOOT="false" + fi +} + +function validate_restart_count() +{ + if [[ x"$WARM_BOOT" == x"true" ]]; then + RESTART_COUNT=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_TABLE|orchagent" restart_count` + # We have to make sure db data has not been flushed. + if [[ -z "$RESTART_COUNT" ]]; then + WARM_BOOT="false" + fi + fi +} + +function wait_for_database_service() +{ # Wait for redis server start before database clean until [[ $(/usr/bin/docker exec database redis-cli ping | grep -c PONG) -gt 0 ]]; do sleep 1; @@ -10,66 +60,58 @@ start() { until [[ $(/usr/bin/docker exec database redis-cli -n 4 GET "CONFIG_DB_INITIALIZED") ]]; do sleep 1; done +} - SYSTEM_WARM_START=`/usr/bin/docker exec database redis-cli -n 4 HGET "WARM_RESTART|system" enable` - SWSS_WARM_START=`/usr/bin/docker exec database redis-cli -n 4 HGET "WARM_RESTART|swss" enable` - # if warm start enabled, just do swss docker start. - # Don't flush DB or try to start other modules. - if [[ "$SYSTEM_WARM_START" == "true" ]] || [[ "$SWSS_WARM_START" == "true" ]]; then - RESTART_COUNT=`redis-cli -n 6 hget "WARM_RESTART_TABLE|orchagent" restart_count` - # We have to make sure db data has not been flushed. - if [[ -n "$RESTART_COUNT" ]]; then - /usr/bin/swss.sh start - /usr/bin/swss.sh attach - return 0 - fi - fi +start() { + debug "Starting ${SERVICE} service..." + + lock_service_state_change + + wait_for_database_service + check_warm_boot + validate_restart_count - # Flush DB - /usr/bin/docker exec database redis-cli -n 0 FLUSHDB - /usr/bin/docker exec database redis-cli -n 1 FLUSHDB - /usr/bin/docker exec database redis-cli -n 2 FLUSHDB - /usr/bin/docker exec database redis-cli -n 5 FLUSHDB - /usr/bin/docker exec database redis-cli -n 6 FLUSHDB - - # platform specific tasks - if [ x$sonic_asic_platform == x'mellanox' ]; then - FAST_BOOT=1 - /usr/bin/mst start - /usr/bin/mlnx-fw-upgrade.sh - /etc/init.d/sxdkernel start - /sbin/modprobe i2c-dev - /etc/mlnx/mlnx-hw-management start - elif [ x$sonic_asic_platform == x'cavium' ]; then - /etc/init.d/xpnet.sh start + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + # Don't flush DB during warm boot + if [[ x"$WARM_BOOT" != x"true" ]]; then + /usr/bin/docker exec database redis-cli -n 0 FLUSHDB + /usr/bin/docker exec database redis-cli -n 2 FLUSHDB + /usr/bin/docker exec database redis-cli -n 5 FLUSHDB + /usr/bin/docker exec database redis-cli -n 6 FLUSHDB fi - # start swss and syncd docker - /usr/bin/swss.sh start - /usr/bin/syncd.sh start - /usr/bin/swss.sh attach + # start service docker + /usr/bin/${SERVICE}.sh start + debug "Started ${SERVICE} service..." + + # Unlock has to happen before reaching out to peer service + unlock_service_state_change + + if [[ x"$WARM_BOOT" != x"true" ]]; then + /bin/systemctl start ${PEER} + fi + /usr/bin/${SERVICE}.sh attach } stop() { - /usr/bin/swss.sh stop + debug "Stopping ${SERVICE} service..." - SYSTEM_WARM_START=`redis-cli -n 4 hget "WARM_RESTART|system" enable` - SWSS_WARM_START=`redis-cli -n 4 hget "WARM_RESTART|swss" enable` - # if warm start enabled, just stop swss docker, then return - if [[ "$SYSTEM_WARM_START" == "true" ]] || [[ "$SWSS_WARM_START" == "true" ]]; then - return 0 - fi + [[ -f ${LOCKFILE} ]] || /usr/bin/touch ${LOCKFILE} + + lock_service_state_change + check_warm_boot + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + /usr/bin/${SERVICE}.sh stop + debug "Stopped ${SERVICE} service..." - /usr/bin/syncd.sh stop + # Unlock has to happen before reaching out to peer service + unlock_service_state_change - # platform specific tasks - if [ x$sonic_asic_platform == x'mellanox' ]; then - /etc/mlnx/mlnx-hw-management stop - /etc/init.d/sxdkernel stop - /usr/bin/mst stop - elif [ x$sonic_asic_platform == x'cavium' ]; then - /etc/init.d/xpnet.sh stop - /etc/init.d/xpnet.sh start + # if warm start enabled or peer lock exists, don't stop peer service docker + if [[ x"$WARM_BOOT" != x"true" ]]; then + /bin/systemctl stop ${PEER} fi } diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh new file mode 100755 index 00000000000..2ceb0c21b3f --- /dev/null +++ b/files/scripts/syncd.sh @@ -0,0 +1,123 @@ +#!/bin/bash + +SERVICE="syncd" +PEER="swss" +DEBUGLOG="/tmp/swss-syncd-debug.log" +LOCKFILE="/tmp/swss-syncd-lock" + +function debug() +{ + /bin/echo `date` "- $1" >> ${DEBUGLOG} +} + +function lock_service_state_change() +{ + debug "Locking ${LOCKFILE} from ${SERVICE} service" + + exec {LOCKFD}>${LOCKFILE} + /usr/bin/flock -x ${LOCKFD} + trap "/usr/bin/flock -u ${LOCKFD}" 0 2 3 15 + + debug "Locked ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" +} + +function unlock_service_state_change() +{ + debug "Unlocking ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" + /usr/bin/flock -u ${LOCKFD} +} + +function check_warm_boot() +{ + SYSTEM_WARM_START=`/usr/bin/redis-cli -n 4 hget "WARM_RESTART|system" enable` + # SYSTEM_WARM_START could be empty, always make WARM_BOOT meaningful. + if [[ x"$SYSTEM_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + else + WARM_BOOT="false" + fi +} + +function wait_for_database_service() +{ + # Wait for redis server start before database clean + until [[ $(/usr/bin/docker exec database redis-cli ping | grep -c PONG) -gt 0 ]]; + do sleep 1; + done + + # Wait for configDB initialization + until [[ $(/usr/bin/docker exec database redis-cli -n 4 GET "CONFIG_DB_INITIALIZED") ]]; + do sleep 1; + done +} + +start() { + debug "Starting ${SERVICE} service..." + + lock_service_state_change + + wait_for_database_service + check_warm_boot + + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + # Don't flush DB during warm boot + if [[ x"$WARM_BOOT" != x"true" ]]; then + /usr/bin/docker exec database redis-cli -n 1 FLUSHDB + + # platform specific tasks + if [ x$sonic_asic_platform == x'mellanox' ]; then + FAST_BOOT=1 + /usr/bin/mst start + /usr/bin/mlnx-fw-upgrade.sh + /etc/init.d/sxdkernel start + /sbin/modprobe i2c-dev + /etc/mlnx/mlnx-hw-management start + elif [ x$sonic_asic_platform == x'cavium' ]; then + /etc/init.d/xpnet.sh start + fi + fi + + # start service docker + /usr/bin/${SERVICE}.sh start + debug "Started ${SERVICE} service..." + + unlock_service_state_change + /usr/bin/${SERVICE}.sh attach +} + +stop() { + debug "Stopping ${SERVICE} service..." + + lock_service_state_change + check_warm_boot + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + /usr/bin/${SERVICE}.sh stop + debug "Stopped ${SERVICE} service..." + + # if warm start enabled, don't stop peer service docker + if [[ x"$WARM_BOOT" != x"true" ]]; then + # platform specific tasks + if [ x$sonic_asic_platform == x'mellanox' ]; then + /etc/mlnx/mlnx-hw-management stop + /etc/init.d/sxdkernel stop + /usr/bin/mst stop + elif [ x$sonic_asic_platform == x'cavium' ]; then + /etc/init.d/xpnet.sh stop + /etc/init.d/xpnet.sh start + fi + fi + + unlock_service_state_change +} + +case "$1" in + start|stop) + $1 + ;; + *) + echo "Usage: $0 {start|stop}" + exit 1 + ;; +esac From 9b2a5943bdef58fedaf4fb005cf69d9913a08d88 Mon Sep 17 00:00:00 2001 From: zzhiyuan Date: Tue, 25 Sep 2018 01:24:31 -0700 Subject: [PATCH 43/57] [devices]: Add new hwsku Arista-7050-Q31S4 (#2075) --- .../Arista-7050-Q31S4/buffers.json.j2 | 3 + .../Arista-7050-Q31S4/buffers_defaults_t1.j2 | 49 ++ .../Arista-7050-Q31S4/hwsku-init | 1 + .../Arista-7050-Q31S4/pg_profile_lookup.ini | 14 + .../Arista-7050-Q31S4/port_config.ini | 36 + .../Arista-7050-Q31S4/qos.json.j2 | 148 ++++ .../Arista-7050-Q31S4/sai.profile | 1 + .../td2-a7050-q31s4-31x40G-4x10G.config.bcm | 676 ++++++++++++++++++ .../Arista-7050-QX-32S/hwsku-init | 1 + 9 files changed, 929 insertions(+) create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers.json.j2 create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers_defaults_t1.j2 create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/hwsku-init create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/pg_profile_lookup.ini create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/port_config.ini create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/qos.json.j2 create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/sai.profile create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/td2-a7050-q31s4-31x40G-4x10G.config.bcm create mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers.json.j2 new file mode 100644 index 00000000000..b67cf577ab7 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..f72e3eb06fb --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers_defaults_t1.j2 @@ -0,0 +1,49 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% if PORT_ALL.append("Ethernet0") %}{% endif %} + {% if PORT_ALL.append("Ethernet1") %}{% endif %} + {% if PORT_ALL.append("Ethernet2") %}{% endif %} + {% if PORT_ALL.append("Ethernet3") %}{% endif %} + {% for port_idx in range(1,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/hwsku-init new file mode 100644 index 00000000000..c005241e4b6 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/hwsku-init @@ -0,0 +1 @@ +echo 1 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/pg_profile_lookup.ini new file mode 100644 index 00000000000..f961fd33b13 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/pg_profile_lookup.ini @@ -0,0 +1,14 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 41808 18432 40560 -4 2496 + 40000 5m 41808 18432 40560 -4 2496 + 50000 5m 41808 18432 40560 -4 2496 + 100000 5m 41808 18432 40560 -4 2496 + 10000 40m 41808 18432 40560 -4 2496 + 40000 40m 41808 18432 40560 -4 2496 + 50000 40m 41808 18432 40560 -4 2496 + 100000 40m 41808 18432 40560 -4 2496 + 10000 300m 41808 18432 40560 -4 2496 + 40000 300m 41808 18432 40560 -4 2496 + 50000 300m 41808 18432 40560 -4 2496 + 100000 300m 41808 18432 40560 -4 2496 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/port_config.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/port_config.ini new file mode 100644 index 00000000000..dafdb570e9c --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/port_config.ini @@ -0,0 +1,36 @@ +# name lanes alias index +Ethernet0 9 Ethernet1 1 +Ethernet1 10 Ethernet2 2 +Ethernet2 11 Ethernet3 3 +Ethernet3 12 Ethernet4 4 +Ethernet4 13,14,15,16 Ethernet6/1 6 +Ethernet8 17,18,19,20 Ethernet7/1 7 +Ethernet12 21,22,23,24 Ethernet8/1 8 +Ethernet16 29,30,31,32 Ethernet9/1 9 +Ethernet20 25,26,27,28 Ethernet10/1 10 +Ethernet24 33,34,35,36 Ethernet11/1 11 +Ethernet28 37,38,39,40 Ethernet12/1 12 +Ethernet32 45,46,47,48 Ethernet13/1 13 +Ethernet36 41,42,43,44 Ethernet14/1 14 +Ethernet40 49,50,51,52 Ethernet15/1 15 +Ethernet44 53,54,55,56 Ethernet16/1 16 +Ethernet48 69,70,71,72 Ethernet17/1 17 +Ethernet52 65,66,67,68 Ethernet18/1 18 +Ethernet56 73,74,75,76 Ethernet19/1 19 +Ethernet60 77,78,79,80 Ethernet20/1 20 +Ethernet64 93,94,95,96 Ethernet21/1 21 +Ethernet68 89,90,91,92 Ethernet22/1 22 +Ethernet72 97,98,99,100 Ethernet23/1 23 +Ethernet76 101,102,103,104 Ethernet24/1 24 +Ethernet80 109,110,111,112 Ethernet25/1 25 +Ethernet84 105,106,107,108 Ethernet26/1 26 +Ethernet88 121,122,123,124 Ethernet27/1 27 +Ethernet92 125,126,127,128 Ethernet28/1 28 +Ethernet96 61,62,63,64 Ethernet29 29 +Ethernet100 57,58,59,60 Ethernet30 30 +Ethernet104 81,82,83,84 Ethernet31 31 +Ethernet108 85,86,87,88 Ethernet32 32 +Ethernet112 117,118,119,120 Ethernet33 33 +Ethernet116 113,114,115,116 Ethernet34 34 +Ethernet120 1,2,3,4 Ethernet35 35 +Ethernet124 5,6,7,8 Ethernet36 36 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/qos.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/qos.json.j2 new file mode 100644 index 00000000000..1accac3ddd0 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/qos.json.j2 @@ -0,0 +1,148 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3" : { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|4" : { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/sai.profile b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/sai.profile new file mode 100644 index 00000000000..9a50433cabd --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G.config.bcm diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/td2-a7050-q31s4-31x40G-4x10G.config.bcm b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/td2-a7050-q31s4-31x40G-4x10G.config.bcm new file mode 100644 index 00000000000..9be3064af25 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/td2-a7050-q31s4-31x40G-4x10G.config.bcm @@ -0,0 +1,676 @@ +arl_clean_timeout_usec=15000000 +bcm_num_cos.0=8 +bcm_stat_flags=1 +bcm_stat_jumbo.0=9236 +cdma_timeout_usec.0=15000000 +dma_desc_timeout_usec.0=15000000 +higig2_hdr_mode.0=1 +ipv6_lpm_128b_enable.0=2 +l2xmsg_mode.0=1 +max_vp_lags.0=0 +mdio_output_delay=0x0d +miim_intr_enable.0=0 +module_64ports.0=0 +os=unix +pbmp_oversubscribe.0=0x1fffffffffffffffffffffffffe +pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe +phy_an_c37_1.0=3 +phy_an_c37_5.0=3 +phy_an_c37_9.0=3 +phy_an_c37_13.0=3 +phy_an_c37_17.0=3 +phy_an_c37_21.0=3 +phy_an_c37_25.0=3 +phy_an_c37_29.0=3 +phy_an_c37_33.0=3 +phy_an_c37_37.0=3 +phy_an_c37_41.0=3 +phy_an_c37_45.0=3 +phy_an_c37_49.0=3 +phy_an_c37_53.0=3 +phy_an_c37_57.0=3 +phy_an_c37_61.0=3 +phy_an_c37_65.0=3 +phy_an_c37_69.0=3 +phy_an_c37_73.0=3 +phy_an_c37_77.0=3 +phy_an_c37_81.0=3 +phy_an_c37_85.0=3 +phy_an_c37_89.0=3 +phy_an_c37_93.0=3 +phy_an_c37_97.0=0 +phy_an_c37_98.0=0 +phy_an_c37_99.0=0 +phy_an_c37_100.0=0 +phy_an_c37_101.0=0 +phy_an_c37_102.0=0 +phy_an_c37_103.0=0 +phy_an_c37_104.0=0 +phy_an_c73_1.0=0 +phy_an_c73_5.0=0 +phy_an_c73_9.0=0 +phy_an_c73_13.0=0 +phy_an_c73_17.0=0 +phy_an_c73_21.0=0 +phy_an_c73_25.0=0 +phy_an_c73_29.0=0 +phy_an_c73_33.0=0 +phy_an_c73_37.0=0 +phy_an_c73_41.0=0 +phy_an_c73_45.0=0 +phy_an_c73_49.0=0 +phy_an_c73_53.0=0 +phy_an_c73_57.0=0 +phy_an_c73_61.0=0 +phy_an_c73_65.0=0 +phy_an_c73_69.0=0 +phy_an_c73_73.0=0 +phy_an_c73_77.0=0 +phy_an_c73_81.0=0 +phy_an_c73_85.0=0 +phy_an_c73_89.0=0 +phy_an_c73_93.0=0 +phy_an_c73_97.0=2 +phy_an_c73_98.0=2 +phy_an_c73_99.0=2 +phy_an_c73_100.0=2 +phy_an_c73_101.0=2 +phy_an_c73_102.0=2 +phy_an_c73_103.0=2 +phy_an_c73_104.0=2 +phy_xaui_rx_polarity_flip_1.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x0 +phy_xaui_rx_polarity_flip_9.0=0x4 +phy_xaui_rx_polarity_flip_13.0=0x0 +phy_xaui_rx_polarity_flip_17.0=0xb +phy_xaui_rx_polarity_flip_21.0=0x3 +phy_xaui_rx_polarity_flip_25.0=0xb +phy_xaui_rx_polarity_flip_29.0=0xf +phy_xaui_rx_polarity_flip_33.0=0xb +phy_xaui_rx_polarity_flip_37.0=0x3 +phy_xaui_rx_polarity_flip_41.0=0xb +phy_xaui_rx_polarity_flip_45.0=0x0 +phy_xaui_rx_polarity_flip_49.0=0x4 +phy_xaui_rx_polarity_flip_53.0=0xc +phy_xaui_rx_polarity_flip_57.0=0x4 +phy_xaui_rx_polarity_flip_61.0=0x0 +phy_xaui_rx_polarity_flip_65.0=0xb +phy_xaui_rx_polarity_flip_69.0=0x3 +phy_xaui_rx_polarity_flip_73.0=0xb +phy_xaui_rx_polarity_flip_77.0=0xf +phy_xaui_rx_polarity_flip_81.0=0xb +phy_xaui_rx_polarity_flip_85.0=0x3 +phy_xaui_rx_polarity_flip_89.0=0x4 +phy_xaui_rx_polarity_flip_93.0=0x0 +phy_xaui_rx_polarity_flip_97.0=0xb +phy_xaui_rx_polarity_flip_98.0=0x3 +phy_xaui_rx_polarity_flip_99.0=0x4 +phy_xaui_rx_polarity_flip_100.0=0x0 +phy_xaui_rx_polarity_flip_101.0=0x0 +phy_xaui_rx_polarity_flip_102.0=0xe +phy_xaui_rx_polarity_flip_103.0=0x0 +phy_xaui_rx_polarity_flip_104.0=0x0 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_5.0=0x0 +phy_xaui_tx_polarity_flip_9.0=0x2 +phy_xaui_tx_polarity_flip_13.0=0x0 +phy_xaui_tx_polarity_flip_17.0=0xd +phy_xaui_tx_polarity_flip_21.0=0xc +phy_xaui_tx_polarity_flip_25.0=0xd +phy_xaui_tx_polarity_flip_29.0=0xf +phy_xaui_tx_polarity_flip_33.0=0xd +phy_xaui_tx_polarity_flip_37.0=0xc +phy_xaui_tx_polarity_flip_41.0=0xd +phy_xaui_tx_polarity_flip_45.0=0x0 +phy_xaui_tx_polarity_flip_49.0=0x2 +phy_xaui_tx_polarity_flip_53.0=0x3 +phy_xaui_tx_polarity_flip_57.0=0x2 +phy_xaui_tx_polarity_flip_61.0=0x0 +phy_xaui_tx_polarity_flip_65.0=0xd +phy_xaui_tx_polarity_flip_69.0=0xc +phy_xaui_tx_polarity_flip_73.0=0xd +phy_xaui_tx_polarity_flip_77.0=0xf +phy_xaui_tx_polarity_flip_81.0=0xd +phy_xaui_tx_polarity_flip_85.0=0xc +phy_xaui_tx_polarity_flip_89.0=0x2 +phy_xaui_tx_polarity_flip_93.0=0x0 +phy_xaui_tx_polarity_flip_97.0=0xd +phy_xaui_tx_polarity_flip_98.0=0xc +phy_xaui_tx_polarity_flip_99.0=0x2 +phy_xaui_tx_polarity_flip_100.0=0x0 +phy_xaui_tx_polarity_flip_101.0=0x0 +phy_xaui_tx_polarity_flip_102.0=0x7 +phy_xaui_tx_polarity_flip_103.0=0x2 +phy_xaui_tx_polarity_flip_104.0=0x0 +port_init_autoneg_1.0=0 +port_init_autoneg_5.0=0 +port_init_autoneg_9.0=0 +port_init_autoneg_13.0=0 +port_init_autoneg_17.0=0 +port_init_autoneg_21.0=0 +port_init_autoneg_25.0=0 +port_init_autoneg_29.0=0 +port_init_autoneg_33.0=0 +port_init_autoneg_37.0=0 +port_init_autoneg_41.0=0 +port_init_autoneg_45.0=0 +port_init_autoneg_49.0=0 +port_init_autoneg_53.0=0 +port_init_autoneg_57.0=0 +port_init_autoneg_61.0=0 +port_init_autoneg_65.0=0 +port_init_autoneg_69.0=0 +port_init_autoneg_73.0=0 +port_init_autoneg_77.0=0 +port_init_autoneg_81.0=0 +port_init_autoneg_85.0=0 +port_init_autoneg_89.0=0 +port_init_autoneg_93.0=0 +port_init_autoneg_97.0=0 +port_init_autoneg_98.0=0 +port_init_autoneg_99.0=0 +port_init_autoneg_100.0=0 +port_init_autoneg_101.0=0 +port_init_autoneg_102.0=0 +port_init_autoneg_103.0=0 +port_init_autoneg_104.0=0 +port_init_cl72.0=0 +portmap_1.0=9:10 +portmap_2.0=10:10 +portmap_3.0=11:10 +portmap_4.0=12:10 +portmap_5.0=13:40 +portmap_9.0=17:40 +portmap_13.0=21:40 +portmap_17.0=29:40 +portmap_21.0=25:40 +portmap_25.0=33:40 +portmap_29.0=37:40 +portmap_33.0=45:40 +portmap_37.0=41:40 +portmap_41.0=49:40 +portmap_45.0=53:40 +portmap_49.0=69:40 +portmap_53.0=65:40 +portmap_57.0=73:40 +portmap_61.0=77:40 +portmap_65.0=93:40 +portmap_69.0=89:40 +portmap_73.0=97:40 +portmap_77.0=101:40 +portmap_81.0=109:40 +portmap_85.0=105:40 +portmap_89.0=121:40 +portmap_93.0=125:40 +portmap_97.0=61:40 +portmap_98.0=57:40 +portmap_99.0=81:40 +portmap_100.0=85:40 +portmap_101.0=117:40 +portmap_102.0=113:40 +portmap_103.0=1:40 +portmap_104.0=5:40 +scache_filename=/tmp/scache +schan_intr_enable=0 +serdes_firmware_mode_1.0=2 +serdes_firmware_mode_5.0=2 +serdes_firmware_mode_9.0=2 +serdes_firmware_mode_13.0=2 +serdes_firmware_mode_17.0=2 +serdes_firmware_mode_21.0=2 +serdes_firmware_mode_25.0=2 +serdes_firmware_mode_29.0=2 +serdes_firmware_mode_33.0=2 +serdes_firmware_mode_37.0=2 +serdes_firmware_mode_41.0=2 +serdes_firmware_mode_45.0=2 +serdes_firmware_mode_49.0=2 +serdes_firmware_mode_53.0=2 +serdes_firmware_mode_57.0=2 +serdes_firmware_mode_61.0=2 +serdes_firmware_mode_65.0=2 +serdes_firmware_mode_69.0=2 +serdes_firmware_mode_73.0=2 +serdes_firmware_mode_77.0=2 +serdes_firmware_mode_81.0=2 +serdes_firmware_mode_85.0=2 +serdes_firmware_mode_89.0=2 +serdes_firmware_mode_93.0=2 +serdes_firmware_mode_97.0=2 +serdes_firmware_mode_98.0=2 +serdes_firmware_mode_99.0=2 +serdes_firmware_mode_100.0=2 +serdes_firmware_mode_101.0=2 +serdes_firmware_mode_102.0=2 +serdes_firmware_mode_103.0=2 +serdes_firmware_mode_104.0=2 +stable_size=0x2000000 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +xgxs_lcpll_xtal_refclk.0=1 +xgxs_rx_lane_map_1.0=0x0123 +xgxs_rx_lane_map_5.0=0x0321 +xgxs_rx_lane_map_9.0=0x1302 +xgxs_rx_lane_map_13.0=0x0213 +xgxs_rx_lane_map_17.0=0x1302 +xgxs_rx_lane_map_21.0=0x1302 +xgxs_rx_lane_map_25.0=0x1302 +xgxs_rx_lane_map_29.0=0x0213 +xgxs_rx_lane_map_33.0=0x1302 +xgxs_rx_lane_map_37.0=0x1302 +xgxs_rx_lane_map_41.0=0x1302 +xgxs_rx_lane_map_45.0=0x0213 +xgxs_rx_lane_map_49.0=0x1302 +xgxs_rx_lane_map_53.0=0x1302 +xgxs_rx_lane_map_57.0=0x1302 +xgxs_rx_lane_map_61.0=0x0213 +xgxs_rx_lane_map_65.0=0x1302 +xgxs_rx_lane_map_69.0=0x1302 +xgxs_rx_lane_map_73.0=0x1302 +xgxs_rx_lane_map_77.0=0x0213 +xgxs_rx_lane_map_81.0=0x1302 +xgxs_rx_lane_map_85.0=0x1302 +xgxs_rx_lane_map_89.0=0x1302 +xgxs_rx_lane_map_93.0=0x0213 +xgxs_rx_lane_map_97.0=0x1302 +xgxs_rx_lane_map_98.0=0x1302 +xgxs_rx_lane_map_99.0=0x1302 +xgxs_rx_lane_map_100.0=0x0213 +xgxs_rx_lane_map_101.0=0x0213 +xgxs_rx_lane_map_102.0=0x1302 +xgxs_rx_lane_map_103.0=0x0123 +xgxs_rx_lane_map_104.0=0x2031 +xgxs_tx_lane_map_1.0=0x3210 +xgxs_tx_lane_map_5.0=0x0321 +xgxs_tx_lane_map_9.0=0x2031 +xgxs_tx_lane_map_13.0=0x0213 +xgxs_tx_lane_map_17.0=0x2031 +xgxs_tx_lane_map_21.0=0x2031 +xgxs_tx_lane_map_25.0=0x2031 +xgxs_tx_lane_map_29.0=0x0213 +xgxs_tx_lane_map_33.0=0x2031 +xgxs_tx_lane_map_37.0=0x2031 +xgxs_tx_lane_map_41.0=0x2031 +xgxs_tx_lane_map_45.0=0x0213 +xgxs_tx_lane_map_49.0=0x2031 +xgxs_tx_lane_map_53.0=0x2031 +xgxs_tx_lane_map_57.0=0x2031 +xgxs_tx_lane_map_61.0=0x0213 +xgxs_tx_lane_map_65.0=0x2031 +xgxs_tx_lane_map_69.0=0x2031 +xgxs_tx_lane_map_73.0=0x2031 +xgxs_tx_lane_map_77.0=0x0213 +xgxs_tx_lane_map_81.0=0x2031 +xgxs_tx_lane_map_85.0=0x2031 +xgxs_tx_lane_map_89.0=0x2031 +xgxs_tx_lane_map_93.0=0x0213 +xgxs_tx_lane_map_97.0=0x2031 +xgxs_tx_lane_map_98.0=0x2031 +xgxs_tx_lane_map_99.0=0x2031 +xgxs_tx_lane_map_100.0=0x0213 +xgxs_tx_lane_map_101.0=0x0213 +xgxs_tx_lane_map_102.0=0x2031 +xgxs_tx_lane_map_103.0=0x3120 +xgxs_tx_lane_map_104.0=0x1302 + +# tuning parameters +serdes_preemphasis_lane0_1.0=0x81f7 +serdes_preemphasis_lane1_1.0=0x81f7 +serdes_preemphasis_lane2_1.0=0x81f7 +serdes_preemphasis_lane3_1.0=0x81f7 +serdes_pre_driver_current_lane0_5.0=0x7 +serdes_driver_current_lane0_5.0=0x7 +serdes_preemphasis_lane0_5.0=0xc2f0 +serdes_pre_driver_current_lane1_5.0=0x7 +serdes_driver_current_lane1_5.0=0x7 +serdes_preemphasis_lane1_5.0=0xc2f0 +serdes_pre_driver_current_lane2_5.0=0x7 +serdes_driver_current_lane2_5.0=0x7 +serdes_preemphasis_lane2_5.0=0xc2f0 +serdes_pre_driver_current_lane3_5.0=0x7 +serdes_driver_current_lane3_5.0=0x7 +serdes_preemphasis_lane3_5.0=0xc2f0 +serdes_pre_driver_current_lane0_9.0=0x7 +serdes_driver_current_lane0_9.0=0x7 +serdes_preemphasis_lane0_9.0=0xbb10 +serdes_pre_driver_current_lane1_9.0=0x7 +serdes_driver_current_lane1_9.0=0x7 +serdes_preemphasis_lane1_9.0=0xbb10 +serdes_pre_driver_current_lane2_9.0=0x7 +serdes_driver_current_lane2_9.0=0x7 +serdes_preemphasis_lane2_9.0=0xbb10 +serdes_pre_driver_current_lane3_9.0=0x7 +serdes_driver_current_lane3_9.0=0x7 +serdes_preemphasis_lane3_9.0=0xbb10 +serdes_pre_driver_current_lane0_13.0=0x7 +serdes_driver_current_lane0_13.0=0x7 +serdes_preemphasis_lane0_13.0=0xbb10 +serdes_pre_driver_current_lane1_13.0=0x7 +serdes_driver_current_lane1_13.0=0x7 +serdes_preemphasis_lane1_13.0=0xbb10 +serdes_pre_driver_current_lane2_13.0=0x7 +serdes_driver_current_lane2_13.0=0x7 +serdes_preemphasis_lane2_13.0=0xbb10 +serdes_pre_driver_current_lane3_13.0=0x7 +serdes_driver_current_lane3_13.0=0x7 +serdes_preemphasis_lane3_13.0=0xbb10 +serdes_pre_driver_current_lane0_17.0=0x6 +serdes_driver_current_lane0_17.0=0x6 +serdes_preemphasis_lane0_17.0=0xb720 +serdes_pre_driver_current_lane1_17.0=0x6 +serdes_driver_current_lane1_17.0=0x6 +serdes_preemphasis_lane1_17.0=0xb720 +serdes_pre_driver_current_lane2_17.0=0x6 +serdes_driver_current_lane2_17.0=0x6 +serdes_preemphasis_lane2_17.0=0xb720 +serdes_pre_driver_current_lane3_17.0=0x6 +serdes_driver_current_lane3_17.0=0x6 +serdes_preemphasis_lane3_17.0=0xb720 +serdes_pre_driver_current_lane0_21.0=0x7 +serdes_driver_current_lane0_21.0=0x7 +serdes_preemphasis_lane0_21.0=0xbb10 +serdes_pre_driver_current_lane1_21.0=0x7 +serdes_driver_current_lane1_21.0=0x7 +serdes_preemphasis_lane1_21.0=0xbb10 +serdes_pre_driver_current_lane2_21.0=0x7 +serdes_driver_current_lane2_21.0=0x7 +serdes_preemphasis_lane2_21.0=0xbb10 +serdes_pre_driver_current_lane3_21.0=0x7 +serdes_driver_current_lane3_21.0=0x7 +serdes_preemphasis_lane3_21.0=0xbb10 +serdes_pre_driver_current_lane0_25.0=0x5 +serdes_driver_current_lane0_25.0=0x5 +serdes_preemphasis_lane0_25.0=0xb720 +serdes_pre_driver_current_lane1_25.0=0x5 +serdes_driver_current_lane1_25.0=0x5 +serdes_preemphasis_lane1_25.0=0xb720 +serdes_pre_driver_current_lane2_25.0=0x5 +serdes_driver_current_lane2_25.0=0x5 +serdes_preemphasis_lane2_25.0=0xb720 +serdes_pre_driver_current_lane3_25.0=0x5 +serdes_driver_current_lane3_25.0=0x5 +serdes_preemphasis_lane3_25.0=0xb720 +serdes_pre_driver_current_lane0_29.0=0x5 +serdes_driver_current_lane0_29.0=0x5 +serdes_preemphasis_lane0_29.0=0xb720 +serdes_pre_driver_current_lane1_29.0=0x5 +serdes_driver_current_lane1_29.0=0x5 +serdes_preemphasis_lane1_29.0=0xb720 +serdes_pre_driver_current_lane2_29.0=0x5 +serdes_driver_current_lane2_29.0=0x5 +serdes_preemphasis_lane2_29.0=0xb720 +serdes_pre_driver_current_lane3_29.0=0x5 +serdes_driver_current_lane3_29.0=0x5 +serdes_preemphasis_lane3_29.0=0xb720 +serdes_pre_driver_current_lane0_33.0=0x4 +serdes_driver_current_lane0_33.0=0x4 +serdes_preemphasis_lane0_33.0=0xb720 +serdes_pre_driver_current_lane1_33.0=0x4 +serdes_driver_current_lane1_33.0=0x4 +serdes_preemphasis_lane1_33.0=0xb720 +serdes_pre_driver_current_lane2_33.0=0x4 +serdes_driver_current_lane2_33.0=0x4 +serdes_preemphasis_lane2_33.0=0xb720 +serdes_pre_driver_current_lane3_33.0=0x4 +serdes_driver_current_lane3_33.0=0x4 +serdes_preemphasis_lane3_33.0=0xb720 +serdes_pre_driver_current_lane0_37.0=0x5 +serdes_driver_current_lane0_37.0=0x5 +serdes_preemphasis_lane0_37.0=0xb720 +serdes_pre_driver_current_lane1_37.0=0x5 +serdes_driver_current_lane1_37.0=0x5 +serdes_preemphasis_lane1_37.0=0xb720 +serdes_pre_driver_current_lane2_37.0=0x5 +serdes_driver_current_lane2_37.0=0x5 +serdes_preemphasis_lane2_37.0=0xb720 +serdes_pre_driver_current_lane3_37.0=0x5 +serdes_driver_current_lane3_37.0=0x5 +serdes_preemphasis_lane3_37.0=0xb720 +serdes_pre_driver_current_lane0_41.0=0x3 +serdes_driver_current_lane0_41.0=0x3 +serdes_preemphasis_lane0_41.0=0xb330 +serdes_pre_driver_current_lane1_41.0=0x3 +serdes_driver_current_lane1_41.0=0x3 +serdes_preemphasis_lane1_41.0=0xb330 +serdes_pre_driver_current_lane2_41.0=0x3 +serdes_driver_current_lane2_41.0=0x3 +serdes_preemphasis_lane2_41.0=0xb330 +serdes_pre_driver_current_lane3_41.0=0x3 +serdes_driver_current_lane3_41.0=0x3 +serdes_preemphasis_lane3_41.0=0xb330 +serdes_pre_driver_current_lane0_45.0=0x4 +serdes_driver_current_lane0_45.0=0x4 +serdes_preemphasis_lane0_45.0=0xb720 +serdes_pre_driver_current_lane1_45.0=0x4 +serdes_driver_current_lane1_45.0=0x4 +serdes_preemphasis_lane1_45.0=0xb720 +serdes_pre_driver_current_lane2_45.0=0x4 +serdes_driver_current_lane2_45.0=0x4 +serdes_preemphasis_lane2_45.0=0xb720 +serdes_pre_driver_current_lane3_45.0=0x4 +serdes_driver_current_lane3_45.0=0x4 +serdes_preemphasis_lane3_45.0=0xb720 +serdes_pre_driver_current_lane0_49.0=0x3 +serdes_driver_current_lane0_49.0=0x3 +serdes_preemphasis_lane0_49.0=0xb330 +serdes_pre_driver_current_lane1_49.0=0x3 +serdes_driver_current_lane1_49.0=0x3 +serdes_preemphasis_lane1_49.0=0xb330 +serdes_pre_driver_current_lane2_49.0=0x3 +serdes_driver_current_lane2_49.0=0x3 +serdes_preemphasis_lane2_49.0=0xb330 +serdes_pre_driver_current_lane3_49.0=0x3 +serdes_driver_current_lane3_49.0=0x3 +serdes_preemphasis_lane3_49.0=0xb330 +serdes_pre_driver_current_lane0_53.0=0x4 +serdes_driver_current_lane0_53.0=0x4 +serdes_preemphasis_lane0_53.0=0xb720 +serdes_pre_driver_current_lane1_53.0=0x4 +serdes_driver_current_lane1_53.0=0x4 +serdes_preemphasis_lane1_53.0=0xb720 +serdes_pre_driver_current_lane2_53.0=0x4 +serdes_driver_current_lane2_53.0=0x4 +serdes_preemphasis_lane2_53.0=0xb720 +serdes_pre_driver_current_lane3_53.0=0x4 +serdes_driver_current_lane3_53.0=0x4 +serdes_preemphasis_lane3_53.0=0xb720 +serdes_pre_driver_current_lane0_57.0=0x3 +serdes_driver_current_lane0_57.0=0x3 +serdes_preemphasis_lane0_57.0=0xb330 +serdes_pre_driver_current_lane1_57.0=0x3 +serdes_driver_current_lane1_57.0=0x3 +serdes_preemphasis_lane1_57.0=0xb330 +serdes_pre_driver_current_lane2_57.0=0x3 +serdes_driver_current_lane2_57.0=0x3 +serdes_preemphasis_lane2_57.0=0xb330 +serdes_pre_driver_current_lane3_57.0=0x3 +serdes_driver_current_lane3_57.0=0x3 +serdes_preemphasis_lane3_57.0=0xb330 +serdes_pre_driver_current_lane0_61.0=0x4 +serdes_driver_current_lane0_61.0=0x4 +serdes_preemphasis_lane0_61.0=0xb720 +serdes_pre_driver_current_lane1_61.0=0x4 +serdes_driver_current_lane1_61.0=0x4 +serdes_preemphasis_lane1_61.0=0xb720 +serdes_pre_driver_current_lane2_61.0=0x4 +serdes_driver_current_lane2_61.0=0x4 +serdes_preemphasis_lane2_61.0=0xb720 +serdes_pre_driver_current_lane3_61.0=0x4 +serdes_driver_current_lane3_61.0=0x4 +serdes_preemphasis_lane3_61.0=0xb720 +serdes_pre_driver_current_lane0_65.0=0x4 +serdes_driver_current_lane0_65.0=0x4 +serdes_preemphasis_lane0_65.0=0xb720 +serdes_pre_driver_current_lane1_65.0=0x4 +serdes_driver_current_lane1_65.0=0x4 +serdes_preemphasis_lane1_65.0=0xb720 +serdes_pre_driver_current_lane2_65.0=0x4 +serdes_driver_current_lane2_65.0=0x4 +serdes_preemphasis_lane2_65.0=0xb720 +serdes_pre_driver_current_lane3_65.0=0x4 +serdes_driver_current_lane3_65.0=0x4 +serdes_preemphasis_lane3_65.0=0xb720 +serdes_pre_driver_current_lane0_69.0=0x4 +serdes_driver_current_lane0_69.0=0x4 +serdes_preemphasis_lane0_69.0=0xb720 +serdes_pre_driver_current_lane1_69.0=0x4 +serdes_driver_current_lane1_69.0=0x4 +serdes_preemphasis_lane1_69.0=0xb720 +serdes_pre_driver_current_lane2_69.0=0x4 +serdes_driver_current_lane2_69.0=0x4 +serdes_preemphasis_lane2_69.0=0xb720 +serdes_pre_driver_current_lane3_69.0=0x4 +serdes_driver_current_lane3_69.0=0x4 +serdes_preemphasis_lane3_69.0=0xb720 +serdes_pre_driver_current_lane0_73.0=0x4 +serdes_driver_current_lane0_73.0=0x4 +serdes_preemphasis_lane0_73.0=0xb720 +serdes_pre_driver_current_lane1_73.0=0x4 +serdes_driver_current_lane1_73.0=0x4 +serdes_preemphasis_lane1_73.0=0xb720 +serdes_pre_driver_current_lane2_73.0=0x4 +serdes_driver_current_lane2_73.0=0x4 +serdes_preemphasis_lane2_73.0=0xb720 +serdes_pre_driver_current_lane3_73.0=0x4 +serdes_driver_current_lane3_73.0=0x4 +serdes_preemphasis_lane3_73.0=0xb720 +serdes_pre_driver_current_lane0_77.0=0x5 +serdes_driver_current_lane0_77.0=0x5 +serdes_preemphasis_lane0_77.0=0xb720 +serdes_pre_driver_current_lane1_77.0=0x5 +serdes_driver_current_lane1_77.0=0x5 +serdes_preemphasis_lane1_77.0=0xb720 +serdes_pre_driver_current_lane2_77.0=0x5 +serdes_driver_current_lane2_77.0=0x5 +serdes_preemphasis_lane2_77.0=0xb720 +serdes_pre_driver_current_lane3_77.0=0x5 +serdes_driver_current_lane3_77.0=0x5 +serdes_preemphasis_lane3_77.0=0xb720 +serdes_pre_driver_current_lane0_81.0=0x5 +serdes_driver_current_lane0_81.0=0x5 +serdes_preemphasis_lane0_81.0=0xb720 +serdes_pre_driver_current_lane1_81.0=0x5 +serdes_driver_current_lane1_81.0=0x5 +serdes_preemphasis_lane1_81.0=0xb720 +serdes_pre_driver_current_lane2_81.0=0x5 +serdes_driver_current_lane2_81.0=0x5 +serdes_preemphasis_lane2_81.0=0xb720 +serdes_pre_driver_current_lane3_81.0=0x5 +serdes_driver_current_lane3_81.0=0x5 +serdes_preemphasis_lane3_81.0=0xb720 +serdes_pre_driver_current_lane0_85.0=0x5 +serdes_driver_current_lane0_85.0=0x5 +serdes_preemphasis_lane0_85.0=0xb720 +serdes_pre_driver_current_lane1_85.0=0x5 +serdes_driver_current_lane1_85.0=0x5 +serdes_preemphasis_lane1_85.0=0xb720 +serdes_pre_driver_current_lane2_85.0=0x5 +serdes_driver_current_lane2_85.0=0x5 +serdes_preemphasis_lane2_85.0=0xb720 +serdes_pre_driver_current_lane3_85.0=0x5 +serdes_driver_current_lane3_85.0=0x5 +serdes_preemphasis_lane3_85.0=0xb720 +serdes_pre_driver_current_lane0_89.0=0x6 +serdes_driver_current_lane0_89.0=0x6 +serdes_preemphasis_lane0_89.0=0xb720 +serdes_pre_driver_current_lane1_89.0=0x6 +serdes_driver_current_lane1_89.0=0x6 +serdes_preemphasis_lane1_89.0=0xb720 +serdes_pre_driver_current_lane2_89.0=0x6 +serdes_driver_current_lane2_89.0=0x6 +serdes_preemphasis_lane2_89.0=0xb720 +serdes_pre_driver_current_lane3_89.0=0x6 +serdes_driver_current_lane3_89.0=0x6 +serdes_preemphasis_lane3_89.0=0xb720 +serdes_pre_driver_current_lane0_93.0=0x7 +serdes_driver_current_lane0_93.0=0x7 +serdes_preemphasis_lane0_93.0=0xbb10 +serdes_pre_driver_current_lane1_93.0=0x7 +serdes_driver_current_lane1_93.0=0x7 +serdes_preemphasis_lane1_93.0=0xbb10 +serdes_pre_driver_current_lane2_93.0=0x7 +serdes_driver_current_lane2_93.0=0x7 +serdes_preemphasis_lane2_93.0=0xbb10 +serdes_pre_driver_current_lane3_93.0=0x7 +serdes_driver_current_lane3_93.0=0x7 +serdes_preemphasis_lane3_93.0=0xbb10 +serdes_pre_driver_current_lane0_97.0=0x5 +serdes_driver_current_lane0_97.0=0x5 +serdes_preemphasis_lane0_97.0=0xb720 +serdes_pre_driver_current_lane1_97.0=0x5 +serdes_driver_current_lane1_97.0=0x5 +serdes_preemphasis_lane1_97.0=0xb720 +serdes_pre_driver_current_lane2_97.0=0x5 +serdes_driver_current_lane2_97.0=0x5 +serdes_preemphasis_lane2_97.0=0xb720 +serdes_pre_driver_current_lane3_97.0=0x5 +serdes_driver_current_lane3_97.0=0x5 +serdes_preemphasis_lane3_97.0=0xb720 +serdes_pre_driver_current_lane0_98.0=0x6 +serdes_driver_current_lane0_98.0=0x6 +serdes_preemphasis_lane0_98.0=0xb720 +serdes_pre_driver_current_lane1_98.0=0x6 +serdes_driver_current_lane1_98.0=0x6 +serdes_preemphasis_lane1_98.0=0xb720 +serdes_pre_driver_current_lane2_98.0=0x6 +serdes_driver_current_lane2_98.0=0x6 +serdes_preemphasis_lane2_98.0=0xb720 +serdes_pre_driver_current_lane3_98.0=0x6 +serdes_driver_current_lane3_98.0=0x6 +serdes_preemphasis_lane3_98.0=0xb720 +serdes_pre_driver_current_lane0_99.0=0x5 +serdes_driver_current_lane0_99.0=0x5 +serdes_preemphasis_lane0_99.0=0xb720 +serdes_pre_driver_current_lane1_99.0=0x5 +serdes_driver_current_lane1_99.0=0x5 +serdes_preemphasis_lane1_99.0=0xb720 +serdes_pre_driver_current_lane2_99.0=0x5 +serdes_driver_current_lane2_99.0=0x5 +serdes_preemphasis_lane2_99.0=0xb720 +serdes_pre_driver_current_lane3_99.0=0x5 +serdes_driver_current_lane3_99.0=0x5 +serdes_preemphasis_lane3_99.0=0xb720 +serdes_pre_driver_current_lane0_100.0=0x7 +serdes_driver_current_lane0_100.0=0x7 +serdes_preemphasis_lane0_100.0=0xbb10 +serdes_pre_driver_current_lane1_100.0=0x7 +serdes_driver_current_lane1_100.0=0x7 +serdes_preemphasis_lane1_100.0=0xbb10 +serdes_pre_driver_current_lane2_100.0=0x7 +serdes_driver_current_lane2_100.0=0x7 +serdes_preemphasis_lane2_100.0=0xbb10 +serdes_pre_driver_current_lane3_100.0=0x7 +serdes_driver_current_lane3_100.0=0x7 +serdes_preemphasis_lane3_100.0=0xbb10 +serdes_pre_driver_current_lane0_101.0=0x7 +serdes_driver_current_lane0_101.0=0x7 +serdes_preemphasis_lane0_101.0=0xbb10 +serdes_pre_driver_current_lane1_101.0=0x7 +serdes_driver_current_lane1_101.0=0x7 +serdes_preemphasis_lane1_101.0=0xbb10 +serdes_pre_driver_current_lane2_101.0=0x7 +serdes_driver_current_lane2_101.0=0x7 +serdes_preemphasis_lane2_101.0=0xbb10 +serdes_pre_driver_current_lane3_101.0=0x7 +serdes_driver_current_lane3_101.0=0x7 +serdes_preemphasis_lane3_101.0=0xbb10 +serdes_pre_driver_current_lane0_102.0=0x7 +serdes_driver_current_lane0_102.0=0x7 +serdes_preemphasis_lane0_102.0=0xbb10 +serdes_pre_driver_current_lane1_102.0=0x7 +serdes_driver_current_lane1_102.0=0x7 +serdes_preemphasis_lane1_102.0=0xbb10 +serdes_pre_driver_current_lane2_102.0=0x7 +serdes_driver_current_lane2_102.0=0x7 +serdes_preemphasis_lane2_102.0=0xbb10 +serdes_pre_driver_current_lane3_102.0=0x7 +serdes_driver_current_lane3_102.0=0x7 +serdes_preemphasis_lane3_102.0=0xbb10 +serdes_preemphasis_lane0_103.0=0x81f4 +serdes_preemphasis_lane1_103.0=0x81f4 +serdes_preemphasis_lane2_103.0=0x81f4 +serdes_preemphasis_lane3_103.0=0x81f4 +serdes_preemphasis_lane0_104.0=0x81f5 +serdes_preemphasis_lane1_104.0=0x81f5 +serdes_preemphasis_lane2_104.0=0x81f5 +serdes_preemphasis_lane3_104.0=0x81f5 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init new file mode 100644 index 00000000000..49639a74343 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init @@ -0,0 +1 @@ +echo 0 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux From 542b4332c85816b84c35f154e1ae7c97e1164285 Mon Sep 17 00:00:00 2001 From: Ying Xie Date: Mon, 24 Sep 2018 14:56:37 -0700 Subject: [PATCH 44/57] [hwsku-init] Introduce mechanism to run HWSKU specific initialization code (#2072) When there is HWSKU specific initialization needs to be performed, please add hwsku-init script under device folder, it will be invoked by swss before any subsequent initializations. Signed-off-by: Ying Xie --- dockers/docker-orchagent/start.sh | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/dockers/docker-orchagent/start.sh b/dockers/docker-orchagent/start.sh index a0d4ad646b2..cf78850451a 100755 --- a/dockers/docker-orchagent/start.sh +++ b/dockers/docker-orchagent/start.sh @@ -6,6 +6,11 @@ sonic-cfggen -d -t /usr/share/sonic/templates/switch.json.j2 > /etc/swss/config. sonic-cfggen -d -t /usr/share/sonic/templates/ipinip.json.j2 > /etc/swss/config.d/ipinip.json sonic-cfggen -d -t /usr/share/sonic/templates/ports.json.j2 > /etc/swss/config.d/ports.json +# Executed HWSKU specific initialization tasks. +if [ -x /usr/share/sonic/hwsku/hwsku-init ]; then + /usr/share/sonic/hwsku/hwsku-init +fi + export platform=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` rm -f /var/run/rsyslogd.pid From 22f631ad135be161d47388a632bf5c793e49c686 Mon Sep 17 00:00:00 2001 From: stepanblyschak <38952541+stepanblyschak@users.noreply.github.com> Date: Tue, 25 Sep 2018 21:05:45 +0300 Subject: [PATCH 45/57] [mellanox] SAI pointer update (#2079) Signed-off-by: Stepan Blyschak --- platform/mellanox/mlnx-sai.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk index 1689b43d577..cdd76035703 100644 --- a/platform/mellanox/mlnx-sai.mk +++ b/platform/mellanox/mlnx-sai.mk @@ -1,7 +1,7 @@ # Mellanox SAI MLNX_SAI_VERSION = SAIRel1.12.3-master -MLNX_SAI_REVISION = 71ae8c6d386f57a89742fc3261775b338bfc9c25 +MLNX_SAI_REVISION = 9b27abc4d69e86c39202d6d2f5e794aeb2974ba0 export MLNX_SAI_VERSION MLNX_SAI_REVISION From 0ed2ac36de006eb1b25735aa97a9301c4a394e4f Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Tue, 25 Sep 2018 15:58:35 -0700 Subject: [PATCH 46/57] [utilities] Update sonic-utilities submodule (#2082) Signed-off-by: Samuel Angebault --- src/sonic-utilities | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-utilities b/src/sonic-utilities index c14d917ec8e..f78bba447a1 160000 --- a/src/sonic-utilities +++ b/src/sonic-utilities @@ -1 +1 @@ -Subproject commit c14d917ec8e45983bedef82460ea1903a595b19f +Subproject commit f78bba447a1aabac0d97801455bf144e9f4f1ece From 763982b70eab3d416adbf82882bd0891b504ba49 Mon Sep 17 00:00:00 2001 From: paavaanan Date: Wed, 26 Sep 2018 11:44:09 +0530 Subject: [PATCH 47/57] [devices]: Dell-S6100/Z9100 depmod fixes (#2071) --- .../debian/platform-modules-s6100.install | 2 +- .../debian/platform-modules-s6100.postinst | 4 ++++ .../debian/platform-modules-z9100.install | 2 +- .../debian/platform-modules-z9100.postinst | 6 ++++++ 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install index 2e57c0a045e..7d56aee6e2f 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install @@ -6,4 +6,4 @@ common/fstrim.timer etc/systemd/system common/fstrim.service etc/systemd/system s6100/scripts/platform_sensors.py usr/local/bin s6100/scripts/sensors usr/bin -s6100/systemd/platform-modules-s6100.service etc/systemd/system/multi-user.target.wants +s6100/systemd/platform-modules-s6100.service etc/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst index aeabe1abd27..1c220633451 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst @@ -4,4 +4,8 @@ systemctl enable fstrim.timer systemctl start fstrim.timer +# Enable Dell-S6100-platform-service +depmod -a +systemctl enable platform-modules-s6100.service +systemctl start platform-modules-s6100.service #DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install index 8425d8fc7a0..410dcf16ea1 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install @@ -6,4 +6,4 @@ common/fstrim.service etc/systemd/system z9100/scripts/platform_sensors.py usr/local/bin z9100/scripts/sensors usr/bin z9100/cfg/z9100-modules.conf etc/modules-load.d -z9100/systemd/platform-modules-z9100.service etc/systemd/system/multi-user.target.wants +z9100/systemd/platform-modules-z9100.service etc/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst index b11ae1f274c..61039dcd70d 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst @@ -4,4 +4,10 @@ systemctl enable fstrim.timer systemctl start fstrim.timer +# Enable Dell-Z9100-platform-service +depmod -a +systemctl enable platform-modules-z9100.service +systemctl start platform-modules-z9100.service + + #DEBHELPER# From d629f7599dc92b9eef3199f2bd2de2680162e20d Mon Sep 17 00:00:00 2001 From: "Kevin(Shengkai) Wang" Date: Thu, 27 Sep 2018 11:22:41 +0800 Subject: [PATCH 48/57] [kernel]: update sonic linux kernel submodule (#2084) * 90c4cdb 2018-09-22 | Fix a mlnx hardware-management issue (#61) Signed-off-by: Kevin Wang --- src/sonic-linux-kernel | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index a910776f051..90c4cdb3be1 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit a910776f051945689daa02c0e476576df560491a +Subproject commit 90c4cdb3be1a70be21abbaa92e15c01cd24164af From cfcaee978d548187feb53ecd37aed881484d11a5 Mon Sep 17 00:00:00 2001 From: Shuotian Cheng Date: Wed, 26 Sep 2018 23:08:02 -0700 Subject: [PATCH 49/57] [swss]: Update sonic-swss-common submodule (#2087) [schema]: Define STATE_VRF_TABLE_NAME (#234) Signed-off-by: Shu0T1an ChenG --- src/sonic-swss-common | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-swss-common b/src/sonic-swss-common index c6c9a9b3ea7..ca1f2931932 160000 --- a/src/sonic-swss-common +++ b/src/sonic-swss-common @@ -1 +1 @@ -Subproject commit c6c9a9b3ea7bd1d0db9ddb9d5efadff6caa2a9e6 +Subproject commit ca1f293193213f50dac2ccc268182efaf2f6687c From 794885eef9ef299ea59b450ef0e0ad346906d55a Mon Sep 17 00:00:00 2001 From: Qi Luo Date: Wed, 26 Sep 2018 23:08:20 -0700 Subject: [PATCH 50/57] Update submodule: sonic-py-swsssdk (#2088) Signed-off-by: Qi Luo --- src/sonic-py-swsssdk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-py-swsssdk b/src/sonic-py-swsssdk index 9d36ad3b4d0..d67519c4a3a 160000 --- a/src/sonic-py-swsssdk +++ b/src/sonic-py-swsssdk @@ -1 +1 @@ -Subproject commit 9d36ad3b4d0850429a021d79b12ffcc194642d96 +Subproject commit d67519c4a3affb94da858f8fe96c37045d0d7e92 From 66e0d6bcc07e1688e1b32a38d4a2d276c7777553 Mon Sep 17 00:00:00 2001 From: stepanblyschak <38952541+stepanblyschak@users.noreply.github.com> Date: Thu, 27 Sep 2018 09:27:52 +0300 Subject: [PATCH 51/57] [sonic-device-data] Fix config symlinks dereference (#2085) ('cp -H' -> 'cp -L') '-L' does what we need in this case From man cp ... -H follow command-line symbolic links in SOURCE ... -L, --dereference always follow symbolic links in SOURCE Signed-off-by: Stepan Blyschak --- src/sonic-device-data/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-device-data/Makefile b/src/sonic-device-data/Makefile index 911c8641a68..b258db96072 100644 --- a/src/sonic-device-data/Makefile +++ b/src/sonic-device-data/Makefile @@ -12,7 +12,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : # Create a new dir and copy all ONIE-platform-string-named dirs into it mkdir ./device - cp -r -H ../../../device/*/* ./device/ + cp -r -L ../../../device/*/* ./device/ # Build the package dpkg-buildpackage -rfakeroot -b -us -uc From 11ac4fe76ed5b78e1a8528e8bb2afd04212ad267 Mon Sep 17 00:00:00 2001 From: Ying Xie Date: Thu, 27 Sep 2018 01:11:18 -0700 Subject: [PATCH 52/57] [7050] Rename HWSKU Arista-7050-Q31S4 to Arista-7050QX-32S-S4Q31 (#2090) Signed-off-by: Ying Xie --- .../buffers.json.j2 | 0 .../buffers_defaults_t1.j2 | 0 .../{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/hwsku-init | 0 .../pg_profile_lookup.ini | 0 .../port_config.ini | 0 .../{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/qos.json.j2 | 0 .../{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/sai.profile | 0 .../td2-a7050-q31s4-31x40G-4x10G.config.bcm | 0 8 files changed, 0 insertions(+), 0 deletions(-) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/buffers.json.j2 (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/buffers_defaults_t1.j2 (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/hwsku-init (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/pg_profile_lookup.ini (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/port_config.ini (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/qos.json.j2 (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/sai.profile (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-Q31S4 => Arista-7050QX-32S-S4Q31}/td2-a7050-q31s4-31x40G-4x10G.config.bcm (100%) diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers.json.j2 similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers.json.j2 rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers.json.j2 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t1.j2 similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/buffers_defaults_t1.j2 rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t1.j2 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/hwsku-init rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/pg_profile_lookup.ini similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/pg_profile_lookup.ini rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/pg_profile_lookup.ini diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/port_config.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/port_config.ini rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/qos.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/qos.json.j2 similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/qos.json.j2 rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/qos.json.j2 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/sai.profile b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/sai.profile similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/sai.profile rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/sai.profile diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/td2-a7050-q31s4-31x40G-4x10G.config.bcm b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/td2-a7050-q31s4-31x40G-4x10G.config.bcm similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-Q31S4/td2-a7050-q31s4-31x40G-4x10G.config.bcm rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/td2-a7050-q31s4-31x40G-4x10G.config.bcm From 1c7d50748e50f3f281a614527b2d90606341e5dc Mon Sep 17 00:00:00 2001 From: Qi Luo Date: Thu, 27 Sep 2018 16:08:23 -0700 Subject: [PATCH 53/57] Update submodule: sonic-snmpagent (#2093) Signed-off-by: Qi Luo --- src/sonic-snmpagent | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index b7d915e2679..8a628a52755 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit b7d915e2679c731bb47cb1fb2889bad76e6fe110 +Subproject commit 8a628a5275582123ce43e50ae4b7348790f1d2ef From f57dae054ef1e4e376223d24eaa43c3958cac1b7 Mon Sep 17 00:00:00 2001 From: Taoyu Li Date: Thu, 27 Sep 2018 21:52:35 -0700 Subject: [PATCH 54/57] Update dbsyncd submodule (#2094) --- src/sonic-dbsyncd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd index eeb678cb44a..1cdcffc08f6 160000 --- a/src/sonic-dbsyncd +++ b/src/sonic-dbsyncd @@ -1 +1 @@ -Subproject commit eeb678cb44a37c15bd3250dc64d932c3ea33ac26 +Subproject commit 1cdcffc08f6ea1c3fc53f7aeeef5b5632124496f From bd96e097a9c8750eed599d1e0adec3bff6b029da Mon Sep 17 00:00:00 2001 From: Ying Xie Date: Fri, 28 Sep 2018 14:16:45 -0700 Subject: [PATCH 55/57] [7050] device specific hwsku-init file needs execution privilege (#2101) Signed-off-by: Ying Xie --- .../arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init | 0 .../x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init | 0 2 files changed, 0 insertions(+), 0 deletions(-) mode change 100644 => 100755 device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init mode change 100644 => 100755 device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init old mode 100644 new mode 100755 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init old mode 100644 new mode 100755 From e72d63cf927b36d875009936635d8e9733a42e9d Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Fri, 28 Sep 2018 21:27:41 -0700 Subject: [PATCH 56/57] [arista] Update Arista drivers submodule (#2097) * [arista] Update Arista drivers submodule * Fix 7050qx32 fancontrol for kernel 4.9 * Fix 7060cx32s fancontrol for kernel 4.9 * Install python3-yaml for sonic config tests * Fix 7260cx3 fancontrol for kernel 4.9 * Fix hwsku-init scripts and permissions * Preserve old_config folder in boot0 --- .../arista/x86_64-arista_7050_qx32/fancontrol | 2 +- .../Arista-7050-QX-32S/hwsku-init | 2 ++ .../Arista-7050QX-32S-S4Q31/hwsku-init | 2 ++ .../arista/x86_64-arista_7060_cx32s/fancontrol | 18 +++++++++--------- .../arista/x86_64-arista_7260cx3_64/fancontrol | 18 +++++++++--------- files/Aboot/boot0.j2 | 1 + .../barefoot/sonic-platform-modules-arista | 2 +- .../broadcom/sonic-platform-modules-arista | 2 +- sonic-slave-stretch/Dockerfile | 1 + 9 files changed, 27 insertions(+), 21 deletions(-) diff --git a/device/arista/x86_64-arista_7050_qx32/fancontrol b/device/arista/x86_64-arista_7050_qx32/fancontrol index 02bf4d76dbe..1d94fcf7674 100644 --- a/device/arista/x86_64-arista_7050_qx32/fancontrol +++ b/device/arista/x86_64-arista_7050_qx32/fancontrol @@ -1,5 +1,5 @@ INTERVAL=5 -DEVPATH=hwmon1=devices/platform/sb800-fans hwmon2=devices/pci0000:00/0000:00:09.0/0000:04:00.0/i2c-2/2-004c +DEVPATH=hwmon1=devices/platform/sb800-fans hwmon2=devices/pci0000:00/0000:00:09.0/0000:04:00.0/i2c-5/5-004c DEVNAME=hwmon1=fans hwmon2=max6658 FCTEMPS=hwmon1/pwm4=hwmon2/temp1_input hwmon1/pwm3=hwmon2/temp1_input hwmon1/pwm2=hwmon2/temp1_input hwmon1/pwm1=hwmon2/temp1_input FCFANS=hwmon1/pwm4=hwmon1/fan4_input hwmon1/pwm3=hwmon1/fan3_input hwmon1/pwm2=hwmon1/fan2_input hwmon1/pwm1=hwmon1/fan1_input diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init index 49639a74343..415bca98422 100755 --- a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init @@ -1 +1,3 @@ +#!/bin/bash + echo 0 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init index c005241e4b6..ffc913582aa 100755 --- a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init @@ -1 +1,3 @@ +#!/bin/bash + echo 1 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux diff --git a/device/arista/x86_64-arista_7060_cx32s/fancontrol b/device/arista/x86_64-arista_7060_cx32s/fancontrol index e69f9d75acd..43f885a9f24 100644 --- a/device/arista/x86_64-arista_7060_cx32s/fancontrol +++ b/device/arista/x86_64-arista_7060_cx32s/fancontrol @@ -1,10 +1,10 @@ INTERVAL=5 -DEVPATH=hwmon1=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-2/2-001a hwmon3=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-3/3-0060 -DEVNAME=hwmon1=max6697 hwmon3=crow_cpld -FCTEMPS=hwmon3/pwm4=hwmon1/temp1_input hwmon3/pwm3=hwmon1/temp1_input hwmon3/pwm2=hwmon1/temp1_input hwmon3/pwm1=hwmon1/temp1_input -FCFANS=hwmon3/pwm4=hwmon3/fan4_input hwmon3/pwm3=hwmon3/fan3_input hwmon3/pwm2=hwmon3/fan2_input hwmon3/pwm1=hwmon3/fan1_input -MINTEMP=hwmon3/pwm4=40 hwmon3/pwm3=40 hwmon3/pwm2=40 hwmon3/pwm1=40 -MINPWM=hwmon3/pwm4=179 hwmon3/pwm3=179 hwmon3/pwm2=179 hwmon3/pwm1=179 -MAXTEMP=hwmon3/pwm4=50 hwmon3/pwm3=50 hwmon3/pwm2=50 hwmon3/pwm1=50 -MINSTART=hwmon3/pwm4=179 hwmon3/pwm3=179 hwmon3/pwm2=179 hwmon3/pwm1=179 -MINSTOP=hwmon3/pwm4=179 hwmon3/pwm3=179 hwmon3/pwm2=179 hwmon3/pwm1=179 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-2/2-001a hwmon4=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-3/3-0060 +DEVNAME=hwmon2=max6697 hwmon4=crow_cpld +FCTEMPS=hwmon4/pwm4=hwmon2/temp1_input hwmon4/pwm3=hwmon2/temp1_input hwmon4/pwm2=hwmon2/temp1_input hwmon4/pwm1=hwmon2/temp1_input +FCFANS=hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm4=40 hwmon4/pwm3=40 hwmon4/pwm2=40 hwmon4/pwm1=40 +MINPWM=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 +MAXTEMP=hwmon4/pwm4=50 hwmon4/pwm3=50 hwmon4/pwm2=50 hwmon4/pwm1=50 +MINSTART=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 +MINSTOP=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 diff --git a/device/arista/x86_64-arista_7260cx3_64/fancontrol b/device/arista/x86_64-arista_7260cx3_64/fancontrol index c78f598ff11..2397d6d700c 100644 --- a/device/arista/x86_64-arista_7260cx3_64/fancontrol +++ b/device/arista/x86_64-arista_7260cx3_64/fancontrol @@ -1,10 +1,10 @@ INTERVAL=5 -DEVPATH=hwmon1=devices/pci0000:00/0000:00:1c.0/0000:06:00.0/i2c-1/1-004c hwmon3=devices/pci0000:ff/0000:ff:0b.3/i2c-85/85-0060 -DEVNAME=hwmon1=max6658 hwmon3=rook_cpld -FCTEMPS=hwmon3/pwm4=hwmon1/temp1_input hwmon3/pwm3=hwmon1/temp1_input hwmon3/pwm2=hwmon1/temp1_input hwmon3/pwm1=hwmon1/temp1_input -FCFANS=hwmon3/pwm4=hwmon3/fan4_input hwmon3/pwm3=hwmon3/fan3_input hwmon3/pwm2=hwmon3/fan2_input hwmon3/pwm1=hwmon3/fan1_input -MINTEMP=hwmon3/pwm4=50 hwmon3/pwm3=50 hwmon3/pwm2=50 hwmon3/pwm1=50 -MINPWM=hwmon3/pwm4=128 hwmon3/pwm3=128 hwmon3/pwm2=128 hwmon3/pwm1=128 -MAXTEMP=hwmon3/pwm4=60 hwmon3/pwm3=60 hwmon3/pwm2=60 hwmon3/pwm1=60 -MINSTART=hwmon3/pwm4=128 hwmon3/pwm3=128 hwmon3/pwm2=128 hwmon3/pwm1=128 -MINSTOP=hwmon3/pwm4=128 hwmon3/pwm3=128 hwmon3/pwm2=128 hwmon3/pwm1=128 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:1c.0/0000:06:00.0/i2c-1/1-004c hwmon4=devices/pci0000:ff/0000:ff:0b.3/i2c-85/85-0060 +DEVNAME=hwmon2=max6658 hwmon4=rook_cpld +FCTEMPS=hwmon4/pwm4=hwmon2/temp1_input hwmon4/pwm3=hwmon2/temp1_input hwmon4/pwm2=hwmon2/temp1_input hwmon4/pwm1=hwmon2/temp1_input +FCFANS=hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm4=50 hwmon4/pwm3=50 hwmon4/pwm2=50 hwmon4/pwm1=50 +MINPWM=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MAXTEMP=hwmon4/pwm4=60 hwmon4/pwm3=60 hwmon4/pwm2=60 hwmon4/pwm1=60 +MINSTART=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MINSTOP=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2 index b1f29ac8954..a476f5c27e9 100644 --- a/files/Aboot/boot0.j2 +++ b/files/Aboot/boot0.j2 @@ -81,6 +81,7 @@ clean_flash() { [ $f != "boot-config" ] && [ $f != "$kernel_params" ] && [ $f != "$cmdline_base" ] && + [ $f != "old_config" ] && [ $f != "minigraph.xml" ] then rm -rf "$target_path/$f" diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index f705fe15585..ead22a71435 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit f705fe155859084d7df916e580659394e1516f6c +Subproject commit ead22a71435b93058baef48f6ab3f5f057361366 diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index f705fe15585..ead22a71435 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit f705fe155859084d7df916e580659394e1516f6c +Subproject commit ead22a71435b93058baef48f6ab3f5f057361366 diff --git a/sonic-slave-stretch/Dockerfile b/sonic-slave-stretch/Dockerfile index d34cfda71c0..eeac24ae847 100644 --- a/sonic-slave-stretch/Dockerfile +++ b/sonic-slave-stretch/Dockerfile @@ -193,6 +193,7 @@ RUN apt-get update && apt-get install -y \ python-netaddr \ python-ipaddr \ python-yaml \ + python3-yaml \ # For lockfile procmail \ # For gtest From 034f472f46d04898c64ec850edd08113af50820e Mon Sep 17 00:00:00 2001 From: Taoyu Li Date: Fri, 28 Sep 2018 22:56:40 -0700 Subject: [PATCH 57/57] [minigraph parser] add basic support for MGMT_PORT (#2103) * [minigraph parser] add basic support for MGMT_PORT * Change method to determine local interface name --- src/sonic-config-engine/minigraph.py | 15 ++++++++++++++- src/sonic-config-engine/tests/test_cfggen.py | 5 +++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index a978f5906eb..a72eed754b8 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -472,7 +472,20 @@ def parse_xml(filename, platform=None, port_config_file=None): if mgmt_routes: # TODO: differentiate v4 and v6 mgmt_intf.itervalues().next()['forced_mgmt_routes'] = mgmt_routes - results['MGMT_INTERFACE'] = mgmt_intf + results['MGMT_PORT'] = {} + results['MGMT_INTERFACE'] = {} + mgmt_intf_count = 0 + mgmt_alias_reverse_mapping = {} + for key in mgmt_intf: + alias = key[0] + if mgmt_alias_reverse_mapping.has_key(alias): + name = mgmt_alias_reverse_mapping[alias] + else: + name = 'eth' + str(mgmt_intf_count) + mgmt_intf_count += 1 + mgmt_alias_reverse_mapping[alias] = name + results['MGMT_PORT'][name] = {'alias': alias, 'admin_status': 'up'} + results['MGMT_INTERFACE'][(name, key[1])] = mgmt_intf[key] results['LOOPBACK_INTERFACE'] = lo_intfs phyport_intfs = {} diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py index 7ffdf61a405..4ed8e4079f7 100644 --- a/src/sonic-config-engine/tests/test_cfggen.py +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -92,6 +92,11 @@ def test_minigraph_everflow(self): output = self.run_script(argument) self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '2.2.2.2'}}") + def test_minigraph_mgmt_ports(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v MGMT_PORT' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'eth0': {'alias': 'Management0', 'admin_status': 'up'}}") + def test_minigraph_interfaces(self): argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "INTERFACE.keys()"' output = self.run_script(argument)