We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
llvm.ppc.altivec.lvx
vec_ld
1 parent b668972 commit 5bcd1b0Copy full SHA for 5bcd1b0
1 file changed
crates/core_arch/src/powerpc/altivec.rs
@@ -51,6 +51,8 @@ types! {
51
52
#[allow(improper_ctypes)]
53
extern "C" {
54
+ #[link_name = "llvm.ppc.altivec.lvx"]
55
+ fn lvx(p: *const i8) -> vector_unsigned_int;
56
#[link_name = "llvm.ppc.altivec.vperm"]
57
fn vperm(
58
a: vector_signed_int,
@@ -442,8 +444,7 @@ mod sealed {
442
444
#[inline(always)]
443
445
unsafe fn load(off: i32, p: *const i8) -> u32x4 {
446
let addr = p.offset(off as isize);
-
- *(addr as *const u32x4)
447
+ transmute(lvx(addr))
448
}
449
450
pub trait VectorLd {
0 commit comments