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@MaskRay MaskRay commented Jan 25, 2024

The table specifies R_RISCV_TLSDESC_LOAD_LO12 and
R_RISCV_TLSDESC_ADD_LO12, while some text uses the _I suffix. Remove the _I suffix to be compatible with
LLVM and the proposed binutils patch.

The table specifies R_RISCV_TLSDESC_LOAD_LO12 and
R_RISCV_TLSDESC_ADD_LO12, while some text uses the `_I` suffix. Remove
the `_I` suffix to be compatible with the proposed binutils patch.

`auipc a0` in a relaxation result should be `auipc tX`.
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MaskRay commented Jan 25, 2024

@ishitatsuyuki @ilovepi

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The _I change looks good to me.

I’m not sure if the tX change is necessary. Both a0 and tX are legal choices here (although tY is not guaranteed to be alive because LOAD is allowed to be reordered after ADD). I think a0 is better overall because the resulting instruction sequence is macro-fusable if both instructions are adjacent.

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ilovepi commented Jan 25, 2024

I think it makes sense that things are kept consistent with the initial template, so the use of tX seems appropriate to me.

If there's a big concern about that, then maybe we can add aa comment/note that using a0 would maximize the benefit in most cases, but is up to the implementation.

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I think it makes sense that things are kept consistent with the initial template, so the use of tX seems appropriate to me.

I’m not sure if I see why this is more consistent. The destination register for the ADD instruction is a0, so I think it makes more sense for the relaxed instruction to target a0 too.

It’s fine to clarify that both a0/tX can be used, but if we want to pick one, I don’t see any reason so far why tX should be used instead.

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MaskRay commented Jan 25, 2024

I think it makes sense that things are kept consistent with the initial template, so the use of tX seems appropriate to me.

I’m not sure if I see why this is more consistent. The destination register for the ADD instruction is a0, so I think it makes more sense for the relaxed instruction to target a0 too.

It’s fine to clarify that both a0/tX can be used, but if we want to pick one, I don’t see any reason so far why tX should be used instead.

I was thinking whether we needed the flexibility but I guess the answer is probably no.
From the perspective of implementations, a fixed register is easier, so I reverted the auipc wording change :)

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Thanks!

MaskRay added a commit to llvm/llvm-project that referenced this pull request Jan 25, 2024
Fix comment typos in #66915, and relocation type names related to the
example in the psABI
(riscv-non-isa/riscv-elf-psabi-doc#420).
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Thanks :)

@kito-cheng kito-cheng merged commit 0396206 into riscv-non-isa:master Jan 30, 2024
@MaskRay MaskRay deleted the tlsdesc branch February 4, 2024 20:48
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4 participants