Verilatable jtag_test module

[Scheremo]

This PR adds a jtag_test_vlt driver module as a verilatable version of jtag_test.

Unfortunately it breaks interfaces with jtag_test, as verilator (as of version 5.028) does not properly support parametrizable classes. However, all function interfaces remain the same.

For some reason verilator swaps all bitshift operations in write_bits and readwrite_bits (at least on my end).

On the upside, downstream testbenches need to only change a few lines of code:

  typedef jtag_test::riscv_dbg#(
    .IrLength(5),
    .TA      (ClkPeriodJtag * TAppl),
    .TT      (ClkPeriodJtag * TTest)
  ) riscv_dbg_t;

  riscv_dbg_t::jtag_driver_t jtag_dv = new(jtag);
  riscv_dbg_t                jtag_dbg = new(jtag_dv);

becomes

  jtag_test_vlt::jtag_driver_vlt jtag_dv = new(jtag, ClkPeriodJtag * TAppl, ClkPeriodJtag * TTest);
  jtag_test_vlt::riscv_dbg_vlt   jtag_dbg = new(jtag_dv, 'h1, 'h11, 'h10);