@@ -827,6 +827,44 @@ MPL_STATIC_INLINE_PREFIX int MPIDI_OFI_gpu_free_pack_buffer(void *ptr)
827827 }
828828}
829829
830+ MPL_STATIC_INLINE_PREFIX MPL_gpu_engine_type_t MPIDI_OFI_gpu_get_send_engine_type (int cvar )
831+ {
832+ if (cvar == MPIR_CVAR_CH4_OFI_GPU_SEND_ENGINE_TYPE_compute ) {
833+ return MPL_GPU_ENGINE_TYPE_COMPUTE ;
834+ } else if (cvar == MPIR_CVAR_CH4_OFI_GPU_SEND_ENGINE_TYPE_copy_high_bandwidth ) {
835+ return MPL_GPU_ENGINE_TYPE_COPY_HIGH_BANDWIDTH ;
836+ } else if (cvar == MPIR_CVAR_CH4_OFI_GPU_SEND_ENGINE_TYPE_copy_low_latency ) {
837+ return MPL_GPU_ENGINE_TYPE_COPY_LOW_LATENCY ;
838+ } else {
839+ return MPL_GPU_ENGINE_TYPE_LAST ;
840+ }
841+ }
842+
843+ MPL_STATIC_INLINE_PREFIX MPL_gpu_engine_type_t MPIDI_OFI_gpu_get_recv_engine_type (int cvar )
844+ {
845+ if (cvar == MPIR_CVAR_CH4_OFI_GPU_RECEIVE_ENGINE_TYPE_compute ) {
846+ return MPL_GPU_ENGINE_TYPE_COMPUTE ;
847+ } else if (cvar == MPIR_CVAR_CH4_OFI_GPU_RECEIVE_ENGINE_TYPE_copy_high_bandwidth ) {
848+ return MPL_GPU_ENGINE_TYPE_COPY_HIGH_BANDWIDTH ;
849+ } else if (cvar == MPIR_CVAR_CH4_OFI_GPU_RECEIVE_ENGINE_TYPE_copy_low_latency ) {
850+ return MPL_GPU_ENGINE_TYPE_COPY_LOW_LATENCY ;
851+ } else {
852+ return MPL_GPU_ENGINE_TYPE_LAST ;
853+ }
854+ }
855+
856+ MPL_STATIC_INLINE_PREFIX int MPIDI_OFI_cqe_get_source (struct fi_cq_tagged_entry * wc , bool has_err )
857+ {
858+ if (MPIDI_OFI_ENABLE_DATA ) {
859+ if (unlikely (has_err )) {
860+ return wc -> data & ((1 << MPIDI_OFI_IDATA_SRC_BITS ) - 1 );
861+ }
862+ return wc -> data ;
863+ } else {
864+ return MPIDI_OFI_init_get_source (wc -> tag );
865+ }
866+ }
867+
830868int MPIDI_OFI_gpu_pipeline_send (MPIR_Request * sreq , const void * send_buf ,
831869 MPI_Aint count , MPI_Datatype datatype ,
832870 MPL_pointer_attr_t attr , MPI_Aint data_sz ,
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