Merge pull request torvalds#145 from vamrs-feng/pr_limit_hdmi

Radxa ROCK 3C has one HDMI port supporting CEC and HDMI 2.0
with resolutions up to 1080P@60fps.

Signed-off-by: Stephen Chen <[email protected]>

Author: RadxaStephen

arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts

@@ -243,6 +243,8 @@
 
 &hdmi {
 	status = "okay";
+	preset_max_hdisplay = <1920>;
+	preset_max_vdisplay = <1080>;
 };
 
 &hdmi_in_vp0 {

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

@@ -330,6 +330,9 @@ struct dw_hdmi {
 	bool logo_plug_out;		/* hdmi is plug out when kernel logo */
 	bool update;
 	bool hdr2sdr;			/* from hdr to sdr */
+
+	unsigned int preset_max_hdisplay;
+	unsigned int preset_max_vdisplay;
 };
 
 #define HDMI_IH_PHY_STAT0_RX_SENSE \
@@ -3080,6 +3083,14 @@ dw_hdmi_update_hdr_property(struct drm_connector *connector)
 	return ret;
 }
 
+bool dw_hdmi_resolution_within_custom_limit(struct dw_hdmi *dw_hdmi,
+					    unsigned int hdisplay, unsigned int vdisplay)
+{
+	return !dw_hdmi->preset_max_hdisplay ||
+	       !dw_hdmi->preset_max_vdisplay ||
+	       hdisplay * vdisplay <= dw_hdmi->preset_max_hdisplay * dw_hdmi->preset_max_vdisplay;
+}
+
 static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 {
 	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
@@ -3091,6 +3102,7 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 	struct drm_display_info *info = &connector->display_info;
 	void *data = hdmi->plat_data->phy_data;
 	int i,  ret = 0;
+	struct drm_display_mode *preferred_mode = NULL;
 
 	memset(metedata, 0, sizeof(*metedata));
 	edid = dw_hdmi_get_edid(hdmi, connector);
@@ -3143,6 +3155,26 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 	dw_hdmi_update_hdr_property(connector);
 	dw_hdmi_check_output_type_changed(hdmi);
 
+	if ((hdmi->preset_max_hdisplay) && (hdmi->preset_max_vdisplay)) {
+		list_for_each_entry(mode, &connector->probed_modes, head) {
+			if (mode->hdisplay == hdmi->preset_max_hdisplay &&
+				mode->vdisplay == hdmi->preset_max_vdisplay) {
+				preferred_mode?:(preferred_mode = mode);
+				if(!(mode->flags & DRM_MODE_FLAG_INTERLACE)) {
+					if((preferred_mode->flags & DRM_MODE_FLAG_INTERLACE) || (
+					   drm_mode_vrefresh(mode) >
+					   drm_mode_vrefresh(preferred_mode) &&
+					   drm_mode_vrefresh(mode) <= 60)) {
+						preferred_mode = mode;
+					}
+				}
+			}
+		}
+
+		if (preferred_mode)
+			preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
+	}
+
 	return ret;
 }
 
@@ -4748,6 +4780,9 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
 	mutex_init(&hdmi->cec_notifier_mutex);
 	spin_lock_init(&hdmi->audio_lock);
 
+	of_property_read_u32(np, "preset_max_hdisplay", &hdmi->preset_max_hdisplay);
+	of_property_read_u32(np, "preset_max_vdisplay", &hdmi->preset_max_vdisplay);
+
 	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
 	if (ddc_node) {
 		hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

@@ -1613,6 +1613,9 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
 
 	hdmi = to_rockchip_hdmi(encoder);
 
+	if (!dw_hdmi_resolution_within_custom_limit(dw_hdmi, mode->hdisplay, mode->vdisplay))
+		return MODE_BAD;
+
 	/*
 	 * If sink max TMDS clock < 340MHz, we should check the mode pixel
 	 * clock > 340MHz is YCbCr420 or not and whether the platform supports

include/drm/bridge/dw_hdmi.h

@@ -340,5 +340,7 @@ int dw_hdmi_qp_get_output_type_cap(struct dw_hdmi_qp *hdmi);
 void dw_hdmi_set_hpd_wake(struct dw_hdmi *hdmi);
 void dw_hdmi_cec_wake_ops_register(struct dw_hdmi *hdmi,
 				   const struct dw_hdmi_cec_wake_ops *cec_ops);
+bool dw_hdmi_resolution_within_custom_limit(struct dw_hdmi *dw_hdmi,
+					    unsigned int hdisplay, unsigned int vdisplay);
 
 #endif /* __IMX_HDMI_H__ */