[verible-verilog-lint] reported by reviewdog 🐶 Declared module does not match the first dot-delimited component of file name: "prim_xilinx_rom" [Style: file-names] [module-filename] Raw Output: message:"Declared module does not match the first dot-delimited component of file name: \"prim_xilinx_rom\" [Style: file-names] [module-filename]" location:{path:"./vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_rom.sv" range:{start:{line:7 column:8}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}