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marnovandermaasmarnovandermaas
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Make formatting of RTL files consistent
These fixes include: - Indentation of parameter lists. - Indentation of input/output lists. - Indentation of variable declaration. - Making comments full sentences ending in period. - Adding address and data width parameters. - Turn Verilator lints back on and resolve width and unused warnings. - Use ANSI style of parameter declarations.
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9 files changed

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-300
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9 files changed

+328
-300
lines changed

‎rtl/fpga/top_artya7.sv‎

Lines changed: 26 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -3,45 +3,46 @@
33
// SPDX-License-Identifier: Apache-2.0
44

55
// This is the top level SystemVerilog file that connects the IO on the board to the Ibex Demo System.
6-
module top_artya7 (
6+
module top_artya7 #(
7+
parameter SRAMInitFile = ""
8+
) (
79
// These inputs are defined in data/pins_artya7.xdc
8-
input IO_CLK,
9-
input IO_RST_N,
10-
input [ 3:0] SW,
11-
input [ 3:0] BTN,
12-
output [ 3:0] LED,
13-
output [11:0] RGB_LED,
14-
output [ 3:0] DISP_CTRL,
15-
input UART_RX,
16-
output UART_TX,
17-
input SPI_RX,
18-
output SPI_TX,
19-
output SPI_SCK
10+
input IO_CLK,
11+
input IO_RST_N,
12+
input [ 3:0] SW,
13+
input [ 3:0] BTN,
14+
output [ 3:0] LED,
15+
output [11:0] RGB_LED,
16+
output [ 3:0] DISP_CTRL,
17+
input UART_RX,
18+
output UART_TX,
19+
input SPI_RX,
20+
output SPI_TX,
21+
output SPI_SCK
2022
);
21-
parameter SRAMInitFile = "";
2223

2324
logic clk_sys, rst_sys_n;
2425

2526
// Instantiating the Ibex Demo System.
2627
ibex_demo_system #(
27-
.GpiWidth(8),
28-
.GpoWidth(8),
29-
.PwmWidth(12),
30-
.SRAMInitFile(SRAMInitFile)
28+
.GpiWidth ( 8 ),
29+
.GpoWidth ( 8 ),
30+
.PwmWidth ( 12 ),
31+
.SRAMInitFile ( SRAMInitFile )
3132
) u_ibex_demo_system (
3233
//input
33-
.clk_sys_i(clk_sys),
34+
.clk_sys_i (clk_sys),
3435
.rst_sys_ni(rst_sys_n),
35-
.gp_i({SW, BTN}),
36-
.uart_rx_i(UART_RX),
36+
.gp_i ({SW, BTN}),
37+
.uart_rx_i (UART_RX),
3738

3839
//output
39-
.gp_o({LED, DISP_CTRL}),
40-
.pwm_o(RGB_LED),
40+
.gp_o ({LED, DISP_CTRL}),
41+
.pwm_o (RGB_LED),
4142
.uart_tx_o(UART_TX),
4243

43-
.spi_rx_i(SPI_RX),
44-
.spi_tx_o(SPI_TX),
44+
.spi_rx_i (SPI_RX),
45+
.spi_tx_o (SPI_TX),
4546
.spi_sck_o(SPI_SCK)
4647
);
4748

‎rtl/system/debounce.sv‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,14 @@
66
// from the debounced output. If the input remains in that state for a certain
77
// number of cycles (ClkCount) it is deemed stable and becomes the debounced
88
// output. If the input changes (i.e. it is bouncing) we reset the counter.
9+
10+
typedef int unsigned count_t;
11+
912
module debounce #(
10-
parameter int unsigned ClkCount = 500
13+
parameter count_t ClkCount = 500
1114
) (
12-
input logic clk_i,
13-
input logic rst_ni,
15+
input logic clk_i,
16+
input logic rst_ni,
1417

1518
input logic btn_i,
1619
output logic btn_o
@@ -31,11 +34,9 @@ module debounce #(
3134
end
3235
end
3336

34-
/* verilator lint_off WIDTH */
35-
assign btn_d = (cnt_q >= ClkCount) ? btn_i : btn_q;
37+
assign btn_d = (count_t'(cnt_q) >= ClkCount) ? btn_i : btn_q;
3638
// Clear counter if button input equals stored value or if maximum counter value is reached,
3739
// otherwise increment counter.
38-
/* verilator lint_off WIDTH */
39-
assign cnt_d = (btn_i == btn_q || cnt_q >= ClkCount) ? '0 : cnt_q + 1;
40+
assign cnt_d = (btn_i == btn_q || count_t'(cnt_q) >= ClkCount) ? '0 : cnt_q + 1;
4041

4142
endmodule

‎rtl/system/gpio.sv‎

Lines changed: 39 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -3,19 +3,22 @@
33
// SPDX-License-Identifier: Apache-2.0
44

55
module gpio #(
6-
GpiWidth = 8,
7-
GpoWidth = 16
6+
parameter int unsigned GpiWidth = 8,
7+
parameter int unsigned GpoWidth = 16,
8+
parameter int unsigned AddrWidth = 32,
9+
parameter int unsigned DataWidth = 32,
10+
parameter int unsigned RegAddr = 12
811
) (
9-
input logic clk_i,
10-
input logic rst_ni,
12+
input logic clk_i,
13+
input logic rst_ni,
1114

12-
input logic device_req_i,
13-
input logic [31:0] device_addr_i,
14-
input logic device_we_i,
15-
input logic [ 3:0] device_be_i,
16-
input logic [31:0] device_wdata_i,
17-
output logic device_rvalid_o,
18-
output logic [31:0] device_rdata_o,
15+
input logic device_req_i,
16+
input logic [AddrWidth-1:0] device_addr_i,
17+
input logic device_we_i,
18+
input logic [3:0] device_be_i,
19+
input logic [DataWidth-1:0] device_wdata_i,
20+
output logic device_rvalid_o,
21+
output logic [DataWidth-1:0] device_rdata_o,
1922

2023
input logic [GpiWidth-1:0] gp_i,
2124
output logic [GpoWidth-1:0] gp_o
@@ -25,17 +28,17 @@ module gpio #(
2528
localparam int unsigned GPIO_IN_REG = 32'h4;
2629
localparam int unsigned GPIO_IN_DBNC_REG = 32'h8;
2730

28-
logic [11:0] reg_addr;
31+
logic [RegAddr-1:0] reg_addr;
2932

3033
logic [2:0][GpiWidth-1:0] gp_i_q;
3134
logic [GpiWidth-1:0] gp_i_dbnc;
3235
logic [GpoWidth-1:0] gp_o_d;
3336

34-
logic gp_o_wr_en;
35-
logic gp_i_rd_en_d, gp_i_rd_en_q;
36-
logic gp_i_dbnc_rd_en_d, gp_i_dbnc_rd_en_q;
37+
logic gp_o_wr_en;
38+
logic gp_i_rd_en_d, gp_i_rd_en_q;
39+
logic gp_i_dbnc_rd_en_d, gp_i_dbnc_rd_en_q;
3740

38-
// instantiate debouncers for all GP inputs
41+
// Instantiate debouncers for all GP inputs.
3942
for (genvar i = 0; i < GpiWidth; i++) begin : gen_debounce
4043
debounce #(
4144
.ClkCount(500)
@@ -65,36 +68,41 @@ module gpio #(
6568
end
6669
end
6770

68-
// assign gp_o_d regarding to device_be_i and GpoWidth
71+
logic [3:0] unused_device_be;
72+
73+
// Assign gp_o_d regarding to device_be_i and GpoWidth.
6974
for (genvar i_byte = 0; i_byte < 4; ++i_byte) begin : gen_gp_o_d;
7075
if (i_byte * 8 < GpoWidth) begin : gen_gp_o_d_inner
7176
localparam int gpo_byte_end = (i_byte + 1) * 8 <= GpoWidth ? (i_byte + 1) * 8 : GpoWidth;
7277
assign gp_o_d[gpo_byte_end - 1 : i_byte * 8] =
7378
device_be_i[i_byte] ? device_wdata_i[gpo_byte_end - 1 : i_byte * 8] :
7479
gp_o[gpo_byte_end - 1 : i_byte * 8];
80+
assign unused_device_be[i_byte] = 0;
81+
end else begin : gen_unused_device_be
82+
assign unused_device_be[i_byte] = device_be_i[i_byte];
7583
end
7684
end
7785

78-
// decode write and read requests
79-
assign reg_addr = device_addr_i[11:0];
80-
assign gp_o_wr_en = device_req_i & device_we_i & (reg_addr == GPIO_OUT_REG[11:0]);
81-
assign gp_i_rd_en_d = device_req_i & ~device_we_i & (reg_addr == GPIO_IN_REG[11:0]);
82-
assign gp_i_dbnc_rd_en_d = device_req_i & ~device_we_i & (reg_addr == GPIO_IN_DBNC_REG[11:0]);
86+
// Decode write and read requests.
87+
assign reg_addr = device_addr_i[RegAddr-1:0];
88+
assign gp_o_wr_en = device_req_i & device_we_i & (reg_addr == GPIO_OUT_REG[RegAddr-1:0]);
89+
assign gp_i_rd_en_d = device_req_i & ~device_we_i & (reg_addr == GPIO_IN_REG[RegAddr-1:0]);
90+
assign gp_i_dbnc_rd_en_d = device_req_i & ~device_we_i & (reg_addr == GPIO_IN_DBNC_REG[RegAddr-1:0]);
8391

84-
// assign device_rdata_o according to request type
92+
// Assign device_rdata_o according to request type.
8593
always_comb begin
8694
if (gp_i_dbnc_rd_en_q)
87-
device_rdata_o = {{(32 - GpiWidth){1'b0}}, gp_i_dbnc};
95+
device_rdata_o = {{(DataWidth - GpiWidth){1'b0}}, gp_i_dbnc};
8896
else if (gp_i_rd_en_q)
89-
device_rdata_o = {{(32 - GpiWidth){1'b0}}, gp_i_q[2]};
97+
device_rdata_o = {{(DataWidth - GpiWidth){1'b0}}, gp_i_q[2]};
9098
else
91-
device_rdata_o = {{(32 - GpoWidth){1'b0}}, gp_o};
99+
device_rdata_o = {{(DataWidth - GpoWidth){1'b0}}, gp_o};
92100
end
93101

94-
logic unused_device_addr, unused_device_be, unused_device_wdata;
102+
// Unused signals.
103+
logic [AddrWidth-1-RegAddr:0] unused_device_addr;
104+
logic [DataWidth-1-GpoWidth:0] unused_device_wdata;
95105

96-
assign unused_device_addr = ^device_addr_i[31:10];
97-
// TODO: Do this more neatly
98-
assign unused_device_be = ^device_be_i;
99-
assign unused_device_wdata = ^device_wdata_i[31:GpoWidth];
106+
assign unused_device_addr = device_addr_i[AddrWidth-1:RegAddr];
107+
assign unused_device_wdata = device_wdata_i[DataWidth-1:GpoWidth];
100108
endmodule

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