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[RISCV][NewPM] Port RISCVCodeGenPrepare to the new pass manager (#168381)
As suggested in the review for #160536 it would be good to follow up and port the RISC-V passes to the new pass manager. This PR starts that task. It provides the bare minimum necessary to run RISCVCodeGenPrepare with opt -passes=riscv-codegenprepare. The approach used is modeled on my observations of the AMDGPU backend and the recent work to port the X86 passes. The testing approach is to add a `-passes=riscv-foo` RUN line to at least one test, if an appropriate test exists.
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5 files changed

Lines changed: 89 additions & 33 deletions

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‎llvm/lib/Target/RISCV/RISCV.h‎

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,16 @@ class RISCVRegisterBankInfo;
2626
class RISCVSubtarget;
2727
class RISCVTargetMachine;
2828

29-
FunctionPass *createRISCVCodeGenPreparePass();
30-
void initializeRISCVCodeGenPreparePass(PassRegistry &);
29+
class RISCVCodeGenPreparePass : public PassInfoMixin<RISCVCodeGenPreparePass> {
30+
private:
31+
const RISCVTargetMachine *TM;
32+
33+
public:
34+
RISCVCodeGenPreparePass(const RISCVTargetMachine *TM) : TM(TM) {}
35+
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
36+
};
37+
FunctionPass *createRISCVCodeGenPrepareLegacyPass();
38+
void initializeRISCVCodeGenPrepareLegacyPassPass(PassRegistry &);
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3240
FunctionPass *createRISCVDeadRegisterDefinitionsPass();
3341
void initializeRISCVDeadRegisterDefinitionsPass(PassRegistry &);

‎llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp‎

Lines changed: 53 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -33,36 +33,42 @@ using namespace llvm;
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#define PASS_NAME "RISC-V CodeGenPrepare"
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3535
namespace {
36-
37-
class RISCVCodeGenPrepare : public FunctionPass,
38-
public InstVisitor<RISCVCodeGenPrepare, bool> {
36+
class RISCVCodeGenPrepare : public InstVisitor<RISCVCodeGenPrepare, bool> {
37+
Function &F;
3938
const DataLayout *DL;
4039
const DominatorTree *DT;
4140
const RISCVSubtarget *ST;
4241

42+
public:
43+
RISCVCodeGenPrepare(Function &F, const DominatorTree *DT,
44+
const RISCVSubtarget *ST)
45+
: F(F), DL(&F.getDataLayout()), DT(DT), ST(ST) {}
46+
bool run();
47+
bool visitInstruction(Instruction &I) { return false; }
48+
bool visitAnd(BinaryOperator &BO);
49+
bool visitIntrinsicInst(IntrinsicInst &I);
50+
bool expandVPStrideLoad(IntrinsicInst &I);
51+
bool widenVPMerge(IntrinsicInst &I);
52+
};
53+
} // namespace
54+
55+
namespace {
56+
class RISCVCodeGenPrepareLegacyPass : public FunctionPass {
4357
public:
4458
static char ID;
4559

46-
RISCVCodeGenPrepare() : FunctionPass(ID) {}
60+
RISCVCodeGenPrepareLegacyPass() : FunctionPass(ID) {}
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4862
bool runOnFunction(Function &F) override;
49-
5063
StringRef getPassName() const override { return PASS_NAME; }
5164

5265
void getAnalysisUsage(AnalysisUsage &AU) const override {
5366
AU.setPreservesCFG();
5467
AU.addRequired<DominatorTreeWrapperPass>();
5568
AU.addRequired<TargetPassConfig>();
5669
}
57-
58-
bool visitInstruction(Instruction &I) { return false; }
59-
bool visitAnd(BinaryOperator &BO);
60-
bool visitIntrinsicInst(IntrinsicInst &I);
61-
bool expandVPStrideLoad(IntrinsicInst &I);
62-
bool widenVPMerge(IntrinsicInst &I);
6370
};
64-
65-
} // end anonymous namespace
71+
} // namespace
6672

6773
// Try to optimize (i64 (and (zext/sext (i32 X), C1))) if C1 has bit 31 set,
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// but bits 63:32 are zero. If we know that bit 31 of X is 0, we can fill
@@ -273,17 +279,7 @@ bool RISCVCodeGenPrepare::expandVPStrideLoad(IntrinsicInst &II) {
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return true;
274280
}
275281

276-
bool RISCVCodeGenPrepare::runOnFunction(Function &F) {
277-
if (skipFunction(F))
278-
return false;
279-
280-
auto &TPC = getAnalysis<TargetPassConfig>();
281-
auto &TM = TPC.getTM<RISCVTargetMachine>();
282-
ST = &TM.getSubtarget<RISCVSubtarget>(F);
283-
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DL = &F.getDataLayout();
285-
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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282+
bool RISCVCodeGenPrepare::run() {
287283
bool MadeChange = false;
288284
for (auto &BB : F)
289285
for (Instruction &I : llvm::make_early_inc_range(BB))
@@ -292,12 +288,40 @@ bool RISCVCodeGenPrepare::runOnFunction(Function &F) {
292288
return MadeChange;
293289
}
294290

295-
INITIALIZE_PASS_BEGIN(RISCVCodeGenPrepare, DEBUG_TYPE, PASS_NAME, false, false)
291+
bool RISCVCodeGenPrepareLegacyPass::runOnFunction(Function &F) {
292+
if (skipFunction(F))
293+
return false;
294+
295+
auto &TPC = getAnalysis<TargetPassConfig>();
296+
auto &TM = TPC.getTM<RISCVTargetMachine>();
297+
auto ST = &TM.getSubtarget<RISCVSubtarget>(F);
298+
auto DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
299+
300+
RISCVCodeGenPrepare RVCGP(F, DT, ST);
301+
return RVCGP.run();
302+
}
303+
304+
INITIALIZE_PASS_BEGIN(RISCVCodeGenPrepareLegacyPass, DEBUG_TYPE, PASS_NAME,
305+
false, false)
296306
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
297-
INITIALIZE_PASS_END(RISCVCodeGenPrepare, DEBUG_TYPE, PASS_NAME, false, false)
307+
INITIALIZE_PASS_END(RISCVCodeGenPrepareLegacyPass, DEBUG_TYPE, PASS_NAME, false,
308+
false)
298309

299-
char RISCVCodeGenPrepare::ID = 0;
310+
char RISCVCodeGenPrepareLegacyPass::ID = 0;
311+
312+
FunctionPass *llvm::createRISCVCodeGenPrepareLegacyPass() {
313+
return new RISCVCodeGenPrepareLegacyPass();
314+
}
300315

301-
FunctionPass *llvm::createRISCVCodeGenPreparePass() {
302-
return new RISCVCodeGenPrepare();
316+
PreservedAnalyses RISCVCodeGenPreparePass::run(Function &F,
317+
FunctionAnalysisManager &FAM) {
318+
DominatorTree *DT = &FAM.getResult<DominatorTreeAnalysis>(F);
319+
auto ST = &TM->getSubtarget<RISCVSubtarget>(F);
320+
bool Changed = RISCVCodeGenPrepare(F, DT, ST).run();
321+
if (!Changed)
322+
return PreservedAnalyses::all();
323+
324+
PreservedAnalyses PA = PreservedAnalyses::none();
325+
PA.preserveSet<CFGAnalyses>();
326+
return PA;
303327
}

‎llvm/lib/Target/RISCV/RISCVPassRegistry.def‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
//===- RISCVPassRegistry.def - Registry of RISC-V passes --------*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file is used as the registry of passes that are part of the RISC-V
10+
// backend.
11+
//
12+
//===----------------------------------------------------------------------===//
13+
14+
// NOTE: NO INCLUDE GUARD DESIRED!
15+
16+
#ifndef FUNCTION_PASS
17+
#define FUNCTION_PASS(NAME, CREATE_PASS)
18+
#endif
19+
FUNCTION_PASS("riscv-codegenprepare", RISCVCodeGenPreparePass(this))
20+
#undef FUNCTION_PASS

‎llvm/lib/Target/RISCV/RISCVTargetMachine.cpp‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
123123
initializeRISCVLateBranchOptPass(*PR);
124124
initializeRISCVMakeCompressibleOptPass(*PR);
125125
initializeRISCVGatherScatterLoweringPass(*PR);
126-
initializeRISCVCodeGenPreparePass(*PR);
126+
initializeRISCVCodeGenPrepareLegacyPassPass(*PR);
127127
initializeRISCVPostRAExpandPseudoPass(*PR);
128128
initializeRISCVMergeBaseOffsetOptPass(*PR);
129129
initializeRISCVOptWInstrsPass(*PR);
@@ -461,7 +461,7 @@ void RISCVPassConfig::addIRPasses() {
461461

462462
addPass(createRISCVGatherScatterLoweringPass());
463463
addPass(createInterleavedAccessPass());
464-
addPass(createRISCVCodeGenPreparePass());
464+
addPass(createRISCVCodeGenPrepareLegacyPass());
465465
}
466466

467467
TargetPassConfig::addIRPasses();
@@ -636,6 +636,9 @@ bool RISCVPassConfig::addILPOpts() {
636636
}
637637

638638
void RISCVTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
639+
#define GET_PASS_REGISTRY "RISCVPassRegistry.def"
640+
#include "llvm/Passes/TargetPassRegistry.inc"
641+
639642
PB.registerLateLoopOptimizationsEPCallback([=](LoopPassManager &LPM,
640643
OptimizationLevel Level) {
641644
if (Level != OptimizationLevel::O0)

‎llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
22
; RUN: opt %s -S -riscv-codegenprepare -mtriple=riscv64 | FileCheck %s
3+
; RUN: opt %s -S -passes=riscv-codegenprepare -mtriple=riscv64 | FileCheck %s
34

45
; Make sure we convert the 4294967294 in for.body.preheader.new to -2 based on
56
; the upper 33 bits being zero by the dominating condition %cmp3.

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