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[Clang][AArch64] Add missing SME functions to header file. (#75791)
This includes: * __arm_in_streaming_mode() * __arm_has_sme() * __arm_za_disable() * __svundef_za()
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+127
-9
lines changed

5 files changed

+127
-9
lines changed

‎clang/include/clang/Basic/BuiltinsAArch64.def‎

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Original file line numberDiff line numberDiff line change
@@ -68,6 +68,9 @@ TARGET_BUILTIN(__builtin_arm_ldg, "v*v*", "t", "mte")
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TARGET_BUILTIN(__builtin_arm_stg, "vv*", "t", "mte")
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TARGET_BUILTIN(__builtin_arm_subp, "Uiv*v*", "t", "mte")
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// SME state function
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BUILTIN(__builtin_arm_get_sme_state, "vULi*ULi*", "n")
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// Memory Operations
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TARGET_BUILTIN(__builtin_arm_mops_memset_tag, "v*v*iz", "", "mte,mops")
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‎clang/lib/CodeGen/CGBuiltin.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -10430,6 +10430,26 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
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return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
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}
1043210432

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if (BuiltinID == clang::AArch64::BI__builtin_arm_get_sme_state) {
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// Create call to __arm_sme_state and store the results to the two pointers.
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CallInst *CI = EmitRuntimeCall(CGM.CreateRuntimeFunction(
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llvm::FunctionType::get(StructType::get(CGM.Int64Ty, CGM.Int64Ty), {},
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false),
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"__arm_sme_state"));
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auto Attrs =
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AttributeList()
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.addFnAttribute(getLLVMContext(), "aarch64_pstate_sm_compatible")
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.addFnAttribute(getLLVMContext(), "aarch64_pstate_za_preserved");
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CI->setAttributes(Attrs);
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CI->setCallingConv(
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llvm::CallingConv::
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AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2);
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Builder.CreateStore(Builder.CreateExtractValue(CI, 0),
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EmitPointerWithAlignment(E->getArg(0)));
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return Builder.CreateStore(Builder.CreateExtractValue(CI, 1),
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EmitPointerWithAlignment(E->getArg(1)));
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}
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if (BuiltinID == clang::AArch64::BI__builtin_arm_rbit) {
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assert((getContext().getTypeSize(E->getType()) == 32) &&
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"rbit of unusual size!");

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,72 @@
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
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#include <arm_sme_draft_spec_subject_to_change.h>
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// CHECK-LABEL: @test_in_streaming_mode(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
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// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
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// CHECK-NEXT: [[AND_I:%.*]] = and i64 [[TMP1]], 1
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// CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
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// CHECK-NEXT: ret i1 [[TOBOOL_I]]
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//
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// CPP-CHECK-LABEL: @_Z22test_in_streaming_modev(
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// CPP-CHECK-NEXT: entry:
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// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
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// CPP-CHECK-NEXT: [[AND_I:%.*]] = and i64 [[TMP1]], 1
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// CPP-CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
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// CPP-CHECK-NEXT: ret i1 [[TOBOOL_I]]
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//
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bool test_in_streaming_mode(void) __arm_streaming_compatible {
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return __arm_in_streaming_mode();
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}
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// CHECK-LABEL: @test_za_disable(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: tail call void @__arm_za_disable() #[[ATTR4:[0-9]+]]
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// CHECK-NEXT: ret void
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//
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// CPP-CHECK-LABEL: @_Z15test_za_disablev(
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// CPP-CHECK-NEXT: entry:
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// CPP-CHECK-NEXT: tail call void @__arm_za_disable() #[[ATTR4:[0-9]+]]
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// CPP-CHECK-NEXT: ret void
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//
39+
void test_za_disable(void) __arm_streaming_compatible {
40+
__arm_za_disable();
41+
}
42+
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// CHECK-LABEL: @test_has_sme(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
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// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
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// CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
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// CHECK-NEXT: ret i1 [[TOBOOL_I]]
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//
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// CPP-CHECK-LABEL: @_Z12test_has_smev(
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// CPP-CHECK-NEXT: entry:
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// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
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// CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
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// CPP-CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
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// CPP-CHECK-NEXT: ret i1 [[TOBOOL_I]]
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//
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bool test_has_sme(void) __arm_streaming_compatible {
58+
return __arm_has_sme();
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}
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// CHECK-LABEL: @test_svundef_za(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret void
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//
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// CPP-CHECK-LABEL: @_Z15test_svundef_zav(
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// CPP-CHECK-NEXT: entry:
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// CPP-CHECK-NEXT: ret void
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//
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void test_svundef_za(void) __arm_streaming_compatible __arm_shared_za {
70+
svundef_za();
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}
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‎clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c‎

Lines changed: 13 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -8,13 +8,11 @@
88
// RUN: %clang_cc1 -D__SVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
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11-
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
12-
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
13-
// RUN: %clang_cc1 -D__SVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
14-
// RUN: %clang_cc1 -D__SVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
15-
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
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// RUN: %clang_cc1 -DTEST_SME2 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
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// RUN: %clang_cc1 -DTEST_SME2 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
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// RUN: %clang_cc1 -DTEST_SME2 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
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17-
#include <arm_sme_draft_spec_subject_to_change.h>
15+
#include <arm_sve.h>
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1917
#ifdef SVE_OVERLOADED_FORMS
2018
// A simple used,unused... macro, long enough to represent any SVE builtin.
@@ -23,6 +21,12 @@
2321
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
2422
#endif
2523

24+
#ifndef TEST_SME2
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#define ATTR
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#else
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#define ATTR __arm_streaming
28+
#endif
29+
2630
// CHECK-LABEL: @test_qcvtn_s16_s32_x2(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.vector.extract.nxv4i32.nxv8i32(<vscale x 8 x i32> [[ZN:%.*]], i64 0)
@@ -37,7 +41,7 @@
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// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqcvtn.x2.nxv4i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[TMP1]])
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// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]
3943
//
40-
svint16_t test_qcvtn_s16_s32_x2(svint32x2_t zn) __arm_streaming_compatible {
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svint16_t test_qcvtn_s16_s32_x2(svint32x2_t zn) ATTR {
4145
return SVE_ACLE_FUNC(svqcvtn_s16,_s32_x2,,)(zn);
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}
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@@ -55,7 +59,7 @@ svint16_t test_qcvtn_s16_s32_x2(svint32x2_t zn) __arm_streaming_compatible {
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// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqcvtn.x2.nxv4i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[TMP1]])
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// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]
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//
58-
svuint16_t test_qcvtn_u16_u32_x2(svuint32x2_t zn) __arm_streaming_compatible {
62+
svuint16_t test_qcvtn_u16_u32_x2(svuint32x2_t zn) ATTR {
5963
return SVE_ACLE_FUNC(svqcvtn_u16,_u32_x2,,)(zn);
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}
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@@ -73,6 +77,6 @@ svuint16_t test_qcvtn_u16_u32_x2(svuint32x2_t zn) __arm_streaming_compatible {
7377
// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqcvtun.x2.nxv4i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[TMP1]])
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// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]
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//
76-
svuint16_t test_qcvtn_u16_s32_x2(svint32x2_t zn) __arm_streaming_compatible {
80+
svuint16_t test_qcvtn_u16_s32_x2(svint32x2_t zn) ATTR {
7781
return SVE_ACLE_FUNC(svqcvtn_u16,_s32_x2,,)(zn);
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}

‎clang/utils/TableGen/SveEmitter.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -1603,6 +1603,25 @@ void SVEEmitter::createSMEHeader(raw_ostream &OS) {
16031603
OS << "extern \"C\" {\n";
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OS << "#endif\n\n";
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1606+
OS << "void __arm_za_disable(void) __arm_streaming_compatible;\n\n";
1607+
1608+
OS << "__ai bool __arm_has_sme(void) __arm_streaming_compatible {\n";
1609+
OS << " uint64_t x0, x1;\n";
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OS << " __builtin_arm_get_sme_state(&x0, &x1);\n";
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OS << " return x0 & (1ULL << 63);\n";
1612+
OS << "}\n\n";
1613+
1614+
OS << "__ai bool __arm_in_streaming_mode(void) __arm_streaming_compatible "
1615+
"{\n";
1616+
OS << " uint64_t x0, x1;\n";
1617+
OS << " __builtin_arm_get_sme_state(&x0, &x1);\n";
1618+
OS << " return x0 & 1;\n";
1619+
OS << "}\n\n";
1620+
1621+
OS << "__ai __attribute__((target(\"sme\"))) void svundef_za(void) "
1622+
"__arm_streaming_compatible __arm_shared_za "
1623+
"{ }\n\n";
1624+
16061625
createCoreHeaderIntrinsics(OS, *this, ACLEKind::SME);
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16081627
OS << "#ifdef __cplusplus\n";

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