Address review comments and update test RUNOption

Author: ghehg

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

@@ -2198,11 +2198,11 @@ mlir::Value buildNeonCall(unsigned int builtinID, CIRGenFunction &cgf,
 }
 
 /// Get integer from a mlir::Value that is an int constant or a constant op.
-static int getIntFromMLIRValue(mlir::Value val) {
+static int64_t getIntValueFromConstOp(mlir::Value val) {
   auto constOp = mlir::cast<mlir::cir::ConstantOp>(val.getDefiningOp());
-  return (int)((mlir::cast<mlir::cir::IntAttr>(constOp.getValue()))
-                   .getValue()
-                   .getSExtValue());
+  return (mlir::cast<mlir::cir::IntAttr>(constOp.getValue()))
+      .getValue()
+      .getSExtValue();
 }
 
 mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
@@ -2251,7 +2251,7 @@ mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
   }
   case NEON::BI__builtin_neon_vext_v:
   case NEON::BI__builtin_neon_vextq_v: {
-    int cv = getIntFromMLIRValue(ops[2]);
+    int cv = getIntValueFromConstOp(ops[2]);
     llvm::SmallVector<int64_t, 16> indices;
     for (unsigned i = 0, e = vTy.getSize(); i != e; ++i)
       indices.push_back(i + cv);

clang/test/CIR/CodeGen/AArch64/neon-ext-mov.c

@@ -1,10 +1,10 @@
 // RUN: %clang_cc1 -triple aarch64-none-linux-android24 -target-feature +neon \
-// RUN:    -fclangir -disable-O0-optnone \
+// RUN:    -fclangir -disable-O0-optnone  -fno-clangir-call-conv-lowering \
 // RUN:  -flax-vector-conversions=none -emit-cir -o %t.cir %s
 // RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
 
 // RUN: %clang_cc1 -triple aarch64-none-linux-android24 -target-feature +neon \
-// RUN:    -fclangir -disable-O0-optnone \
+// RUN:    -fclangir -disable-O0-optnone -fno-clangir-call-conv-lowering \
 // RUN:  -flax-vector-conversions=none -emit-llvm -o - %s \
 // RUN: | opt -S -passes=instcombine,mem2reg,simplifycfg -o %t.ll
 // RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s