diff --git a/clang/test/CodeGenSYCL/intel-fpga-reg.cpp b/clang/test/CodeGenSYCL/intel-fpga-reg.cpp
index 4c8e08e0636ef..5e1a74578c97d 100644
--- a/clang/test/CodeGenSYCL/intel-fpga-reg.cpp
+++ b/clang/test/CodeGenSYCL/intel-fpga-reg.cpp
@@ -1,15 +1,16 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --functions ["['foo']"]
 // RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown-sycldevice -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s
 
 struct st {
   int a;
   float b;
 };
+// CHECK: [[T_ST:%struct[a-zA-Z0-9_.]*.st]] = type { i32, float }
 
 union un {
   int a;
   char c[4];
 };
+// CHECK: [[T_UN:%union[a-zA-Z0-9_.]*.un]] = type { i32 }
 
 class A {
 public:
@@ -22,273 +23,158 @@ class A {
 private:
     int m_val;
 };
+// CHECK: [[T_CL:%class[a-zA-Z0-9_.]*.A]] = type { i32 }
 
-typedef int myInt;
+// CHECK: @.str = private unnamed_addr constant [25 x i8] c"__builtin_intel_fpga_reg\00", section "llvm.metadata"
 
-// CHECK-LABEL: define {{.*}} @_Z3foov(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[A_ASCAST:%.*]] = addrspacecast i32* [[A]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[MYA:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[MYA_ASCAST:%.*]] = addrspacecast i32* [[MYA]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[B_ASCAST:%.*]] = addrspacecast i32* [[B]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[MYB:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[MYB_ASCAST:%.*]] = addrspacecast i32* [[MYB]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[C:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[C_ASCAST:%.*]] = addrspacecast i32* [[C]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[D:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[D_ASCAST:%.*]] = addrspacecast i32* [[D]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[E:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[E_ASCAST:%.*]] = addrspacecast i32* [[E]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[F:%.*]] = alloca i32, align 4
-// CHECK-NEXT:    [[F_ASCAST:%.*]] = addrspacecast i32* [[F]] to i32 addrspace(4)*
-// CHECK-NEXT:    [[I:%.*]] = alloca [[STRUCT__ZTS2ST_ST:%.*]], align 4
-// CHECK-NEXT:    [[I_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[I]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[I2:%.*]] = alloca [[STRUCT__ZTS2ST_ST]], align 4
-// CHECK-NEXT:    [[I2_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[I2]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[II:%.*]] = alloca [[STRUCT__ZTS2ST_ST]], align 4
-// CHECK-NEXT:    [[II_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[II]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[AGG_TEMP:%.*]] = alloca [[STRUCT__ZTS2ST_ST]], align 4
-// CHECK-NEXT:    [[AGG_TEMP_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[AGG_TEMP]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[III:%.*]] = alloca [[STRUCT__ZTS2ST_ST]], align 4
-// CHECK-NEXT:    [[III_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[III]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT__ZTS2ST_ST]], align 4
-// CHECK-NEXT:    [[REF_TMP_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[REF_TMP]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[AGG_TEMP2:%.*]] = alloca [[STRUCT__ZTS2ST_ST]], align 4
-// CHECK-NEXT:    [[AGG_TEMP2_ASCAST:%.*]] = addrspacecast %struct._ZTS2st.st* [[AGG_TEMP2]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[IIII:%.*]] = alloca [[STRUCT__ZTS2ST_ST]] addrspace(4)*, align 8
-// CHECK-NEXT:    [[IIII_ASCAST:%.*]] = addrspacecast [[STRUCT__ZTS2ST_ST]] addrspace(4)** [[IIII]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)* addrspace(4)*
-// CHECK-NEXT:    [[U1:%.*]] = alloca [[UNION__ZTS2UN_UN:%.*]], align 4
-// CHECK-NEXT:    [[U1_ASCAST:%.*]] = addrspacecast %union._ZTS2un.un* [[U1]] to [[UNION__ZTS2UN_UN]] addrspace(4)*
-// CHECK-NEXT:    [[U2:%.*]] = alloca [[UNION__ZTS2UN_UN]], align 4
-// CHECK-NEXT:    [[U2_ASCAST:%.*]] = addrspacecast %union._ZTS2un.un* [[U2]] to [[UNION__ZTS2UN_UN]] addrspace(4)*
-// CHECK-NEXT:    [[U3:%.*]] = alloca [[UNION__ZTS2UN_UN]] addrspace(4)*, align 8
-// CHECK-NEXT:    [[U3_ASCAST:%.*]] = addrspacecast [[UNION__ZTS2UN_UN]] addrspace(4)** [[U3]] to [[UNION__ZTS2UN_UN]] addrspace(4)* addrspace(4)*
-// CHECK-NEXT:    [[REF_TMP3:%.*]] = alloca [[UNION__ZTS2UN_UN]], align 4
-// CHECK-NEXT:    [[REF_TMP3_ASCAST:%.*]] = addrspacecast %union._ZTS2un.un* [[REF_TMP3]] to [[UNION__ZTS2UN_UN]] addrspace(4)*
-// CHECK-NEXT:    [[AGG_TEMP4:%.*]] = alloca [[UNION__ZTS2UN_UN]], align 4
-// CHECK-NEXT:    [[AGG_TEMP4_ASCAST:%.*]] = addrspacecast %union._ZTS2un.un* [[AGG_TEMP4]] to [[UNION__ZTS2UN_UN]] addrspace(4)*
-// CHECK-NEXT:    [[CA:%.*]] = alloca [[CLASS__ZTS1A_A:%.*]], align 4
-// CHECK-NEXT:    [[CA_ASCAST:%.*]] = addrspacecast %class._ZTS1A.A* [[CA]] to [[CLASS__ZTS1A_A]] addrspace(4)*
-// CHECK-NEXT:    [[CB:%.*]] = alloca [[CLASS__ZTS1A_A]], align 4
-// CHECK-NEXT:    [[CB_ASCAST:%.*]] = addrspacecast %class._ZTS1A.A* [[CB]] to [[CLASS__ZTS1A_A]] addrspace(4)*
-// CHECK-NEXT:    [[AGG_TEMP5:%.*]] = alloca [[CLASS__ZTS1A_A]], align 4
-// CHECK-NEXT:    [[AGG_TEMP5_ASCAST:%.*]] = addrspacecast %class._ZTS1A.A* [[AGG_TEMP5]] to [[CLASS__ZTS1A_A]] addrspace(4)*
-// CHECK-NEXT:    [[AP:%.*]] = alloca i32 addrspace(4)*, align 8
-// CHECK-NEXT:    [[AP_ASCAST:%.*]] = addrspacecast i32 addrspace(4)** [[AP]] to i32 addrspace(4)* addrspace(4)*
-// CHECK-NEXT:    [[BP:%.*]] = alloca i32 addrspace(4)*, align 8
-// CHECK-NEXT:    [[BP_ASCAST:%.*]] = addrspacecast i32 addrspace(4)** [[BP]] to i32 addrspace(4)* addrspace(4)*
-// CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[A]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) [[ATTR6:#.*]]
-// CHECK-NEXT:    store i32 123, i32 addrspace(4)* [[A_ASCAST]], align 4, [[TBAA9:!tbaa !.*]]
-// CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[MYA]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP1]]) [[ATTR6]]
-// CHECK-NEXT:    store i32 321, i32 addrspace(4)* [[MYA_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[B]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP2]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP3:%.*]] = load i32, i32 addrspace(4)* [[A_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.annotation.i32(i32 [[TMP3]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY:\[[0-9]+ x i8\]]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 265)
-// CHECK-NEXT:    store i32 [[TMP4]], i32 addrspace(4)* [[B_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP5:%.*]] = bitcast i32* [[MYB]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32 addrspace(4)* [[MYA_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP7:%.*]] = call i32 @llvm.annotation.i32(i32 [[TMP6]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 266)
-// CHECK-NEXT:    store i32 [[TMP7]], i32 addrspace(4)* [[MYB_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP8:%.*]] = bitcast i32* [[C]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP9:%.*]] = call i32 @llvm.annotation.i32(i32 1073741824, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 267)
-// CHECK-NEXT:    [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float
-// CHECK-NEXT:    [[CONV:%.*]] = fptosi float [[TMP10]] to i32
-// CHECK-NEXT:    store i32 [[CONV]], i32 addrspace(4)* [[C_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP11:%.*]] = bitcast i32* [[D]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP12:%.*]] = load i32, i32 addrspace(4)* [[B_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], 12
-// CHECK-NEXT:    [[TMP13:%.*]] = call i32 @llvm.annotation.i32(i32 [[ADD]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 268)
-// CHECK-NEXT:    [[TMP14:%.*]] = call i32 @llvm.annotation.i32(i32 [[TMP13]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 268)
-// CHECK-NEXT:    store i32 [[TMP14]], i32 addrspace(4)* [[D_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP15:%.*]] = bitcast i32* [[E]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP15]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP16:%.*]] = load i32, i32 addrspace(4)* [[A_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP17:%.*]] = load i32, i32 addrspace(4)* [[B_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK-NEXT:    [[TMP18:%.*]] = call i32 @llvm.annotation.i32(i32 [[ADD1]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 269)
-// CHECK-NEXT:    [[TMP19:%.*]] = call i32 @llvm.annotation.i32(i32 [[TMP18]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 269)
-// CHECK-NEXT:    store i32 [[TMP19]], i32 addrspace(4)* [[E_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP20:%.*]] = bitcast i32* [[F]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP21:%.*]] = load i32, i32 addrspace(4)* [[A_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP22:%.*]] = call i32 @llvm.annotation.i32(i32 [[TMP21]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 271)
-// CHECK-NEXT:    store i32 [[TMP22]], i32 addrspace(4)* [[F_ASCAST]], align 4, [[TBAA9]]
-// CHECK-NEXT:    [[TMP23:%.*]] = bitcast %struct._ZTS2st.st* [[I]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP24:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[I_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p1i8.i64(i8 addrspace(4)* align 4 [[TMP24]], i8 addrspace(1)* align 4 bitcast (%struct._ZTS2st.st addrspace(1)* @__const._Z3foov.i to i8 addrspace(1)*), i64 8, i1 false)
-// CHECK-NEXT:    [[TMP25:%.*]] = bitcast %struct._ZTS2st.st* [[I2]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP25]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP26:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[I2_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP27:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[I_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP26]], i8 addrspace(4)* align 4 [[TMP27]], i64 8, i1 false), !tbaa.struct !11
-// CHECK-NEXT:    [[TMP28:%.*]] = bitcast %struct._ZTS2st.st* [[II]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP28]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP29:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[AGG_TEMP_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP30:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[I_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP29]], i8 addrspace(4)* align 4 [[TMP30]], i64 8, i1 false), !tbaa.struct !11
-// CHECK-NEXT:    [[TMP31:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[AGG_TEMP_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP32:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP31]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 275, i8* null)
-// CHECK-NEXT:    [[TMP33:%.*]] = bitcast i8 addrspace(4)* [[TMP32]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[TMP34:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[II_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP35:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[TMP33]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP34]], i8 addrspace(4)* align 4 [[TMP35]], i64 8, i1 false)
-// CHECK-NEXT:    [[TMP36:%.*]] = bitcast %struct._ZTS2st.st* [[III]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP36]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP37:%.*]] = bitcast %struct._ZTS2st.st* [[REF_TMP]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP37]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP38:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[AGG_TEMP2_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP39:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[II_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP38]], i8 addrspace(4)* align 4 [[TMP39]], i64 8, i1 false), !tbaa.struct !11
-// CHECK-NEXT:    [[TMP40:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[AGG_TEMP2_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP41:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP40]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 277, i8* null)
-// CHECK-NEXT:    [[TMP42:%.*]] = bitcast i8 addrspace(4)* [[TMP41]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    [[TMP43:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP44:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[TMP42]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP43]], i8 addrspace(4)* align 4 [[TMP44]], i64 8, i1 false)
-// CHECK-NEXT:    [[TMP45:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[III_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP46:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP45]], i8 addrspace(4)* align 4 [[TMP46]], i64 8, i1 false), !tbaa.struct !11
-// CHECK-NEXT:    [[TMP47:%.*]] = bitcast %struct._ZTS2st.st* [[REF_TMP]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP48:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)** [[IIII]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP48]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP49:%.*]] = ptrtoint [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[III_ASCAST]] to i64
-// CHECK-NEXT:    [[TMP50:%.*]] = call i64 @llvm.annotation.i64(i64 [[TMP49]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 279)
-// CHECK-NEXT:    [[TMP51:%.*]] = inttoptr i64 [[TMP50]] to [[STRUCT__ZTS2ST_ST]] addrspace(4)*
-// CHECK-NEXT:    store [[STRUCT__ZTS2ST_ST]] addrspace(4)* [[TMP51]], [[STRUCT__ZTS2ST_ST]] addrspace(4)* addrspace(4)* [[IIII_ASCAST]], align 8, [[TBAA5:!tbaa !.*]]
-// CHECK-NEXT:    [[TMP52:%.*]] = bitcast %union._ZTS2un.un* [[U1]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP52]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP53:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[U1_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p1i8.i64(i8 addrspace(4)* align 4 [[TMP53]], i8 addrspace(1)* align 4 bitcast (%union._ZTS2un.un addrspace(1)* @__const._Z3foov.u1 to i8 addrspace(1)*), i64 4, i1 false)
-// CHECK-NEXT:    [[TMP54:%.*]] = bitcast %union._ZTS2un.un* [[U2]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP54]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP55:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)** [[U3]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP55]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP56:%.*]] = bitcast %union._ZTS2un.un* [[REF_TMP3]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP56]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP57:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[AGG_TEMP4_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP58:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[U1_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP57]], i8 addrspace(4)* align 4 [[TMP58]], i64 4, i1 false), !tbaa.struct !14
-// CHECK-NEXT:    [[TMP59:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[AGG_TEMP4_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP60:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP59]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 283, i8* null)
-// CHECK-NEXT:    [[TMP61:%.*]] = bitcast i8 addrspace(4)* [[TMP60]] to [[UNION__ZTS2UN_UN]] addrspace(4)*
-// CHECK-NEXT:    [[TMP62:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[REF_TMP3_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP63:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[TMP61]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP62]], i8 addrspace(4)* align 4 [[TMP63]], i64 8, i1 false)
-// CHECK-NEXT:    [[TMP64:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[U2_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP65:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)* [[REF_TMP3_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP64]], i8 addrspace(4)* align 4 [[TMP65]], i64 4, i1 false), !tbaa.struct !14
-// CHECK-NEXT:    [[TMP66:%.*]] = bitcast %union._ZTS2un.un* [[REF_TMP3]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP67:%.*]] = ptrtoint [[UNION__ZTS2UN_UN]] addrspace(4)* [[U2_ASCAST]] to i64
-// CHECK-NEXT:    [[TMP68:%.*]] = call i64 @llvm.annotation.i64(i64 [[TMP67]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 285)
-// CHECK-NEXT:    [[TMP69:%.*]] = inttoptr i64 [[TMP68]] to [[UNION__ZTS2UN_UN]] addrspace(4)*
-// CHECK-NEXT:    store [[UNION__ZTS2UN_UN]] addrspace(4)* [[TMP69]], [[UNION__ZTS2UN_UN]] addrspace(4)* addrspace(4)* [[U3_ASCAST]], align 8, [[TBAA5]]
-// CHECK-NEXT:    [[TMP70:%.*]] = bitcast %class._ZTS1A.A* [[CA]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP70]]) [[ATTR6]]
-// CHECK-NEXT:    call spir_func void @_ZN1AC1Ei(%class._ZTS1A.A addrspace(4)* align 4 dereferenceable_or_null(4) [[CA_ASCAST]], i32 213) [[ATTR7:#.*]]
-// CHECK-NEXT:    [[TMP71:%.*]] = bitcast %class._ZTS1A.A* [[CB]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP71]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP72:%.*]] = bitcast [[CLASS__ZTS1A_A]] addrspace(4)* [[AGG_TEMP5_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP73:%.*]] = bitcast [[CLASS__ZTS1A_A]] addrspace(4)* [[CA_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP72]], i8 addrspace(4)* align 4 [[TMP73]], i64 4, i1 false), !tbaa.struct !16
-// CHECK-NEXT:    [[TMP74:%.*]] = bitcast [[CLASS__ZTS1A_A]] addrspace(4)* [[AGG_TEMP5_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP75:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP74]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 288, i8* null)
-// CHECK-NEXT:    [[TMP76:%.*]] = bitcast i8 addrspace(4)* [[TMP75]] to [[CLASS__ZTS1A_A]] addrspace(4)*
-// CHECK-NEXT:    [[TMP77:%.*]] = bitcast [[CLASS__ZTS1A_A]] addrspace(4)* [[CB_ASCAST]] to i8 addrspace(4)*
-// CHECK-NEXT:    [[TMP78:%.*]] = bitcast [[CLASS__ZTS1A_A]] addrspace(4)* [[TMP76]] to i8 addrspace(4)*
-// CHECK-NEXT:    call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP77]], i8 addrspace(4)* align 4 [[TMP78]], i64 8, i1 false)
-// CHECK-NEXT:    [[TMP79:%.*]] = bitcast i32 addrspace(4)** [[AP]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP79]]) [[ATTR6]]
-// CHECK-NEXT:    store i32 addrspace(4)* [[A_ASCAST]], i32 addrspace(4)* addrspace(4)* [[AP_ASCAST]], align 8, [[TBAA5]]
-// CHECK-NEXT:    [[TMP80:%.*]] = bitcast i32 addrspace(4)** [[BP]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP80]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP81:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[AP_ASCAST]], align 8, [[TBAA5]]
-// CHECK-NEXT:    [[TMP82:%.*]] = ptrtoint i32 addrspace(4)* [[TMP81]] to i64
-// CHECK-NEXT:    [[TMP83:%.*]] = call i64 @llvm.annotation.i64(i64 [[TMP82]], i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([[STR1TY]], [[STR1TY]]* @.str.1, i32 0, i32 0), i32 291)
-// CHECK-NEXT:    [[TMP84:%.*]] = inttoptr i64 [[TMP83]] to i32 addrspace(4)*
-// CHECK-NEXT:    store i32 addrspace(4)* [[TMP84]], i32 addrspace(4)* addrspace(4)* [[BP_ASCAST]], align 8, [[TBAA5]]
-// CHECK-NEXT:    [[TMP85:%.*]] = bitcast i32 addrspace(4)** [[BP]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP85]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP86:%.*]] = bitcast i32 addrspace(4)** [[AP]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP86]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP87:%.*]] = bitcast %class._ZTS1A.A* [[CB]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP87]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP88:%.*]] = bitcast %class._ZTS1A.A* [[CA]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP88]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP89:%.*]] = bitcast [[UNION__ZTS2UN_UN]] addrspace(4)** [[U3]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP89]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP90:%.*]] = bitcast %union._ZTS2un.un* [[U2]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP90]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP91:%.*]] = bitcast %union._ZTS2un.un* [[U1]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP91]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP92:%.*]] = bitcast [[STRUCT__ZTS2ST_ST]] addrspace(4)** [[IIII]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP92]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP93:%.*]] = bitcast %struct._ZTS2st.st* [[III]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP93]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP94:%.*]] = bitcast %struct._ZTS2st.st* [[II]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP94]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP95:%.*]] = bitcast %struct._ZTS2st.st* [[I2]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP95]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP96:%.*]] = bitcast %struct._ZTS2st.st* [[I]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP96]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP97:%.*]] = bitcast i32* [[F]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP97]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP98:%.*]] = bitcast i32* [[E]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP98]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP99:%.*]] = bitcast i32* [[D]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP99]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP100:%.*]] = bitcast i32* [[C]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP100]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP101:%.*]] = bitcast i32* [[MYB]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP101]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP102:%.*]] = bitcast i32* [[B]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP102]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP103:%.*]] = bitcast i32* [[MYA]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP103]]) [[ATTR6]]
-// CHECK-NEXT:    [[TMP104:%.*]] = bitcast i32* [[A]] to i8*
-// CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP104]]) [[ATTR6]]
-// CHECK-NEXT:    ret void
-//
-void foo() {
-  int a=123;
-  myInt myA = 321;
+void scalars() {
+  int a = 123;
   int b = __builtin_intel_fpga_reg(a);
-  int myB = __builtin_intel_fpga_reg(myA);
+  // CHECK: [[V_A1:%.*]] = load i32, i32 addrspace(4)* %a
+  // CHECK-NEXT: [[V_A2:%.*]] = call i32 @llvm.annotation.i32(i32 [[V_A1]], [[BIFR_STR:i8\* getelementptr inbounds \(\[25 x i8\], \[25 x i8\]\* @.str, i32 0, i32 0\),]]
+  // CHECK-NEXT: store i32 [[V_A2]], i32 addrspace(4)* %b
+
   int c = __builtin_intel_fpga_reg(2.0f);
+  // CHECK: [[V_CF1:%.*]] = call i32 @llvm.annotation.i32(i32 1073741824, [[BIFR_STR]]
+  // CHECK-NEXT: [[V_CF_BC:%.*]] = bitcast i32 [[V_CF1]] to float
+  // CHECK-NEXT: [[V_CF2:%.*]] = fptosi float [[V_CF_BC]] to i32
+  // CHECK-NEXT: store i32 [[V_CF2]], i32 addrspace(4)* %c
+
   int d = __builtin_intel_fpga_reg( __builtin_intel_fpga_reg( b+12 ));
+  // CHECK: [[V_B1:%.*]] = load i32, i32 addrspace(4)* %b
+  // CHECK-NEXT: [[V_B2:%.*]] = add nsw i32 [[V_B1]], 12
+  // CHECK-NEXT: [[V_B3:%.*]] = call i32 @llvm.annotation.i32(i32 [[V_B2]], [[BIFR_STR]]
+  // CHECK-NEXT: [[V_B4:%.*]] = call i32 @llvm.annotation.i32(i32 [[V_B3]], [[BIFR_STR]]
+  // CHECK-NEXT: store i32 [[V_B4]], i32 addrspace(4)* %d
+
   int e = __builtin_intel_fpga_reg( __builtin_intel_fpga_reg( a+b ));
+  // CHECK: [[V_AB1:%.*]] = load i32, i32 addrspace(4)* %a
+  // CHECK-NEXT: [[V_AB2:%.*]] = load i32, i32 addrspace(4)* %b
+  // CHECK-NEXT: [[V_AB3:%.*]] = add nsw i32 [[V_AB1]], [[V_AB2]]
+  // CHECK-NEXT: [[V_AB4:%.*]] = call i32 @llvm.annotation.i32(i32 [[V_AB3]], [[BIFR_STR]]
+  // CHECK-NEXT: [[V_AB5:%.*]] = call i32 @llvm.annotation.i32(i32 [[V_AB4]], [[BIFR_STR]]
+  // CHECK-NEXT: store i32 [[V_AB5]], i32 addrspace(4)* %e
+
   int f;
   f = __builtin_intel_fpga_reg(a);
+  // CHECK: [[V_F1:%.*]] = load i32, i32 addrspace(4)* %a
+  // CHECK-NEXT: [[V_F2:%.*]] = call i32 @llvm.annotation.i32(i32 [[V_F1]], [[BIFR_STR]]
+  // CHECK-NEXT: store i32 [[V_F2]], i32 addrspace(4)* %f
+}
 
-  struct st i = {1, 5.0f};
-  struct st i2 = i;
-  struct st ii = __builtin_intel_fpga_reg(i);
-  struct st iii;
-  iii = __builtin_intel_fpga_reg(ii);
+void structs() {
+  // CHECK: [[S1:%.*]] = alloca [[T_ST]], align 4
+  // CHECK-NEXT: [[S1_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[S1]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[S2:%.*]] = alloca [[T_ST]], align 4
+  // CHECK-NEXT: [[S2_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[S2]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[T_ST]], align 4
+  // CHECK-NEXT: [[AGG_TEMP_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[AGG_TEMP]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[S3:%.*]] = alloca [[T_ST]], align 4
+  // CHECK-NEXT: [[S3_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[S3]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[REF_TMP:%.*]] = alloca [[T_ST]], align 4
+  // CHECK-NEXT: [[REF_TMP_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[REF_TMP]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[AGG_TEMP2:%.*]] = alloca [[T_ST]], align 4
+  // CHECK-NEXT: [[AGG_TEMP2_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[AGG_TEMP2]] to [[T_ST]] addrspace(4)*
+  struct st s1;
 
-  struct st *iiii = __builtin_intel_fpga_reg(&iii);
+  struct st s2 = __builtin_intel_fpga_reg(s1);
+  // CHECK: [[TMP_S1:%.*]] = bitcast [[T_ST]] addrspace(4)* [[AGG_TEMP_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S2:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S1_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S1]], i8 addrspace(4)* align 4 [[TMP_S2]], i64 8, i1 false)
+  // CHECK-NEXT: [[TMP_S3:%.*]] = bitcast [[T_ST]] addrspace(4)* [[AGG_TEMP_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S4:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP_S3]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_S5:%.*]] = bitcast i8 addrspace(4)* [[TMP_S4]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[TMP_S6:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S7:%.*]] = bitcast [[T_ST]] addrspace(4)* [[TMP_S5]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S6]], i8 addrspace(4)* align 4 [[TMP_S7]], i64 8, i1 false)
 
-  union un u1 = {1};
-  union un u2, *u3;
-  u2 = __builtin_intel_fpga_reg(u1);
+  struct st s3;
+  s3 = __builtin_intel_fpga_reg(s2);
+  // CHECK: [[TMP_S8:%.*]] = bitcast [[T_ST]] addrspace(4)* [[AGG_TEMP2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S9:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S8]], i8 addrspace(4)* align 4 [[TMP_S9]], i64 8, i1 false)
+  // CHECK-NEXT: [[TMP_S10:%.*]] = bitcast [[T_ST]] addrspace(4)* [[AGG_TEMP2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S11:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP_S10]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_S12:%.*]] = bitcast i8 addrspace(4)* [[TMP_S11]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: [[TMP_S13:%.*]] = bitcast [[T_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S14:%.*]] = bitcast [[T_ST]] addrspace(4)* [[TMP_S12]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S13]], i8 addrspace(4)* align 4 [[TMP_S14]], i64 8, i1 false)
+  // CHECK-NEXT: [[TMP_S15:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S3_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_S16:%.*]] = bitcast [[T_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S15]], i8 addrspace(4)* align 4 [[TMP_S16]], i64 8, i1 false)
+}
 
-  u3 = __builtin_intel_fpga_reg(&u2);
+void unions() {
+  // CHECK: [[U1:%.*]] = alloca [[T_UN]], align 4
+  // CHECK-NEXT: [[U1_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[U1]] to [[T_UN]] addrspace(4)*
+  // CHECK-NEXT: [[U2:%.*]] = alloca [[T_UN]], align 4
+  // CHECK-NEXT: [[U2_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[U2]] to [[T_UN]] addrspace(4)*
+  // CHECK-NEXT: [[REF_TMP2:%.*]] = alloca [[T_UN]], align 4
+  // CHECK-NEXT: [[REF_TMP2_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[REF_TMP2]] to [[T_UN]] addrspace(4)*
+  // CHECK-NEXT: [[AGG_TEMP3:%.*]] = alloca [[T_UN]], align 4
+  // CHECK-NEXT: [[AGG_TEMP3_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[AGG_TEMP3]] to [[T_UN]] addrspace(4)*
+  union un u1;
+  union un u2;
 
+  u2 = __builtin_intel_fpga_reg(u1);
+  // CHECK: [[TMP_U1:%.*]] = bitcast [[T_UN]] addrspace(4)* [[AGG_TEMP3_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_U2:%.*]] = bitcast [[T_UN]] addrspace(4)* [[U1_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_U1]], i8 addrspace(4)* align 4 [[TMP_U2]], i64 4, i1 false)
+  // CHECK-NEXT: [[TMP_U3:%.*]] = bitcast [[T_UN]] addrspace(4)* [[AGG_TEMP3_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_U4:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP_U3]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_U5:%.*]] = bitcast i8 addrspace(4)* [[TMP_U4]] to [[T_UN]] addrspace(4)*
+  // CHECK-NEXT: [[TMP_U6:%.*]] = bitcast [[T_UN]] addrspace(4)* [[REF_TMP2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_U7:%.*]] = bitcast [[T_UN]] addrspace(4)* [[TMP_U5]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_U6]], i8 addrspace(4)* align 4 [[TMP_U7]], i64 8, i1 false)
+  // CHECK-NEXT: [[TMP_U8:%.*]] = bitcast [[T_UN]] addrspace(4)* [[U2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_U9:%.*]] = bitcast [[T_UN]] addrspace(4)* [[REF_TMP2_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_U8]], i8 addrspace(4)* align 4 [[TMP_U9]], i64 4, i1 false)
+}
+
+void classes() {
+  // CHECK: [[CA:%.*]] = alloca [[T_CL:%.*]], align 4
+  // CHECK-NEXT: [[CA_ASCAST:%.*]] = addrspacecast [[T_CL]]* [[CA]] to [[T_CL]] addrspace(4)*
+  // CHECK-NEXT: [[CB:%.*]] = alloca [[T_CL]], align 4
+  // CHECK-NEXT: [[CB_ASCAST:%.*]] = addrspacecast [[T_CL]]* [[CB]] to [[T_CL]] addrspace(4)*
+  // CHECK-NEXT: [[AGG_TEMP5:%.*]] = alloca [[T_CL]], align 4
+  // CHECK-NEXT: [[AGG_TEMP5_ASCAST:%.*]] = addrspacecast [[T_CL]]*
   A ca(213);
+
   A cb = __builtin_intel_fpga_reg(ca);
+  // CHECK: [[TMP_C1:%.*]] = bitcast [[T_CL]] addrspace(4)* [[AGG_TEMP5_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_C2:%.*]] = bitcast [[T_CL]] addrspace(4)* [[CA_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_C1]], i8 addrspace(4)* align 4 [[TMP_C2]], i64 4, i1 false)
+  // CHECK-NEXT: [[TMP_C3:%.*]] = bitcast [[T_CL]] addrspace(4)* [[AGG_TEMP5_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_C4:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* [[TMP_C3]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_C5:%.*]] = bitcast i8 addrspace(4)* [[TMP_C4]] to [[T_CL]] addrspace(4)*
+  // CHECK-NEXT: [[TMP_C6:%.*]] = bitcast [[T_CL]] addrspace(4)* [[CB_ASCAST]] to i8 addrspace(4)*
+  // CHECK-NEXT: [[TMP_C7:%.*]] = bitcast [[T_CL]] addrspace(4)* [[TMP_C5]] to i8 addrspace(4)*
+  // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_C6]], i8 addrspace(4)* align 4 [[TMP_C7]], i64 8, i1 false)
+}
+
+void pointers() {
+  int v;
+  int *pv = &v;
+  int *pv2 = __builtin_intel_fpga_reg(pv);
+  // CHECK: [[TMP_P1:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* %pv.ascast, align 8
+  // CHECK-NEXT: [[TMP_P2:%[0-9]+]] = ptrtoint i32 addrspace(4)* [[TMP_P1]] to i64
+  // CHECK-NEXT: [[TMP_P3:%[0-9]+]] = call i64 @llvm.annotation.i64(i64 [[TMP_P2]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_P4:%[0-9]+]] = inttoptr i64 [[TMP_P3]] to i32 addrspace(4)*
+  // CHECK-NEXT: store i32 addrspace(4)* [[TMP_P4]], i32 addrspace(4)* addrspace(4)* %pv2.ascast, align 8
+
+  struct st s;
+  struct st *ps = __builtin_intel_fpga_reg(&s);
+  // CHECK: [[TMP_P5:%.*]] = ptrtoint [[T_ST]] addrspace(4)* %s.ascast to i64
+  // CHECK-NEXT: [[TMP_P6:%.*]] = call i64 @llvm.annotation.i64(i64 [[TMP_P5]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_P7:%.*]] = inttoptr i64 [[TMP_P6]] to [[T_ST]] addrspace(4)*
+  // CHECK-NEXT: store [[T_ST]] addrspace(4)* [[TMP_P7]], [[T_ST]] addrspace(4)* addrspace(4)* %ps.ascast, align 8
 
-  int *ap = &a;
-  int *bp = __builtin_intel_fpga_reg(ap);
+  union un u, *pu;
+  pu = __builtin_intel_fpga_reg(&u);
+  // CHECK: [[TMP_P8:%.*]] = ptrtoint [[T_UN]] addrspace(4)* %u.ascast to i64
+  // CHECK-NEXT: [[TMP_P9:%.*]] = call i64 @llvm.annotation.i64(i64 [[TMP_P8]], [[BIFR_STR]]
+  // CHECK-NEXT: [[TMP_P10:%.*]] = inttoptr i64 [[TMP_P9]] to [[T_UN]] addrspace(4)*
+  // CHECK-NEXT: store [[T_UN]] addrspace(4)* [[TMP_P10]], [[T_UN]] addrspace(4)* addrspace(4)* %pu.ascast, align 8
 }
 
 template <typename name, typename Func>
@@ -297,7 +183,13 @@ __attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) {
 }
 
 int main() {
-  kernel_single_task<class fake_kernel>([]() { foo(); });
+  kernel_single_task<class fake_kernel>([]() {
+    scalars();
+    structs();
+    unions();
+    classes();
+    pointers();
+  });
   return 0;
 }