diff --git a/Core/MIPS/IR/IRJit.cpp b/Core/MIPS/IR/IRJit.cpp index 942c801936d9..5be8607bfdef 100644 --- a/Core/MIPS/IR/IRJit.cpp +++ b/Core/MIPS/IR/IRJit.cpp @@ -44,11 +44,12 @@ namespace MIPSComp { -IRJit::IRJit(MIPSState *mipsState) : frontend_(mipsState->HasDefaultPrefix()), mips_(mipsState) { +IRJit::IRJit(MIPSState *mipsState, bool actualJit) : frontend_(mipsState->HasDefaultPrefix()), mips_(mipsState) { // u32 size = 128 * 1024; InitIR(); - jo.optimizeForInterpreter = true; + // If this IRJit instance will be used to drive a "JIT using IR", don't optimize for interpretation. + jo.optimizeForInterpreter = !actualJit; IROptions opts{}; opts.disableFlags = g_Config.uJitDisableFlags; diff --git a/Core/MIPS/IR/IRJit.h b/Core/MIPS/IR/IRJit.h index 81d97925c7ae..c41df0ee5574 100644 --- a/Core/MIPS/IR/IRJit.h +++ b/Core/MIPS/IR/IRJit.h @@ -195,7 +195,7 @@ class IRBlockCache : public JitBlockCacheDebugInterface { class IRJit : public JitInterface { public: - IRJit(MIPSState *mipsState); + IRJit(MIPSState *mipsState, bool actualJit); ~IRJit(); void DoState(PointerWrap &p) override; diff --git a/Core/MIPS/IR/IRNativeCommon.cpp b/Core/MIPS/IR/IRNativeCommon.cpp index 319495f3437e..ccccc152b7cd 100644 --- a/Core/MIPS/IR/IRNativeCommon.cpp +++ b/Core/MIPS/IR/IRNativeCommon.cpp @@ -481,7 +481,7 @@ void IRNativeBackend::CompileIRInst(IRInst inst) { } IRNativeJit::IRNativeJit(MIPSState *mipsState) - : IRJit(mipsState), debugInterface_(blocks_) {} + : IRJit(mipsState, true), debugInterface_(blocks_) {} void IRNativeJit::Init(IRNativeBackend &backend) { backend_ = &backend; diff --git a/Core/MIPS/MIPS.cpp b/Core/MIPS/MIPS.cpp index 91223bd637a2..e9137f2054d2 100644 --- a/Core/MIPS/MIPS.cpp +++ b/Core/MIPS/MIPS.cpp @@ -214,7 +214,7 @@ void MIPSState::Init() { if (PSP_CoreParameter().cpuCore == CPUCore::JIT || PSP_CoreParameter().cpuCore == CPUCore::JIT_IR) { MIPSComp::jit = MIPSComp::CreateNativeJit(this, PSP_CoreParameter().cpuCore == CPUCore::JIT_IR); } else if (PSP_CoreParameter().cpuCore == CPUCore::IR_INTERPRETER) { - MIPSComp::jit = new MIPSComp::IRJit(this); + MIPSComp::jit = new MIPSComp::IRJit(this, false); } else { MIPSComp::jit = nullptr; } @@ -252,7 +252,7 @@ void MIPSState::UpdateCore(CPUCore desired) { MIPSComp::jit = nullptr; delete oldjit; } - newjit = new MIPSComp::IRJit(this); + newjit = new MIPSComp::IRJit(this, false); break; case CPUCore::INTERPRETER: