Merge branch 'dev'

Author: herumi

CMakeLists.txt

@@ -1,6 +1,6 @@
 cmake_minimum_required(VERSION 3.10)
 
-project(xbyak LANGUAGES CXX VERSION 7.36.1)
+project(xbyak LANGUAGES CXX VERSION 7.36.2)
 
 file(GLOB headers xbyak/*.h)
 

doc/changelog.md

@@ -1,5 +1,6 @@
 # History
 
+* 2026/Apr/17 ver 7.36.2 add fallback when "/sys/devices/cpu_{core,atom}/cpus" does not exist
 * 2026/Apr/16 ver 7.36.1 fix the construction of StackFrame
 * 2026/Apr/14 ver 7.36 util::StackFrame supports Use{RSI,RDI,RBP,RBPAsFramePointer}
 * 2026/Mar/30 ver 7.35.4 fix the encoding of disp8N for vcvthf82ph/vcvt2ph2{b,h}f8[,s]

meson.build

@@ -5,7 +5,7 @@
 project(
 	'xbyak',
 	'cpp',
-	version: '7.36.1',
+	version: '7.36.2',
 	license: 'BSD-3-Clause',
 	default_options: 'b_ndebug=if-release'
 )

readme.md

@@ -1,5 +1,5 @@
 
-# Xbyak 7.36.1 [![Badge Build]][Build Status]
+# Xbyak 7.36.2 [![Badge Build]][Build Status]
 
 *A JIT assembler for x86/x64 architectures supporting advanced instruction sets up to AVX10.2*
 

readme.txt

@@ -1,5 +1,5 @@
 
-    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 7.36.1
+    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 7.36.2
 
 -----------------------------------------------------------------------------
 ◎概要
@@ -404,6 +404,7 @@ sample/{echo,hello}.bfは http://www.kmonos.net/alang/etc/brainfuck.php から
 -----------------------------------------------------------------------------
 ◎履歴
 
+2026/04/17 ver 7.36.2 /sys/devices/cpu_{core,atom}/cpusが存在しないときのfallbackを追加
 2026/04/16 ver 7.36.1 StackFrameの構築方法を修正
 2026/04/14 ver 7.36 util::StackFrameがUse{RSI,RDI,RBP,RBPAsFramePointer}対応
 2026/03/30 ver 7.35.4 vcvthf82ph/vcvt2ph2{b,h}f8[,s]のdisp8Nのエンコーディングミス修正

xbyak/xbyak.h

@@ -176,7 +176,7 @@ namespace Xbyak {
 
 enum {
 	DEFAULT_MAX_CODE_SIZE = 4096,
-	VERSION = 0x7361 /* 0xABCD = A.BC(.D) */
+	VERSION = 0x7362 /* 0xABCD = A.BC(.D) */
 };
 
 #ifndef MIE_INTEGER_TYPE_DEFINED

xbyak/xbyak_mnemonic.h

@@ -1,4 +1,4 @@
-const char *getVersionString() const { return "7.36.1"; }
+const char *getVersionString() const { return "7.36.2"; }
 void aadd(const Address& addr, const Reg32e &reg) { opMR(addr, reg, T_0F38, 0x0FC, T_APX); }
 void aand(const Address& addr, const Reg32e &reg) { opMR(addr, reg, T_0F38|T_66, 0x0FC, T_APX|T_66); }
 void adc(const Operand& op, uint32_t imm) { opOI(op, imm, 0x10, 2); }

xbyak/xbyak_util.h

@@ -101,6 +101,8 @@
 #endif
 #ifdef _WIN32
 #include <windows.h>
+#else
+#include <sched.h>
 #endif
 namespace Xbyak { namespace util {
 class CpuTopology;
@@ -1564,9 +1566,10 @@ inline bool initCpuTopology(CpuTopology& cpuTopo)
 	// Assign core types for hybrid architectures
 	const bool isHybrid = cpuTopo.isHybrid();
 	if (isHybrid) {
-		// For hybrid systems, read P-core and E-core lists from sysfs
+		// For hybrid systems, try toread P-core and E-core lists from sysfs first
 		CpuMask pCoreMask;
-		if (parseCpuList(pCoreMask, "/sys/devices/cpu_core/cpus")) {
+		const bool hasPCoreSysfs = parseCpuList(pCoreMask, "/sys/devices/cpu_core/cpus");
+		if (hasPCoreSysfs) {
 			// Set Performance core types
 			for (CpuMask::const_iterator it = pCoreMask.begin(); it != pCoreMask.end(); ++it) {
 				uint32_t cpuIdx = *it;
@@ -1576,7 +1579,8 @@ inline bool initCpuTopology(CpuTopology& cpuTopo)
 			}
 		}
 		CpuMask eCoreMask;
-		if (parseCpuList(eCoreMask, "/sys/devices/cpu_atom/cpus")) {
+		const bool hasECoreSysfs = parseCpuList(eCoreMask, "/sys/devices/cpu_atom/cpus");
+		if (hasECoreSysfs) {
 			// Set Efficient core types
 			for (CpuMask::const_iterator it = eCoreMask.begin(); it != eCoreMask.end(); ++it) {
 				uint32_t cpuIdx = *it;
@@ -1585,6 +1589,38 @@ inline bool initCpuTopology(CpuTopology& cpuTopo)
 				}
 			}
 		}
+		// Fallback: if either sysfs paths are unavailable, detect both core type per-CPU
+		// via CPUID leaf 0x1A (Hybrid Information) by pinning each logical CPU.
+		if (!hasPCoreSysfs || !hasECoreSysfs) {
+			// CPUID leaf 0x1A EAX[31:24] core type identifiers
+			const uint32_t Cpuid_StandardCoreType = 0x40; // P-core (Performance)
+			const uint32_t Cpuid_AtomCoreType = 0x20; // E-core (Efficient)
+
+			cpu_set_t originalMask;
+			CPU_ZERO(&originalMask);
+			if (sched_getaffinity(0, sizeof(cpu_set_t), &originalMask) != 0) goto SKIP_FALLBACK;
+
+			for (uint32_t cpu = 0; cpu < logicalCpuNum; cpu++) {
+				cpu_set_t cpuMask;
+				CPU_ZERO(&cpuMask);
+				CPU_SET(cpu, &cpuMask);
+				if (sched_setaffinity(0, sizeof(cpu_set_t), &cpuMask) == 0) {
+					// CPUID leaf 0x1A: Hybrid Information
+					uint32_t data[4] = {};
+					Cpu::getCpuidEx(0x1A, 0, data);
+					const uint32_t coreTypeField = (data[0] >> 24) & 0xFF;
+					if (coreTypeField == Cpuid_StandardCoreType) {
+						cpuTopo.logicalCpus_[cpu].coreType = Performance;
+					} else if (coreTypeField == Cpuid_AtomCoreType) {
+						cpuTopo.logicalCpus_[cpu].coreType = Efficient;
+					}
+				}
+			}
+
+			// Restore the original CPU affinity mask
+			sched_setaffinity(0, sizeof(cpu_set_t), &originalMask);
+		SKIP_FALLBACK:;
+		}
 	}
 
 	// Read coherency line size