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3558 lines (3556 loc) · 194 KB
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# RUN: env LLVM_BIN_PATH=%llvm_build_bin_dir python %sycl_tools_src_dir/abi_check.py --mode check_symbols --reference %s %sycl_libs_dir/libsycl.so
# REQUIRES: linux
_Z20__spirv_ocl_prefetchPKcm
_Z21__spirv_MemoryBarrierN5__spv5ScopeEj
_Z22__spirv_ControlBarrierN5__spv5ScopeES0_j
_Z23__spirv_GroupWaitEventsN5__spv5ScopeEjPPv
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_ZN2cl10__host_std10SignBitSetENS_4sycl3vecINS1_6detail9half_impl4halfELi2EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecINS1_6detail9half_impl4halfELi3EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecINS1_6detail9half_impl4halfELi4EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecINS1_6detail9half_impl4halfELi8EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIdLi16EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIdLi2EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIdLi3EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIdLi4EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIdLi8EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10SignBitSetENS_4sycl6detail9half_impl4halfE
_ZN2cl10__host_std10SignBitSetEd
_ZN2cl10__host_std10SignBitSetEf
_ZN2cl10__host_std10half_exp10ENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10half_exp10ENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10half_exp10ENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10half_exp10ENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10half_exp10ENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10half_exp10Ef
_ZN2cl10__host_std10half_log10ENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10half_log10ENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10half_log10ENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10half_log10ENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10half_log10ENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10half_log10Ef
_ZN2cl10__host_std10half_recipENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10half_recipENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10half_recipENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10half_recipENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10half_recipENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10half_recipEf
_ZN2cl10__host_std10half_rsqrtENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10half_rsqrtENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10half_rsqrtENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10half_rsqrtENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10half_rsqrtENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10half_rsqrtEf
_ZN2cl10__host_std10native_cosENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10native_cosENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10native_cosENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10native_cosENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10native_cosENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10native_cosEf
_ZN2cl10__host_std10native_expENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10native_expENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10native_expENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10native_expENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10native_expENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10native_expEf
_ZN2cl10__host_std10native_logENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10native_logENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10native_logENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10native_logENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10native_logENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10native_logEf
_ZN2cl10__host_std10native_sinENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10native_sinENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10native_sinENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10native_sinENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10native_sinENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10native_sinEf
_ZN2cl10__host_std10native_tanENS_4sycl3vecIfLi16EEE
_ZN2cl10__host_std10native_tanENS_4sycl3vecIfLi2EEE
_ZN2cl10__host_std10native_tanENS_4sycl3vecIfLi3EEE
_ZN2cl10__host_std10native_tanENS_4sycl3vecIfLi4EEE
_ZN2cl10__host_std10native_tanENS_4sycl3vecIfLi8EEE
_ZN2cl10__host_std10native_tanEf
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIaLi16EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIaLi2EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIaLi3EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIaLi4EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIaLi8EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIiLi16EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIiLi2EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIiLi3EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIiLi4EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIiLi8EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIlLi16EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIlLi2EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIlLi3EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIlLi4EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIlLi8EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIsLi16EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIsLi2EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIsLi3EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIsLi4EEES3_
_ZN2cl10__host_std10s_abs_diffENS_4sycl3vecIsLi8EEES3_
_ZN2cl10__host_std10s_abs_diffEaa
_ZN2cl10__host_std10s_abs_diffEii
_ZN2cl10__host_std10s_abs_diffEll
_ZN2cl10__host_std10s_abs_diffEss
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIaLi16EEENS2_IhLi16EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIaLi2EEENS2_IhLi2EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIaLi3EEENS2_IhLi3EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIaLi4EEENS2_IhLi4EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIaLi8EEENS2_IhLi8EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIiLi16EEENS2_IjLi16EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIiLi2EEENS2_IjLi2EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIiLi3EEENS2_IjLi3EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIiLi4EEENS2_IjLi4EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIiLi8EEENS2_IjLi8EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIsLi16EEENS2_ItLi16EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIsLi2EEENS2_ItLi2EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIsLi3EEENS2_ItLi3EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIsLi4EEENS2_ItLi4EEE
_ZN2cl10__host_std10s_upsampleENS_4sycl3vecIsLi8EEENS2_ItLi8EEE
_ZN2cl10__host_std10s_upsampleEah
_ZN2cl10__host_std10s_upsampleEij
_ZN2cl10__host_std10s_upsampleEst
_ZN2cl10__host_std10smoothstepENS_4sycl3vecINS1_6detail9half_impl4halfELi16EEES6_S6_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecINS1_6detail9half_impl4halfELi2EEES6_S6_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecINS1_6detail9half_impl4halfELi3EEES6_S6_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecINS1_6detail9half_impl4halfELi4EEES6_S6_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecINS1_6detail9half_impl4halfELi8EEES6_S6_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIdLi16EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIdLi2EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIdLi3EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIdLi4EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIdLi8EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIfLi16EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIfLi2EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIfLi3EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIfLi4EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl3vecIfLi8EEES3_S3_
_ZN2cl10__host_std10smoothstepENS_4sycl6detail9half_impl4halfES4_S4_
_ZN2cl10__host_std10smoothstepEddd
_ZN2cl10__host_std10smoothstepEfff
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIhLi16EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIhLi2EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIhLi3EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIhLi4EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIhLi8EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIjLi16EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIjLi2EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIjLi3EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIjLi4EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecIjLi8EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecImLi16EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecImLi2EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecImLi3EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecImLi4EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecImLi8EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecItLi16EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecItLi2EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecItLi3EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecItLi4EEES3_
_ZN2cl10__host_std10u_abs_diffENS_4sycl3vecItLi8EEES3_
_ZN2cl10__host_std10u_abs_diffEhh
_ZN2cl10__host_std10u_abs_diffEjj
_ZN2cl10__host_std10u_abs_diffEmm
_ZN2cl10__host_std10u_abs_diffEtt
_ZN2cl10__host_std10u_upsampleENS_4sycl3vecIhLi16EEES3_
_ZN2cl10__host_std10u_upsampleENS_4sycl3vecIhLi2EEES3_
_ZN2cl10__host_std10u_upsampleENS_4sycl3vecIhLi3EEES3_
_ZN2cl10__host_std10u_upsampleENS_4sycl3vecIhLi4EEES3_
_ZN2cl10__host_std10u_upsampleENS_4sycl3vecIhLi8EEES3_
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