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board: add NUCLEO-F429ZI board support
Add initial support for the STM32 NUCLEO-F429ZI board. This commit introduces a new board definition, including board initialization code, build rules, and default configuration. It also updates Kconfig and Makefile entries to integrate the new board into the build system. The board configuration supports the on-board ST-Link Virtual COM Port (VCOM) using USART3, allowing kernel log output and debugging via the standard USB ST-Link interface without additional hardware. - Add new board definition under board/nucleof429 - board initialization code - build.mk and defconfig - Update board and platform Kconfig entries - Update top-level Makefile for board selection - Enable USART3 for ST-Link VCOM console output - STM32 NUCLEO-F429ZI - ST-Link V2-1 (on-board)
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‎Makefile‎

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@@ -18,6 +18,8 @@ ifeq "$(CONFIG_BOARD_STM32F429DISCOVERY)" "y"
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BOARD ?= discoveryf429
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else ifeq "$(CONFIG_BOARD_NETDUINOPLUS2)" "y"
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BOARD ?= netduinoplus2
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else ifeq "$(CONFIG_BOARD_STM32F429NUCLEO)" "y"
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BOARD ?= nucleof429
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else
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BOARD ?= discoveryf4
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endif

‎README.md‎

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@@ -55,7 +55,8 @@ with a focus on efficiency (performance and power consumption) and security
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F9 Microkernel supports the following boards:
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* [STM32F4DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f4discovery.html)
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* [STM32F429I-DISC1](https://www.st.com/en/evaluation-tools/32f429idiscovery.html)
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- Both are based on ARM Cortex-M4F core. F9 should work on any STM32F40x/STM32F429/STM32F439 microcontroller.
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* [NUCLEO-F429ZI](https://www.st.com/en/evaluation-tools/nucleo-f429zi.html)
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- All supported boards are based on the ARM Cortex-M4F core. F9 should work on any STM32F40x/STM32F429/STM32F439 microcontroller.
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* Netduino Plus 2 (STM32F405RGT6)
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- Supported by upstream [QEMU for emulation](https://www.qemu.org/docs/master/system/arm/stm32.html), making it ideal for development and testing without hardware.
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@@ -108,6 +109,17 @@ For STM32F429I-DISC1:
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| USART2 | PD5 | PD6 |
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| USART1 | PA9 | PA10 |
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For NUCLEO-F429ZI:
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| Port | TX Pin | RX Pin |
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|--------|--------|--------|
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| USART3 | PD8 | PD9 |
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| USART2 | PD5 | PD6 |
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| USART1 | PB6 | PB7 |
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> **Note:** On the NUCLEO-F429ZI, `USART3` is connected to the on-board
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> **VCOM (Virtual COM Port)** provided by the ST-LINK.
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For Netduino Plus 2 under QEMU, the default configuration uses USART1, which
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QEMU routes to the console. Run with:
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‎board/Kconfig‎

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@@ -29,6 +29,12 @@ config BOARD_NETDUINOPLUS2
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Netduino Plus 2 board with STM32F405RGT6 MCU.
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This board is supported by upstream QEMU for emulation.
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config BOARD_STM32F429NUCLEO
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bool "STM32F429 Nucleo"
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select PLATFORM_STM32F429
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help
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STM32F429 Nucleo board with STM32F429ZIT6 MCU.
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endchoice
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config QEMU

‎board/nucleof429/board.c‎

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/* Copyright (c) 2016 The F9 Microkernel Project. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include <platform/stm32f429/gpio.h>
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#include <platform/stm32f429/usart.h>
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#include "board.h"
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struct usart_dev console_uart = {
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.u_num = 3,
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.baud = 115200,
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BOARD_USART_CONFIGS
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.tx = {
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.port = BOARD_USART_TX_IO_PORT,
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.pin = BOARD_USART_TX_IO_PIN,
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.pupd = GPIO_PUPDR_NONE,
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.type = GPIO_MODER_ALT,
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.func = BOARD_USART_FUNC,
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.o_type = GPIO_OTYPER_PP,
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.speed = GPIO_OSPEEDR_50M,
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},
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.rx = {
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.port = BOARD_USART_RX_IO_PORT,
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.pin = BOARD_USART_RX_IO_PIN,
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.pupd = GPIO_PUPDR_NONE,
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.type = GPIO_MODER_ALT,
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.func = BOARD_USART_FUNC,
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.o_type = GPIO_OTYPER_PP,
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.speed = GPIO_OSPEEDR_50M,
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},
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};

‎board/nucleof429/board.h‎

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/* Copyright (c) 2016 The F9 Microkernel Project. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef NUCLEO_F429_BOARD_H_
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#define NUCLEO_F429_BOARD_H_
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#include <platform/stm32f429/registers.h>
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#include <platform/stm32f429/gpio.h>
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#include <platform/stm32f429/usart.h>
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#include <platform/stm32f429/nvic.h>
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#include <platform/stm32f429/systick.h>
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extern struct usart_dev console_uart;
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#if defined(CONFIG_DBGPORT_USE_USART1)
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#define BOARD_UART_DEVICE USART1_IRQn
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#define BOARD_UART_HANDLER USART1_HANDLER
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#define BOARD_USART_FUNC af_usart1
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#define BOARD_USART_CONFIGS \
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.base = USART1_BASE, \
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.rcc_apbenr = RCC_USART1_APBENR, \
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.rcc_reset = RCC_APB2RSTR_USART1RST,
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#define BOARD_USART_TX_IO_PORT GPIOB
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#define BOARD_USART_TX_IO_PIN 6
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#define BOARD_USART_RX_IO_PORT GPIOB
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#define BOARD_USART_RX_IO_PIN 7
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#elif defined(CONFIG_DBGPORT_USE_USART2)
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#define BOARD_UART_DEVICE USART2_IRQn
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#define BOARD_UART_HANDLER USART2_HANDLER
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#define BOARD_USART_FUNC af_usart2
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#define BOARD_USART_CONFIGS \
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.base = USART2_BASE, \
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.rcc_apbenr = RCC_USART2_APBENR, \
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.rcc_reset = RCC_APB1RSTR_USART2RST,
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#define BOARD_USART_TX_IO_PORT GPIOD
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#define BOARD_USART_TX_IO_PIN 5
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#define BOARD_USART_RX_IO_PORT GPIOD
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#define BOARD_USART_RX_IO_PIN 6
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#else /* default: USART3 (ST-LINK virtual COM port on Nucleo-F429ZI) */
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#define BOARD_UART_DEVICE USART3_IRQn
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#define BOARD_UART_HANDLER USART3_HANDLER
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#define BOARD_USART_FUNC af_usart3
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#define BOARD_USART_CONFIGS \
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.base = USART3_BASE, \
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.rcc_apbenr = RCC_USART3_APBENR, \
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.rcc_reset = RCC_APB1RSTR_USART3RST,
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#define BOARD_USART_TX_IO_PORT GPIOD
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#define BOARD_USART_TX_IO_PIN 8
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#define BOARD_USART_RX_IO_PORT GPIOD
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#define BOARD_USART_RX_IO_PIN 9
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#endif
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#endif /* NUCLEO_F429_BOARD_H_ */

‎board/nucleof429/build.mk‎

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# Copyright (c) 2016 The F9 Microkernel Project. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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CHIP := stm32f429
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PLATFORM := stm32
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STM32_VARIANT := f4
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board-y = board.o
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loader-board-y = board.loader.o

‎board/nucleof429/defconfig‎

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CONFIG_BOARD_STM32F429NUCLEO=y
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CONFIG_DBGPORT_USE_USART3=y
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CONFIG_EXTI0_USER_IRQ=y
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CONFIG_EXTI1_USER_IRQ=y
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CONFIG_ETH_USER_IRQ=y
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CONFIG_BUILD_USER_APPS=y
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CONFIG_PINGPONG=y
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CONFIG_EXTI_INTERRUPT_TEST=y
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CONFIG_L4_TEST=y

‎kernel/memory.c‎

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DECLARE_MEMPOOL("LCD_FRAME_BUFFER_2", 0xD00A0000, 0xD0140000,
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MP_UR | MP_UW | MP_DEVICES, MPT_DEVICES),
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#endif
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#ifdef CONFIG_BOARD_STM32F429NUCLEO
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DECLARE_MEMPOOL("APB2_3DEV", 0x40015000, 0x40015c00,
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MP_UR | MP_UW | MP_DEVICES, MPT_DEVICES),
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DECLARE_MEMPOOL("APB2_4DEV", 0x40016800, 0x40017900,
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MP_UR | MP_UW | MP_DEVICES, MPT_DEVICES),
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DECLARE_MEMPOOL("CR_PLLSAION_BB", 0x42470000, 0x42470c00,
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MP_UR | MP_UW | MP_DEVICES, MPT_DEVICES),
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#endif
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};
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DECLARE_KTABLE(as_t, as_table, CONFIG_MAX_ADRESS_SPACES);

‎platform/Kconfig‎

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bool "USART1"
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config DBGPORT_USE_USART2
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bool "USART2"
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config DBGPORT_USE_USART3
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bool "USART3"
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config DBGPORT_USE_USART4
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bool "USART4"
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‎platform/stm32f429/Kconfig‎

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bool "TIM1_CC User IRQ"
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default n
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config TIM2_USER_IRQ
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config TIM2_USER_IRQ
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bool "TIM2 User IRQ"
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default n
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bool "TIM8_UP_TIM13 User IRQ"
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default n
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config TIM8_TRG_COM_TIM14_USER_IRQ
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config TIM8_TRG_COM_TIM14_USER_IRQ
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bool "TIM8_TRG_COM_TIM14 User IRQ"
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default n
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