[RISC-V] coreclr-pal and coreclr-debug directories (#82380)

* [RISC-V] coreclr-pal and coreclr-debug directories

- Successfully cross-build for RISC-V.
- Run A simple application "helloworld"
- Fail a test in clr.paltest

* Fix

* [PAL] Update

* [PAL] Update

* [PAL] Updated based on reviews

* [PAL] Update REGISTER_RISCV64_X0

* [PAL] Fix a mistake

* [PAL] Fix by reviews

* [PAL] Restore EPILOG_STACK_FREE

Author: clamp03

eng/native/tryrun.cmake

@@ -161,6 +161,8 @@ else()
   message(FATAL_ERROR "Unsupported platform. OS: ${CMAKE_SYSTEM_NAME}, arch: ${TARGET_ARCH_NAME}")
 endif()
 
-if(TARGET_ARCH_NAME MATCHES "^(x86|x64|s390x|armv6|loongarch64|riscv64|ppc64le)$")
+if(TARGET_ARCH_NAME MATCHES "^(x86|x64|s390x|armv6|loongarch64|ppc64le)$")
   set_cache_value(HAVE_FUNCTIONAL_PTHREAD_ROBUST_MUTEXES_EXITCODE 0)
+elseif (TARGET_ARCH_NAME STREQUAL "riscv64")
+  set_cache_value(HAVE_FUNCTIONAL_PTHREAD_ROBUST_MUTEXES_EXITCODE 1)
 endif()

src/coreclr/debug/createdump/createdumpunix.cpp

@@ -3,7 +3,7 @@
 
 #include "createdump.h"
 
-#if defined(__arm__) || defined(__aarch64__) || defined(__loongarch64)
+#if defined(__arm__) || defined(__aarch64__) || defined(__loongarch64) || defined(__riscv)
 long g_pageSize = 0;
 #endif
 
@@ -19,7 +19,7 @@ CreateDump(const CreateDumpOptions& options)
     bool result = false;
 
     // Initialize PAGE_SIZE
-#if defined(__arm__) || defined(__aarch64__) || defined(__loongarch64)
+#if defined(__arm__) || defined(__aarch64__) || defined(__loongarch64) || defined(__riscv)
     g_pageSize = sysconf(_SC_PAGESIZE);
 #endif
     TRACE("PAGE_SIZE %d\n", PAGE_SIZE);

src/coreclr/debug/createdump/datatarget.cpp

@@ -77,6 +77,8 @@ DumpDataTarget::GetMachineType(
     *machine = IMAGE_FILE_MACHINE_I386;
 #elif HOST_LOONGARCH64
     *machine = IMAGE_FILE_MACHINE_LOONGARCH64;
+#elif HOST_RISCV64
+    *machine = IMAGE_FILE_MACHINE_RISCV64;
 #else
 #error Unsupported architecture
 #endif
@@ -87,7 +89,7 @@ HRESULT STDMETHODCALLTYPE
 DumpDataTarget::GetPointerSize(
     /* [out] */ ULONG32 *size)
 {
-#if defined(HOST_AMD64) || defined(HOST_ARM64) || defined(HOST_LOONGARCH64)
+#if defined(HOST_AMD64) || defined(HOST_ARM64) || defined(HOST_LOONGARCH64) || defined(HOST_RISCV64)
     *size = 8;
 #elif defined(HOST_ARM) || defined(HOST_X86)
     *size = 4;

src/coreclr/debug/createdump/dumpwriterelf.h

@@ -23,6 +23,8 @@
 #define ELF_ARCH  EM_ARM
 #elif defined(__loongarch64)
 #define ELF_ARCH  EM_LOONGARCH
+#elif defined(__riscv)
+#define ELF_ARCH  EM_RISCV
 #endif
 
 #define PH_HDR_CANARY 0xFFFF

src/coreclr/debug/createdump/memoryregion.h

@@ -1,7 +1,7 @@
 // Licensed to the .NET Foundation under one or more agreements.
 // The .NET Foundation licenses this file to you under the MIT license.
 
-#if !defined(PAGE_SIZE) && (defined(__arm__) || defined(__aarch64__) || defined(__loongarch64))
+#if !defined(PAGE_SIZE) && (defined(__arm__) || defined(__aarch64__) || defined(__loongarch64)) || defined(__riscv)
 extern long g_pageSize;
 #define PAGE_SIZE g_pageSize
 #endif

src/coreclr/debug/createdump/threadinfo.h

@@ -20,6 +20,14 @@ class CrashInfo;
 #define MCREG_Pc(mc)      ((mc).pc)
 #endif
 
+#if defined(__riscv)
+// See src/coreclr/pal/src/include/pal/context.h
+#define MCREG_Ra(mc)      ((mc).ra)
+#define MCREG_Fp(mc)      ((mc).s0)
+#define MCREG_Sp(mc)      ((mc).sp)
+#define MCREG_Pc(mc)      ((mc).pc)
+#endif
+
 #define FPREG_ErrorOffset(fpregs) *(DWORD*)&((fpregs).rip)
 #define FPREG_ErrorSelector(fpregs) *(((WORD*)&((fpregs).rip)) + 2)
 #define FPREG_DataOffset(fpregs) *(DWORD*)&((fpregs).rdp)
@@ -30,6 +38,12 @@ class CrashInfo;
 #elif defined(__loongarch64)
 // struct user_regs_struct {} defined `/usr/include/loongarch64-linux-gnu/sys/user.h`
 
+struct user_fpregs_struct
+{
+  unsigned long long  fpregs[32];
+  unsigned long       fpscr;
+} __attribute__((__packed__));
+#elif defined(__riscv)
 struct user_fpregs_struct
 {
   unsigned long long  fpregs[32];
@@ -154,6 +168,10 @@ class ThreadInfo
     inline const uint64_t GetInstructionPointer() const { return m_gpRegisters.ARM_pc; }
     inline const uint64_t GetStackPointer() const { return m_gpRegisters.ARM_sp; }
     inline const uint64_t GetFramePointer() const { return m_gpRegisters.ARM_fp; }
+#elif defined(__riscv)
+    inline const uint64_t GetInstructionPointer() const { return MCREG_Pc(m_gpRegisters); }
+    inline const uint64_t GetStackPointer() const { return MCREG_Sp(m_gpRegisters); }
+    inline const uint64_t GetFramePointer() const { return MCREG_Fp(m_gpRegisters); }
 #endif
 #endif // __APPLE__
     bool IsCrashThread() const;

src/coreclr/debug/createdump/threadinfounix.cpp

@@ -59,6 +59,8 @@ ThreadInfo::Initialize()
     TRACE("Thread %04x RIP %016llx RSP %016llx\n", m_tid, (unsigned long long)m_gpRegisters.rip, (unsigned long long)m_gpRegisters.rsp);
 #elif defined(__loongarch64)
     TRACE("Thread %04x PC %016llx SP %016llx\n", m_tid, (unsigned long long)m_gpRegisters.pc, (unsigned long long)m_gpRegisters.gpr[3]);
+#elif defined(__riscv)
+    TRACE("Thread %04x PC %016llx SP %016llx\n", m_tid, (unsigned long long)m_gpRegisters.pc, (unsigned long long)m_gpRegisters.sp);
 #else
 #error "Unsupported architecture"
 #endif
@@ -243,6 +245,8 @@ ThreadInfo::GetThreadContext(uint32_t flags, CONTEXT* context) const
         memcpy(context->F, m_fpRegisters.fpregs, sizeof(context->F));
         context->Fcsr = m_fpRegisters.fpscr;
     }
+#elif defined(__riscv)
+    _ASSERTE(!"TODO RISCV64 NYI");
 #else
 #error Platform not supported
 #endif

src/coreclr/debug/daccess/daccess.cpp

@@ -5450,6 +5450,8 @@ ClrDataAccess::Initialize(void)
         CorDebugPlatform hostPlatform = CORDB_PLATFORM_POSIX_ARM64;
     #elif defined(TARGET_LOONGARCH64)
         CorDebugPlatform hostPlatform = CORDB_PLATFORM_POSIX_LOONGARCH64;
+    #elif defined(TARGET_RISCV64)
+        CorDebugPlatform hostPlatform = CORDB_PLATFORM_POSIX_RISCV64;
     #else
         #error Unknown Processor.
     #endif

src/coreclr/debug/daccess/request.cpp

@@ -559,6 +559,18 @@ ClrDataAccess::GetRegisterName(int regNum, unsigned int count, _Inout_updates_z_
         W("S6"), W("S7"), W("K0"), W("K1"),
         W("GP"), W("SP"), W("FP"), W("RA")
     };
+#elif defined(TARGET_RISCV64)
+    static const WCHAR *regs[] =
+    {
+        W("R0"), W("RA"), W("SP"), W("GP"),
+        W("TP"), W("T0"), W("T1"), W("T2"),
+        W("FP"), W("S1"), W("A0"), W("A1"),
+        W("A2"), W("A3"), W("A4"), W("A5"),
+        W("A6"), W("A7"), W("S2"), W("S3"),
+        W("S4"), W("S5"), W("S6"), W("S7"),
+        W("S8"), W("S9"), W("S10"), W("S11"),
+        W("T3"), W("T4"), W("T5"), W("T6")
+    };
 #endif
 
     // Caller frame registers are encoded as "-(reg+1)".

src/coreclr/debug/di/CMakeLists.txt

@@ -66,7 +66,7 @@ if(CLR_CMAKE_HOST_WIN32)
     endif()
 elseif(CLR_CMAKE_HOST_UNIX)
 
-    if(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_ARM OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64)
+    if(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_ARM OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64 OR CLR_CMAKE_TARGET_ARCH_RISCV64)
       set(CORDBDI_SOURCES_ASM_FILE
         ${ARCH_SOURCES_DIR}/floatconversion.S
       )