cpu::intel: Do CPU feature detection in Rust.

Author: briansmith

Cargo.toml

@@ -39,7 +39,6 @@ include = [
     "crypto/cipher_extra/test/aes_128_gcm_siv_tests.txt",
     "crypto/cipher_extra/test/aes_256_gcm_siv_tests.txt",
     "crypto/constant_time_test.c",
-    "crypto/cpu_intel.c",
     "crypto/crypto.c",
     "crypto/curve25519/asm/x25519-asm-arm.S",
     "crypto/curve25519/curve25519.c",

build.rs

@@ -66,8 +66,6 @@ const RING_SRCS: &[(&[&str], &str)] = &[
 
     (&[ARM, X86_64, X86], "crypto/crypto.c"),
 
-    (&[X86_64, X86], "crypto/cpu_intel.c"),
-
     (&[X86], "crypto/fipsmodule/aes/asm/aesni-x86.pl"),
     (&[X86], "crypto/fipsmodule/aes/asm/vpaes-x86.pl"),
     (&[X86], "crypto/fipsmodule/bn/asm/x86-mont.pl"),
@@ -878,7 +876,6 @@ fn prefix_all_symbols(pp: char, prefix_prefix: &str, prefix: &str) -> String {
         "LIMBS_window5_split_window",
         "LIMBS_window5_unsplit_window",
         "LIMB_shr",
-        "OPENSSL_cpuid_setup",
         "aes_hw_ctr32_encrypt_blocks",
         "aes_hw_set_encrypt_key",
         "aes_hw_set_encrypt_key_alt",

crypto/cpu_intel.c

@@ -510,34 +510,10 @@ static inline void CRYPTO_store_u32_be(void *out, uint32_t v) {
 
 // Runtime CPU feature support
 
-#if defined(OPENSSL_X86) || defined(OPENSSL_X86_64)
-// OPENSSL_ia32cap_P contains the Intel CPUID bits when running on an x86 or
-// x86-64 system.
-//
-//   Index 0:
-//     EDX for CPUID where EAX = 1
-//     Bit 20 is always zero
-//     Bit 28 is adjusted to reflect whether the data cache is shared between
-//       multiple logical cores
-//     Bit 30 is used to indicate an Intel CPU
-//   Index 1:
-//     ECX for CPUID where EAX = 1
-//     Bit 11 is used to indicate AMD XOP support, not SDBG
-//   Index 2:
-//     EBX for CPUID where EAX = 7, ECX = 0
-//     Bit 14 (for removed feature MPX) is used to indicate a preference for ymm
-//       registers over zmm even when zmm registers are supported
-//   Index 3:
-//     ECX for CPUID where EAX = 7, ECX = 0
-//
-// Note: the CPUID bits are pre-adjusted for the OSXSAVE bit and the XMM, YMM,
-// and AVX512 bits in XCR0, so it is not necessary to check those. (WARNING: See
-// caveats in cpu_intel.c.)
 #if defined(OPENSSL_X86_64)
 extern uint32_t avx2_available;
 extern uint32_t adx_bmi2_available;
 #endif
-#endif
 
 
 #if defined(OPENSSL_ARM)