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Commit 0ea1671

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Biao HuangJakub Kicinski
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net: stmmac: dwmac-mediatek: fix wrong delay value issue when resume back
mac_delay value will be divided by 550/170 in mt2712_delay_ps2stage(), which is invoked at the beginning of mt2712_set_delay(), and the value should be restored at the end of mt2712_set_delay(). Or, mac_delay will be divided again when invoking mt2712_set_delay() when resume back. So, add mt2712_delay_stage2ps() to mt2712_set_delay() to recovery the original mac_delay value. Signed-off-by: Biao Huang <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
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drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

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Original file line numberDiff line numberDiff line change
@@ -130,6 +130,31 @@ static void mt2712_delay_ps2stage(struct mediatek_dwmac_plat_data *plat)
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}
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}
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static void mt2712_delay_stage2ps(struct mediatek_dwmac_plat_data *plat)
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{
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struct mac_delay_struct *mac_delay = &plat->mac_delay;
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switch (plat->phy_mode) {
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_RMII:
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/* 550ps per stage for MII/RMII */
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mac_delay->tx_delay *= 550;
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mac_delay->rx_delay *= 550;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_ID:
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/* 170ps per stage for RGMII */
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mac_delay->tx_delay *= 170;
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mac_delay->rx_delay *= 170;
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break;
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default:
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dev_err(plat->dev, "phy interface not supported\n");
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break;
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}
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}
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static int mt2712_set_delay(struct mediatek_dwmac_plat_data *plat)
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{
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struct mac_delay_struct *mac_delay = &plat->mac_delay;
@@ -199,6 +224,8 @@ static int mt2712_set_delay(struct mediatek_dwmac_plat_data *plat)
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regmap_write(plat->peri_regmap, PERI_ETH_DLY, delay_val);
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regmap_write(plat->peri_regmap, PERI_ETH_DLY_FINE, fine_val);
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mt2712_delay_stage2ps(plat);
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return 0;
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}
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