Skip to content

Commit 85defd1

Browse files
committed
Ensure alignment when computing reserved registers
If the routine for computing reserved peripheral memory places at least one u32 after a u16 register, the compiler could insert an extra u16 of padding to align the u32 reservation. The extra padding is not considered by the routine. This can result in incorrect register offsets for all registers placed after the reservation. This commit only uses byte arrays for register reservations. Byte arrays, requiring one byte alignment, are the simplest way to reserve peripheral memory. This will result in a larger diff when re-generating the RAL.
1 parent d316aaa commit 85defd1

File tree

1 file changed

+0
-8
lines changed

1 file changed

+0
-8
lines changed

stm32ral.py

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -759,14 +759,6 @@ def to_rust_register_block(self):
759759
raise RuntimeError("Unexpected register aliasing")
760760
if register.offset != address:
761761
gaps = []
762-
u32s = (register.offset - address) // 4
763-
if u32s != 0:
764-
gaps.append(f"[u32; {u32s}]")
765-
address += u32s * 4
766-
u16s = (register.offset - address) // 2
767-
if u16s != 0:
768-
gaps.append(f"[u16; {u16s}]")
769-
address += u16s * 2
770762
u8s = register.offset - address
771763
if u8s != 0:
772764
gaps.append(f"[u8; {u8s}]")

0 commit comments

Comments
 (0)