address Jeff's comments

Author: andrej

include/aie/Dialect/AIE/IR/AIEOps.td

@@ -61,7 +61,7 @@ def AIE_DeviceOp: AIE_Op<"device", [
 
   let arguments = (
     ins AIEDevice:$device,
-        DefaultValuedAttr<SymbolNameAttr, "\"main\"">:$sym_name
+        DefaultValuedAttr<SymbolNameAttr, "getDefaultDeviceName()">:$sym_name
   );
   let regions = (region AnyRegion:$body_region);
   let assemblyFormat = [{
@@ -71,6 +71,7 @@ def AIE_DeviceOp: AIE_Op<"device", [
     const xilinx::AIE::AIETargetModel &getTargetModel();
     static xilinx::AIE::DeviceOp getForSymbolInModule(mlir::ModuleOp module, llvm::StringRef symbol);
     static xilinx::AIE::DeviceOp getForSymbolInModuleOrError(mlir::ModuleOp module, llvm::StringRef symbol);
+    static llvm::StringRef getDefaultDeviceName() { return "main"; }
   }];
 }
 

include/aie/Dialect/AIE/Transforms/AIEPasses.h

@@ -47,7 +47,6 @@ createAIEAssignBufferDescriptorIDsPass();
 std::unique_ptr<mlir::OperationPass<DeviceOp>>
 createAIEGenerateColumnControlOverlayPass();
 std::unique_ptr<mlir::OperationPass<DeviceOp>> createAIEAssignTileCtrlIDsPass();
-std::unique_ptr<mlir::OperationPass<DeviceOp>> createAIESetELFforCorePass();
 
 /// Generate the code for registering passes.
 #define GEN_PASS_REGISTRATION

include/aie/Dialect/AIEX/IR/AIEX.td

@@ -542,17 +542,20 @@ def AIE_RuntimeSequenceOp : AIEX_Op<"runtime_sequence", [
     The input arguments are arguments passed in from the host at kernel invocation time. This may include buffers on the host.
   }];
   let arguments = (
-    ins DefaultValuedAttr<SymbolNameAttr, "xilinx::AIEX::defaultRuntimeSequenceName">:$sym_name
+    ins DefaultValuedAttr<SymbolNameAttr, "getDefaultRuntimeSequenceName()">:$sym_name
   );
   let regions = (region
     AnyRegion:$body
   );
   let hasCustomAssemblyFormat = 1;
   let hasVerifier = 1;
   let extraClassDeclaration = [{
+    static llvm::StringRef getDefaultRuntimeSequenceName() { return "sequence"; }
     static RuntimeSequenceOp getForSymbolInDevice(AIE::DeviceOp module, llvm::StringRef symbol);
     static RuntimeSequenceOp getForSymbolInDeviceOrError(AIE::DeviceOp module, llvm::StringRef symbol);
   }];
+  let extraClassDefinition = [{
+  }];
 }
 
 def AIE_ConfigureOp: AIEX_Op<"configure", [

include/aie/Dialect/AIEX/IR/AIEXDialect.h

@@ -15,10 +15,6 @@
 
 #include "mlir/IR/BuiltinAttributes.h"
 
-namespace xilinx::AIEX {
-const char defaultRuntimeSequenceName[] = "sequence";
-}
-
 // Include dialect declarations such as parseAttributes, parseType
 #include "aie/Dialect/AIEX/IR/AIEXDialect.h.inc"
 #include "mlir/IR/Operation.h"

lib/Conversion/AIEToConfiguration/AIEToConfiguration.cpp

@@ -438,7 +438,7 @@ xilinx::AIE::convertTransactionBinaryToMLIR(mlir::MLIRContext *ctx,
   std::vector<AIEDevice> devices{AIEDevice::npu1_1col, AIEDevice::npu1_2col,
                                  AIEDevice::npu1_3col, AIEDevice::npu1};
   auto device = builder.create<DeviceOp>(
-      loc, devices[columns - 1], StringAttr::get(builder.getContext(), "main"));
+      loc, devices[columns - 1], StringAttr::get(builder.getContext()));
   device.getRegion().emplaceBlock();
   DeviceOp::ensureTerminator(device.getBodyRegion(), builder, loc);
   builder.setInsertionPointToStart(device.getBody());

lib/Dialect/AIE/Transforms/AIECanonicalizeDevice.cpp

@@ -40,7 +40,7 @@ struct AIECanonicalizeDevicePass
     Location location = builder.getUnknownLoc();
     auto deviceOp = builder.create<DeviceOp>(
         location, AIEDeviceAttr::get(builder.getContext(), AIEDevice::xcvc1902),
-        StringAttr::get(builder.getContext(), "main"));
+        StringAttr::get(builder.getContext(), DeviceOp::getDefaultDeviceName()));
 
     deviceOp.getRegion().takeBody(moduleOp.getBodyRegion());
     new (&moduleOp->getRegion(0)) Region(moduleOp);

lib/Dialect/AIEX/IR/AIEXDialect.cpp

@@ -555,7 +555,7 @@ LogicalResult AIEX::NpuWriteBdOp::verify() {
 //===----------------------------------------------------------------------===//
 
 template <typename T>
-std::optional<uint32_t> getAbsoluteAddress(T *op) {
+static std::optional<uint32_t> getAbsoluteAddress(T *op) {
   AIE::DeviceOp device =
       op->getOperation()->template getParentOfType<AIE::DeviceOp>();
   if (!device) {
@@ -707,7 +707,7 @@ void AIEX::RuntimeSequenceOp::print(OpAsmPrinter &printer) {
   auto nameAttr = (*this)->getAttrOfType<StringAttr>(
       mlir::SymbolTable::getSymbolAttrName());
   if (nameAttr && nameAttr != ::mlir::OpBuilder((*this)->getContext())
-                                  .getStringAttr(defaultRuntimeSequenceName)) {
+                                  .getStringAttr(getDefaultRuntimeSequenceName())) {
     printer << ' ';
     printer.printSymbolName(nameAttr);
   }

lib/Dialect/AIEX/Transforms/CMakeLists.txt

@@ -32,9 +32,9 @@ add_mlir_dialect_library(AIEXTransforms
 
   LINK_LIBS PUBLIC
   AIE
+  AIEXUtils
   MLIRIR
   MLIRPass
   MLIRSupport
   MLIRTransformUtils
-  AIEXUtils
   )

lib/Dialect/AIEX/Utils/AIEUtils.cpp

@@ -12,16 +12,12 @@
 
 using namespace mlir;
 using namespace xilinx;
-using namespace xilinx::AIEX;
 
 static unsigned cachedId = 0;
 
-namespace xilinx {
-namespace AIEX {
-
-memref::GlobalOp getOrCreateDataMemref(OpBuilder &builder, AIE::DeviceOp dev,
-                                       mlir::Location loc,
-                                       ArrayRef<uint32_t> words) {
+memref::GlobalOp AIEX::getOrCreateDataMemref(OpBuilder &builder, AIE::DeviceOp dev,
+                                             mlir::Location loc,
+                                             ArrayRef<uint32_t> words) {
   uint32_t num_words = words.size();
   MemRefType memrefType = MemRefType::get({num_words}, builder.getI32Type());
   TensorType tensorType =
@@ -51,6 +47,3 @@ memref::GlobalOp getOrCreateDataMemref(OpBuilder &builder, AIE::DeviceOp dev,
   }
   return global;
 }
-
-} // namespace AIEX
-} // namespace xilinx

programming_examples/basic/matrix_multiplication/makefile-common

@@ -162,7 +162,7 @@ ${trace_mlir_target}: ${srcdir}/${aie_py_src}
 
 ${xclbin_target}: ${mlir_target} ${kernels:%=build/%.o}
 	mkdir -p ${@D}
-	cd ${@D} && aiecc.py --alloc-scheme=${buffer_aloc_flag} --aie-generate-xclbin --no-compile-host --xclbin-name=${@F} --progress \
+	cd ${@D} && aiecc.py --alloc-scheme=${buffer_aloc_flag} --aie-generate-xclbin --no-compile-host --xclbin-name=${@F} \
 				${aiecc_peano_flags} \
 				--aie-generate-npu-insts --npu-insts-name=${insts_target:build/%=%} $(<:%=../%)