Skip to content

Commit b3e22d2

Browse files
brendandahlbrendandahl
authored
[FP16] Implement relation operations. (#6825)
Specified at https://github.com/WebAssembly/half-precision/blob/main/proposals/half-precision/Overview.md
1 parent d945aa4 commit b3e22d2

16 files changed

Lines changed: 435 additions & 33 deletions

File tree

‎scripts/gen-s-parser.py‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -343,6 +343,12 @@
343343
("i64x2.gt_s", "makeBinary(BinaryOp::GtSVecI64x2)"),
344344
("i64x2.le_s", "makeBinary(BinaryOp::LeSVecI64x2)"),
345345
("i64x2.ge_s", "makeBinary(BinaryOp::GeSVecI64x2)"),
346+
("f16x8.eq", "makeBinary(BinaryOp::EqVecF16x8)"),
347+
("f16x8.ne", "makeBinary(BinaryOp::NeVecF16x8)"),
348+
("f16x8.lt", "makeBinary(BinaryOp::LtVecF16x8)"),
349+
("f16x8.gt", "makeBinary(BinaryOp::GtVecF16x8)"),
350+
("f16x8.le", "makeBinary(BinaryOp::LeVecF16x8)"),
351+
("f16x8.ge", "makeBinary(BinaryOp::GeVecF16x8)"),
346352
("f32x4.eq", "makeBinary(BinaryOp::EqVecF32x4)"),
347353
("f32x4.ne", "makeBinary(BinaryOp::NeVecF32x4)"),
348354
("f32x4.lt", "makeBinary(BinaryOp::LtVecF32x4)"),

‎src/gen-s-parser.inc‎

Lines changed: 54 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -309,9 +309,60 @@ switch (buf[0]) {
309309
switch (buf[1]) {
310310
case '1': {
311311
switch (buf[6]) {
312-
case 'e':
313-
if (op == "f16x8.extract_lane"sv) {
314-
CHECK_ERR(makeSIMDExtract(ctx, pos, annotations, SIMDExtractOp::ExtractLaneVecF16x8, 8));
312+
case 'e': {
313+
switch (buf[7]) {
314+
case 'q':
315+
if (op == "f16x8.eq"sv) {
316+
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::EqVecF16x8));
317+
return Ok{};
318+
}
319+
goto parse_error;
320+
case 'x':
321+
if (op == "f16x8.extract_lane"sv) {
322+
CHECK_ERR(makeSIMDExtract(ctx, pos, annotations, SIMDExtractOp::ExtractLaneVecF16x8, 8));
323+
return Ok{};
324+
}
325+
goto parse_error;
326+
default: goto parse_error;
327+
}
328+
}
329+
case 'g': {
330+
switch (buf[7]) {
331+
case 'e':
332+
if (op == "f16x8.ge"sv) {
333+
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::GeVecF16x8));
334+
return Ok{};
335+
}
336+
goto parse_error;
337+
case 't':
338+
if (op == "f16x8.gt"sv) {
339+
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::GtVecF16x8));
340+
return Ok{};
341+
}
342+
goto parse_error;
343+
default: goto parse_error;
344+
}
345+
}
346+
case 'l': {
347+
switch (buf[7]) {
348+
case 'e':
349+
if (op == "f16x8.le"sv) {
350+
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::LeVecF16x8));
351+
return Ok{};
352+
}
353+
goto parse_error;
354+
case 't':
355+
if (op == "f16x8.lt"sv) {
356+
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::LtVecF16x8));
357+
return Ok{};
358+
}
359+
goto parse_error;
360+
default: goto parse_error;
361+
}
362+
}
363+
case 'n':
364+
if (op == "f16x8.ne"sv) {
365+
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::NeVecF16x8));
315366
return Ok{};
316367
}
317368
goto parse_error;

‎src/ir/child-typer.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -558,6 +558,12 @@ template<typename Subtype> struct ChildTyper : OverriddenVisitor<Subtype> {
558558
case LeSVecI64x2:
559559
case GtSVecI64x2:
560560
case GeSVecI64x2:
561+
case EqVecF16x8:
562+
case NeVecF16x8:
563+
case LtVecF16x8:
564+
case LeVecF16x8:
565+
case GtVecF16x8:
566+
case GeVecF16x8:
561567
case EqVecF32x4:
562568
case NeVecF32x4:
563569
case LtVecF32x4:

‎src/ir/cost.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -398,6 +398,12 @@ struct CostAnalyzer : public OverriddenVisitor<CostAnalyzer, CostType> {
398398
case LeSVecI64x2:
399399
case GtSVecI64x2:
400400
case GeSVecI64x2:
401+
case EqVecF16x8:
402+
case NeVecF16x8:
403+
case LtVecF16x8:
404+
case LeVecF16x8:
405+
case GtVecF16x8:
406+
case GeVecF16x8:
401407
case EqVecF32x4:
402408
case NeVecF32x4:
403409
case LtVecF32x4:

‎src/literal.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -509,6 +509,12 @@ class Literal {
509509
Literal gtSI64x2(const Literal& other) const;
510510
Literal leSI64x2(const Literal& other) const;
511511
Literal geSI64x2(const Literal& other) const;
512+
Literal eqF16x8(const Literal& other) const;
513+
Literal neF16x8(const Literal& other) const;
514+
Literal ltF16x8(const Literal& other) const;
515+
Literal gtF16x8(const Literal& other) const;
516+
Literal leF16x8(const Literal& other) const;
517+
Literal geF16x8(const Literal& other) const;
512518
Literal eqF32x4(const Literal& other) const;
513519
Literal neF32x4(const Literal& other) const;
514520
Literal ltF32x4(const Literal& other) const;

‎src/passes/Print.cpp‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1689,6 +1689,24 @@ struct PrintExpressionContents
16891689
case GeSVecI64x2:
16901690
o << "i64x2.ge_s";
16911691
break;
1692+
case EqVecF16x8:
1693+
o << "f16x8.eq";
1694+
break;
1695+
case NeVecF16x8:
1696+
o << "f16x8.ne";
1697+
break;
1698+
case LtVecF16x8:
1699+
o << "f16x8.lt";
1700+
break;
1701+
case GtVecF16x8:
1702+
o << "f16x8.gt";
1703+
break;
1704+
case LeVecF16x8:
1705+
o << "f16x8.le";
1706+
break;
1707+
case GeVecF16x8:
1708+
o << "f16x8.ge";
1709+
break;
16921710
case EqVecF32x4:
16931711
o << "f32x4.eq";
16941712
break;

‎src/tools/fuzzing/fuzzing.cpp‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3288,6 +3288,13 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
32883288
LeUVecI32x4,
32893289
GeSVecI32x4,
32903290
GeUVecI32x4,
3291+
EqVecF16x8,
3292+
EqVecF16x8,
3293+
NeVecF16x8,
3294+
LtVecF16x8,
3295+
GtVecF16x8,
3296+
LeVecF16x8,
3297+
GeVecF16x8,
32913298
EqVecF32x4,
32923299
NeVecF32x4,
32933300
LtVecF32x4,

‎src/wasm-binary.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1057,6 +1057,12 @@ enum ASTNodes {
10571057
F16x8Splat = 0x120,
10581058
F16x8ExtractLane = 0x121,
10591059
F16x8ReplaceLane = 0x122,
1060+
F16x8Eq = 0x137,
1061+
F16x8Ne = 0x138,
1062+
F16x8Lt = 0x139,
1063+
F16x8Gt = 0x13a,
1064+
F16x8Le = 0x13b,
1065+
F16x8Ge = 0x13c,
10601066

10611067
// bulk memory opcodes
10621068

‎src/wasm-interpreter.h‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -864,6 +864,18 @@ class ExpressionRunner : public OverriddenVisitor<SubType, Flow> {
864864
return left.leSI64x2(right);
865865
case GeSVecI64x2:
866866
return left.geSI64x2(right);
867+
case EqVecF16x8:
868+
return left.eqF16x8(right);
869+
case NeVecF16x8:
870+
return left.neF16x8(right);
871+
case LtVecF16x8:
872+
return left.ltF16x8(right);
873+
case GtVecF16x8:
874+
return left.gtF16x8(right);
875+
case LeVecF16x8:
876+
return left.leF16x8(right);
877+
case GeVecF16x8:
878+
return left.geF16x8(right);
867879
case EqVecF32x4:
868880
return left.eqF32x4(right);
869881
case NeVecF32x4:

‎src/wasm.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -381,6 +381,12 @@ enum BinaryOp {
381381
GtSVecI64x2,
382382
LeSVecI64x2,
383383
GeSVecI64x2,
384+
EqVecF16x8,
385+
NeVecF16x8,
386+
LtVecF16x8,
387+
GtVecF16x8,
388+
LeVecF16x8,
389+
GeVecF16x8,
384390
EqVecF32x4,
385391
NeVecF32x4,
386392
LtVecF32x4,

0 commit comments

Comments
 (0)