@@ -1274,6 +1274,9 @@ void FunctionValidator::visitSIMDExtract(SIMDExtract* curr) {
12741274 lanes = 2 ;
12751275 break ;
12761276 case ExtractLaneVecF16x8:
1277+ shouldBeTrue (getModule ()->features .hasFP16 (),
1278+ curr,
1279+ " FP16 operations require FP16 [--enable-fp16]" );
12771280 lane_t = Type::f32 ;
12781281 lanes = 8 ;
12791282 break ;
@@ -1324,6 +1327,9 @@ void FunctionValidator::visitSIMDReplace(SIMDReplace* curr) {
13241327 lanes = 2 ;
13251328 break ;
13261329 case ReplaceLaneVecF16x8:
1330+ shouldBeTrue (getModule ()->features .hasFP16 (),
1331+ curr,
1332+ " FP16 operations require FP16 [--enable-fp16]" );
13271333 lane_t = Type::f32 ;
13281334 lanes = 8 ;
13291335 break ;
@@ -1708,6 +1714,24 @@ void FunctionValidator::visitBinary(Binary* curr) {
17081714 curr->left ->type , Type (Type::f64 ), curr, " f64 op" );
17091715 break ;
17101716 }
1717+ case EqVecF16x8:
1718+ case NeVecF16x8:
1719+ case LtVecF16x8:
1720+ case LeVecF16x8:
1721+ case GtVecF16x8:
1722+ case GeVecF16x8:
1723+ case AddVecF16x8:
1724+ case SubVecF16x8:
1725+ case MulVecF16x8:
1726+ case DivVecF16x8:
1727+ case MinVecF16x8:
1728+ case MaxVecF16x8:
1729+ case PMinVecF16x8:
1730+ case PMaxVecF16x8:
1731+ shouldBeTrue (getModule ()->features .hasFP16 (),
1732+ curr,
1733+ " FP16 operations require FP16 [--enable-fp16]" );
1734+ [[fallthrough]];
17111735 case EqVecI8x16:
17121736 case NeVecI8x16:
17131737 case LtSVecI8x16:
@@ -1744,12 +1768,6 @@ void FunctionValidator::visitBinary(Binary* curr) {
17441768 case LeSVecI64x2:
17451769 case GtSVecI64x2:
17461770 case GeSVecI64x2:
1747- case EqVecF16x8:
1748- case NeVecF16x8:
1749- case LtVecF16x8:
1750- case LeVecF16x8:
1751- case GtVecF16x8:
1752- case GeVecF16x8:
17531771 case EqVecF32x4:
17541772 case NeVecF32x4:
17551773 case LtVecF32x4:
@@ -1813,14 +1831,6 @@ void FunctionValidator::visitBinary(Binary* curr) {
18131831 case ExtMulHighSVecI64x2:
18141832 case ExtMulLowUVecI64x2:
18151833 case ExtMulHighUVecI64x2:
1816- case AddVecF16x8:
1817- case SubVecF16x8:
1818- case MulVecF16x8:
1819- case DivVecF16x8:
1820- case MinVecF16x8:
1821- case MaxVecF16x8:
1822- case PMinVecF16x8:
1823- case PMaxVecF16x8:
18241834 case AddVecF32x4:
18251835 case SubVecF32x4:
18261836 case MulVecF32x4:
@@ -2060,6 +2070,10 @@ void FunctionValidator::visitUnary(Unary* curr) {
20602070 curr->value ->type , Type (Type::i64 ), curr, " expected i64 splat value" );
20612071 break ;
20622072 case SplatVecF16x8:
2073+ shouldBeTrue (getModule ()->features .hasFP16 (),
2074+ curr,
2075+ " FP16 operations require FP16 [--enable-fp16]" );
2076+ [[fallthrough]];
20632077 case SplatVecF32x4:
20642078 shouldBeEqual (
20652079 curr->type , Type (Type::v128), curr, " expected splat to have v128 type" );
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