From 92ee0c62a922390eb7d6ea9a4f1af549456aa1d1 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 19 Dec 2018 12:46:05 +0100 Subject: [PATCH 01/20] cpu/esp32: dependency fix for I2C hardware module --- cpu/esp32/Makefile.dep | 1 + 1 file changed, 1 insertion(+) diff --git a/cpu/esp32/Makefile.dep b/cpu/esp32/Makefile.dep index 91edbc8ba999..020c7f716da6 100644 --- a/cpu/esp32/Makefile.dep +++ b/cpu/esp32/Makefile.dep @@ -52,6 +52,7 @@ endif ifneq (,$(filter esp_i2c_hw,$(USEMODULE))) USEMODULE += xtimer + USEMODULE += core_thread_flags else # PLEASE NOTE: because of the very poor and faulty hardware implementation # we use software implementation by default for the moment (if module From edf18c66002484dcbb7fead1f84da5abc84c580c Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 19 Dec 2018 12:50:05 +0100 Subject: [PATCH 02/20] cpu/esp32: overwrites default gpio_t Default definition of gpio_t has to be overwritten since gpio_t is required in this header file to be able to define ADC, DAC, I2C, PWM and SPI configurations. --- cpu/esp32/include/periph_cpu.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index 61262de42209..61e883ad376c 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -39,6 +39,21 @@ extern "C" { */ #define CPUID_LEN (7U) +/** + * @name GPIO configuration + * @{ + */ + +/** + * @brief Override the default gpio_t type definition + * + * This is required here to have gpio_t defined in this file. + * @{ + */ +#define HAVE_GPIO_T +typedef unsigned int gpio_t; +/** @} */ + /** * @brief Available ports on the ESP32 * @{ @@ -135,6 +150,7 @@ typedef enum { GPIO_IN_OD_PU /**< input and open-drain output */ } gpio_mode_t; /** @} */ +/** @} */ /** * @name ADC configuration From 6b7196c03ca6f45bffa807cc9a339d20a487d7fc Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 19 Dec 2018 13:09:35 +0100 Subject: [PATCH 03/20] cpu/esp32: ADC/DAC config approach changed ADC and DAC pins are now configured using static arrays in header files instead of static variables in implementation to be able to define ADC_NUMOF and DAC_NUM using the size of these arrays instead of a variable. --- cpu/esp32/include/periph_cpu.h | 6 ---- cpu/esp32/periph/adc.c | 60 +++++++++++++++------------------- 2 files changed, 26 insertions(+), 40 deletions(-) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index 61e883ad376c..327018cca193 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -232,9 +232,6 @@ typedef enum { */ #define ADC_NUMOF_MAX 16 -/** Number of ADC channels determined from ADC_GPIOS */ -extern const unsigned adc_chn_num; - /** @} */ /** @@ -266,9 +263,6 @@ extern const unsigned adc_chn_num; */ #define DAC_NUMOF_MAX 2 -/** Number of DAC channels determined from DAC_GPIOS */ -extern const unsigned dac_chn_num; - /** @} */ /** diff --git a/cpu/esp32/periph/adc.c b/cpu/esp32/periph/adc.c index 94d0c71ef27a..e3accfbe28d4 100644 --- a/cpu/esp32/periph/adc.c +++ b/cpu/esp32/periph/adc.c @@ -149,14 +149,6 @@ const gpio_t _gpio_rtcio_map[] = { RTCIO_SENSOR_SENSE4, /* GPIO39 SENSOR_VN */ }; -/** Map of RIOT ADC and DAC lines to GPIOs */ -static const uint32_t adc_pins[] = ADC_GPIOS; -static const uint32_t dac_pins[] = DAC_GPIOS; - -/** number of ADC and DAC channels */ -const unsigned adc_chn_num = (sizeof(adc_pins) / sizeof(adc_pins[0])); -const unsigned dac_chn_num = (sizeof(dac_pins) / sizeof(dac_pins[0])); - #if defined(ADC_GPIOS) || defined(DAC_GPIOS) /* forward declaration of internal functions */ static void _adc1_ctrl_init(void); @@ -173,7 +165,7 @@ static bool _adc_module_initialized = false; int adc_init(adc_t line) { - CHECK_PARAM_RET (line < adc_chn_num, -1) + CHECK_PARAM_RET (line < ADC_NUMOF, -1) if (!_adc_module_initialized) { /* do some configuration checks */ @@ -184,7 +176,7 @@ int adc_init(adc_t line) _adc_module_initialized = true; } - uint8_t rtcio = _gpio_rtcio_map[adc_pins[line]]; + uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; if (_adc_hw[rtcio].adc_ctrl == ADC1_CTRL && !_adc1_ctrl_initialized) { _adc1_ctrl_init(); @@ -276,10 +268,10 @@ int adc_init(adc_t line) int adc_sample(adc_t line, adc_res_t res) { - CHECK_PARAM_RET (line < adc_chn_num, -1) + CHECK_PARAM_RET (line < ADC_NUMOF, -1) CHECK_PARAM_RET (res <= ADC_RES_12BIT, -1) - uint8_t rtcio = _gpio_rtcio_map[adc_pins[line]]; + uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; if (_adc_hw[rtcio].adc_ctrl == ADC1_CTRL) { /* set the resolution for the measurement */ @@ -320,9 +312,9 @@ int adc_sample(adc_t line, adc_res_t res) int adc_set_attenuation(adc_t line, adc_attenuation_t atten) { - CHECK_PARAM_RET (line < adc_chn_num, -1) + CHECK_PARAM_RET (line < ADC_NUMOF, -1) - uint8_t rtcio = _gpio_rtcio_map[adc_pins[line]]; + uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; if (_adc_hw[rtcio].adc_ctrl == ADC1_CTRL) { SENS.sar_atten1 &= ~(0x3 << (_adc_hw[rtcio].adc_channel << 1)); @@ -339,8 +331,8 @@ int adc_vref_to_gpio25 (void) { /* determine ADC line for GPIO25 */ adc_t line = ADC_UNDEF; - for (unsigned i = 0; i < adc_chn_num; i++) { \ - if (adc_pins[i] == GPIO25) { \ + for (unsigned i = 0; i < ADC_NUMOF; i++) { \ + if (adc_channels[i] == GPIO25) { \ line = i; break; } @@ -353,7 +345,7 @@ int adc_vref_to_gpio25 (void) if (adc_init(line) == 0) { - uint8_t rtcio = _gpio_rtcio_map[adc_pins[line]]; + uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; RTCCNTL.bias_conf.dbg_atten = 0; RTCCNTL.test_mux.dtest_rtc = 1; RTCCNTL.test_mux.ent_rtc = 1; @@ -370,10 +362,10 @@ int adc_vref_to_gpio25 (void) static bool _adc_conf_check(void) { - for (unsigned i = 0; i < adc_chn_num; i++) { - if (_gpio_rtcio_map[adc_pins[i]] == RTCIO_NA) { + for (unsigned i = 0; i < ADC_NUMOF; i++) { + if (_gpio_rtcio_map[adc_channels[i]] == RTCIO_NA) { LOG_TAG_ERROR("adc", "GPIO%d cannot be used as ADC line\n", - adc_pins[i]); + adc_channels[i]); return false; } } @@ -402,7 +394,7 @@ static bool _dac_module_initialized = false; int8_t dac_init (dac_t line) { - CHECK_PARAM_RET (line < dac_chn_num, DAC_NOLINE) + CHECK_PARAM_RET (line < DAC_NUMOF, DAC_NOLINE) if (!_dac_module_initialized) { /* do some configuration checks */ @@ -416,7 +408,7 @@ int8_t dac_init (dac_t line) _adc2_ctrl_init(); } - uint8_t rtcio = _gpio_rtcio_map[dac_pins[line]]; + uint8_t rtcio = _gpio_rtcio_map[dac_channels[line]]; uint8_t idx; /* try to initialize the pin as DAC ouput */ @@ -463,27 +455,27 @@ int8_t dac_init (dac_t line) void dac_set (dac_t line, uint16_t value) { - CHECK_PARAM (line < dac_chn_num); - RTCIO.pad_dac[_gpio_rtcio_map[dac_pins[line]] - RTCIO_DAC1].dac = value >> 8; + CHECK_PARAM (line < DAC_NUMOF); + RTCIO.pad_dac[_gpio_rtcio_map[dac_channels[line]] - RTCIO_DAC1].dac = value >> 8; } void dac_poweroff (dac_t line) { - CHECK_PARAM (line < dac_chn_num); + CHECK_PARAM (line < DAC_NUMOF); } void dac_poweron (dac_t line) { - CHECK_PARAM (line < dac_chn_num); + CHECK_PARAM (line < DAC_NUMOF); } static bool _dac_conf_check(void) { - for (unsigned i = 0; i < dac_chn_num; i++) { - if (_gpio_rtcio_map[dac_pins[i]] != RTCIO_DAC1 && - _gpio_rtcio_map[dac_pins[i]] != RTCIO_DAC2) { + for (unsigned i = 0; i < DAC_NUMOF; i++) { + if (_gpio_rtcio_map[dac_channels[i]] != RTCIO_DAC1 && + _gpio_rtcio_map[dac_channels[i]] != RTCIO_DAC2) { LOG_TAG_ERROR("dac", "GPIO%d cannot be used as DAC line\n", - dac_pins[i]); + dac_channels[i]); return false; } } @@ -634,16 +626,16 @@ int rtcio_config_sleep_mode (gpio_t pin, bool mode, bool input) void adc_print_config(void) { ets_printf("\tADC\t\tpins=[ "); #if defined(ADC_GPIOS) - for (unsigned i = 0; i < adc_chn_num; i++) { - ets_printf("%d ", adc_pins[i]); + for (unsigned i = 0; i < ADC_NUMOF; i++) { + ets_printf("%d ", adc_channels[i]); } #endif /* defined(ADC_GPIOS) */ ets_printf("]\n"); ets_printf("\tDAC\t\tpins=[ "); #if defined(DAC_GPIOS) - for (unsigned i = 0; i < dac_chn_num; i++) { - ets_printf("%d ", dac_pins[i]); + for (unsigned i = 0; i < DAC_NUMOF; i++) { + ets_printf("%d ", dac_channels[i]); } #endif /* defined(DAC_GPIOS) */ ets_printf("]\n"); From 1e86807b3e73e15ee8ea97c574cdaa32928f6d5a Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 19 Dec 2018 13:09:54 +0100 Subject: [PATCH 04/20] boards/esp32: ADC/DAC config approach changed ADC and DAC pins are now configured using static arrays in header files instead of static variables in implementation to be able to define ADC_NUMOF and DAC_NUM using the size of these arrays instead of a variable. --- .../common/esp32/include/periph_conf_common.h | 35 +++++++++++++++++-- 1 file changed, 32 insertions(+), 3 deletions(-) diff --git a/boards/common/esp32/include/periph_conf_common.h b/boards/common/esp32/include/periph_conf_common.h index c1d2bcb2c494..f1129c5e3128 100644 --- a/boards/common/esp32/include/periph_conf_common.h +++ b/boards/common/esp32/include/periph_conf_common.h @@ -46,6 +46,11 @@ extern "C" { #define ADC_GPIOS { } #endif +/** + * @brief Static array with declared ADC channels + */ +static const gpio_t adc_channels[] = ADC_GPIOS; + /** * @brief Number of GPIOs declared as ADC channels * @@ -54,7 +59,7 @@ extern "C" { * * @note ADC_NUMOF definition must not be changed. */ -#define ADC_NUMOF (adc_chn_num) +#define ADC_NUMOF (sizeof(adc_channels) / sizeof(adc_channels[0])) /** @} */ /** @@ -73,6 +78,11 @@ extern "C" { #define DAC_GPIOS { } #endif +/** + * @brief Static array with declared DAC channels + */ +static const gpio_t dac_channels[] = DAC_GPIOS; + /** * @brief Number of GPIOs declared as DAC channels * @@ -81,15 +91,34 @@ extern "C" { * * @note DAC_NUMOF definition must not be changed. */ -#define DAC_NUMOF (dac_chn_num) +#define DAC_NUMOF (sizeof(dac_channels) / sizeof(dac_channels[0])) /** @} */ - /** * @name I2C configuration * @{ */ +/** + * @brief Static array with configuration for declared I2C devices + */ +static const i2c_conf_t i2c_config[] = { + #if defined(I2C0_SCL) && defined(I2C0_SDA) && defined(I2C0_SPEED) + { + .speed = I2C0_SPEED, + .scl = I2C0_SCL, + .sda = I2C0_SDA, + }, + #endif + #if defined(I2C1_SCL) && defined(I2C1_SDA) && defined(I2C1_SPEED) + { + .speed = I2C1_SPEED, + .scl = I2C1_SCL, + .sda = I2C1_SDA, + }, + #endif +}; + /** * @brief Number of I2C interfaces * From 850a3b7227bfe87294e4fd47a7bdbf3b636e162b Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 19 Dec 2018 13:10:28 +0100 Subject: [PATCH 05/20] cpu/esp32: I2C configuration approach changed I2C devices are now configured using static array in header files instead of static variables in implementation to be able to define I2C_NUMOF using the size of the array instead of a variable. --- cpu/esp32/include/periph_cpu.h | 26 ++++++++++++++-- cpu/esp32/periph/i2c_hw.c | 57 ++++++++++------------------------ cpu/esp32/periph/i2c_sw.c | 43 +++++++++---------------- 3 files changed, 55 insertions(+), 71 deletions(-) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index 327018cca193..d3c7cf4f1b5a 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -289,8 +289,30 @@ typedef enum { * @{ */ -/** Number of I2C interfaces determined from I2Cn_* definitions */ -extern const unsigned i2c_bus_num; +/** + * @brief Override I2C clock speed values + * + * This is required here to have i2c_speed_t defined in this file. + * @{ + */ +#define HAVE_I2C_SPEED_T +typedef enum { + I2C_SPEED_LOW = 0, /**< 10 kbit/s */ + I2C_SPEED_NORMAL, /**< 100 kbit/s */ + I2C_SPEED_FAST, /**< 400 kbit/s */ + I2C_SPEED_FAST_PLUS, /**< 1 Mbit/s */ + I2C_SPEED_HIGH, /**< not supported */ +} i2c_speed_t; +/** @} */ + +/** + * @brief I2C configuration structure type + */ +typedef struct { + i2c_speed_t speed; /**< I2C bus speed */ + gpio_t scl; /**< GPIO used as SCL pin */ + gpio_t sda; /**< GPIO used as SDA pin */ +} i2c_conf_t; #define PERIPH_I2C_NEED_READ_REG /**< i2c_read_reg required */ #define PERIPH_I2C_NEED_READ_REGS /**< i2c_read_regs required */ diff --git a/cpu/esp32/periph/i2c_hw.c b/cpu/esp32/periph/i2c_hw.c index 7fde98f16038..8049e30b142d 100644 --- a/cpu/esp32/periph/i2c_hw.c +++ b/cpu/esp32/periph/i2c_hw.c @@ -95,33 +95,25 @@ struct i2c_hw_t { uint8_t signal_sda_out; /* SDA signal from the controller */ }; -static const struct i2c_hw_t _i2c_hw[] = { - #if defined(I2C0_SCL) && defined(I2C0_SDA) && defined(I2C0_SPEED) +static struct i2c_hw_t _i2c_hw[] = { { .regs = &I2C0, .mod = PERIPH_I2C0_MODULE, .int_src = ETS_I2C_EXT0_INTR_SOURCE, - .pin_scl = I2C0_SCL, - .pin_sda = I2C0_SDA, .signal_scl_in = I2CEXT0_SCL_IN_IDX, .signal_scl_out = I2CEXT0_SCL_OUT_IDX, .signal_sda_in = I2CEXT0_SDA_IN_IDX, .signal_sda_out = I2CEXT0_SDA_OUT_IDX, }, - #endif - #if defined(I2C1_SCL) && defined(I2C1_SDA) && defined(I2C1_SPEED) { .regs = &I2C1, .mod = PERIPH_I2C1_MODULE, .int_src = ETS_I2C_EXT1_INTR_SOURCE, - .pin_scl = I2C1_SCL, - .pin_sda = I2C1_SDA, .signal_scl_in = I2CEXT1_SCL_IN_IDX, .signal_scl_out = I2CEXT1_SCL_OUT_IDX, .signal_sda_in = I2CEXT1_SDA_IN_IDX, .signal_sda_out = I2CEXT1_SDA_OUT_IDX, } - #endif }; struct _i2c_bus_t @@ -134,28 +126,7 @@ struct _i2c_bus_t uint32_t results; /* results of a transfer */ }; -static struct _i2c_bus_t _i2c_bus[] = -{ - #if defined(I2C0_SCL) && defined(I2C0_SDA) && defined(I2C0_SPEED) - { - .speed = I2C0_SPEED, - .cmd = 0, - .data = 0, - .lock = MUTEX_INIT - }, - #endif - #if defined(I2C1_SCL) && defined(I2C1_SDA) && defined(I2C1_SPEED) - { - .speed = I2C1_SPEED, - .cmd = 0, - .data = 0, - .lock = MUTEX_INIT - }, - #endif -}; - -/* the number of I2C bus devices used */ -const unsigned i2c_bus_num = sizeof(_i2c_bus) / sizeof(_i2c_bus[0]); +static struct _i2c_bus_t _i2c_bus[I2C_NUMOF] = {}; /* forward declaration of internal functions */ @@ -175,19 +146,25 @@ static inline void _i2c_delay (uint32_t delay); void i2c_init(i2c_t dev) { - CHECK_PARAM (dev < i2c_bus_num) + CHECK_PARAM (dev < I2C_NUMOF) - if (_i2c_bus[dev].speed == I2C_SPEED_FAST_PLUS || - _i2c_bus[dev].speed == I2C_SPEED_HIGH) { + if (i2c_config[dev].speed == I2C_SPEED_FAST_PLUS || + i2c_config[dev].speed == I2C_SPEED_HIGH) { LOG_TAG_INFO("i2c", "I2C_SPEED_FAST_PLUS and I2C_SPEED_HIGH " "are not supported\n"); return; } + mutex_init(&_i2c_bus[dev].lock); + i2c_acquire (dev); _i2c_bus[dev].cmd = 0; _i2c_bus[dev].data = 0; + _i2c_bus[dev].speed = i2c_config[dev].speed; + + _i2c_hw[dev].pin_scl = i2c_config[dev].scl; + _i2c_hw[dev].pin_sda = i2c_config[dev].sda; DEBUG ("%s scl=%d sda=%d speed=%d\n", __func__, _i2c_hw[dev].pin_scl, _i2c_hw[dev].pin_sda, _i2c_bus[dev].speed); @@ -298,7 +275,7 @@ int i2c_acquire(i2c_t dev) { DEBUG ("%s\n", __func__); - CHECK_PARAM_RET (dev < i2c_bus_num, -1) + CHECK_PARAM_RET (dev < I2C_NUMOF, -1) mutex_lock(&_i2c_bus[dev].lock); _i2c_reset_hw(dev); @@ -309,7 +286,7 @@ int i2c_release(i2c_t dev) { DEBUG ("%s\n", __func__); - CHECK_PARAM_RET (dev < i2c_bus_num, -1) + CHECK_PARAM_RET (dev < I2C_NUMOF, -1) _i2c_reset_hw (dev); mutex_unlock(&_i2c_bus[dev].lock); @@ -341,7 +318,7 @@ int i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t fla DEBUG ("%s dev=%u addr=%02x data=%p len=%d flags=%01x\n", __func__, dev, addr, data, len, flags); - CHECK_PARAM_RET (dev < i2c_bus_num, -EINVAL); + CHECK_PARAM_RET (dev < I2C_NUMOF, -EINVAL); CHECK_PARAM_RET (len > 0, -EINVAL); CHECK_PARAM_RET (data != NULL, -EINVAL); @@ -428,7 +405,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint DEBUG ("%s dev=%u addr=%02x data=%p len=%d flags=%01x\n", __func__, dev, addr, data, len, flags); - CHECK_PARAM_RET (dev < i2c_bus_num, -EINVAL); + CHECK_PARAM_RET (dev < I2C_NUMOF, -EINVAL); CHECK_PARAM_RET (len > 0, -EINVAL); CHECK_PARAM_RET (data != NULL, -EINVAL); @@ -733,7 +710,7 @@ static void IRAM_ATTR _i2c_intr_handler (void *arg) /* all I2C peripheral interrupt sources are routed to the same interrupt, so we have to use the status register to distinguish interruptees */ - for (unsigned dev = 0; dev < i2c_bus_num; dev++) { + for (unsigned dev = 0; dev < I2C_NUMOF; dev++) { /* test for transfer related interrupts */ if (_i2c_hw[dev].regs->int_status.val & transfer_int_mask) { /* set transfer result */ @@ -851,7 +828,7 @@ static void _i2c_reset_hw (i2c_t dev) void i2c_print_config(void) { - for (unsigned bus = 0; bus < i2c_bus_num; bus++) { + for (unsigned bus = 0; bus < I2C_NUMOF; bus++) { ets_printf("\tI2C_DEV(%d)\tscl=%d sda=%d\n", bus, _i2c_hw[bus].pin_scl, _i2c_hw[bus].pin_sda); } diff --git a/cpu/esp32/periph/i2c_sw.c b/cpu/esp32/periph/i2c_sw.c index c4b406f2d371..51b61ba353d1 100644 --- a/cpu/esp32/periph/i2c_sw.c +++ b/cpu/esp32/periph/i2c_sw.c @@ -77,28 +77,7 @@ typedef struct } _i2c_bus_t; -static _i2c_bus_t _i2c_bus[] = -{ - #if defined(I2C0_SCL) && defined(I2C0_SDA) && defined(I2C0_SPEED) - { - .speed = I2C0_SPEED, - .sda = I2C0_SDA, - .scl = I2C0_SCL, - .lock = MUTEX_INIT - }, - #endif - #if defined(I2C1_SCL) && defined(I2C1_SDA) && defined(I2C1_SPEED) - { - .speed = I2C1_SPEED, - .sda = I2C1_SDA, - .scl = I2C1_SCL, - .lock = MUTEX_INIT - }, - #endif -}; - -/* the number of I2C bus devices used */ -const unsigned i2c_bus_num = sizeof(_i2c_bus) / sizeof(_i2c_bus[0]); +static _i2c_bus_t _i2c_bus[I2C_NUMOF] = {}; /* to ensure that I2C is always optimized with -O2 to use the defined delays */ #pragma GCC optimize ("O2") @@ -140,13 +119,19 @@ static void _i2c_clear (_i2c_bus_t* bus); void i2c_init(i2c_t dev) { - CHECK_PARAM (dev < i2c_bus_num) + CHECK_PARAM (dev < I2C_NUMOF) - if (_i2c_bus[dev].speed == I2C_SPEED_HIGH) { + if (i2c_config[dev].speed == I2C_SPEED_HIGH) { LOG_TAG_INFO("i2c", "I2C_SPEED_HIGH is not supported\n"); return; } + mutex_init(&_i2c_bus[dev].lock); + + _i2c_bus[dev].scl = i2c_config[dev].scl; + _i2c_bus[dev].sda = i2c_config[dev].sda; + _i2c_bus[dev].speed = i2c_config[dev].speed; + _i2c_bus[dev].dev = dev; _i2c_bus[dev].scl_bit = BIT(_i2c_bus[dev].scl); /* store bit mask for faster access */ _i2c_bus[dev].sda_bit = BIT(_i2c_bus[dev].sda); /* store bit mask for faster access */ @@ -195,7 +180,7 @@ void i2c_init(i2c_t dev) int i2c_acquire(i2c_t dev) { - CHECK_PARAM_RET (dev < i2c_bus_num, -1) + CHECK_PARAM_RET (dev < I2C_NUMOF, -1) mutex_lock(&_i2c_bus[dev].lock); return 0; @@ -203,7 +188,7 @@ int i2c_acquire(i2c_t dev) int i2c_release(i2c_t dev) { - CHECK_PARAM_RET (dev < i2c_bus_num, -1) + CHECK_PARAM_RET (dev < I2C_NUMOF, -1) mutex_unlock(&_i2c_bus[dev].lock); return 0; @@ -214,7 +199,7 @@ int /* IRAM */ i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, DEBUG ("%s: dev=%u addr=%02x data=%p len=%d flags=%01x\n", __func__, dev, addr, data, len, flags); - CHECK_PARAM_RET (dev < i2c_bus_num, -EINVAL); + CHECK_PARAM_RET (dev < I2C_NUMOF, -EINVAL); CHECK_PARAM_RET (len > 0, -EINVAL); CHECK_PARAM_RET (data != NULL, -EINVAL); @@ -275,7 +260,7 @@ int /* IRAM */ i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_ DEBUG ("%s: dev=%u addr=%02x data=%p len=%d flags=%01x\n", __func__, dev, addr, data, len, flags); - CHECK_PARAM_RET (dev < i2c_bus_num, -EINVAL); + CHECK_PARAM_RET (dev < I2C_NUMOF, -EINVAL); CHECK_PARAM_RET (len > 0, -EINVAL); CHECK_PARAM_RET (data != NULL, -EINVAL); @@ -714,7 +699,7 @@ static /* IRAM */ int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack) void i2c_print_config(void) { - for (unsigned bus = 0; bus < i2c_bus_num; bus++) { + for (unsigned bus = 0; bus < I2C_NUMOF; bus++) { ets_printf("\tI2C_DEV(%d)\tscl=%d sda=%d\n", bus, _i2c_bus[bus].scl, _i2c_bus[bus].sda); } From 282b13adbc7a2b5b4844d2e0915bf84ac7f3d815 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 19 Dec 2018 13:10:46 +0100 Subject: [PATCH 06/20] boards/esp32: I2C configuration approach changed I2C devices are now configured using static array in header files instead of static variables in implementation to be able to define I2C_NUMOF using the size of the array instead of a variable. --- boards/common/esp32/include/periph_conf_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/common/esp32/include/periph_conf_common.h b/boards/common/esp32/include/periph_conf_common.h index f1129c5e3128..abfdde3da85e 100644 --- a/boards/common/esp32/include/periph_conf_common.h +++ b/boards/common/esp32/include/periph_conf_common.h @@ -127,7 +127,7 @@ static const i2c_conf_t i2c_config[] = { * * @note I2C_NUMOF definition must not be changed. */ -#define I2C_NUMOF (i2c_bus_num) +#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0])) /** @} */ From fc83c791bce339a4c09cc7652f1a2df16ef14b4f Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 11:49:51 +0100 Subject: [PATCH 07/20] cpu/esp32: SPI configuration approach changed SPI devices are now configured using static array in header files instead of static variables in implementation to be able to define SPI_NUMOF using the size of the array instead of a variable. --- cpu/esp32/include/periph_cpu.h | 20 ++++++++- cpu/esp32/periph/spi.c | 80 ++++++++++++++-------------------- 2 files changed, 51 insertions(+), 49 deletions(-) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index d3c7cf4f1b5a..b49da2de51d5 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -393,8 +393,24 @@ extern const unsigned pwm_dev_num; * definitions of SPIn_*. */ -/** Number of SPI interfaces determined from SPI_* definitions */ -extern const unsigned spi_bus_num; +/** + * @brief SPI controller used for peripheral interfaces + */ +typedef enum { + HSPI = 2, /**< HSPI interface controller */ + VSPI = 3, /**< VSPI interface controller */ +} spi_ctrl_t; + +/** + * @brief SPI configuration structure type + */ +typedef struct { + spi_ctrl_t ctrl; /**< SPI controller used for the interface */ + gpio_t sck; /**< GPIO used as SCK pin */ + gpio_t mosi; /**< GPIO used as MOSI pin */ + gpio_t miso; /**< GPIO used as MISO pin */ + gpio_t cs; /**< GPIO used as CS0 pin */ +} spi_conf_t; #define PERIPH_SPI_NEEDS_TRANSFER_BYTE /**< requires function spi_transfer_byte */ #define PERIPH_SPI_NEEDS_TRANSFER_REG /**< requires function spi_transfer_reg */ diff --git a/cpu/esp32/periph/spi.c b/cpu/esp32/periph/spi.c index 811a27209e8f..de45998f2a64 100644 --- a/cpu/esp32/periph/spi.c +++ b/cpu/esp32/periph/spi.c @@ -40,6 +40,8 @@ #include "gpio_arch.h" +#if defined(SPI0_CTRL) || defined(SPI1_CTRL) + #define SPI_BLOCK_SIZE 64 /* number of bytes per SPI transfer */ #define CSPI (0) /* controller SPI0 realizes interface CSPI */ @@ -55,13 +57,8 @@ /** stucture which decribes all properties of one SPI bus */ struct _spi_bus_t { spi_dev_t* regs; /* pointer to register data struct of the SPI device */ - uint8_t controller; /* number of the controller used */ uint8_t mod; /* peripheral hardware module of the SPI interface */ uint8_t int_src; /* peripheral interrupt source used by the SPI device */ - uint8_t pin_sck; /* SCK pin */ - uint8_t pin_mosi; /* MOSI pin */ - uint8_t pin_miso; /* MISO pin */ - uint8_t pin_cs; /* CS pin */ uint8_t signal_sck; /* SCK signal from the controller */ uint8_t signal_mosi; /* MOSI signal from the controller */ uint8_t signal_miso; /* MISO signal to the controller */ @@ -73,11 +70,6 @@ struct _spi_bus_t { static struct _spi_bus_t _spi[] = { #ifdef SPI0_CTRL { - .controller = SPI0_CTRL, - .pin_cs = SPI0_CS0, - .pin_sck = SPI0_SCK, - .pin_mosi = SPI0_MOSI, - .pin_miso = SPI0_MISO, .initialized = false, .pins_initialized = false, .lock = MUTEX_INIT @@ -85,11 +77,6 @@ static struct _spi_bus_t _spi[] = { #endif #ifdef SPI1_CTRL { - .controller = SPI1_CTRL, - .pin_cs = SPI1_CS0, - .pin_sck = SPI1_SCK, - .pin_mosi = SPI1_MOSI, - .pin_miso = SPI1_MISO, .initialized = false, .pins_initialized = false, .lock = MUTEX_INIT @@ -97,11 +84,8 @@ static struct _spi_bus_t _spi[] = { #endif }; -/* the number of SPI bus devices used */ -const unsigned spi_bus_num = sizeof(_spi) / sizeof(_spi[0]); - #define CHECK_SPI_DEV(bus) { \ - CHECK_PARAM(bus < spi_bus_num); \ + CHECK_PARAM(bus < SPI_NUMOF); \ if (_spi[bus].regs == NULL) { \ LOG_TAG_ERROR("spi", "SPI_DEV(%d) is not available\n", bus); \ return; \ @@ -109,7 +93,7 @@ const unsigned spi_bus_num = sizeof(_spi) / sizeof(_spi[0]); } #define CHECK_SPI_DEV_RET(bus,error) { \ - CHECK_PARAM_RET(bus < spi_bus_num, error); \ + CHECK_PARAM_RET(bus < SPI_NUMOF, error); \ if (_spi[bus].regs == NULL) { \ LOG_TAG_ERROR("spi", "SPI_DEV(%d) is not available\n", bus); \ return error; \ @@ -127,9 +111,9 @@ const unsigned spi_bus_num = sizeof(_spi) / sizeof(_spi[0]); void IRAM_ATTR spi_init (spi_t bus) { - CHECK_PARAM(bus < spi_bus_num); + CHECK_PARAM(bus < SPI_NUMOF); - switch (_spi[bus].controller) { + switch (spi_config[bus].ctrl) { case HSPI: _spi[bus].regs = &SPI2; _spi[bus].mod = PERIPH_HSPI_MODULE; _spi[bus].int_src = ETS_SPI2_INTR_SOURCE; @@ -166,10 +150,10 @@ static void _spi_init_internal (spi_t bus) spi_init_pins(bus); /* check whether pins could be initialized, otherwise return */ - if (gpio_get_pin_usage(_spi[bus].pin_sck) != _SPI && - gpio_get_pin_usage(_spi[bus].pin_miso) != _SPI && - gpio_get_pin_usage(_spi[bus].pin_mosi) != _SPI && - gpio_get_pin_usage(_spi[bus].pin_cs) != _SPI) { + if (gpio_get_pin_usage(spi_config[bus].sck) != _SPI && + gpio_get_pin_usage(spi_config[bus].miso) != _SPI && + gpio_get_pin_usage(spi_config[bus].mosi) != _SPI && + gpio_get_pin_usage(spi_config[bus].cs) != _SPI) { return; } @@ -224,31 +208,31 @@ void spi_init_pins(spi_t bus) as SPI pins */ if (bus != SPI_DEV(2)) { /* if not already initialized as SPI, try to initialize the pins */ - if (gpio_init (_spi[bus].pin_sck, GPIO_OUT) || - gpio_init (_spi[bus].pin_mosi, GPIO_OUT) || - gpio_init (_spi[bus].pin_miso, GPIO_IN)) { + if (gpio_init (spi_config[bus].sck, GPIO_OUT) || + gpio_init (spi_config[bus].mosi, GPIO_OUT) || + gpio_init (spi_config[bus].miso, GPIO_IN)) { LOG_TAG_ERROR("spi", "SPI_DEV(%d) pins could not be initialized\n", bus); return; } - if (spi_init_cs(bus, _spi[bus].pin_cs) != SPI_OK) { + if (spi_init_cs(bus, spi_config[bus].cs) != SPI_OK) { LOG_TAG_ERROR("spi", "SPI_DEV(%d) CS signal could not be initialized\n", bus); return; } /* store the usage type in GPIO table */ - gpio_set_pin_usage(_spi[bus].pin_sck, _SPI); - gpio_set_pin_usage(_spi[bus].pin_mosi, _SPI); - gpio_set_pin_usage(_spi[bus].pin_miso, _SPI); + gpio_set_pin_usage(spi_config[bus].sck, _SPI); + gpio_set_pin_usage(spi_config[bus].mosi, _SPI); + gpio_set_pin_usage(spi_config[bus].miso, _SPI); /* connect SCK and MOSI pins to the output signal through the GPIO matrix */ - GPIO.func_out_sel_cfg[_spi[bus].pin_sck].func_sel = _spi[bus].signal_sck; - GPIO.func_out_sel_cfg[_spi[bus].pin_mosi].func_sel = _spi[bus].signal_mosi; + GPIO.func_out_sel_cfg[spi_config[bus].sck].func_sel = _spi[bus].signal_sck; + GPIO.func_out_sel_cfg[spi_config[bus].mosi].func_sel = _spi[bus].signal_mosi; /* connect MISO input signal to the MISO pin through the GPIO matrix */ GPIO.func_in_sel_cfg[_spi[bus].signal_miso].sig_in_sel = 1; GPIO.func_in_sel_cfg[_spi[bus].signal_miso].sig_in_inv = 0; - GPIO.func_in_sel_cfg[_spi[bus].signal_miso].func_sel = _spi[bus].pin_miso; + GPIO.func_in_sel_cfg[_spi[bus].signal_miso].func_sel = spi_config[bus].miso; } else { LOG_TAG_WARNING("spi", "Using SPI_DEV(2) is dangerous\n"); @@ -298,7 +282,7 @@ int IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk } /* if parameter cs is GPIO_UNDEF, the default CS pin is used */ - cs = (cs == GPIO_UNDEF) ? _spi[bus].pin_cs : cs; + cs = (cs == GPIO_UNDEF) ? spi_config[bus].cs : cs; /* if the CS pin used is not yet initialized, we do it now */ if (gpio_get_pin_usage(cs) != _SPI && spi_init_cs(bus, cs) != SPI_OK) { @@ -354,7 +338,7 @@ int IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk /* SPI clock is derived from APB clock by dividers */ _spi[bus].regs->clock.clk_equ_sysclk = 0; - /* set SPI clock deviders */ + /* set SPI clock dividers */ _spi[bus].regs->clock.clkdiv_pre = spi_clkdiv_pre; _spi[bus].regs->clock.clkcnt_n = spi_clkcnt_N; _spi[bus].regs->clock.clkcnt_h = (spi_clkcnt_N+1)/2-1; @@ -378,12 +362,12 @@ static const char* _spi_names[] = { "CSPI", "FSPI", "HSPI", "VSPI" }; void spi_print_config(void) { - for (unsigned bus = 0; bus < spi_bus_num; bus++) { - ets_printf("\tSPI_DEV(%d)\t%s ", bus, _spi_names[_spi[bus].controller]); - ets_printf("sck=%d " , _spi[bus].pin_sck); - ets_printf("miso=%d ", _spi[bus].pin_miso); - ets_printf("mosi=%d ", _spi[bus].pin_mosi); - ets_printf("cs=%d\n" , _spi[bus].pin_cs); + for (unsigned bus = 0; bus < SPI_NUMOF; bus++) { + ets_printf("\tSPI_DEV(%d)\t%s ", bus, _spi_names[spi_config[bus].ctrl]); + ets_printf("sck=%d " , spi_config[bus].sck); + ets_printf("miso=%d ", spi_config[bus].miso); + ets_printf("mosi=%d ", spi_config[bus].mosi); + ets_printf("cs=%d\n" , spi_config[bus].cs); } } @@ -453,7 +437,7 @@ static void IRAM_ATTR _spi_buf_transfer(uint8_t bus, const void *out, void *in, } void IRAM_ATTR spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, - const void *out, void *in, size_t len) + const void *out, void *in, size_t len) { CHECK_SPI_DEV(bus); @@ -474,7 +458,7 @@ void IRAM_ATTR spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, } #endif - gpio_clear (cs != SPI_CS_UNDEF ? cs : _spi[bus].pin_cs); + gpio_clear (cs != SPI_CS_UNDEF ? cs : spi_config[bus].cs); size_t blocks = len / SPI_BLOCK_SIZE; uint8_t tail = len % SPI_BLOCK_SIZE; @@ -493,7 +477,7 @@ void IRAM_ATTR spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, in ? (uint8_t *)in + blocks * SPI_BLOCK_SIZE : NULL, tail); } if (!cont) { - gpio_set (cs != SPI_CS_UNDEF ? cs : _spi[bus].pin_cs); + gpio_set (cs != SPI_CS_UNDEF ? cs : spi_config[bus].cs); } #if ENABLE_DEBUG @@ -506,3 +490,5 @@ void IRAM_ATTR spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, } #endif } + +#endif /* defined(SPI0_CTRL) || defined(SPI1_CTRL) */ From 7d267960633688e5b56d0fc8c80114430dcc3e1f Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 11:51:23 +0100 Subject: [PATCH 08/20] boards/esp32: SPI configuration approach changed SPI devices are now configured using static array in header files instead of static variables in implementation to be able to define SPI_NUMOF using the size of the array instead of a variable. --- .../common/esp32/include/periph_conf_common.h | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/boards/common/esp32/include/periph_conf_common.h b/boards/common/esp32/include/periph_conf_common.h index abfdde3da85e..f2057a06ec8b 100644 --- a/boards/common/esp32/include/periph_conf_common.h +++ b/boards/common/esp32/include/periph_conf_common.h @@ -152,6 +152,30 @@ static const i2c_conf_t i2c_config[] = { * @name SPI configuration */ +/** + * @brief Static array with configuration for declared I2C devices + */ +static const spi_conf_t spi_config[] = { +#ifdef SPI0_CTRL + { + .ctrl = SPI0_CTRL, + .sck = SPI0_SCK, + .mosi = SPI0_MOSI, + .miso = SPI0_MISO, + .cs = SPI0_CS0, + }, +#endif +#ifdef SPI1_CTRL + { + .ctrl = SPI1_CTRL, + .sck = SPI1_SCK, + .mosi = SPI1_MOSI, + .miso = SPI1_MISO, + .cs = SPI1_CS0, + }, +#endif +}; + /** * @brief Number of SPI interfaces * @@ -160,7 +184,7 @@ static const i2c_conf_t i2c_config[] = { * * @note SPI_NUMOF definition must not be changed. */ -#define SPI_NUMOF (spi_bus_num) +#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) /** @} */ From 122085fb7b06be6def35680d96c70edd828e49bb Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 12:01:20 +0100 Subject: [PATCH 09/20] cpu/esp32: UART configuration approach changed UART devices are now configured using static array in header files instead of static variables in implementation to be able to define UART_NUMOF using the size of the array instead of a variable. --- cpu/esp32/include/periph_cpu.h | 8 +++++++ cpu/esp32/periph/uart.c | 44 ++++++++++------------------------ 2 files changed, 20 insertions(+), 32 deletions(-) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index b49da2de51d5..7fdd20e46b0f 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -464,6 +464,14 @@ typedef struct { * * @{ */ + +/** + * @brief UART configuration structure type + */ +typedef struct { + gpio_t txd; /**< GPIO used as TxD pin */ + gpio_t rxd; /**< GPIO used as RxD pin */ +} uart_conf_t; /** @} */ diff --git a/cpu/esp32/periph/uart.c b/cpu/esp32/periph/uart.c index e2b61f0297bc..bb0dd4536fdd 100644 --- a/cpu/esp32/periph/uart.c +++ b/cpu/esp32/periph/uart.c @@ -50,8 +50,6 @@ struct uart_hw_t { uart_dev_t* regs; /* pointer to register data struct of the UART device */ - uint8_t pin_txd; /* TxD pin */ - uint8_t pin_rxd; /* RxD pin */ uint8_t signal_txd; /* TxD signal from the controller */ uint8_t signal_rxd; /* RxD signal to the controller */ uint32_t baudrate; /* used baudrate */ @@ -64,8 +62,6 @@ struct uart_hw_t { static struct uart_hw_t _uarts[] = { { .regs = &UART0, - .pin_txd = GPIO1, - .pin_rxd = GPIO3, .signal_txd = U0TXD_OUT_IDX, .signal_rxd = U0RXD_IN_IDX, .baudrate = STDIO_UART_BAUDRATE, @@ -74,8 +70,6 @@ static struct uart_hw_t _uarts[] = { }, #if defined(UART1_TXD) && defined(UART1_RXD) { .regs = &UART1, - .pin_txd = UART1_TXD, - .pin_rxd = UART1_RXD, .signal_txd = U1TXD_OUT_IDX, .signal_rxd = U1RXD_IN_IDX, .baudrate = STDIO_UART_BAUDRATE, @@ -85,8 +79,6 @@ static struct uart_hw_t _uarts[] = { #endif #if defined(UART2_TXD) && defined(UART2_RXD) { .regs = &UART2, - .pin_txd = UART2_TXD, - .pin_rxd = UART2_RXD, .signal_txd = U2TXD_OUT_IDX, .signal_rxd = U2RXD_IN_IDX, .baudrate = STDIO_UART_BAUDRATE, @@ -117,30 +109,30 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) if (uart == UART_DEV(1) || uart == UART_DEV(2)) { /* reset the pins when they were already used as UART pins */ - if (gpio_get_pin_usage(_uarts[uart].pin_txd) == _UART) { - gpio_set_pin_usage(_uarts[uart].pin_txd, _GPIO); + if (gpio_get_pin_usage(uart_config[uart].txd) == _UART) { + gpio_set_pin_usage(uart_config[uart].txd, _GPIO); } - if (gpio_get_pin_usage(_uarts[uart].pin_rxd) == _UART) { - gpio_set_pin_usage(_uarts[uart].pin_rxd, _GPIO); + if (gpio_get_pin_usage(uart_config[uart].rxd) == _UART) { + gpio_set_pin_usage(uart_config[uart].rxd, _GPIO); } /* try to initialize the pins as GPIOs first */ - if (gpio_init (_uarts[uart].pin_rxd, GPIO_IN) || - gpio_init (_uarts[uart].pin_txd, GPIO_OUT)) { + if (gpio_init (uart_config[uart].txd, GPIO_OUT) || + gpio_init (uart_config[uart].rxd, GPIO_IN)) { return -1; } /* store the usage type in GPIO table */ - gpio_set_pin_usage(_uarts[uart].pin_txd, _UART); - gpio_set_pin_usage(_uarts[uart].pin_rxd, _UART); + gpio_set_pin_usage(uart_config[uart].txd, _UART); + gpio_set_pin_usage(uart_config[uart].rxd, _UART); /* connect TxD pin to the TxD output signal through the GPIO matrix */ - GPIO.func_out_sel_cfg[_uarts[uart].pin_txd].func_sel = _uarts[uart].signal_txd; + GPIO.func_out_sel_cfg[uart_config[uart].txd].func_sel = __uarts[uart].signal_txd; /* connect RxD input signal to the RxD pin through the GPIO matrix */ - GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_sel = 1; - GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_inv = 0; - GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].func_sel = _uarts[uart].pin_rxd; + GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].sig_in_sel = 1; + GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].sig_in_inv = 0; + GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].func_sel = uart_config[uart].rxd; } _uarts[uart].baudrate = baudrate; @@ -166,21 +158,15 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len) void uart_poweron (uart_t uart) { switch (uart) { - #if UART_NUMOF case 0: periph_module_enable(PERIPH_UART0_MODULE); _uart_config(uart); break; - #endif - #if UART_NUMOF > 1 case 1: periph_module_enable(PERIPH_UART1_MODULE); _uart_config(uart); break; - #endif - #if UART_NUMOF > 2 case 2: periph_module_enable(PERIPH_UART2_MODULE); _uart_config(uart); break; - #endif default: break; } } @@ -188,15 +174,9 @@ void uart_poweron (uart_t uart) void uart_poweroff (uart_t uart) { switch (uart) { - #if UART_NUMOF case 0: periph_module_disable(PERIPH_UART0_MODULE); break; - #endif - #if UART_NUMOF > 1 case 1: periph_module_disable(PERIPH_UART1_MODULE); break; - #endif - #if UART_NUMOF > 2 case 2: periph_module_disable(PERIPH_UART2_MODULE); break; - #endif default: break; } } From 63428bb36c1ee247a137ef0fde03d368c4858b43 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 12:01:48 +0100 Subject: [PATCH 10/20] boards/esp32: UART configuration approach changed UART devices are now configured using static array in header files instead of static variables in implementation to be able to define UART_NUMOF using the size of the array instead of a variable. --- .../common/esp32/include/periph_conf_common.h | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/boards/common/esp32/include/periph_conf_common.h b/boards/common/esp32/include/periph_conf_common.h index f2057a06ec8b..3e51f5266c05 100644 --- a/boards/common/esp32/include/periph_conf_common.h +++ b/boards/common/esp32/include/periph_conf_common.h @@ -192,6 +192,35 @@ static const spi_conf_t spi_config[] = { * @name UART configuration */ +#ifndef UART0_TXD +#define UART0_TXD (GPIO1) /**< TxD of UART_DEV(0) used on all ESP32 boards */ +#endif +#ifndef UART0_RXD +#define UART0_RXD (GPIO3) /**< RxD of UART_DEV(0) used on all ESP32 boards */ +#endif + +/** + * @brief Static array with configuration for declared I2C devices + */ +static const uart_conf_t uart_config[] = { + { + .txd = UART0_TXD, + .rxd = UART0_RXD, + }, + #if defined(UART1_TXD) && defined(UART1_RXD) + { + .txd = UART1_TXD, + .rxd = UART1_RXD, + }, + #endif + #if defined(UART2_TXD) && defined(UART2_RXD) + { + .txd = UART2_TXD, + .rxd = UART2_RXD, + }, + #endif +}; + /** * @brief Number of UART interfaces * From 04b5371e1bf7760af6ad2b87693c7acce2352112 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 12:06:20 +0100 Subject: [PATCH 11/20] cpu/esp32: PWM configuration approach changed PWM channels are now configured using static array in header files instead of static variables in implementation. --- cpu/esp32/include/periph_cpu.h | 8 +++++--- cpu/esp32/periph/pwm.c | 36 +++++++++++++++------------------- 2 files changed, 21 insertions(+), 23 deletions(-) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index 7fdd20e46b0f..1b82f3b56d95 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -346,14 +346,16 @@ typedef struct { * other purposes. */ +/** + * @brief Maximum number of PWM devices + */ +#define PWM_NUMOF_MAX (2) + /** * @brief Maximum number of channels per PWM device. */ #define PWM_CHANNEL_NUM_DEV_MAX (6) -/** Number of PWM devices determined from PWM0_GPIOS and PWM1_GPIOS. */ -extern const unsigned pwm_dev_num; - /** @} */ /** diff --git a/cpu/esp32/periph/pwm.c b/cpu/esp32/periph/pwm.c index 3dd6117c44d6..19053d9a3f5f 100644 --- a/cpu/esp32/periph/pwm.c +++ b/cpu/esp32/periph/pwm.c @@ -40,7 +40,6 @@ #if defined(PWM0_GPIOS) || defined(PWM1_GPIOS) -#define PWM_NUMOF_MAX (2) /* maximum number of PWM devices */ #define PWM_CLK (160000000UL) /* base clock of PWM devices */ #define PWM_CPS_MAX (10000000UL) /* maximum cycles per second supported */ #define PWM_CPS_MIN (2500UL) /* minumum cycles per second supported */ @@ -101,8 +100,8 @@ static const struct _pwm_hw_t _pwm_hw[] = .mod = PERIPH_PWM0_MODULE, .int_src = ETS_PWM0_INTR_SOURCE, .signal_group = PWM0_OUT0A_IDX, - .gpio_num = sizeof(_pwm_channel_gpios_0) >> 2, - .gpios = _pwm_channel_gpios_0, + .gpio_num = sizeof(pwm0_channels) / sizeof(pwm0_channels[0]), + .gpios = pwm0_channels, }, #endif #ifdef PWM1_GPIOS @@ -111,15 +110,12 @@ static const struct _pwm_hw_t _pwm_hw[] = .mod = PERIPH_PWM1_MODULE, .int_src = ETS_PWM1_INTR_SOURCE, .signal_group = PWM1_OUT0A_IDX, - .gpio_num = sizeof(_pwm_channel_gpios_1) >> 2, - .gpios = _pwm_channel_gpios_1, + .gpio_num = sizeof(pwm1_channels) / sizeof(pwm1_channels[0]), + .gpios = pwm1_channels, }, #endif }; -/* the number of PWM devices used */ -const unsigned pwm_dev_num = sizeof(_pwm_hw) / sizeof(_pwm_hw[0]); - /* data structure dynamic channel configuration */ typedef struct { bool used; @@ -146,7 +142,7 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res) { DEBUG ("%s pwm=%u mode=%u freq=%u, res=%u\n", __func__, pwm, mode, freq, res); - CHECK_PARAM_RET (pwm < pwm_dev_num, 0); + CHECK_PARAM_RET (pwm < PWM_NUMOF, 0); CHECK_PARAM_RET (freq > 0, 0); if (_pwm_init_first_time) { @@ -203,7 +199,7 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res) uint8_t pwm_channels(pwm_t pwm) { - CHECK_PARAM_RET (pwm < pwm_dev_num, 0); + CHECK_PARAM_RET (pwm < PWM_NUMOF, 0); return _pwm_hw[pwm].gpio_num; } @@ -212,7 +208,7 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value) { DEBUG("%s pwm=%u channel=%u value=%u\n", __func__, pwm, channel, value); - CHECK_PARAM (pwm < pwm_dev_num); + CHECK_PARAM (pwm < PWM_NUMOF); CHECK_PARAM (channel < _pwm_dev[pwm].chn_num); CHECK_PARAM (value <= _pwm_dev[pwm].res); @@ -287,14 +283,14 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value) void pwm_poweron(pwm_t pwm) { - CHECK_PARAM (pwm < pwm_dev_num); + CHECK_PARAM (pwm < PWM_NUMOF); periph_module_enable(_pwm_hw[pwm].mod); _pwm_start(pwm); } void pwm_poweroff(pwm_t pwm) { - CHECK_PARAM (pwm < pwm_dev_num); + CHECK_PARAM (pwm < PWM_NUMOF); _pwm_stop (pwm); periph_module_disable(_pwm_hw[pwm].mod); } @@ -385,7 +381,7 @@ static void _pwm_start(pwm_t pwm) } /* sync all timers */ - for (unsigned i = 0; i < pwm_dev_num; i++) { + for (unsigned i = 0; i < PWM_NUMOF; i++) { _pwm_hw[i].regs->timer[0].sync.sync_sw = ~_pwm_hw[i].regs->timer[0].sync.sync_sw; } } @@ -399,13 +395,13 @@ static void _pwm_stop(pwm_t pwm) /* do some static initialization and configuration checks */ static bool _pwm_configuration(void) { - if (pwm_dev_num > PWM_NUMOF_MAX) { + if (PWM_NUMOF > PWM_NUMOF_MAX) { LOG_TAG_ERROR("pwm", "%d PWM devices were defined, only %d PWM are " - "supported\n", pwm_dev_num, PWM_NUMOF_MAX); + "supported\n", PWM_NUMOF, PWM_NUMOF_MAX); return false; } - for (unsigned i = 0; i < pwm_dev_num; i++) { + for (unsigned i = 0; i < PWM_NUMOF; i++) { if (_pwm_hw[i].gpio_num > PWM_CHANNEL_NUM_DEV_MAX) { LOG_TAG_ERROR("pwm", "Number of PWM channels of device %d is %d, " "at maximum only %d channels per PWM device are " @@ -415,8 +411,8 @@ static bool _pwm_configuration(void) } } bool multiple_used = false; - for (unsigned i = 0; i < pwm_dev_num; i++) { - for (unsigned j = 0; j < pwm_dev_num; j++) { + for (unsigned i = 0; i < PWM_NUMOF; i++) { + for (unsigned j = 0; j < PWM_NUMOF; j++) { if (i != j) { for (unsigned k = 0; k < _pwm_hw[i].gpio_num >> 2; k++) { for (unsigned l = 0; l < _pwm_hw[j].gpio_num >> 2; l++) { @@ -440,7 +436,7 @@ static bool _pwm_configuration(void) void pwm_print_config(void) { - for (unsigned pwm = 0; pwm < pwm_dev_num; pwm++) { + for (unsigned pwm = 0; pwm < PWM_NUMOF; pwm++) { ets_printf("\tPWM_DEV(%d)\tchannels=[ ", pwm); for (int i = 0; i < _pwm_hw[pwm].gpio_num; i++) { ets_printf("%d ", _pwm_hw[pwm].gpios[i]); From 0c36c65ecedcd46ebbb9b13ce433dad924dbf749 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 12:06:40 +0100 Subject: [PATCH 12/20] boards/esp32: PWM configuration approach changed PWM channels are now configured using static array in header files instead of static variables in implementation. --- .../common/esp32/include/periph_conf_common.h | 21 ++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/boards/common/esp32/include/periph_conf_common.h b/boards/common/esp32/include/periph_conf_common.h index 3e51f5266c05..9a09a3e444a3 100644 --- a/boards/common/esp32/include/periph_conf_common.h +++ b/boards/common/esp32/include/periph_conf_common.h @@ -136,6 +136,19 @@ static const i2c_conf_t i2c_config[] = { * @{ */ +/** + * @brief Static array of GPIOs that can be used as channels of PWM0 + */ +#ifdef PWM0_GPIOS +static const gpio_t pwm0_channels[] = PWM0_GPIOS; +#endif +/** + * @brief Static array of GPIOs that can be used as channels of PWM0 + */ +#ifdef PWM1_GPIOS +static const gpio_t pwm1_channels[] = PWM1_GPIOS; +#endif + /** * @brief Number of PWM devices * @@ -144,7 +157,13 @@ static const i2c_conf_t i2c_config[] = { * * @note PWM_NUMOF definition must not be changed. */ -#define PWM_NUMOF (pwm_dev_num) +#if defined(PWM0_GPIOS) && defined(PWM1_GPIOS) +#define PWM_NUMOF (2) +#elif defined(PWM0_GPIOS) || defined(PWM1_GPIOS) +#define PWM_NUMOF (1) +#else +#define PWM_NUMOF (0) +#endif /** @} */ From 40a206091f4ae4a41234ffa820d514f8c48ac437 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 12:11:18 +0100 Subject: [PATCH 13/20] cpu/esp32: cleanup of periph/i2c Static configuration array is used in hardware implementation for pins instead of having additional members in the hardware configuration structure. Hardware configuration structure is now const. In the software implementation, the configuration structure has to be used for printing the configuration. --- cpu/esp32/periph/i2c_hw.c | 71 ++++++++++++++++++--------------------- cpu/esp32/periph/i2c_sw.c | 4 +-- 2 files changed, 35 insertions(+), 40 deletions(-) diff --git a/cpu/esp32/periph/i2c_hw.c b/cpu/esp32/periph/i2c_hw.c index 8049e30b142d..c176d57bfcc2 100644 --- a/cpu/esp32/periph/i2c_hw.c +++ b/cpu/esp32/periph/i2c_hw.c @@ -87,15 +87,13 @@ struct i2c_hw_t { i2c_dev_t* regs; /* pointer to register data struct of the I2C device */ uint8_t mod; /* peripheral hardware module of the I2C interface */ uint8_t int_src; /* peripheral interrupt source used by the I2C device */ - uint8_t pin_scl; /* SCL pin */ - uint8_t pin_sda; /* SDA pin */ uint8_t signal_scl_in; /* SCL signal to the controller */ uint8_t signal_scl_out; /* SCL signal from the controller */ uint8_t signal_sda_in; /* SDA signal to the controller */ uint8_t signal_sda_out; /* SDA signal from the controller */ }; -static struct i2c_hw_t _i2c_hw[] = { +static const struct i2c_hw_t _i2c_hw[] = { { .regs = &I2C0, .mod = PERIPH_I2C0_MODULE, @@ -163,11 +161,8 @@ void i2c_init(i2c_t dev) _i2c_bus[dev].data = 0; _i2c_bus[dev].speed = i2c_config[dev].speed; - _i2c_hw[dev].pin_scl = i2c_config[dev].scl; - _i2c_hw[dev].pin_sda = i2c_config[dev].sda; - DEBUG ("%s scl=%d sda=%d speed=%d\n", __func__, - _i2c_hw[dev].pin_scl, _i2c_hw[dev].pin_sda, _i2c_bus[dev].speed); + i2c_config[dev].scl, i2c_config[dev].sda, _i2c_bus[dev].speed); /* enable (power on) the according I2C module */ periph_module_enable(_i2c_hw[dev].mod); @@ -477,38 +472,38 @@ static int _i2c_init_pins(i2c_t dev) * reset GPIO usage type if the pins were used already for I2C before to * make it possible to reinitialize I2C */ - if (gpio_get_pin_usage(_i2c_hw[dev].pin_scl) == _I2C) { - gpio_set_pin_usage(_i2c_hw[dev].pin_scl, _GPIO); + if (gpio_get_pin_usage(i2c_config[dev].scl) == _I2C) { + gpio_set_pin_usage(i2c_config[dev].scl, _GPIO); } - if (gpio_get_pin_usage(_i2c_hw[dev].pin_sda) == _I2C) { - gpio_set_pin_usage(_i2c_hw[dev].pin_sda, _GPIO); + if (gpio_get_pin_usage(i2c_config[dev].sda) == _I2C) { + gpio_set_pin_usage(i2c_config[dev].sda, _GPIO); } /* try to configure SDA and SCL pin as GPIO in open-drain mode with enabled pull-ups */ - if (gpio_init (_i2c_hw[dev].pin_scl, GPIO_IN_OD_PU) || - gpio_init (_i2c_hw[dev].pin_sda, GPIO_IN_OD_PU)) { + if (gpio_init (i2c_config[dev].scl, GPIO_IN_OD_PU) || + gpio_init (i2c_config[dev].sda, GPIO_IN_OD_PU)) { return -ENODEV; } /* bring signals to high */ - gpio_set(_i2c_hw[dev].pin_scl); - gpio_set(_i2c_hw[dev].pin_sda); + gpio_set(i2c_config[dev].scl); + gpio_set(i2c_config[dev].sda); /* store the usage type in GPIO table */ - gpio_set_pin_usage(_i2c_hw[dev].pin_scl, _I2C); - gpio_set_pin_usage(_i2c_hw[dev].pin_sda, _I2C); + gpio_set_pin_usage(i2c_config[dev].scl, _I2C); + gpio_set_pin_usage(i2c_config[dev].sda, _I2C); /* connect SCL and SDA pins to output signals through the GPIO matrix */ - GPIO.func_out_sel_cfg[_i2c_hw[dev].pin_scl].func_sel = _i2c_hw[dev].signal_scl_out; - GPIO.func_out_sel_cfg[_i2c_hw[dev].pin_sda].func_sel = _i2c_hw[dev].signal_sda_out; + GPIO.func_out_sel_cfg[i2c_config[dev].scl].func_sel = _i2c_hw[dev].signal_scl_out; + GPIO.func_out_sel_cfg[i2c_config[dev].sda].func_sel = _i2c_hw[dev].signal_sda_out; /* connect SCL and SDA input signals to pins through the GPIO matrix */ GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].sig_in_sel = 1; GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].sig_in_inv = 0; - GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].func_sel = _i2c_hw[dev].pin_scl; + GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].func_sel = i2c_config[dev].scl; GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].sig_in_sel = 1; GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].sig_in_inv = 0; - GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].func_sel = _i2c_hw[dev].pin_sda; + GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].func_sel = i2c_config[dev].sda; return 0; } @@ -738,37 +733,37 @@ static void IRAM_ATTR _i2c_intr_handler (void *arg) static void _i2c_clear_bus(i2c_t dev) { /* reset the usage type in GPIO table */ - gpio_set_pin_usage(_i2c_hw[dev].pin_scl, _GPIO); - gpio_set_pin_usage(_i2c_hw[dev].pin_sda, _GPIO); + gpio_set_pin_usage(i2c_config[dev].scl, _GPIO); + gpio_set_pin_usage(i2c_config[dev].sda, _GPIO); /* configure SDA and SCL pin as GPIO in open-drain mode temporarily */ - gpio_init (_i2c_hw[dev].pin_scl, GPIO_IN_OD_PU); - gpio_init (_i2c_hw[dev].pin_sda, GPIO_IN_OD_PU); + gpio_init (i2c_config[dev].scl, GPIO_IN_OD_PU); + gpio_init (i2c_config[dev].sda, GPIO_IN_OD_PU); /* master send some clock pulses to make the slave release the bus */ - gpio_set (_i2c_hw[dev].pin_scl); - gpio_set (_i2c_hw[dev].pin_sda); - gpio_clear (_i2c_hw[dev].pin_sda); + gpio_set (i2c_config[dev].scl); + gpio_set (i2c_config[dev].sda); + gpio_clear (i2c_config[dev].sda); for (int i = 0; i < 20; i++) { - gpio_toggle(_i2c_hw[dev].pin_scl); + gpio_toggle(i2c_config[dev].scl); } - gpio_set(_i2c_hw[dev].pin_sda); + gpio_set(i2c_config[dev].sda); /* store the usage type in GPIO table */ - gpio_set_pin_usage(_i2c_hw[dev].pin_scl, _I2C); - gpio_set_pin_usage(_i2c_hw[dev].pin_sda, _I2C); + gpio_set_pin_usage(i2c_config[dev].scl, _I2C); + gpio_set_pin_usage(i2c_config[dev].sda, _I2C); /* connect SCL and SDA pins to output signals through the GPIO matrix */ - GPIO.func_out_sel_cfg[_i2c_hw[dev].pin_scl].func_sel = _i2c_hw[dev].signal_scl_out; - GPIO.func_out_sel_cfg[_i2c_hw[dev].pin_sda].func_sel = _i2c_hw[dev].signal_sda_out; + GPIO.func_out_sel_cfg[i2c_config[dev].scl].func_sel = _i2c_hw[dev].signal_scl_out; + GPIO.func_out_sel_cfg[i2c_config[dev].sda].func_sel = _i2c_hw[dev].signal_sda_out; /* connect SCL and SDA input signals to pins through the GPIO matrix */ GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].sig_in_sel = 1; GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].sig_in_inv = 0; - GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].func_sel = _i2c_hw[dev].pin_scl; + GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_scl_in].func_sel = i2c_config[dev].scl; GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].sig_in_sel = 1; GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].sig_in_inv = 0; - GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].func_sel = _i2c_hw[dev].pin_sda; + GPIO.func_in_sel_cfg[_i2c_hw[dev].signal_sda_in].func_sel = i2c_config[dev].sda; return; } @@ -828,9 +823,9 @@ static void _i2c_reset_hw (i2c_t dev) void i2c_print_config(void) { - for (unsigned bus = 0; bus < I2C_NUMOF; bus++) { + for (unsigned dev = 0; dev < I2C_NUMOF; dev++) { ets_printf("\tI2C_DEV(%d)\tscl=%d sda=%d\n", - bus, _i2c_hw[bus].pin_scl, _i2c_hw[bus].pin_sda); + dev, i2c_config[dev].scl, i2c_config[dev].sda); } } diff --git a/cpu/esp32/periph/i2c_sw.c b/cpu/esp32/periph/i2c_sw.c index 51b61ba353d1..14c54b3845f2 100644 --- a/cpu/esp32/periph/i2c_sw.c +++ b/cpu/esp32/periph/i2c_sw.c @@ -699,9 +699,9 @@ static /* IRAM */ int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack) void i2c_print_config(void) { - for (unsigned bus = 0; bus < I2C_NUMOF; bus++) { + for (unsigned dev = 0; dev < I2C_NUMOF; dev++) { ets_printf("\tI2C_DEV(%d)\tscl=%d sda=%d\n", - bus, _i2c_bus[bus].scl, _i2c_bus[bus].sda); + dev, i2c_config[dev].scl, i2c_config[dev].sda); } } From 65bbd5c199c1a509a95eb823d6a9910fbca0b224 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 20 Dec 2018 12:19:53 +0100 Subject: [PATCH 14/20] cpu/esp32: rename __uart to _uart Parameter bus is renamed to dev to --- cpu/esp32/periph/uart.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/cpu/esp32/periph/uart.c b/cpu/esp32/periph/uart.c index bb0dd4536fdd..ec787df9156c 100644 --- a/cpu/esp32/periph/uart.c +++ b/cpu/esp32/periph/uart.c @@ -127,12 +127,12 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) gpio_set_pin_usage(uart_config[uart].rxd, _UART); /* connect TxD pin to the TxD output signal through the GPIO matrix */ - GPIO.func_out_sel_cfg[uart_config[uart].txd].func_sel = __uarts[uart].signal_txd; + GPIO.func_out_sel_cfg[uart_config[uart].txd].func_sel = _uarts[uart].signal_txd; /* connect RxD input signal to the RxD pin through the GPIO matrix */ - GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].sig_in_sel = 1; - GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].sig_in_inv = 0; - GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].func_sel = uart_config[uart].rxd; + GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_sel = 1; + GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_inv = 0; + GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].func_sel = uart_config[uart].rxd; } _uarts[uart].baudrate = baudrate; From 1d7e00d01b8e5da336de9b998b480134e7b828d3 Mon Sep 17 00:00:00 2001 From: Schorcht Date: Fri, 21 Dec 2018 17:20:19 +0100 Subject: [PATCH 15/20] fixup! cpu/esp32: ADC/DAC config approach changed --- cpu/esp32/periph/adc.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/cpu/esp32/periph/adc.c b/cpu/esp32/periph/adc.c index e3accfbe28d4..9930da106533 100644 --- a/cpu/esp32/periph/adc.c +++ b/cpu/esp32/periph/adc.c @@ -159,13 +159,15 @@ static bool _adc2_ctrl_initialized = false; #endif /* defined(ADC_GPIOS) || defined(DAC_GPIOS) */ #if defined(ADC_GPIOS) +static const unsigned adc_chn_num = ADC_NUMOF; + static bool _adc_conf_check(void); static void _adc_module_init(void); static bool _adc_module_initialized = false; int adc_init(adc_t line) { - CHECK_PARAM_RET (line < ADC_NUMOF, -1) + CHECK_PARAM_RET (line < adc_chn_num, -1) if (!_adc_module_initialized) { /* do some configuration checks */ @@ -268,7 +270,7 @@ int adc_init(adc_t line) int adc_sample(adc_t line, adc_res_t res) { - CHECK_PARAM_RET (line < ADC_NUMOF, -1) + CHECK_PARAM_RET (line < adc_chn_num, -1) CHECK_PARAM_RET (res <= ADC_RES_12BIT, -1) uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; @@ -312,7 +314,7 @@ int adc_sample(adc_t line, adc_res_t res) int adc_set_attenuation(adc_t line, adc_attenuation_t atten) { - CHECK_PARAM_RET (line < ADC_NUMOF, -1) + CHECK_PARAM_RET (line < adc_chn_num, -1) uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; @@ -331,7 +333,7 @@ int adc_vref_to_gpio25 (void) { /* determine ADC line for GPIO25 */ adc_t line = ADC_UNDEF; - for (unsigned i = 0; i < ADC_NUMOF; i++) { \ + for (unsigned i = 0; i < adc_chn_num; i++) { \ if (adc_channels[i] == GPIO25) { \ line = i; break; @@ -362,7 +364,7 @@ int adc_vref_to_gpio25 (void) static bool _adc_conf_check(void) { - for (unsigned i = 0; i < ADC_NUMOF; i++) { + for (unsigned i = 0; i < adc_chn_num; i++) { if (_gpio_rtcio_map[adc_channels[i]] == RTCIO_NA) { LOG_TAG_ERROR("adc", "GPIO%d cannot be used as ADC line\n", adc_channels[i]); @@ -389,12 +391,13 @@ static void _adc_module_init(void) #if defined(DAC_GPIOS) +static const unsigned dac_chn_num = DAC_NUMOF; static bool _dac_conf_check(void); static bool _dac_module_initialized = false; int8_t dac_init (dac_t line) { - CHECK_PARAM_RET (line < DAC_NUMOF, DAC_NOLINE) + CHECK_PARAM_RET (line < dac_chn_num, DAC_NOLINE) if (!_dac_module_initialized) { /* do some configuration checks */ @@ -455,23 +458,23 @@ int8_t dac_init (dac_t line) void dac_set (dac_t line, uint16_t value) { - CHECK_PARAM (line < DAC_NUMOF); + CHECK_PARAM (line < dac_chn_num); RTCIO.pad_dac[_gpio_rtcio_map[dac_channels[line]] - RTCIO_DAC1].dac = value >> 8; } void dac_poweroff (dac_t line) { - CHECK_PARAM (line < DAC_NUMOF); + CHECK_PARAM (line < dac_chn_num); } void dac_poweron (dac_t line) { - CHECK_PARAM (line < DAC_NUMOF); + CHECK_PARAM (line < dac_chn_num); } static bool _dac_conf_check(void) { - for (unsigned i = 0; i < DAC_NUMOF; i++) { + for (unsigned i = 0; i < dac_chn_num; i++) { if (_gpio_rtcio_map[dac_channels[i]] != RTCIO_DAC1 && _gpio_rtcio_map[dac_channels[i]] != RTCIO_DAC2) { LOG_TAG_ERROR("dac", "GPIO%d cannot be used as DAC line\n", @@ -626,7 +629,7 @@ int rtcio_config_sleep_mode (gpio_t pin, bool mode, bool input) void adc_print_config(void) { ets_printf("\tADC\t\tpins=[ "); #if defined(ADC_GPIOS) - for (unsigned i = 0; i < ADC_NUMOF; i++) { + for (unsigned i = 0; i < adc_chn_num; i++) { ets_printf("%d ", adc_channels[i]); } #endif /* defined(ADC_GPIOS) */ @@ -634,7 +637,7 @@ void adc_print_config(void) { ets_printf("\tDAC\t\tpins=[ "); #if defined(DAC_GPIOS) - for (unsigned i = 0; i < DAC_NUMOF; i++) { + for (unsigned i = 0; i < dac_chn_num; i++) { ets_printf("%d ", dac_channels[i]); } #endif /* defined(DAC_GPIOS) */ From ef6764236f1c859112c5025ae9773e82c8762a66 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Fri, 21 Dec 2018 17:21:11 +0100 Subject: [PATCH 16/20] fixup! boards: esp32-wrover-kit --- boards/esp32-wrover-kit/Makefile.features | 1 - boards/esp32-wrover-kit/include/periph_conf.h | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/boards/esp32-wrover-kit/Makefile.features b/boards/esp32-wrover-kit/Makefile.features index 8aeadbda276d..bd30404ca4c9 100644 --- a/boards/esp32-wrover-kit/Makefile.features +++ b/boards/esp32-wrover-kit/Makefile.features @@ -3,7 +3,6 @@ include $(RIOTBOARD)/common/esp32/Makefile.features # additional features provided by the board FEATURES_PROVIDED += periph_adc -FEATURES_PROVIDED += periph_dac FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_spi diff --git a/boards/esp32-wrover-kit/include/periph_conf.h b/boards/esp32-wrover-kit/include/periph_conf.h index 00d41e78f1a4..5b637d95814f 100644 --- a/boards/esp32-wrover-kit/include/periph_conf.h +++ b/boards/esp32-wrover-kit/include/periph_conf.h @@ -122,7 +122,7 @@ */ #ifndef PWM0_GPIOS #if !MODULE_ESP32_WROVER_KIT_CAMERA || DOXYGEN -#define PWM0_GPIOS { LED0_PIN, LED2_PIN } /**< only available when camera is not connected */ +#define PWM0_GPIOS { GPIO0, GPIO4 } /**< only available when camera is not connected */ #else #define PWM0_GPIOS { } #endif From c31c340a662d3beaacb22af4852ab64d45d49e54 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Fri, 21 Dec 2018 17:29:44 +0100 Subject: [PATCH 17/20] fixup! boards: esp32-olimex-evb --- boards/esp32-olimex-evb/Makefile.features | 2 -- 1 file changed, 2 deletions(-) diff --git a/boards/esp32-olimex-evb/Makefile.features b/boards/esp32-olimex-evb/Makefile.features index b7f86b5586af..ead4bd78963d 100644 --- a/boards/esp32-olimex-evb/Makefile.features +++ b/boards/esp32-olimex-evb/Makefile.features @@ -2,8 +2,6 @@ include $(RIOTBOARD)/common/esp32/Makefile.features # additional features provided by the board (no ADC and no DAC) -FEATURES_PROVIDED += periph_adc -FEATURES_PROVIDED += periph_dac FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_spi From 2149369d9e2b78e4b15ab95d055dd3e9e5a4938d Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Mon, 25 Mar 2019 09:49:24 +0100 Subject: [PATCH 18/20] cpu/esp32: documentation fixes in perip_conf.h --- cpu/esp32/include/periph_cpu.h | 123 ++++++++++++++++++--------------- 1 file changed, 66 insertions(+), 57 deletions(-) diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index 1b82f3b56d95..f1cd9cfa7adb 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -55,20 +55,68 @@ typedef unsigned int gpio_t; /** @} */ /** - * @brief Available ports on the ESP32 + * @brief Definition of a fitting UNDEF value * @{ */ -#define PORT_GPIO 0 /**< port GPIO */ +#define GPIO_UNDEF (0xffffffff) +/** @} */ + +/** + * @brief Define a CPU specific GPIO pin generator macro + * @{ + */ +#define GPIO_PIN(x, y) ((x & 0) | y) +/** @} */ + +/** + * @brief Available GPIO ports on ESP32 + * @{ + */ +#define PORT_GPIO (0) /** @} */ /** * @brief Define CPU specific number of GPIO pins * @{ */ -#define GPIO_PIN_NUMOF 40 -#ifndef GPIO_PIN_COUNT -#define GPIO_PIN_COUNT GPIO_PIN_NUMOF -#endif +#define GPIO_PIN_NUMOF (40) +/** @} */ + +/** + * @brief Override mode flank selection values + * + * @{ + */ +#define HAVE_GPIO_FLANK_T +typedef enum { + GPIO_NONE = 0, + GPIO_RISING = 1, /**< emit interrupt on rising flank */ + GPIO_FALLING = 2, /**< emit interrupt on falling flank */ + GPIO_BOTH = 3, /**< emit interrupt on both flanks */ + GPIO_LOW = 4, /**< emit interrupt on low level */ + GPIO_HIGH = 5 /**< emit interrupt on low level */ +} gpio_flank_t; + +/** @} */ + +/** + * @brief Override GPIO modes + * + * @{ + */ +#define HAVE_GPIO_MODE_T +typedef enum { + GPIO_IN, /**< input */ + GPIO_IN_PD, /**< input with pull-down */ + GPIO_IN_PU, /**< input with pull-up */ + GPIO_OUT, /**< output */ + GPIO_OD, /**< open-drain output */ + GPIO_OD_PU, /**< open-drain output with pull-up */ + GPIO_IN_OUT, /**< input and output */ + GPIO_IN_OD, /**< input and open-drain output */ + GPIO_IN_OD_PU /**< input and open-drain output */ +} gpio_mode_t; +/** @} */ /** @} */ /** @@ -115,43 +163,6 @@ typedef unsigned int gpio_t; #define GPIO39 (GPIO_PIN(PORT_GPIO,39)) /** @} */ -/** - * @brief Override mode flank selection values - * - * @{ - */ -#define HAVE_GPIO_FLANK_T -typedef enum { - GPIO_NONE = 0, - GPIO_RISING = 1, /**< emit interrupt on rising flank */ - GPIO_FALLING = 2, /**< emit interrupt on falling flank */ - GPIO_BOTH = 3, /**< emit interrupt on both flanks */ - GPIO_LOW = 4, /**< emit interrupt on low level */ - GPIO_HIGH = 5 /**< emit interrupt on low level */ -} gpio_flank_t; - -/** @} */ - -/** - * @brief Override GPIO modes - * - * @{ - */ -#define HAVE_GPIO_MODE_T -typedef enum { - GPIO_IN, /**< input */ - GPIO_IN_PD, /**< input with pull-down */ - GPIO_IN_PU, /**< input with pull-up */ - GPIO_OUT, /**< output */ - GPIO_OD, /**< open-drain output */ - GPIO_OD_PU, /**< open-drain output with pull-up */ - GPIO_IN_OUT, /**< input and output */ - GPIO_IN_OD, /**< input and open-drain output */ - GPIO_IN_OD_PU /**< input and open-drain output */ -} gpio_mode_t; -/** @} */ -/** @} */ - /** * @name ADC configuration * @@ -363,8 +374,8 @@ typedef struct { * * ESP32 has four SPI controllers: * - * - controller SPI0 is reserved for caching the flash memory - * - controller SPI1 is reserved for external memories like flash and PSRAM + * - controller SPI0 is reserved for caching the flash memory (CPSI) + * - controller SPI1 is reserved for external memories like flash and PSRAM (FSPI) * - controller SPI2 realizes interface HSPI that can be used for peripherals * - controller SPI3 realizes interface VSPI that can be used for peripherals * @@ -386,17 +397,15 @@ typedef struct { * - SPIn_CS0, the GPIO used as CS signal when the cs parameter in spi_aquire * is GPIO_UNDEF, * - * where n can be 0 or 1. - * - * @note The configuration of the SPI interfaces SPI_DEV(n) should be in - * continuous ascending order of n. + * where n can be 0 or 1. If they are not defined, the according SPI interface + * SPI_DEV(n) is not used. * * SPI_NUMOF is determined automatically from the board-specific peripheral * definitions of SPIn_*. */ /** - * @brief SPI controller used for peripheral interfaces + * @brief SPI controllers that can be used for peripheral interfaces */ typedef enum { HSPI = 2, /**< HSPI interface controller */ @@ -449,20 +458,20 @@ typedef struct { * configuration and is always available. All ESP32 boards use it as standard * configuration for the console. * - * UART_DEV(0).TXD GPIO1 - * UART_DEV(0).RXD GPIO3 + * UART_DEV(0).TXD GPIO1 + * UART_DEV(0).RXD GPIO3 * * The pin configuration of UART_DEV(1) and UART_DEV(2) are defined in * board specific peripheral configuration by * - * UARTn_TXD, the GPIO used as TxD signal, and - * UARTn_RXD, the GPIO used as RxD signal, + * - UARTn_TXD, the GPIO used as TxD signal, and + * - UARTn_RXD, the GPIO used as RxD signal, * - * where n can be 2 or 3. If they are not defined, the UART interface + * where n can be 1 or 2. If they are not defined, the according UART interface * UART_DEV(n) is not used. * * UART_NUMOF is determined automatically from the board-specific peripheral - * definitions of UARTn_TXD and UARTn_RXD. + * definitions of UARTn_*. * * @{ */ @@ -474,8 +483,8 @@ typedef struct { gpio_t txd; /**< GPIO used as TxD pin */ gpio_t rxd; /**< GPIO used as RxD pin */ } uart_conf_t; -/** @} */ +/** @} */ #ifdef __cplusplus } From e73e849fe8b688c218f972a1ed1f03d8fc01516a Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Mon, 25 Mar 2019 10:09:44 +0100 Subject: [PATCH 19/20] cpu/esp32: fixups after merge --- .../common/esp32/include/periph_conf_common.h | 2 +- cpu/esp32/periph/i2c_sw.c | 2 +- cpu/esp32/periph/spi.c | 10 ++-- cpu/esp32/periph/uart.c | 54 ++++++++----------- 4 files changed, 28 insertions(+), 40 deletions(-) diff --git a/boards/common/esp32/include/periph_conf_common.h b/boards/common/esp32/include/periph_conf_common.h index 9a09a3e444a3..6d1bdc8ab0f3 100644 --- a/boards/common/esp32/include/periph_conf_common.h +++ b/boards/common/esp32/include/periph_conf_common.h @@ -193,7 +193,7 @@ static const spi_conf_t spi_config[] = { .cs = SPI1_CS0, }, #endif -}; +}; /** * @brief Number of SPI interfaces diff --git a/cpu/esp32/periph/i2c_sw.c b/cpu/esp32/periph/i2c_sw.c index 14c54b3845f2..120989841134 100644 --- a/cpu/esp32/periph/i2c_sw.c +++ b/cpu/esp32/periph/i2c_sw.c @@ -688,7 +688,7 @@ static /* IRAM */ int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack) if (res != 0) { return res; } - *byte = (*byte << 1) | bit; + *byte = (*byte << 1) | (bit ? 1 : 0); } /* write acknowledgement flag */ diff --git a/cpu/esp32/periph/spi.c b/cpu/esp32/periph/spi.c index de45998f2a64..284afb7ebdeb 100644 --- a/cpu/esp32/periph/spi.c +++ b/cpu/esp32/periph/spi.c @@ -44,11 +44,6 @@ #define SPI_BLOCK_SIZE 64 /* number of bytes per SPI transfer */ -#define CSPI (0) /* controller SPI0 realizes interface CSPI */ -#define FSPI (1) /* controller SPI1 realizes interface FSPI */ -#define HSPI (2) /* controller SPI2 realizes interface HSPI */ -#define VSPI (3) /* controller SPI3 realizes interface VSPI */ - /* pins of FSI are fixed */ #define FSPI_SCK GPIO6 #define FSPI_MISO GPIO7 @@ -99,6 +94,7 @@ static struct _spi_bus_t _spi[] = { return error; \ } \ } + /* * GPIOs that were once initialized as SPI interface pins can not be used * afterwards for anything else. Therefore, SPI interfaces are not initialized @@ -128,7 +124,9 @@ void IRAM_ATTR spi_init (spi_t bus) _spi[bus].signal_mosi = VSPID_OUT_IDX; _spi[bus].signal_miso = VSPIQ_IN_IDX; break; - default: break; + default: LOG_TAG_ERROR("spi", "invalid SPI interface controller " + "used for SPI_DEV(%d)\n"); + break; } return; } diff --git a/cpu/esp32/periph/uart.c b/cpu/esp32/periph/uart.c index ec787df9156c..71fde6a55a41 100644 --- a/cpu/esp32/periph/uart.c +++ b/cpu/esp32/periph/uart.c @@ -49,7 +49,8 @@ #define UART_CLK_FREQ rtc_clk_apb_freq_get() /* APB_CLK is used */ struct uart_hw_t { - uart_dev_t* regs; /* pointer to register data struct of the UART device */ + uart_dev_t* regs; /* pointer to register data struct of used UART device */ + uint8_t mod; /* peripheral hardware module of the UART interface */ uint8_t signal_txd; /* TxD signal from the controller */ uint8_t signal_rxd; /* RxD signal to the controller */ uint32_t baudrate; /* used baudrate */ @@ -62,30 +63,31 @@ struct uart_hw_t { static struct uart_hw_t _uarts[] = { { .regs = &UART0, + .mod = PERIPH_UART0_MODULE, .signal_txd = U0TXD_OUT_IDX, .signal_rxd = U0RXD_IN_IDX, .baudrate = STDIO_UART_BAUDRATE, - .used = false, - .int_src = ETS_UART0_INTR_SOURCE + .int_src = ETS_UART0_INTR_SOURCE, + .used = false }, - #if defined(UART1_TXD) && defined(UART1_RXD) - { .regs = &UART1, + { + .regs = &UART1, + .mod = PERIPH_UART1_MODULE, .signal_txd = U1TXD_OUT_IDX, .signal_rxd = U1RXD_IN_IDX, .baudrate = STDIO_UART_BAUDRATE, - .used = false, - .int_src = ETS_UART1_INTR_SOURCE + .int_src = ETS_UART1_INTR_SOURCE, + .used = false }, - #endif - #if defined(UART2_TXD) && defined(UART2_RXD) - { .regs = &UART2, + { + .regs = &UART2, + .mod = PERIPH_UART2_MODULE, .signal_txd = U2TXD_OUT_IDX, .signal_rxd = U2RXD_IN_IDX, .baudrate = STDIO_UART_BAUDRATE, - .used = false, - .int_src = ETS_UART2_INTR_SOURCE + .int_src = ETS_UART2_INTR_SOURCE, + .used = false } - #endif }; /* declaration of external functions */ @@ -128,7 +130,6 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* connect TxD pin to the TxD output signal through the GPIO matrix */ GPIO.func_out_sel_cfg[uart_config[uart].txd].func_sel = _uarts[uart].signal_txd; - /* connect RxD input signal to the RxD pin through the GPIO matrix */ GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_sel = 1; GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_inv = 0; @@ -157,28 +158,17 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len) void uart_poweron (uart_t uart) { - switch (uart) { - case 0: periph_module_enable(PERIPH_UART0_MODULE); - _uart_config(uart); - break; - case 1: periph_module_enable(PERIPH_UART1_MODULE); - _uart_config(uart); - break; - case 2: periph_module_enable(PERIPH_UART2_MODULE); - _uart_config(uart); - break; - default: break; - } + CHECK_PARAM (uart < UART_NUMOF); + + periph_module_enable(_uarts[uart].mod); + __uart_config(uart); } void uart_poweroff (uart_t uart) { - switch (uart) { - case 0: periph_module_disable(PERIPH_UART0_MODULE); break; - case 1: periph_module_disable(PERIPH_UART1_MODULE); break; - case 2: periph_module_disable(PERIPH_UART2_MODULE); break; - default: break; - } + CHECK_PARAM (uart < UART_NUMOF); + + periph_module_disable(_uarts[uart].mod); } /* systemwide UART initializations */ From 76e0357ef08eed9a1afdf02fc8efa3232df0fed3 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 27 Mar 2019 08:23:51 +0100 Subject: [PATCH 20/20] cpu/esp32: fixups after merge --- cpu/esp32/periph/uart.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/cpu/esp32/periph/uart.c b/cpu/esp32/periph/uart.c index 71fde6a55a41..dfa67762c1b6 100644 --- a/cpu/esp32/periph/uart.c +++ b/cpu/esp32/periph/uart.c @@ -119,8 +119,8 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) } /* try to initialize the pins as GPIOs first */ - if (gpio_init (uart_config[uart].txd, GPIO_OUT) || - gpio_init (uart_config[uart].rxd, GPIO_IN)) { + if (gpio_init (uart_config[uart].rxd, GPIO_IN) || + gpio_init (uart_config[uart].txd, GPIO_OUT)) { return -1; } @@ -161,7 +161,7 @@ void uart_poweron (uart_t uart) CHECK_PARAM (uart < UART_NUMOF); periph_module_enable(_uarts[uart].mod); - __uart_config(uart); + _uart_config(uart); } void uart_poweroff (uart_t uart) @@ -184,7 +184,7 @@ void uart_print_config(void) { for (unsigned uart = 0; uart < UART_NUMOF; uart++) { ets_printf("\tUART_DEV(%d)\ttxd=%d rxd=%d\n", uart, - _uarts[uart].pin_txd, _uarts[uart].pin_rxd); + uart_config[uart].txd, uart_config[uart].rxd); } }