drivers/periph/gpio_ll: shrink gpio_conf_t

This commit optimizes the `gpio_conf_t` type in the following
regards:

- The "base" `gpio_conf_t` is stripped from members that only some
  platforms support, e.g. drive strength, slew rate, and disabling of
  the Schmitt Trigger are no longer universally available but
  platform-specific extensions
- The `gpio_conf_t` is now crammed into a bit-field that is 8 bit or
  16 bit wide. This allows for storing lots of them e.g. in
  `driver_foo_params_t` or `uart_conf_t` etc.
- A `union` of the `struct` with bit-field members and a `bits` is used
  to allow accessing all bits in a simple C statement and to ensure
  alignment for efficient handling of the type

Co-authored-by: Gunar Schorcht <[email protected]>

Author: maribu

cpu/atmega_common/include/periph_cpu_common.h

@@ -231,14 +231,6 @@ typedef enum {
     GPIO_TRIGGER_LEVEL_HIGH     = 0xff, /**< not supported */
 } gpio_irq_trig_t;
 
-#define HAVE_GPIO_PULL_T
-typedef enum {
-    GPIO_FLOATING = 0,
-    GPIO_PULL_UP = 1,
-    GPIO_PULL_DOWN = 0xfe,  /*< not supported */
-    GPIO_PULL_KEEP = 0xff,  /*< not supported */
-} gpio_pull_t;
-
 #define HAVE_GPIO_LL_PREPARE_WRITE_ALL_PINS
 #define HAVE_GPIO_LL_PREPARE_WRITE
 

cpu/atmega_common/periph/gpio_ll.c

@@ -84,10 +84,6 @@ void gpio_ll_query_conf(gpio_conf_t *dest, gpio_port_t port, uint8_t pin)
 {
     assert(dest);
     memset(dest, 0, sizeof(*dest));
-    /* E.g. the schematics in figure 14-5 in the ATmega328P datasheet shows that
-     * a Schmitt Trigger is always connected before the digital input signal.
-     * Let's assume this is also true for all other ATmegas */
-    dest->schmitt_trigger = true;
     if (_is_output(port, pin)) {
         dest->state = GPIO_OUTPUT_PUSH_PULL;
         dest->initial_value = (gpio_ll_read_output(port) >> pin) & 1U;

cpu/efm32/periph/gpio_ll.c

@@ -141,16 +141,5 @@ void gpio_ll_query_conf(gpio_conf_t *dest, gpio_port_t port, uint8_t pin)
         break;
     }
 
-    /* as good as any */
-    dest->slew_rate = GPIO_SLEW_FAST;
-
-    /* It's always on as long as they're in a mode in which it matters, judging
-     * from https://www.silabs.com/documents/public/application-notes/an0027.pdf */
-    dest->schmitt_trigger = true;
-
     dest->initial_value = (gpio_ll_read_output(port) >> pin) & 1;
-
-    /* Using 'strong' her already as that fits with what the hardware has
-     * (lowest, low, standard, high) */
-    dest->drive_strength = GPIO_DRIVE_STRONG;
 }

cpu/esp32/include/periph_cpu.h

@@ -190,7 +190,7 @@ typedef enum {
     GPIO_FLOATING = 0,
     GPIO_PULL_UP = 1,
     GPIO_PULL_DOWN = 2,
-    GPIO_PULL_KEEP = 0xff   /*< not supported */
+    GPIO_PULL_KEEP = 3   /*< not supported */
 } gpio_pull_t;
 
 /**
@@ -212,9 +212,64 @@ typedef enum {
 #define GPIO_DRIVE_20   GPIO_DRIVE_STRONG       /**< 20 mA (default) */
 #define GPIO_DRIVE_30   GPIO_DRIVE_STRONGEST    /**< 30 mA */
 
-/* END: GPIO LL overwrites */
+#define HAVE_GPIO_STATE_T
+typedef enum {
+    GPIO_OUTPUT_PUSH_PULL,
+    GPIO_OUTPUT_OPEN_DRAIN,
+    GPIO_OUTPUT_OPEN_SOURCE,
+    GPIO_INPUT,
+    GPIO_USED_BY_PERIPHERAL,
+    GPIO_DISCONNECT,
+} gpio_state_t;
+
+#define HAVE_GPIO_CONF_T
+typedef union gpio_conf_esp32 gpio_conf_t;
 
 #endif /* ndef DOXYGEN */
+
+/**
+ * @brief       GPIO pin configuration for ESP32/ESP32Cx/ESP32Sx MCUs
+ * @ingroup     drivers_periph_gpio_ll
+ */
+union gpio_conf_esp32 {
+    uint8_t bits;  /**< the raw bits */
+    struct {
+        /**
+         * @brief   State of the pin
+         */
+        gpio_state_t state                      : 3;
+        /**
+         * @brief   Pull resistor configuration
+         */
+        gpio_pull_t pull                        : 2;
+        /**
+         * @brief   Drive strength of the GPIO
+         *
+         * @warning If the requested drive strength is not available, the closest
+         *          fit supported will be configured instead.
+         *
+         * This value is ignored when @ref gpio_conf_esp32::state is configured
+         * to @ref GPIO_INPUT or @ref GPIO_DISCONNECT.
+         */
+        gpio_drive_strength_t drive_strength    : 2;
+        /**
+         * @brief   Initial value of the output
+         *
+         * Ignored if @ref gpio_conf_esp32::state is set to @ref GPIO_INPUT or
+         * @ref GPIO_DISCONNECT. If the pin was previously in a high impedance
+         * state, it is guaranteed to directly transition to the given initial
+         * value.
+         *
+         * @ref gpio_ll_query_conf will write the current value of the specified
+         * pin here, which is read from the input register when the state is
+         * @ref GPIO_INPUT, otherwise the state from the output register is
+         * consulted.
+         */
+        bool initial_value                      : 1;
+    };
+};
+
+/* END: GPIO LL overwrites */
 /** @} */
 
 /**

cpu/esp32/periph/gpio_ll.c

@@ -38,6 +38,15 @@
 
 #include "esp_idf_api/gpio.h"
 
+#ifdef MODULE_FMT
+#include "fmt.h"
+#else
+static inline void print_str(const char *str)
+{
+    fputs(str, stdout);
+}
+#endif
+
 /* variables that have to be used together with periph/gpio */
 #ifdef ESP_PM_WUP_PINS
 extern bool _gpio_pin_pu[GPIO_PIN_NUMOF];
@@ -142,7 +151,6 @@ int gpio_ll_init(gpio_port_t port, uint8_t pin, const gpio_conf_t *conf)
 
     /* since we can't read back the configuration, we have to save it */
     _gpio_conf[gpio] = *conf;
-    _gpio_conf[gpio].schmitt_trigger = false;
 
     if (esp_idf_gpio_config(&cfg) != ESP_OK) {
         return -ENOTSUP;
@@ -196,3 +204,17 @@ void gpio_ll_query_conf(gpio_conf_t *dest, gpio_port_t port, uint8_t pin)
     }
     irq_restore(state);
 }
+
+void gpio_ll_print_conf(const gpio_conf_t *conf)
+{
+    static const char *drive_strs[] = {
+        [GPIO_DRIVE_WEAKEST] = "weakest",
+        [GPIO_DRIVE_WEAK] = "weak",
+        [GPIO_DRIVE_STRONG] = "strong",
+        [GPIO_DRIVE_STRONGEST] = "strongest",
+    };
+
+    gpio_ll_print_conf_common(conf);
+    print_str(", drive: ");
+    print_str(drive_strs[conf->drive_strength]);
+}

cpu/nrf5x_common/include/periph_cpu_common.h

@@ -138,12 +138,69 @@ typedef enum {
 #define HAVE_GPIO_PULL_T
 typedef enum {
     GPIO_FLOATING = 0,
-    GPIO_PULL_UP = GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos,
-    GPIO_PULL_DOWN = GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos,
-    /* GPIO_PULL_KEEP is not supported by, gpio_ll_init() returns -ENOTSUP */
-    GPIO_PULL_KEEP = 0xff
+    GPIO_PULL_UP = GPIO_PIN_CNF_PULL_Pullup,
+    GPIO_PULL_DOWN = GPIO_PIN_CNF_PULL_Pulldown,
+    GPIO_PULL_KEEP = 2,
 } gpio_pull_t;
-#endif /* END: GPIO LL overwrites */
+
+#define HAVE_GPIO_STATE_T
+typedef enum {
+    GPIO_OUTPUT_PUSH_PULL,
+    GPIO_OUTPUT_OPEN_DRAIN,
+    GPIO_OUTPUT_OPEN_SOURCE,
+    GPIO_INPUT,
+    GPIO_USED_BY_PERIPHERAL,
+    GPIO_DISCONNECT,
+} gpio_state_t;
+
+#define HAVE_GPIO_CONF_T
+typedef union gpio_conf_nrf5x gpio_conf_t;
+
+#endif
+
+/**
+ * @brief       GPIO pin configuration for nRF5x MCUs
+ * @ingroup     drivers_periph_gpio_ll
+ */
+union gpio_conf_nrf5x {
+    uint8_t bits;  /**< the raw bits */
+    struct {
+        /**
+         * @brief   State of the pin
+         */
+        gpio_state_t state                      : 3;
+        /**
+         * @brief   Pull resistor configuration
+         */
+        gpio_pull_t pull                        : 2;
+        /**
+         * @brief   Drive strength of the GPIO
+         *
+         * @warning If the requested drive strength is not available, the
+         *          closest fit supported will be configured instead.
+         *
+         * This value is ignored when @ref gpio_conf_nrf5x::state is configured
+         * to @ref GPIO_INPUT or @ref GPIO_DISCONNECT.
+         */
+        gpio_drive_strength_t drive_strength    : 1;
+        /**
+         * @brief   Initial value of the output
+         *
+         * Ignored if @ref gpio_conf_nrf5x::state is set to @ref GPIO_INPUT or
+         * @ref GPIO_DISCONNECT. If the pin was previously in a high impedance
+         * state, it is guaranteed to directly transition to the given initial
+         * value.
+         *
+         * @ref gpio_ll_query_conf will write the current value of the specified
+         * pin here, which is read from the input register when the state is
+         * @ref GPIO_INPUT, otherwise the state from the output register is
+         * consulted.
+         */
+        bool initial_value                      : 1;
+        uint8_t                                 : 1; /*< padding */
+    };
+};
+/* END: GPIO LL overwrites */
 
 #if !defined(DOXYGEN) && (defined(CPU_NRF53) || defined(CPU_NRF9160))
 /**

cpu/nrf5x_common/periph/gpio_ll.c

@@ -36,13 +36,22 @@
 #include "periph_cpu.h"
 #include "periph_conf.h"
 
+#ifdef MODULE_FMT
+#include "fmt.h"
+#else
+static inline void print_str(const char *str)
+{
+    fputs(str, stdout);
+}
+#endif
+
 int gpio_ll_init(gpio_port_t port, uint8_t pin, const gpio_conf_t *conf)
 {
     if (conf->pull == GPIO_PULL_KEEP) {
         return -ENOTSUP;
     }
 
-    uint32_t pin_cnf = conf->pull;
+    uint32_t pin_cnf = (unsigned)conf->pull << GPIO_PIN_CNF_PULL_Pos;
     switch (conf->state) {
     case GPIO_OUTPUT_PUSH_PULL:
         /* INPUT bit needs to be *CLEARED* in input mode, so set to disconnect input buffer */
@@ -115,7 +124,6 @@ void gpio_ll_query_conf(gpio_conf_t *dest, gpio_port_t port, uint8_t pin)
      * no matches. Assuming Schmitt trigger cannot be disabled for the
      * nRF5x MCU.
      */
-    dest->schmitt_trigger = true;
     dest->state = GPIO_INPUT;
 
     NRF_GPIO_Type *p = (NRF_GPIO_Type *)port;
@@ -197,3 +205,15 @@ void gpio_ll_query_conf(gpio_conf_t *dest, gpio_port_t port, uint8_t pin)
         dest->initial_value = (gpio_ll_read_output(port) >> pin) & 1UL;
     }
 }
+
+void gpio_ll_print_conf(const gpio_conf_t *conf)
+{
+    static const char *drive_strs[] = {
+        [GPIO_DRIVE_WEAK] = "weak",
+        [GPIO_DRIVE_STRONG] = "strong",
+    };
+
+    gpio_ll_print_conf_common(conf);
+    print_str(", drive: ");
+    print_str(drive_strs[conf->drive_strength]);
+}

cpu/stm32/include/periph/cpu_gpio_ll.h

@@ -19,6 +19,7 @@
 #ifndef PERIPH_CPU_GPIO_LL_H
 #define PERIPH_CPU_GPIO_LL_H
 
+#include <stdalign.h>
 #include <stdint.h>
 #include "periph_cpu.h"
 
@@ -88,8 +89,84 @@ typedef enum {
     GPIO_TRIGGER_LEVEL_LOW      = GPIO_TRIGGER_LEVEL | GPIO_TRIGGER_EDGE_FALLING,
 } gpio_irq_trig_t;
 
+#define HAVE_GPIO_STATE_T
+typedef enum {
+    GPIO_OUTPUT_PUSH_PULL,
+    GPIO_OUTPUT_OPEN_DRAIN,
+    GPIO_OUTPUT_OPEN_SOURCE,
+    GPIO_INPUT,
+    GPIO_USED_BY_PERIPHERAL,
+    GPIO_DISCONNECT,
+} gpio_state_t;
+
+#define HAVE_GPIO_PULL_T
+typedef enum {
+    GPIO_FLOATING,
+    GPIO_PULL_UP,
+    GPIO_PULL_DOWN,
+    GPIO_PULL_KEEP,
+} gpio_pull_t;
+
+#define HAVE_GPIO_CONF_T
+typedef union gpio_conf_stm32 gpio_conf_t;
+
 #endif /* ndef Doxygen */
 
+/**
+ * @brief       GPIO pin configuration for STM32 MCUs.
+ * @ingroup     drivers_periph_gpio_ll
+ */
+union gpio_conf_stm32 {
+    uint16_t bits;  /**< the raw bits */
+    struct {
+        /**
+         * @brief   State of the pin
+         */
+        gpio_state_t state              : 3;
+        /**
+         * @brief   Pull resistor configuration
+         */
+        gpio_pull_t pull                : 2;
+        /**
+         * @brief   Configure the slew rate of outputs
+         *
+         * @warning If the requested slew rate is not available, the closest fit
+         *          supported will be configured instead.
+         *
+         * This value is ignored *unless* @ref gpio_conf_stm32::state is
+         * configured to @ref GPIO_OUTPUT_PUSH_PULL or @ref GPIO_OUTPUT_OPEN_DRAIN.
+         */
+        gpio_slew_t slew_rate           : 2;
+        /**
+         * @brief   Whether to disable the input Schmitt trigger
+         *
+         * @details This could be called `schmitt_trigger` with inverse
+         *          meaning, but the API contract says that additional
+         *          members in the structure should have a sane
+         *          default when zero.
+         *
+         * This value is ignored *unless* @ref gpio_conf_stm32::state is
+         * configured to @ref GPIO_INPUT.
+         */
+        bool schmitt_trigger_disabled   : 1;
+        /**
+         * @brief   Initial value of the output
+         *
+         * Ignored if @ref gpio_conf_stm32::state is set to @ref GPIO_INPUT or
+         * @ref GPIO_DISCONNECT. If the pin was previously in a high impedance
+         * state, it is guaranteed to directly transition to the given initial
+         * value.
+         *
+         * @ref gpio_ll_query_conf will write the current value of the specified
+         * pin here, which is read from the input register when the state is
+         * @ref GPIO_INPUT, otherwise the state from the output register is
+         * consulted.
+         */
+        bool initial_value          : 1;
+        uint8_t                     : 7;    /*< padding */
+    };
+};
+
 #ifdef __cplusplus
 }
 #endif