cpu/stm32{f3,l4,wb,wl}: increase sampling time for VBat line

Author: crasbe

cpu/stm32/periph/adc_f3.c

@@ -26,8 +26,18 @@
 #include "periph_conf.h"
 #include "periph/vbat.h"
 
-#define SMP_MIN         (0x2) /*< Sampling time for slow channels
-                                  (0x2 = 4.5 ADC clock cycles) */
+#define ADC_SMP_MIN_VAL     (0x2) /*< Sampling time for slow channels
+                                      (0x2 = 4.5 ADC clock cycles) */
+#define ADC_SMP_VBAT_VAL    (0x5) /*< Sampling time when the VBat channel
+                                      is read (0x5 = 61.5 ADC clock cycles) */
+
+/* The sampling time width is 3 bit */
+#define ADC_SMP_BIT_WIDTH    (3)
+
+/* The sampling time can be specified for each channel over SMPR1 and SMPR2.
+   This specifies the first channel that goes to SMPR2 instead of SMPR1. */
+#define ADC_SMPR2_FIRST_CHAN (10)
+
 #ifdef ADC1_COMMON
 #define ADC_INSTANCE    ADC1_COMMON
 #else
@@ -169,12 +179,21 @@ int adc_init(adc_t line)
         dev(line)->SQR1 |= (0 & ADC_SQR1_L);
     }
 
+    /* determine the right sampling time */
+    uint32_t smp_time = ADC_SMP_MIN_VAL;
+    if (IS_USED(MODULE_PERIPH_VBAT) && line == VBAT_ADC) {
+        smp_time = ADC_SMP_VBAT_VAL;
+    }
+
     /* Configure sampling time for the given channel */
     if (adc_config[line].chan < 10) {
-        dev(line)->SMPR1 =  (SMP_MIN << (adc_config[line].chan * 3));
+        dev(line)->SMPR1 = (smp_time << (adc_config[line].chan
+                                        * ADC_SMP_BIT_WIDTH));
     }
     else {
-        dev(line)->SMPR2 =  (SMP_MIN << ((adc_config[line].chan - 10) * 3));
+        dev(line)->SMPR2 = (smp_time << ((adc_config[line].chan
+                                        - ADC_SMPR2_FIRST_CHAN)
+                                        * ADC_SMP_BIT_WIDTH));
     }
 
     /* Power off and unlock device again */

cpu/stm32/periph/adc_l4_wb.c

@@ -54,8 +54,11 @@
    works on all channels.
    TCONV = Sampling time + 12.5 ADC clock cycles (RM section 18.4.12)
    At 80MHz this means we need to set SMP to 001 (6.5 ADC clock cycles) to
-   stay within specs. (80000000/(6.5+12.5)) = 4210526 */
-#define ADC_SMP_MIN_VAL      (0x1)
+   stay within specs. (80000000/(6.5+12.5)) = 4210526. */
+#define ADC_SMP_MIN_VAL    (0x2)
+/* Reading the battery voltage V_BAT is much slower and requires 92.5
+   ADC clock cycles. */
+#define ADC_SMP_VBAT_VAL    (0x5)
 
 /* The sampling time width is 3 bit */
 #define ADC_SMP_BIT_WIDTH    (3)
@@ -191,15 +194,21 @@ int adc_init(adc_t line)
         dev(line)->SQR1 &= ~ADC_SQR1_L_Msk;
     }
 
+    /* determine the right sampling time */
+    uint32_t smp_time = ADC_SMP_MIN_VAL;
+    if (IS_USED(MODULE_PERIPH_VBAT) && line == VBAT_ADC) {
+        smp_time = ADC_SMP_VBAT_VAL;
+    }
+
     /* configure sampling time for the given channel */
     if (adc_config[line].chan < ADC_SMPR2_FIRST_CHAN) {
-        dev(line)->SMPR1 =  (ADC_SMP_MIN_VAL << (adc_config[line].chan *
-                                                 ADC_SMP_BIT_WIDTH));
+        dev(line)->SMPR1 =  (smp_time << (adc_config[line].chan
+                                         * ADC_SMP_BIT_WIDTH));
     }
     else {
-        dev(line)->SMPR2 =  (ADC_SMP_MIN_VAL << ((adc_config[line].chan -
-                                                  ADC_SMPR2_FIRST_CHAN)
-                                                 * ADC_SMP_BIT_WIDTH));
+        dev(line)->SMPR2 =  (smp_time << ((adc_config[line].chan
+                                         - ADC_SMPR2_FIRST_CHAN)
+                                         * ADC_SMP_BIT_WIDTH));
     }
 
     /* free the device again */

cpu/stm32/periph/adc_wl.c

@@ -148,8 +148,14 @@ int adc_init(adc_t line)
         /* set sequence length to 1 conversion */
         ADC->CFGR1 &= ~ADC_CFGR1_CONT;
 
-        /* Sampling time of 39.5 ADC clocks for all channels*/
-        ADC->SMPR = ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_0;
+        /* Set Sampling Time Register 1 to 3.5 ADC Cycles for all GPIO-Channels
+         * and Sampling Time Register 2 to 39.5 ADC Cycles for VBat. Set the
+         * VBat channel to use Sampling Time Register 2. */
+        ADC->SMPR = ADC_SMPR_SMP1_0;
+        if (IS_USED(MODULE_PERIPH_VBAT)) {
+            ADC->SMPR |= ADC_SMPR_SMP2_2 | ADC_SMPR_SMP2_0 |
+                         (1 << (adc_config[VBAT_ADC].chan+ ADC_SMPR_SMPSEL_Pos));
+        }
     }
 
     /* free the device again */