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cpu/esp32/bootloader: migration to ESP-IDF v5.4
1 parent e7934e5 commit 75fb142

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7 files changed

+208
-89
lines changed

7 files changed

+208
-89
lines changed

‎cpu/esp32/bootloader/Makefile‎

Lines changed: 163 additions & 72 deletions
Large diffs are not rendered by default.

‎cpu/esp32/bootloader/sdkconfig.h‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
/*
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* Copyright (C) 2021 iosabi
3+
* Copyright (C) 2024 Gunar Schorcht
34
*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
@@ -24,6 +25,7 @@
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* bootloader.
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*
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* @author iosabi <[email protected]>
28+
* @author Gunar Schorcht <[email protected]>
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*/
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2931
#ifndef DOXYGEN
@@ -48,8 +50,10 @@
4850
extern "C" {
4951
#endif
5052

53+
#define CONFIG_BOOTLOADER_PROJECT_VER 1
54+
5155
#if MODULE_ESP_LOG_COLORED
52-
#define CONFIG_LOG_COLORS 1
56+
# define CONFIG_BOOTLOADER_LOG_COLORS 1
5357
#endif
5458

5559
#ifndef CONFIG_BOOTLOADER_LOG_LEVEL
@@ -104,6 +108,10 @@ extern "C" {
104108
#define CONFIG_ESP_CONSOLE_UART_NUM 0
105109
#endif
106110

111+
#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM CONFIG_ESP_CONSOLE_UART_NUM
112+
113+
#define CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST 1
114+
107115
#ifdef __cplusplus
108116
}
109117
#endif

‎cpu/esp32/bootloader/sdkconfig_default_common.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@ extern "C" {
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#endif
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2727
#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
28-
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
2928
#define CONFIG_BOOTLOADER_WDT_ENABLE 1
3029
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
3130
#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0

‎cpu/esp32/bootloader/sdkconfig_default_esp32.h‎

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2022 Gunar Schorcht
2+
* Copyright (C) 2024 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
55
* General Public License v2.1. See the file LICENSE in the top level
@@ -24,17 +24,26 @@
2424
extern "C" {
2525
#endif
2626

27-
#ifndef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
28-
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160
27+
#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
28+
# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
2929
#endif
3030

31-
#define CONFIG_ESP32_DEBUG_OCDAWARE 1
32-
#define CONFIG_ESP32_XTAL_FREQ 0
31+
#define CONFIG_XTAL_FREQ 40
32+
33+
#define CONFIG_ESP_DEBUG_OCDAWARE 1
3334

3435
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000
36+
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
3537
#define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1
3638
#define CONFIG_EFUSE_MAX_BLK_LEN 192
3739
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000
40+
#define CONFIG_MMU_PAGE_SIZE 0x10000
41+
42+
#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
43+
44+
#define CONFIG_ESP_INT_WDT 1
45+
#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
46+
#define CONFIG_ESP_INT_WDT_CHECK_CPU 1
3847

3948
#ifdef __cplusplus
4049
}

‎cpu/esp32/bootloader/sdkconfig_default_esp32c3.h‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -24,16 +24,20 @@
2424
extern "C" {
2525
#endif
2626

27-
#ifndef CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
28-
#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 160
27+
#define CONFIG_ESP32C3_REV_MIN 3
28+
29+
#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
30+
# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
2931
#endif
3032

31-
#define CONFIG_ESP32C3_DEBUG_OCDAWARE 1
32-
#define CONFIG_ESP32C3_REV_MIN 3
33+
#define CONFIG_XTAL_FREQ 40
34+
35+
#define CONFIG_ESP_DEBUG_OCDAWARE 1
3336

3437
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
3538
#define CONFIG_EFUSE_MAX_BLK_LEN 256
3639
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0005
40+
#define CONFIG_MMU_PAGE_SIZE 0x10000
3741

3842
#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
3943

‎cpu/esp32/bootloader/sdkconfig_default_esp32s2.h‎

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,15 +24,19 @@
2424
extern "C" {
2525
#endif
2626

27-
#ifndef CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
28-
#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 160
27+
#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
28+
# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
2929
#endif
3030

31-
#define CONFIG_ESP32S2_DEBUG_OCDAWARE 1
31+
#define CONFIG_XTAL_FREQ 40
32+
33+
#define CONFIG_ESP_DEBUG_OCDAWARE 1
3234

3335
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000
36+
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
3437
#define CONFIG_EFUSE_MAX_BLK_LEN 256
3538
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0002
39+
#define CONFIG_MMU_PAGE_SIZE 0x10000
3640

3741
#ifdef __cplusplus
3842
}

‎cpu/esp32/bootloader/sdkconfig_default_esp32s3.h‎

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,15 +24,19 @@
2424
extern "C" {
2525
#endif
2626

27-
#ifndef CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
28-
#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 160
27+
#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
28+
# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
2929
#endif
3030

31-
#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1
31+
#define CONFIG_XTAL_FREQ 40
32+
33+
#define CONFIG_ESP_DEBUG_OCDAWARE 1
3234

3335
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
36+
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
3437
#define CONFIG_EFUSE_MAX_BLK_LEN 256
3538
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009
39+
#define CONFIG_MMU_PAGE_SIZE 0x10000
3640

3741
#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
3842

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