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bors[bot]Fabian Hüßlerfabian18JKRhbEnoch247
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19387: drivers/atwinc15x0: support dynamic scanning and connection to AP r=benpicco a=fabian18 19874: coap: add missing option numbers r=benpicco a=JKRhb 19875: coap: add missing Content-Format definitions r=benpicco a=JKRhb 19876: sys/net/ipv4/addr: fix typos r=benpicco a=Enoch247 ### Contribution description This patch fixes some typos in the doxygen doc. ### Testing procedure Nothing to test. No change to code. ### Issues/PRs references - None known 19878: makefiles/usb_board_reset.mk: declare term-delay target with test target r=benpicco a=aabadie 19886: cpu/efm32: fix DAC configuration r=benpicco a=gschorcht ### Contribution description The EFM32 MCU allows the reference voltage to be configured per DAC device, not per DAC channel. Also, the DAC reference voltage was defined in the configuration but not used anywhere. At the moment we have only defined one board (`stwstk6220a`) that uses the DAC, so changing the configuration interface shouldn't be critical. ### Testing procedure `tests/periph/dac` should still work for the `stwstk6220a` ``` BOARD=slwstk6220a make -j8 -C tests/periph/dac flash ``` I don't have a `stwstk6220a` board (EFM32 Series 0) so that I can't test it. I could only test it for the `sltb009a` board (EFM32 Series 1) with the change for VDAC in PR #19887. ### Issues/PRs references 19888: boards/sltb009a: complete and fix documentation r=benpicco a=gschorcht ### Contribution description This PR completes and fixes the documentation which was still in the state as generated automatically by `efm2riot`. The PR also includes a fix of the configuration of the second UART device that was find out while completing the documentation. ### Testing procedure Green CI ### Issues/PRs references Co-authored-by: Fabian Hüßler <[email protected]@MLPA-NB119.(none)> Co-authored-by: Fabian Hüßler <[email protected]> Co-authored-by: Jan Romann <[email protected]> Co-authored-by: Joshua DeWeese <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: Gunar Schorcht <[email protected]>
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‎boards/sltb009a/doc.txt‎

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@@ -4,6 +4,7 @@
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* @brief Support for Silicon Labs SLTB009A starter kit
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## Overview
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Silicon Labs Thunderboard GG12 is equipped with the EFM32 microcontroller.
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It is specifically designed for low-power applications, having energy-saving
910
peripherals, different energy modes and short wake-up times.
@@ -14,6 +15,7 @@ actively measure the power consumption of your hardware and code, in real-time.
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## Hardware
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### MCU
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| MCU | EFM32GG12B810F1024GM64 |
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|-----------------|------------------------------------------------------|
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| Family | ARM Cortex-M4F |
@@ -26,80 +28,98 @@ actively measure the power consumption of your hardware and code, in real-time.
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| FPU | yes |
2729
| MPU | yes |
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| DMA | 12 channels |
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| Timers | 4x 32-bit, 7x 16-bit + 1x 16-bit (low power) |
31+
| Timers | 4 x 32-bit, 7 x 16-bit + 1 x 16-bit (low power) |
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| ADCs | 12-bit ADC |
31-
| UARTs | 2x UART, 5x USART, 1x LEUART |
32-
| SPIs | 5x USART |
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| I2Cs | 2x |
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| DACs | 2 x 12-bit VDAC (500 ksamples/s), 1 x IDAC |
34+
| I2Cs | 2 x |
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| SPIs | 5 x USART |
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| UARTs | 2 x UART, 5 x USART, 1 x LEUART |
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| USB | 1 x Low Energy Full-Speed USB 2.0 |
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| Vcc | 1.8 V - 3.8 V |
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| Datasheet | [Datasheet](https://www.silabs.com/documents/public/data-sheets/efm32gg12-datasheet.pdf) |
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| Manual | [Manual](https://www.silabs.com/documents/public/reference-manuals/efm32gg12-rm.pdf) |
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| Board Manual | [Board Manual](https://www.silabs.com/documents/public/user-guides/ug371-sltb009a-user-guide.pdf) |
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| Board Schematic | Can be downloaded using Silicon Labs' Simplicity Studio |
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| Datasheet | [Datasheet](https://www.silabs.com/documents/public/data-sheets/efm32gg12-datasheet.pdf) |
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| Manual | [Manual](https://www.silabs.com/documents/public/reference-manuals/efm32gg12-rm.pdf) |
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| Board Manual | [Board Manual](https://www.silabs.com/documents/public/user-guides/ug371-sltb009a-user-guide.pdf) |
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| Board Schematic | Can be downloaded using Silicon Labs' Simplicity Studio |
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### Pinout
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This is the pinout of the expansion header on the right side of the board.
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PIN 1 is the bottom-left contact when the header faces you horizontally.
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| | PIN | PIN | |
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|------|-----|-----|------|
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| GND | 1 | 2 | VMCU |
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| PD0 | 3 | 4 | PA0 |
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| PD1 | 5 | 6 | PA1 |
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| PA4 | 7 | 8 | PA2 |
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| PA5 | 9 | 10 | PA3 |
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| PA6 | 11 | 12 | PC4 |
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| PE15 | 13 | 14 | PC5 |
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| PE5 | 15 | 16 | PE4 |
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| | 17 | 18 | 5V |
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| | 19 | 20 | 3V3 |
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| PB12 | 21 | 22 | PE8 |
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| PB11 | 23 | 24 | PE9 |
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| PB3 | 25 | 26 | PE10 |
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| PB4 | 27 | 28 | PE11 |
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| PD2 | 29 | 30 | PE13 |
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| PD3 | 31 | 32 | PE14 |
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| PD4 | 33 | 34 | PF5 |
63-
64-
**Note**: not all starter kits by Silicon Labs share the same pinout!
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This is the pinout of the expansion header of the board.
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PIN 1 is the top-left contact.
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| RIOT Peripheral | Name | PIN | PIN | Name | RIOT Peripheral |
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|-----------------|------|-----|-----|------|-----------------|
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| | GND | 1 | 2 | VMCU | |
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| | PD0 | 3 | 4 | PA0 | SPI_DEV(0):MOSI |
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| | PD1 | 5 | 6 | PA1 | SPI_DEV(0):MISO |
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| | PA4 | 7 | 8 | PA2 | SPI_DEV(0):CLK |
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| | PA5 | 9 | 10 | PA3 | |
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| | PA6 | 11 | 12 | PC4 | UART_DEV(1):TX |
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| | PE15 | 13 | 14 | PC5 | UART_DEV(1):RX |
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| I2C_DEV(0):SCL | PE5 | 15 | 16 | PE4 | I2C_DEV(0):SCL |
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| | | 17 | 18 | 5V | |
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| | | 19 | 20 | 3V3 | |
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| | PB12 | 21 | 22 | PE8 | |
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| DAC_LINE(0) | PB11 | 23 | 24 | PE9 | |
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| | PB3 | 25 | 26 | PE10 | |
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| | PB4 | 27 | 28 | PE11 | |
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| | PD2 | 29 | 30 | PE13 | |
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| | PD3 | 31 | 32 | PE14 | |
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| | PD4 | 33 | 34 | PF5 | |
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### Peripheral mapping
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| Peripheral | Number | Hardware | Pins | Comments |
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|------------|---------|-------------------|-----------------------------------|-----------------------------------------------------------|
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| Peripheral | Number | Hardware | Pins | Comments |
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|-------------|---------|------------|------------------|-------------------------------------|
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| ADC | 0 | ADC0:CH0 | | Internal temperature |
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| ADC | 1 | ADC0:CH1 | | AVDD |
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| I2C | 0 | I2C0 | SDA:PE4, SCL:PE5 | Normal speed |
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| HWCRYPTO | - | - | | AES128/AES256, SHA1, SHA224/SHA256 |
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| HWRNG | - | TNRG0 | | True Random Number Generator (TRNG) |
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| RTT | - | RTCC | | 1 Hz interval, either RTT or RTC |
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| RTC | - | RTCC | | 1 Hz interval, either RTT or RTC |
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| SPI | 0 | USART3 | MOSI:PA0, MISO:PA1, CLK:PA2 | |
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| Timer | 0 | TIMER0 + TIMER1 | | TIMER0 is used as prescaler |
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| Timer | 1 | LETIMER0 | | |
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| UART | 0 | USART0 | RX:PE6, TX:PE7 | Default STDIO |
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| UART | 1 | UART0 | RX:PC5, TX:PC4 | |
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### User interface
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| Peripheral | Mapped to | Pin | Comments |
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|------------|-----------|------|------------|
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| Button | PB0_PIN | PD5 | |
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| | PB1_PIN | PD8 | |
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| LED | LED0R_PIN | PA12 | |
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| | LED0G_PIN | PA13 | |
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| | LED0B_PIN | PA14 | |
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| | LED1R_PIN | PD6 | |
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| | LED1G_PIN | PF12 | |
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| | LED1B_PIN | PE12 | |
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| Peripheral | Mapped to | Pin | Comments |
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|------------|-----------|-----------|------------|
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| Button | PB0_PIN | PD5 | |
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| | PB1_PIN | PD8 | |
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| LED | LED0R_PIN | PA12 | |
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| | LED0G_PIN | PA13 | |
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| | LED0B_PIN | PA14 | |
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| | LED1R_PIN | PD6 | |
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| | LED1G_PIN | PF12 | |
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| | LED1B_PIN | PE12 | |
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| | LED0_PIN | LED0R_PIN | |
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| | LED1_PIN | LED1R_PIN | |
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## Implementation Status
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| Device | ID | Supported | Comments |
86-
|-------------------------------|-------------------------------------|-----------|----------------------------------------------------------------|
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| MCU | EFM32GG12B | yes | Power modes supported |
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| Low-level driver | ADC | yes | |
89-
| | Flash | yes | |
90-
| | GPIO | yes | Interrupts are shared across pins (see reference manual) |
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| | HW Crypto | yes | |
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| | I2C | yes | |
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| | PWM | yes | |
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| | RTCC | yes | As RTT or RTC |
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| | SPI | partially | Only master mode |
96-
| | Timer | yes | |
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| | UART | yes | USART is shared with SPI. LEUART baud rate limited (see below) |
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| | USB | no | |
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| Device | ID | Supported | Comments |
104+
|------------------|------------|-----------|----------------------------------------------------|
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| MCU | EFM32GG12B | yes | Power modes supported |
106+
| Low-level driver | ADC | yes | |
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| | DAC | yes | VDAC, IDAC is not supported |
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| | Flash | yes | |
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| | GPIO | yes | Interrupts are shared across pins (see ref manual) |
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| | HW Crypto | yes | |
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| | I2C | yes | |
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| | PWM | yes | |
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| | RTCC | yes | As RTT or RTC |
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| | SPI | yes | Only master mode |
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| | Timer | yes | |
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| | UART | yes | USART is shared with SPI. LEUART baud rate limited |
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| | USB | yes | Device mode |
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## Board configuration
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102121
### Board controller
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103123
The starter kit is equipped with a Board Controller. This controller provides
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a virtual serial port.
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expects data from the MCU with the same settings.
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### Clock selection
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There are several clock sources that are available for the different
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peripherals. You are advised to read [AN0004.0](https://www.silabs.com/documents/public/application-notes/an0004.0-efm32-cmu.pdf)
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peripherals. You are advised to read [AN0004.0]
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(https://www.silabs.com/documents/public/application-notes/an0004.0-efm32-cmu.pdf)
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to get familiar with the different clocks.
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| Source | Internal | Speed | Comments |
@@ -145,6 +167,7 @@ You can override the branch's clock source by adding `CLOCK_LFA=source` to your
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compiler defines, e.g. `CLOCK_LFA=cmuSelect_LFRCO`.
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### Low-power peripherals
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148171
The low-power UART is capable of providing an UART peripheral using a low-speed
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clock. When the LFB clock source is the LFRCO or LFXO, it can still be used in
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EM2. However, this limits the baud rate to 9600 baud. If a higher baud rate is
@@ -154,6 +177,7 @@ desired, set the clock source to CORELEDIV2.
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this setting. Ensure you do not refer to any low-power peripherals.
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156179
### RTC or RTT
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157181
RIOT-OS has support for *Real-Time Tickers* and *Real-Time Clocks*.
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159183
However, this board MCU family has support for a 32-bit *Real-Time Clock and
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Configured at 1 Hz interval, the RTCC will overflow each 136 years.
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165189
### Hardware crypto
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166191
This MCU is equipped with a hardware-accelerated crypto peripheral that can
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speed up AES128, AES256, SHA1, SHA256 and several other cryptographic
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computations.
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170195
A peripheral driver interface is proposed, but not yet implemented.
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172197
### Usage of EMLIB
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173199
This port makes uses of EMLIB by Silicon Labs to abstract peripheral registers.
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While some overhead is to be expected, it ensures proper setup of devices,
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provides chip errata and simplifies development. The exact overhead depends on
@@ -182,6 +208,7 @@ that peripherals are used properly. To enable this, pass `DEBUG_EFM` to your
182208
compiler.
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### Pin locations
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185212
The EFM32 platform supports peripherals to be mapped to different pins
186213
(predefined locations). The definitions in `periph_conf.h` mostly consist of a
187214
location number and the actual pins. The actual pins are required to configure
@@ -195,38 +222,39 @@ This MCU has extended pin mapping support. Each pin of a peripheral can be
195222
connected separately to one of the predefined pins for that peripheral.
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197224
## Flashing the device
198-
To flash, [SEGGER JLink](https://www.segger.com/jlink-software.html) is
199-
required.
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201-
Flashing is supported by RIOT-OS using the command below:
226+
The board provides a on-board J-Link debugger through the micro USB board so
227+
that flashing and debugging is very easy.
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229+
Flashing is supported by RIOT-OS using the command below:
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```
204231
make flash
205232
```
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207234
To run the GDB debugger, use the command:
208-
209235
```
210236
make debug
211237
```
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213239
Or, to connect with your own debugger:
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215240
```
216241
make debug-server
217242
```
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219244
Some boards have (limited) support for emulation, which can be started with:
220-
221245
```
222246
make emulate
223247
```
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## Supported Toolchains
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226251
For using the Silicon Labs SLTB009A starter kit we strongly recommend
227-
the usage of the [GNU Tools for ARM Embedded Processors](https://developer.arm.com/open-source/gnu-toolchain/gnu-rm)
252+
the usage of the [GNU Tools for ARM Embedded Processors]
253+
(https://developer.arm.com/open-source/gnu-toolchain/gnu-rm)
228254
toolchain.
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230256
## License information
231-
* Silicon Labs' EMLIB: zlib-style license (permits distribution of source).
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258+
Silicon Labs' EMLIB: zlib-style license (permits distribution of source).
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232260
*/

‎boards/sltb009a/include/periph_conf.h‎

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@@ -184,19 +184,19 @@ static const uart_conf_t uart_config[] = {
184184
.irq = USART0_RX_IRQn
185185
},
186186
{
187-
.dev = LEUART0,
188-
.rx_pin = GPIO_PIN(PD, 11),
189-
.tx_pin = GPIO_PIN(PD, 10),
190-
.loc = LEUART_ROUTELOC0_RXLOC_LOC0 |
191-
LEUART_ROUTELOC0_TXLOC_LOC0,
192-
.cmu = cmuClock_LEUART0,
193-
.irq = LEUART0_IRQn
187+
.dev = UART0,
188+
.rx_pin = GPIO_PIN(PC, 5),
189+
.tx_pin = GPIO_PIN(PC, 4),
190+
.loc = UART_ROUTELOC0_RXLOC_LOC4 |
191+
UART_ROUTELOC0_TXLOC_LOC4,
192+
.cmu = cmuClock_UART0,
193+
.irq = UART0_RX_IRQn
194194
}
195195
};
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197197
#define UART_NUMOF ARRAY_SIZE(uart_config)
198198
#define UART_0_ISR_RX isr_usart0_rx
199-
#define UART_1_ISR_RX isr_leuart0
199+
#define UART_1_ISR_RX isr_uart0_rx
200200
/** @} */
201201

202202
#ifdef __cplusplus

‎boards/slwstk6220a/include/periph_conf.h‎

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@@ -84,14 +84,14 @@ static const dac_conf_t dac_config[] = {
8484
{
8585
.dev = DAC0,
8686
.cmu = cmuClock_DAC0,
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.ref = dacRefVDD,
8788
}
8889
};
8990

9091
static const dac_chan_conf_t dac_channel_config[] = {
9192
{
9293
.dev = 0,
9394
.index = 1,
94-
.ref = dacRefVDD,
9595
}
9696
};
9797

‎cpu/efm32/include/periph_cpu.h‎

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Original file line numberDiff line numberDiff line change
@@ -79,6 +79,7 @@ typedef struct {
7979
*/
8080
typedef struct {
8181
DAC_TypeDef *dev; /**< DAC device used */
82+
DAC_Ref_TypeDef ref; /**< DAC voltage reference */
8283
CMU_Clock_TypeDef cmu; /**< the device CMU channel */
8384
} dac_conf_t;
8485

@@ -88,7 +89,6 @@ typedef struct {
8889
typedef struct {
8990
uint8_t dev; /**< device index */
9091
uint8_t index; /**< channel index */
91-
DAC_Ref_TypeDef ref; /**< channel voltage reference */
9292
} dac_chan_conf_t;
9393
#endif
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‎cpu/efm32/periph/dac.c‎

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@@ -45,6 +45,7 @@ int8_t dac_init(dac_t line)
4545
/* reset and initialize peripheral */
4646
DAC_Init_TypeDef init = DAC_INIT_DEFAULT;
4747

48+
init.reference = dac_config[dev].ref;
4849
DAC_Reset(dac_config[dev].dev);
4950
DAC_Init(dac_config[dev].dev, &init);
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‎drivers/atwinc15x0/Makefile.dep‎

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@@ -1,6 +1,18 @@
11
USEMODULE += netdev_eth
22
USEMODULE += ztimer_msec
33
USEMODULE += netdev_legacy_api
4+
5+
ifeq (,$(filter atwinc15x0_dynamic_%,$(USEMODULE)))
6+
# use static connect by default when no dynamic module is loaded
7+
USEMODULE += atwinc15x0_static_connect
8+
endif
9+
ifneq (,$(filter atwinc15x0_dynamic_scan,$(USEMODULE)))
10+
USEMODULE += wifi_scan_list
11+
endif
12+
ifneq (,$(filter atwinc15x0_static_connect,$(USEMODULE)))
13+
USEMODULE += ztimer
14+
endif
15+
416
USEPKG += driver_atwinc15x0
517
FEATURES_REQUIRED += periph_gpio
618
FEATURES_REQUIRED += periph_gpio_irq

‎drivers/atwinc15x0/Makefile.include‎

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USEMODULE_INCLUDES_atwinc15x0 := $(LAST_MAKEFILEDIR)/include
22
USEMODULE_INCLUDES += $(USEMODULE_INCLUDES_atwinc15x0)
3+
4+
# Try to connect to a preknown AP (WIFI_SSID, WIFI_PASS)
5+
PSEUDOMODULES += atwinc15x0_static_connect
6+
# Accept connection requests (NETOPT_CONNECT)
7+
PSEUDOMODULES += atwinc15x0_dynamic_connect
8+
# Accept scan requests (NETOPT_SCAN)
9+
PSEUDOMODULES += atwinc15x0_dynamic_scan

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