1- From f3c3f97504da7d0bf25fa1e59d0350d130ca6eec Mon Sep 17 00:00:00 2001
1+ From e9c07c132c516a6eba1ade311f4fbcb2bdf632cd Mon Sep 17 00:00:00 2001
22From: Benjamin Valentin <
[email protected] >
3- Date: Fri, 3 Jun 2022 00:02:07 +0200
4- Subject: [PATCH] esp_hw_support: rename rtc_init
3+ Date: Tue, 18 Oct 2022 19:12:51 +0200
4+ Subject: [PATCH 1/27 ] esp_hw_support: rename rtc_init
55
66Rename `rtc_init` to `rtc_init_module` due to name conflicts with RIOT `periph/rtc` module.
77---
@@ -36,7 +36,7 @@ index e66a493b..7f1d1915 100644
3636 CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU | RTC_CNTL_TXRF_I2C_PU |
3737 RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU);
3838diff --git a/components/esp_hw_support/port/esp32c3/rtc_init.c b/components/esp_hw_support/port/esp32c3/rtc_init.c
39- index 388399f1..f6fdc692 100644
39+ index d0ee4788..332cd901 100644
4040--- a/components/esp_hw_support/port/esp32c3/rtc_init.c
4141+++ b/components/esp_hw_support/port/esp32c3/rtc_init.c
4242@@ -25,7 +25,7 @@ static void set_ocode_by_efuse(int calib_version);
@@ -62,7 +62,7 @@ index 7b684d3d..ff0b5f49 100644
6262 CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU);
6363 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait);
6464diff --git a/components/esp_hw_support/port/esp32s2/rtc_init.c b/components/esp_hw_support/port/esp32s2/rtc_init.c
65- index 7932a89a..8910f7a2 100644
65+ index 50c6e7e5..43c3ceba 100644
6666--- a/components/esp_hw_support/port/esp32s2/rtc_init.c
6767+++ b/components/esp_hw_support/port/esp32s2/rtc_init.c
6868@@ -24,7 +24,7 @@ __attribute__((unused)) static const char *TAG = "rtc_init";
@@ -75,7 +75,7 @@ index 7932a89a..8910f7a2 100644
7575 CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU);
7676 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait);
7777diff --git a/components/esp_hw_support/port/esp32s3/rtc_init.c b/components/esp_hw_support/port/esp32s3/rtc_init.c
78- index ed44fd7b..f0b7f5c8 100644
78+ index d878d2a9..04c07096 100644
7979--- a/components/esp_hw_support/port/esp32s3/rtc_init.c
8080+++ b/components/esp_hw_support/port/esp32s3/rtc_init.c
8181@@ -31,7 +31,7 @@ static const char *TAG = "rtcinit";
@@ -101,11 +101,11 @@ index 3b3f2b73..c891224a 100644
101101 #if (CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS || CONFIG_ESP32_APP_INIT_CLK)
102102 /* Check the bootloader set the XTAL frequency.
103103diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c
104- index d2181b58..36ab8a40 100644
104+ index 5f867751..868c04db 100644
105105--- a/components/esp_system/port/soc/esp32c3/clk.c
106106+++ b/components/esp_system/port/soc/esp32c3/clk.c
107- @@ -72 ,7 +72 ,7 @@ static const char *TAG = "clk";
108- if (rst_reas == RESET_REASON_CHIP_POWER_ON ) {
107+ @@ -76 ,7 +76 ,7 @@ static const char *TAG = "clk";
108+ ) {
109109 cfg.cali_ocode = 1;
110110 }
111111- rtc_init(cfg);
@@ -127,20 +127,20 @@ index 7ea2dde1..0061e39b 100644
127127 assert(rtc_clk_xtal_freq_get() == RTC_XTAL_FREQ_32M);
128128
129129diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c
130- index 68ad39c1..4fa1aac0 100644
130+ index f1eb0bee..0c70bd0e 100644
131131--- a/components/esp_system/port/soc/esp32s2/clk.c
132132+++ b/components/esp_system/port/soc/esp32s2/clk.c
133- @@ -72 ,7 +72 ,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
134- if (rst_reas == RESET_REASON_CHIP_POWER_ON) {
135- cfg.cali_ocode = 1;
133+ @@ -78 ,7 +78 ,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
134+ esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
135+ }
136136 }
137137- rtc_init(cfg);
138138+ rtc_init_module(cfg);
139139
140140 rtc_clk_fast_freq_set(RTC_FAST_FREQ_8M);
141141
142142diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c
143- index 15610ae9..a5b2ddf3 100644
143+ index ca2f2828..ebe579ec 100644
144144--- a/components/esp_system/port/soc/esp32s3/clk.c
145145+++ b/components/esp_system/port/soc/esp32s3/clk.c
146146@@ -73,7 +73,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
@@ -153,10 +153,10 @@ index 15610ae9..a5b2ddf3 100644
153153 assert(rtc_clk_xtal_freq_get() == RTC_XTAL_FREQ_40M);
154154
155155diff --git a/components/soc/esp32/include/soc/rtc.h b/components/soc/esp32/include/soc/rtc.h
156- index bbbf3c75..3b983466 100644
156+ index b336cb2a..5b3cd8c9 100644
157157--- a/components/soc/esp32/include/soc/rtc.h
158158+++ b/components/soc/esp32/include/soc/rtc.h
159- @@ -685 ,7 +685 ,7 @@ typedef struct rtc_config_s {
159+ @@ -674 ,7 +674 ,7 @@ typedef struct rtc_config_s {
160160 * Initialize RTC clock and power control related functions
161161 * @param cfg configuration options as rtc_config_t
162162 */
@@ -166,10 +166,10 @@ index bbbf3c75..3b983466 100644
166166 #define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO
167167 #define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO
168168diff --git a/components/soc/esp32c3/include/soc/rtc.h b/components/soc/esp32c3/include/soc/rtc.h
169- index dccd7a07..f4b4aa44 100644
169+ index 5222da63..7308b669 100644
170170--- a/components/soc/esp32c3/include/soc/rtc.h
171171+++ b/components/soc/esp32c3/include/soc/rtc.h
172- @@ -831 ,7 +831 ,7 @@ typedef struct {
172+ @@ -820 ,7 +820 ,7 @@ typedef struct {
173173 * Initialize RTC clock and power control related functions
174174 * @param cfg configuration options as rtc_config_t
175175 */
@@ -179,10 +179,10 @@ index dccd7a07..f4b4aa44 100644
179179 /**
180180 * Structure describing vddsdio configuration
181181diff --git a/components/soc/esp32h2/include/soc/rtc.h b/components/soc/esp32h2/include/soc/rtc.h
182- index 5585986e..7a1dd718 100644
182+ index 596e1305..c41d4325 100644
183183--- a/components/soc/esp32h2/include/soc/rtc.h
184184+++ b/components/soc/esp32h2/include/soc/rtc.h
185- @@ -925 ,7 +925 ,7 @@ typedef struct {
185+ @@ -913 ,7 +913 ,7 @@ typedef struct {
186186 * Initialize RTC clock and power control related functions
187187 * @param cfg configuration options as rtc_config_t
188188 */
@@ -192,10 +192,10 @@ index 5585986e..7a1dd718 100644
192192 /**
193193 * Structure describing vddsdio configuration
194194diff --git a/components/soc/esp32s2/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h
195- index 11b13fb6..73caf339 100644
195+ index 12cb8ba1..07d65474 100644
196196--- a/components/soc/esp32s2/include/soc/rtc.h
197197+++ b/components/soc/esp32s2/include/soc/rtc.h
198- @@ -854 ,7 +854 ,7 @@ typedef struct {
198+ @@ -845 ,7 +845 ,7 @@ typedef struct {
199199 * Initialize RTC clock and power control related functions
200200 * @param cfg configuration options as rtc_config_t
201201 */
@@ -205,10 +205,10 @@ index 11b13fb6..73caf339 100644
205205 /**
206206 * Structure describing vddsdio configuration
207207diff --git a/components/soc/esp32s3/include/soc/rtc.h b/components/soc/esp32s3/include/soc/rtc.h
208- index aa09874f..eb8bbed6 100644
208+ index 479e2c20..4b1c7289 100644
209209--- a/components/soc/esp32s3/include/soc/rtc.h
210210+++ b/components/soc/esp32s3/include/soc/rtc.h
211- @@ -849 ,7 +849 ,7 @@ typedef struct {
211+ @@ -842 ,7 +842 ,7 @@ typedef struct {
212212 * Initialize RTC clock and power control related functions
213213 * @param cfg configuration options as rtc_config_t
214214 */
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