2323#include "cpu.h"
2424#include "periph/dac.h"
2525#include "periph/gpio.h"
26+ #include "macros/units.h"
2627
2728#define DAC_VAL (in ) (in >> (16 - DAC_RES_BITS))
2829
@@ -66,15 +67,15 @@ static inline void _sync(void)
6667#ifdef DAC_DACCTRL_CCTRL_Msk
6768static uint32_t _get_CCTRL (uint32_t freq )
6869{
69- if (freq < 1200000 ) {
70+ if (freq <= KHZ ( 1200 ) ) {
7071 return DAC_DACCTRL_CCTRL_CC100K ;
7172 }
7273
73- if (freq < 6000000 ) {
74+ if (freq <= MHZ ( 6 ) ) {
7475 return DAC_DACCTRL_CCTRL_CC1M ;
7576 }
7677
77- if (freq < 12000000 ) {
78+ if (freq <= MHZ ( 12 ) ) {
7879 return DAC_DACCTRL_CCTRL_CC12M ;
7980 }
8081
@@ -109,8 +110,8 @@ int8_t dac_init(dac_t line)
109110
110111 _dac_init_clock (line );
111112
112- /* Settings can only be changed when DAC is disabled */
113- DAC -> CTRLA .reg &= ~ DAC_CTRLA_ENABLE ;
113+ /* Settings can only be changed when DAC is disabled, reset config */
114+ DAC -> CTRLA .reg = DAC_CTRLA_SWRST ;
114115 _sync ();
115116
116117#ifdef DAC_DACCTRL_ENABLE
@@ -125,7 +126,7 @@ int8_t dac_init(dac_t line)
125126#endif
126127 ;
127128
128- DAC -> CTRLA .reg | = DAC_CTRLA_ENABLE ;
129+ DAC -> CTRLA .reg = DAC_CTRLA_ENABLE ;
129130 _sync ();
130131
131132#ifdef DAC_STATUS_READY
@@ -140,14 +141,14 @@ int8_t dac_init(dac_t line)
140141void dac_set (dac_t line , uint16_t value )
141142{
142143#ifdef DAC_SYNCBUSY_DATA1
143- /* DAC has multiple outputs */
144- const uint32_t mask = (1 << (DAC_SYNCBUSY_DATA_Pos + line ));
145- while (DAC -> SYNCBUSY .reg & mask ) {}
144+ const uint32_t mask = (1 << (DAC_INTFLAG_EMPTY_Pos + line ));
145+ while (!(DAC -> INTFLAG .reg & mask )) {}
146146
147+ /* DAC has multiple outputs */
147148 DAC -> DATA [line ].reg = DAC_VAL (value );
148149#else
149150 /* DAC has only one output */
150- (void ) line ;
151+ (void )line ;
151152
152153 _sync ();
153154 DAC -> DATA .reg = DAC_VAL (value );
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