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| 1 | +/* Copyright (c) 2021 PaddlePaddle Authors. All Rights Reserved. |
| 2 | +
|
| 3 | +Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | +you may not use this file except in compliance with the License. |
| 5 | +You may obtain a copy of the License at |
| 6 | +
|
| 7 | + http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | +
|
| 9 | +Unless required by applicable law or agreed to in writing, software |
| 10 | +distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | +See the License for the specific language governing permissions and |
| 13 | +limitations under the License. */ |
| 14 | + |
| 15 | +#pragma once |
| 16 | + |
| 17 | +#include <random> |
| 18 | +#include <vector> |
| 19 | + |
| 20 | +#include "gtest/gtest.h" |
| 21 | +#include "paddle/fluid/framework/op_registry.h" |
| 22 | +#include "paddle/fluid/framework/operator.h" |
| 23 | +#include "paddle/fluid/framework/program_desc.h" |
| 24 | +#include "paddle/fluid/framework/tensor_util.h" |
| 25 | +#include "paddle/fluid/operators/math/math_function.h" |
| 26 | +#include "paddle/fluid/string/printf.h" |
| 27 | + |
| 28 | +namespace framework = paddle::framework; |
| 29 | +namespace platform = paddle::platform; |
| 30 | + |
| 31 | +USE_OP(dropout); |
| 32 | + |
| 33 | +/** |
| 34 | + * @brief call paddle dropout op |
| 35 | + */ |
| 36 | +template <typename T> |
| 37 | +void Dropout(const T *x, const framework::DDim &x_dim, T *out, |
| 38 | + std::vector<uint8_t> *mask, const platform::CUDADeviceContext &ctx, |
| 39 | + uint64_t seed, float dropout_prob, bool is_upscale_in_train, |
| 40 | + bool is_test) { |
| 41 | + framework::Scope scope; |
| 42 | + auto var_x = scope.Var("X"); |
| 43 | + auto tensor_x = var_x->GetMutable<framework::LoDTensor>(); |
| 44 | + tensor_x->Resize(x_dim); |
| 45 | + tensor_x->mutable_data<T>(ctx.GetPlace()); |
| 46 | + cudaMemcpy(tensor_x->data<T>(), x, x_dim[0] * x_dim[1] * sizeof(T), |
| 47 | + cudaMemcpyHostToDevice); |
| 48 | + |
| 49 | + auto var_out = scope.Var("Out"); |
| 50 | + auto tensor_out = var_out->GetMutable<framework::LoDTensor>(); |
| 51 | + |
| 52 | + auto var_mask = scope.Var("Mask"); |
| 53 | + auto tensor_mask = var_mask->GetMutable<framework::LoDTensor>(); |
| 54 | + |
| 55 | + framework::AttributeMap attrs; |
| 56 | + attrs.insert({"fix_seed", 1}); |
| 57 | + attrs.insert({"seed", static_cast<int>(seed)}); |
| 58 | + attrs.insert({"dropout_prob", dropout_prob}); |
| 59 | + if (is_upscale_in_train) { |
| 60 | + attrs.insert({"dropout_implementation", std::string("upscale_in_train")}); |
| 61 | + } |
| 62 | + if (is_test) { |
| 63 | + attrs.insert({"is_test", 1}); |
| 64 | + } |
| 65 | + |
| 66 | + auto op = framework::OpRegistry::CreateOp( |
| 67 | + "dropout", {{"X", {"X"}}}, {{"Out", {"Out"}}, {"Mask", {"Mask"}}}, attrs); |
| 68 | + op->Run(scope, ctx.GetPlace()); |
| 69 | + cudaMemcpy(out, tensor_out->data<T>(), x_dim[0] * x_dim[1] * sizeof(T), |
| 70 | + cudaMemcpyDeviceToHost); |
| 71 | + if (!is_test) { |
| 72 | + cudaMemcpy((*mask).data(), tensor_mask->data<uint8_t>(), |
| 73 | + x_dim[0] * x_dim[1] * sizeof(uint8_t), cudaMemcpyDeviceToHost); |
| 74 | + } |
| 75 | + ctx.Wait(); |
| 76 | +} |
| 77 | + |
| 78 | +/** |
| 79 | + * @brief call paddle dropout_grad op |
| 80 | + */ |
| 81 | +template <typename T> |
| 82 | +void DropoutGrad(T *dx, const framework::DDim &x_dim, const T *dout, |
| 83 | + const uint8_t *mask, const platform::CUDADeviceContext &ctx, |
| 84 | + float dropout_prob, bool is_upscale_in_train) { |
| 85 | + framework::Scope scope; |
| 86 | + const size_t n = x_dim[0] * x_dim[1]; |
| 87 | + auto var_out = scope.Var("DOut"); |
| 88 | + auto tensor_out = var_out->GetMutable<framework::LoDTensor>(); |
| 89 | + tensor_out->Resize(x_dim); |
| 90 | + tensor_out->mutable_data<T>(ctx.GetPlace()); |
| 91 | + cudaMemcpy(tensor_out->data<T>(), dout, n * sizeof(T), |
| 92 | + cudaMemcpyHostToDevice); |
| 93 | + |
| 94 | + auto var_mask = scope.Var("Mask"); |
| 95 | + auto tensor_mask = var_mask->GetMutable<framework::LoDTensor>(); |
| 96 | + tensor_mask->Resize(x_dim); |
| 97 | + tensor_mask->mutable_data<uint8_t>(ctx.GetPlace()); |
| 98 | + cudaMemcpy(tensor_mask->data<uint8_t>(), mask, n * sizeof(uint8_t), |
| 99 | + cudaMemcpyHostToDevice); |
| 100 | + |
| 101 | + auto var_dx = scope.Var("DX"); |
| 102 | + auto tensor_dx = var_dx->GetMutable<framework::LoDTensor>(); |
| 103 | + |
| 104 | + framework::AttributeMap attrs; |
| 105 | + attrs.insert({"dropout_prob", dropout_prob}); |
| 106 | + attrs.insert({"is_test", 0}); |
| 107 | + if (is_upscale_in_train) { |
| 108 | + attrs.insert({"dropout_implementation", std::string("upscale_in_train")}); |
| 109 | + } else { |
| 110 | + attrs.insert({"dropout_implementation", std::string("downgrade_in_infer")}); |
| 111 | + } |
| 112 | + |
| 113 | + auto op = framework::OpRegistry::CreateOp( |
| 114 | + "dropout_grad", {{"Out@GRAD", {"DOut"}}, {"Mask", {"Mask"}}}, |
| 115 | + {{"X@GRAD", {"DX"}}}, attrs); |
| 116 | + op->Run(scope, ctx.GetPlace()); |
| 117 | + |
| 118 | + cudaMemcpy(dx, tensor_dx->data<T>(), x_dim[0] * x_dim[1] * sizeof(T), |
| 119 | + cudaMemcpyDeviceToHost); |
| 120 | + ctx.Wait(); |
| 121 | +} |
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