diff --git a/Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc b/Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
index a5c5fa85a6e..7ca99c48adb 100644
--- a/Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
+++ b/Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
@@ -348,15 +348,6 @@ srcREG: "PC"		is a=0 & f8=0xf9						{
 	export PCL; 
 }
 
-# Destination register (either srcREG or WREG)
-destREG: "0"	is d=0											{ export WREG; }
-destREG: "1"	is d=1 & srcREG									{ export srcREG; }
-#destREG: "1"	is d=1 & f8=0xf9						{ 
-#	# Storing to PCL must write the PC using both the stored PCL (PC<7:0>), PCLATH (PC<15:8>) and PCLATU (PC<21:16>)
-#	# The ADDWF and MOVWF definitions below have a specific case to handle this write to PCL
-#	export PCL; 
-#}
-
 # Destination operand representation (w: W register is destination; f: specified fREG is destination)
 D: "w"		is d=0										{ }
 D: "f"		is d=1										{ }
@@ -667,7 +658,7 @@ A: "BANKED"			is a=1										{ }
 # BYTE-ORIENTED FILE REGISTER OPERATIONS
 #
 
-:ADDWF srcREG, D, A		is op6=0x09 & srcREG & A & destREG & D	{
+:ADDWF srcREG, D, A		is op6=0x09 & srcREG & A & d=0 & D	{
 	#  0010 01da ffff ffff
 	#  0010 0100 0000 0000  ->  ADDWF DAT_DATA_0000, w, ACCESS
 	#  0010 0101 0000 0000  ->  ADDWF REG0x0, w, BANKED
@@ -681,7 +672,25 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG; # read only once!
 	setAddFlags(tmp, WREG); 
 	tmp = tmp + WREG;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:ADDWF srcREG, D, A		is op6=0x09 & srcREG & A & d=1 & D	{
+	#  0010 01da ffff ffff
+	#  0010 0100 0000 0000  ->  ADDWF DAT_DATA_0000, w, ACCESS
+	#  0010 0101 0000 0000  ->  ADDWF REG0x0, w, BANKED
+	#  0010 0100 1101 1000  ->  ADDWF STATUS, w, ACCESS
+	#  0010 0101 1101 1000  ->  ADDWF REG0xD8, w, BANKED
+	#  0010 0110 0000 0000  ->  ADDWF DAT_DATA_0000, f, ACCESS
+	#  0010 0111 0000 0000  ->  ADDWF REG0x0, f, BANKED
+	#  0010 0110 1101 1000  ->  ADDWF STATUS, f, ACCESS
+	#  0010 0111 1101 1000  ->  ADDWF REG0xD8, f, BANKED
+	#  0010 0100 1111 1001	->	ADDWF PC, w, ACCESS
+	tmp:1 = srcREG; # read only once!
+	setAddFlags(tmp, WREG);
+	tmp = tmp + WREG;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
@@ -700,7 +709,7 @@ A: "BANKED"			is a=1										{ }
 	goto [addr];
 }
 
-:ADDWFC srcREG, D, A 		is op6=0x08 & srcREG & destREG & D & A	{ 
+:ADDWFC srcREG, D, A 		is op6=0x08 & srcREG & d=0 & D & A	{
 	#  0010 00da ffff ffff
 	#  0010 0000 0000 0000  ->  ADDWFC DAT_DATA_0000, w, ACCESS
 	#  0010 0001 0000 0000  ->  ADDWFC REG0x0, w, BANKED
@@ -714,11 +723,29 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	setAddCFlags(tmp, WREG); 
 	tmp = tmp + WREG + tmpC;
-	destREG = tmp;
+	WREG = tmp;
 	setResultFlags(tmp);
 }
 
-:ANDWF srcREG, D, A 		is op6=0x05 & srcREG & destREG & D & A	{ 
+:ADDWFC srcREG, D, A 		is op6=0x08 & srcREG & d=1 & D & A	{
+	#  0010 00da ffff ffff
+	#  0010 0000 0000 0000  ->  ADDWFC DAT_DATA_0000, w, ACCESS
+	#  0010 0001 0000 0000  ->  ADDWFC REG0x0, w, BANKED
+	#  0010 0000 1101 1000  ->  ADDWFC STATUS, w, ACCESS
+	#  0010 0001 1101 1000  ->  ADDWFC REG0xD8, w, BANKED
+	#  0010 0010 0000 0000  ->  ADDWFC DAT_DATA_0000, f, ACCESS
+	#  0010 0011 0000 0000  ->  ADDWFC REG0x0, f, BANKED
+	#  0010 0010 1101 1000  ->  ADDWFC STATUS, f, ACCESS
+	#  0010 0011 1101 1000  ->  ADDWFC REG0xD8, f, BANKED
+	local tmpC = C & 1;
+	tmp:1 = srcREG;
+	setAddCFlags(tmp, WREG);
+	tmp = tmp + WREG + tmpC;
+	srcREG = tmp;
+	setResultFlags(tmp);
+}
+
+:ANDWF srcREG, D, A 		is op6=0x05 & srcREG & d=0 & D & A	{
 	#  0001 01da ffff ffff
 	#  0001 0100 0000 0000  ->	ANDWF DAT_DATA_0000, w, ACCESS
 	#  0001 0101 0000 0000  ->	ANDWF REG0x0, w, BANKED
@@ -729,7 +756,22 @@ A: "BANKED"			is a=1										{ }
 	#  0001 0110 1101 1000  ->	ANDWF STATUS, f, ACCESS
 	#  0001 0111 1101 1000  ->	ANDWF REG0xD8, f, BANKED
 	tmp:1 = srcREG & WREG;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:ANDWF srcREG, D, A 		is op6=0x05 & srcREG & d=1 & D & A	{
+	#  0001 01da ffff ffff
+	#  0001 0100 0000 0000  ->	ANDWF DAT_DATA_0000, w, ACCESS
+	#  0001 0101 0000 0000  ->	ANDWF REG0x0, w, BANKED
+	#  0001 0100 1101 1000  ->	ANDWF STATUS, w, ACCESS
+	#  0001 0101 1101 1000  ->	ANDWF REG0xD8, w, BANKED
+	#  0001 0110 0000 0000  ->	ANDWF DAT_DATA_0000, f, ACCESS
+	#  0001 0111 0000 0000  ->	ANDWF REG0x0, f, BANKED
+	#  0001 0110 1101 1000  ->	ANDWF STATUS, f, ACCESS
+	#  0001 0111 1101 1000  ->	ANDWF REG0xD8, f, BANKED
+	tmp:1 = srcREG & WREG;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
@@ -743,7 +785,22 @@ A: "BANKED"			is a=1										{ }
 	Z = 1;
 }
 
-:COMF srcREG, D, A		is op6=0x07 & srcREG & destREG & D & A		{ 
+:COMF srcREG, D, A		is op6=0x07 & srcREG & d=0 & D & A		{
+	#  0001 11da ffff ffff
+	#  0001 1100 0000 0000  ->	COMF DAT_DATA_0000, w, ACCESS
+	#  0001 1101 0000 0000  ->	COMF REG0x0, w, BANKED
+	#  0001 1100 1101 1000  ->	COMF STATUS, w, ACCESS
+	#  0001 1101 1101 1000  ->	COMF REG0xD8, w, BANKED
+	#  0001 1110 0000 0000  ->	COMF DAT_DATA_0000, f, ACCESS
+	#  0001 1111 0000 0000  ->	COMF REG0x0, f, BANKED
+	#  0001 1110 1101 1000  ->	COMF STATUS, f, ACCESS
+	#  0001 1111 1101 1000  ->	COMF REG0xD8, f, BANKED
+	tmp:1 = ~srcREG;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:COMF srcREG, D, A		is op6=0x07 & srcREG & d=1 & D & A		{
 	#  0001 11da ffff ffff
 	#  0001 1100 0000 0000  ->	COMF DAT_DATA_0000, w, ACCESS
 	#  0001 1101 0000 0000  ->	COMF REG0x0, w, BANKED
@@ -754,7 +811,7 @@ A: "BANKED"			is a=1										{ }
 	#  0001 1110 1101 1000  ->	COMF STATUS, f, ACCESS
 	#  0001 1111 1101 1000  ->	COMF REG0xD8, f, BANKED
 	tmp:1 = ~srcREG;
-	destREG = tmp;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
@@ -785,7 +842,7 @@ A: "BANKED"			is a=1										{ }
 	if (srcREG < WREG) goto skipInst;
 }
 
-:DECF srcREG, D, A		is op6=0x01 & srcREG & destREG & D & A	{ 
+:DECF srcREG, D, A		is op6=0x01 & srcREG & d=0 & D & A	{
 	#  0000 01da ffff ffff
 	#  0000 0100 0000 0000  ->  DECF DAT_DATA_0000, w, ACCESS
 	#  0000 0101 0000 0000  ->  DECF REG0x0, w, BANKED
@@ -798,11 +855,43 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	setSubtractFlags(tmp, 1); 
 	tmp = tmp - 1;
-	destREG = tmp;
+	WREG = tmp;
 	setResultFlags(tmp);
 }
 
-:DECFSZ srcREG, D, A		is op6=0x0b & srcREG & destREG & D & A & skipInst	{ 
+:DECF srcREG, D, A		is op6=0x01 & srcREG & d=1 & D & A	{
+	#  0000 01da ffff ffff
+	#  0000 0100 0000 0000  ->  DECF DAT_DATA_0000, w, ACCESS
+	#  0000 0101 0000 0000  ->  DECF REG0x0, w, BANKED
+	#  0000 0100 1101 1000  ->  DECF STATUS, w, ACCESS
+	#  0000 0101 1101 1000  ->  DECF REG0xD8, w, BANKED
+	#  0000 0110 0000 0000  ->  DECF DAT_DATA_0000, f, ACCESS
+	#  0000 0111 0000 0000  ->  DECF REG0x0, f, BANKED
+	#  0000 0110 1101 1000  ->  DECF STATUS, f, ACCESS
+	#  0000 0111 1101 1000  ->  DECF REG0xD8, f, BANKED
+	tmp:1 = srcREG;
+	setSubtractFlags(tmp, 1);
+	tmp = tmp - 1;
+	srcREG = tmp;
+	setResultFlags(tmp);
+}
+
+:DECFSZ srcREG, D, A		is op6=0x0b & srcREG & d=0 & D & A & skipInst	{
+	#  0010 11da ffff ffff
+	#  0010 1100 0000 0000  ->  DECFSZ DAT_DATA_0000, w, ACCESS
+	#  0010 1101 0000 0000  ->  DECFSZ REG0x0, w, BANKED
+	#  0010 1100 1101 1000  ->  DECFSZ STATUS, w, ACCESS
+	#  0010 1101 1101 1000  ->  DECFSZ REG0xD8, w, BANKED
+	#  0010 1110 0000 0000  ->  DECFSZ DAT_DATA_0000, f, ACCESS
+	#  0010 1111 0000 0000  ->  DECFSZ REG0x0, f, BANKED
+	#  0010 1110 1101 1000  ->  DECFSZ STATUS, f, ACCESS
+	#  0010 1111 1101 1000  ->  DECFSZ REG0xD8, f, BANKED
+	tmp:1 = srcREG - 1;
+	WREG = tmp;
+	if (tmp == 0) goto skipInst;
+}
+
+:DECFSZ srcREG, D, A		is op6=0x0b & srcREG & d=1 & D & A & skipInst	{
 	#  0010 11da ffff ffff
 	#  0010 1100 0000 0000  ->  DECFSZ DAT_DATA_0000, w, ACCESS
 	#  0010 1101 0000 0000  ->  DECFSZ REG0x0, w, BANKED
@@ -813,11 +902,11 @@ A: "BANKED"			is a=1										{ }
 	#  0010 1110 1101 1000  ->  DECFSZ STATUS, f, ACCESS
 	#  0010 1111 1101 1000  ->  DECFSZ REG0xD8, f, BANKED
 	tmp:1 = srcREG - 1;
-	destREG = tmp;
+	srcREG = tmp;
 	if (tmp == 0) goto skipInst;
 }
 
-:DCFSNZ srcREG, D, A		is op6=0x13 & srcREG & destREG & D & A & skipInst	{ 
+:DCFSNZ srcREG, D, A		is op6=0x13 & srcREG & d=0 & D & A & skipInst	{
 	#  0100 11da ffff ffff
 	#  0100 1100 0000 0000  ->  DCFSNZ DAT_DATA_0000, w, ACCESS
 	#  0100 1101 0000 0000  ->  DCFSNZ REG0x0, w, BANKED
@@ -828,11 +917,26 @@ A: "BANKED"			is a=1										{ }
 	#  0100 1110 1101 1000  ->  DCFSNZ STATUS, f, ACCESS
 	#  0100 1111 1101 1000  ->  DCFSNZ REG0xD8, f, BANKED
 	tmp:1 = srcREG - 1;
-	destREG = tmp;
+	WREG = tmp;
 	if (tmp != 0) goto skipInst;
 }
 
-:INCF srcREG, D, A		is op6=0x0a & srcREG & destREG & D & A	{ 
+:DCFSNZ srcREG, D, A		is op6=0x13 & srcREG & d=1 & D & A & skipInst	{
+	#  0100 11da ffff ffff
+	#  0100 1100 0000 0000  ->  DCFSNZ DAT_DATA_0000, w, ACCESS
+	#  0100 1101 0000 0000  ->  DCFSNZ REG0x0, w, BANKED
+	#  0100 1100 1101 1000  ->  DCFSNZ STATUS, w, ACCESS
+	#  0100 1101 1101 1000  ->  DCFSNZ REG0xD8, w, BANKED
+	#  0100 1110 0000 0000  ->  DCFSNZ DAT_DATA_0000, f, ACCESS
+	#  0100 1111 0000 0000  ->  DCFSNZ REG0x0, f, BANKED
+	#  0100 1110 1101 1000  ->  DCFSNZ STATUS, f, ACCESS
+	#  0100 1111 1101 1000  ->  DCFSNZ REG0xD8, f, BANKED
+	tmp:1 = srcREG - 1;
+	srcREG = tmp;
+	if (tmp != 0) goto skipInst;
+}
+
+:INCF srcREG, D, A		is op6=0x0a & srcREG & d=0 & D & A	{
 	#  0010 10da ffff ffff
 	#  0010 1000 0000 0000  ->  INCF DAT_DATA_0000, w, ACCESS
 	#  0010 1001 0000 0000  ->  INCF REG0x0, w, BANKED
@@ -845,11 +949,28 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG; # read once only!
 	setAddFlags(tmp, 1); 
 	tmp = tmp + 1;
-	destREG = tmp;
+	WREG = tmp;
 	setResultFlags(tmp);
 }
 
-:INCFSZ srcREG, D, A	is op6=0x0f & srcREG & destREG & D & A & skipInst	{ 
+:INCF srcREG, D, A		is op6=0x0a & srcREG & d=1 & D & A	{
+	#  0010 10da ffff ffff
+	#  0010 1000 0000 0000  ->  INCF DAT_DATA_0000, w, ACCESS
+	#  0010 1001 0000 0000  ->  INCF REG0x0, w, BANKED
+	#  0010 1000 1101 1000  ->  INCF STATUS, w, ACCESS
+	#  0010 1001 1101 1000  ->  INCF REG0xD8, w, BANKED
+	#  0010 1010 0000 0000  ->  INCF DAT_DATA_0000, f, ACCESS
+	#  0010 1011 0000 0000  ->  INCF REG0x0, f, BANKED
+	#  0010 1010 1101 1000  ->  INCF STATUS, f, ACCESS
+	#  0010 1011 1101 1000  ->  INCF REG0xD8, f, BANKED
+	tmp:1 = srcREG; # read once only!
+	setAddFlags(tmp, 1);
+	tmp = tmp + 1;
+	srcREG = tmp;
+	setResultFlags(tmp);
+}
+
+:INCFSZ srcREG, D, A	is op6=0x0f & srcREG & d=0 & D & A & skipInst	{
 	#  0011 11da ffff ffff
 	#  0011 1100 0000 0000  ->  INCFSZ DAT_DATA_0000, w, ACCESS
 	#  0011 1101 0000 0000  ->  INCFSZ REG0x0, w, BANKED
@@ -860,11 +981,41 @@ A: "BANKED"			is a=1										{ }
 	#  0011 1110 1101 1000  ->  INCFSZ STATUS, f, ACCESS
 	#  0011 1111 1101 1000  ->  INCFSZ REG0xD8, f, BANKED
 	tmp:1 = srcREG + 1;
-	destREG = tmp;
+	WREG = tmp;
 	if (tmp == 0) goto skipInst;
 }
 
-:INFSNZ srcREG, D, A		is op6=0x12 & srcREG & destREG & D & A & skipInst		{ 
+:INCFSZ srcREG, D, A	is op6=0x0f & srcREG & d & D & A & skipInst	{
+	#  0011 11da ffff ffff
+	#  0011 1100 0000 0000  ->  INCFSZ DAT_DATA_0000, w, ACCESS
+	#  0011 1101 0000 0000  ->  INCFSZ REG0x0, w, BANKED
+	#  0011 1100 1101 1000  ->  INCFSZ STATUS, w, ACCESS
+	#  0011 1101 1101 1000  ->  INCFSZ REG0xD8, w, BANKED
+	#  0011 1110 0000 0000  ->  INCFSZ DAT_DATA_0000, f, ACCESS
+	#  0011 1111 0000 0000  ->  INCFSZ REG0x0, f, BANKED
+	#  0011 1110 1101 1000  ->  INCFSZ STATUS, f, ACCESS
+	#  0011 1111 1101 1000  ->  INCFSZ REG0xD8, f, BANKED
+	tmp:1 = srcREG + 1;
+	srcREG = tmp;
+	if (tmp == 0) goto skipInst;
+}
+
+:INFSNZ srcREG, D, A		is op6=0x12 & srcREG & d=0 & D & A & skipInst		{
+	#  0100 10da ffff ffff
+	#  0100 1000 0000 0000  ->  INFSNZ DAT_DATA_0000, w, ACCESS
+	#  0100 1001 0000 0000  ->  INFSNZ REG0x0, w, BANKED
+	#  0100 1000 1101 1000  ->  INFSNZ STATUS, w, ACCESS
+	#  0100 1001 1101 1000  ->  INFSNZ REG0xD8, w, BANKED
+	#  0100 1010 0000 0000  ->  INFSNZ DAT_DATA_0000, f, ACCESS
+	#  0100 1011 0000 0000  ->  INFSNZ REG0x0, f, BANKED
+	#  0100 1010 1101 1000  ->  INFSNZ STATUS, f, ACCESS
+	#  0100 1011 1101 1000  ->  INFSNZ REG0xD8, f, BANKED
+	tmp:1 = srcREG + 1;
+	WREG = tmp;
+	if (tmp != 0) goto skipInst;
+}
+
+:INFSNZ srcREG, D, A		is op6=0x12 & srcREG & d=1 & D & A & skipInst		{
 	#  0100 10da ffff ffff
 	#  0100 1000 0000 0000  ->  INFSNZ DAT_DATA_0000, w, ACCESS
 	#  0100 1001 0000 0000  ->  INFSNZ REG0x0, w, BANKED
@@ -875,11 +1026,11 @@ A: "BANKED"			is a=1										{ }
 	#  0100 1010 1101 1000  ->  INFSNZ STATUS, f, ACCESS
 	#  0100 1011 1101 1000  ->  INFSNZ REG0xD8, f, BANKED
 	tmp:1 = srcREG + 1;
-	destREG = tmp;
+	srcREG = tmp;
 	if (tmp != 0) goto skipInst;
 }
 
-:IORWF srcREG, D, A		is op6=0x04	& srcREG & destREG & D & A		{ 
+:IORWF srcREG, D, A		is op6=0x04	& srcREG & d=0 & D & A		{
 	#  0001 00da ffff ffff
 	#  0001 0000 0000 0000  ->	IORWF DAT_DATA_0000, w, ACCESS
 	#  0001 0001 0000 0000  ->	IORWF REG0x0, w, BANKED
@@ -890,11 +1041,26 @@ A: "BANKED"			is a=1										{ }
 	#  0001 0010 1101 1000  ->	IORWF STATUS, f, ACCESS
 	#  0001 0011 1101 1000  ->	IORWF REG0xD8, f, BANKED
 	tmp:1 = srcREG | WREG;
-	destREG = tmp;
+	WREG = tmp;
 	setResultFlags(tmp);
 }
 
-:MOVF srcREG, D, A		is op6=0x14	& srcREG & destREG & D & A		{ 
+:IORWF srcREG, D, A		is op6=0x04	& srcREG & d=1 & D & A		{
+	#  0001 00da ffff ffff
+	#  0001 0000 0000 0000  ->	IORWF DAT_DATA_0000, w, ACCESS
+	#  0001 0001 0000 0000  ->	IORWF REG0x0, w, BANKED
+	#  0001 0000 1101 1000  ->	IORWF STATUS, w, ACCESS
+	#  0001 0001 1101 1000  ->	IORWF REG0xD8, w, BANKED
+	#  0001 0010 0000 0000  ->	IORWF DAT_DATA_0000, f, ACCESS
+	#  0001 0011 0000 0000  ->	IORWF REG0x0, f, BANKED
+	#  0001 0010 1101 1000  ->	IORWF STATUS, f, ACCESS
+	#  0001 0011 1101 1000  ->	IORWF REG0xD8, f, BANKED
+	tmp:1 = srcREG | WREG;
+	srcREG = tmp;
+	setResultFlags(tmp);
+}
+
+:MOVF srcREG, D, A		is op6=0x14	& srcREG & d=0 & D & A		{
 	#  0101 00da ffff ffff
 	#  0101 0000 0000 0000  ->	MOVF DAT_DATA_0000, w, ACCESS
 	#  0101 0001 0000 0000  ->	MOVF REG0x0, w, BANKED
@@ -910,7 +1076,27 @@ A: "BANKED"			is a=1										{ }
 	#  0101 0000 1101 1111  ->	MOVF INDF2, w, ACCESS
 	
 	tmp:1 = srcREG;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:MOVF srcREG, D, A		is op6=0x14	& srcREG & d=1 & D & A		{
+	#  0101 00da ffff ffff
+	#  0101 0000 0000 0000  ->	MOVF DAT_DATA_0000, w, ACCESS
+	#  0101 0001 0000 0000  ->	MOVF REG0x0, w, BANKED
+	#  0101 0000 1101 1000  ->	MOVF STATUS, w, ACCESS
+	#  0101 0001 1101 1000  ->	MOVF REG0xD8, w, BANKED
+	#  0101 0010 0000 0000  ->	MOVF DAT_DATA_0000, f, ACCESS
+	#  0101 0011 0000 0000  ->	MOVF REG0x0, f, BANKED
+	#  0101 0010 1101 1000  ->	MOVF STATUS, f, ACCESS
+	#  0101 0011 1101 1000  ->	MOVF REG0xD8, f, BANKED
+
+	#  0101 0000 1110 1111  ->	MOVF INDF0, w, ACCESS
+	#  0101 0000 1110 0111  ->	MOVF INDF1, w, ACCESS
+	#  0101 0000 1101 1111  ->	MOVF INDF2, w, ACCESS
+
+	tmp:1 = srcREG;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
@@ -967,7 +1153,7 @@ A: "BANKED"			is a=1										{ }
 	setResultFlags(tmp);
 }
 
-:RLCF srcREG, D, A		is op6=0x0d	& srcREG & destREG & D & A		{ 
+:RLCF srcREG, D, A		is op6=0x0d	& srcREG & d=0 & D & A		{
 	#  0011 01da ffff ffff
 	#  0011 0100 0000 0000  ->	RLCF DAT_DATA_0000, w, ACCESS
 	#  0011 0101 0000 0000  ->	RLCF REG0x0, w, BANKED
@@ -981,11 +1167,29 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	C = (tmp s< 0);
 	tmp = (tmp << 1) | tmpC;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:RLCF srcREG, D, A		is op6=0x0d	& srcREG & d=1 & D & A		{
+	#  0011 01da ffff ffff
+	#  0011 0100 0000 0000  ->	RLCF DAT_DATA_0000, w, ACCESS
+	#  0011 0101 0000 0000  ->	RLCF REG0x0, w, BANKED
+	#  0011 0100 1101 1000  ->	RLCF STATUS, w, ACCESS
+	#  0011 0101 1101 1000  ->	RLCF REG0xD8, w, BANKED
+	#  0011 0110 0000 0000  ->	RLCF DAT_DATA_0000, f, ACCESS
+	#  0011 0111 0000 0000  ->	RLCF REG0x0, f, BANKED
+	#  0011 0110 1101 1000  ->	RLCF STATUS, f, ACCESS
+	#  0011 0111 1101 1000  ->	RLCF REG0xD8, f, BANKED
+	local tmpC = C & 1;
+	tmp:1 = srcREG;
+	C = (tmp s< 0);
+	tmp = (tmp << 1) | tmpC;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
-:RLNCF srcREG, D, A		is op6=0x11	& srcREG & destREG & D & A		{ 
+:RLNCF srcREG, D, A		is op6=0x11	& srcREG & d=0 & D & A		{
 	#  0100 01da ffff ffff
 	#  0100 0100 0000 0000  ->	RLNCF DAT_DATA_0000, w, ACCESS
 	#  0100 0101 0000 0000  ->	RLNCF REG0x0, w, BANKED
@@ -996,11 +1200,44 @@ A: "BANKED"			is a=1										{ }
 	#  0100 0110 1101 1000  ->	RLNCF STATUS, f, ACCESS
 	#  0100 0111 1101 1000  ->	RLNCF REG0xD8, f, BANKED
 	tmp:1 = srcREG << 1;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:RLNCF srcREG, D, A		is op6=0x11	& srcREG & d=1 & D & A		{
+	#  0100 01da ffff ffff
+	#  0100 0100 0000 0000  ->	RLNCF DAT_DATA_0000, w, ACCESS
+	#  0100 0101 0000 0000  ->	RLNCF REG0x0, w, BANKED
+	#  0100 0100 1101 1000  ->	RLNCF STATUS, w, ACCESS
+	#  0100 0101 1101 1000  ->	RLNCF REG0xD8, w, BANKED
+	#  0100 0110 0000 0000  ->	RLNCF DAT_DATA_0000, f, ACCESS
+	#  0100 0111 0000 0000  ->	RLNCF REG0x0, f, BANKED
+	#  0100 0110 1101 1000  ->	RLNCF STATUS, f, ACCESS
+	#  0100 0111 1101 1000  ->	RLNCF REG0xD8, f, BANKED
+	tmp:1 = srcREG << 1;
+	srcREG = tmp;
+	setResultFlags(tmp);
+}
+
+:RRCF srcREG, D, A		is op6=0x0c	& srcREG & d=0 & D & A		{
+	#  0011 00da ffff ffff
+	#  0011 0000 0000 0000  ->	RRCF DAT_DATA_0000, w, ACCESS
+	#  0011 0001 0000 0000  ->	RRCF REG0x0, w, BANKED
+	#  0011 0000 1101 1000  ->	RRCF STATUS, w, ACCESS
+	#  0011 0001 1101 1000  ->	RRCF REG0xD8, w, BANKED
+	#  0011 0010 0000 0000  ->	RRCF DAT_DATA_0000, f, ACCESS
+	#  0011 0011 0000 0000  ->	RRCF REG0x0, f, BANKED
+	#  0011 0010 1101 1000  ->	RRCF STATUS, f, ACCESS
+	#  0011 0011 1101 1000  ->	RRCF REG0xD8, f, BANKED
+	local tmpC = C << 7;
+	tmp:1 = srcREG;
+	C = (tmp & 1);
+	tmp = (tmp >> 1) | tmpC;
+	WREG = tmp;
 	setResultFlags(tmp);
 }
 
-:RRCF srcREG, D, A		is op6=0x0c	& srcREG & destREG & D & A		{ 
+:RRCF srcREG, D, A		is op6=0x0c	& srcREG & d=1 & D & A		{
 	#  0011 00da ffff ffff
 	#  0011 0000 0000 0000  ->	RRCF DAT_DATA_0000, w, ACCESS
 	#  0011 0001 0000 0000  ->	RRCF REG0x0, w, BANKED
@@ -1014,11 +1251,11 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	C = (tmp & 1);
 	tmp = (tmp >> 1) | tmpC;
-	destREG = tmp;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
-:RRNCF srcREG, D, A		is op6=0x10	& srcREG & destREG & D & A		{ 
+:RRNCF srcREG, D, A		is op6=0x10	& srcREG & d=0 & D & A		{
 	#  0100 00da ffff ffff
 	#  0100 0000 0000 0000  ->	RRNCF DAT_DATA_0000, w, ACCESS
 	#  0100 0001 0000 0000  ->	RRNCF REG0x0, w, BANKED
@@ -1029,7 +1266,22 @@ A: "BANKED"			is a=1										{ }
 	#  0100 0010 1101 1000  ->	RRNCF STATUS, f, ACCESS
 	#  0100 0011 1101 1000  ->	RRNCF REG0xD8, f, BANKED
 	tmp:1 = srcREG >> 1;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:RRNCF srcREG, D, A		is op6=0x10	& srcREG & d=1 & D & A		{
+	#  0100 00da ffff ffff
+	#  0100 0000 0000 0000  ->	RRNCF DAT_DATA_0000, w, ACCESS
+	#  0100 0001 0000 0000  ->	RRNCF REG0x0, w, BANKED
+	#  0100 0000 1101 1000  ->	RRNCF STATUS, w, ACCESS
+	#  0100 0001 1101 1000  ->	RRNCF REG0xD8, w, BANKED
+	#  0100 0010 0000 0000  ->	RRNCF DAT_DATA_0000, f, ACCESS
+	#  0100 0011 0000 0000  ->	RRNCF REG0x0, f, BANKED
+	#  0100 0010 1101 1000  ->	RRNCF STATUS, f, ACCESS
+	#  0100 0011 1101 1000  ->	RRNCF REG0xD8, f, BANKED
+	tmp:1 = srcREG >> 1;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
@@ -1042,7 +1294,25 @@ A: "BANKED"			is a=1										{ }
 	srcREG = 0xff;
 }
 
-:SUBFWB srcREG, D, A		is op6=0x15	& srcREG & destREG & D & A		{ 
+:SUBFWB srcREG, D, A		is op6=0x15	& srcREG & d=0 & D & A		{
+	#  0101 01da ffff ffff
+	#  0101 0100 0000 0000  ->	SUBFWB DAT_DATA_0000, w, ACCESS
+	#  0101 0101 0000 0000  ->	SUBFWB REG0x0, w, BANKED
+	#  0101 0100 1101 1000  ->	SUBFWB STATUS, w, ACCESS
+	#  0101 0101 1101 1000  ->	SUBFWB REG0xD8, w, BANKED
+	#  0101 0110 0000 0000  ->	SUBFWB DAT_DATA_0000, f, ACCESS
+	#  0101 0111 0000 0000  ->	SUBFWB REG0x0, f, BANKED
+	#  0101 0110 1101 1000  ->	SUBFWB STATUS, f, ACCESS
+	#  0101 0111 1101 1000  ->	SUBFWB REG0xD8, f, BANKED
+	local notC = ~(C & 1);
+	tmp:1 = srcREG;
+	setSubtractCFlags(WREG, tmp); 
+	tmp = WREG - tmp - notC;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:SUBFWB srcREG, D, A		is op6=0x15	& srcREG & d=1 & D & A		{
 	#  0101 01da ffff ffff
 	#  0101 0100 0000 0000  ->	SUBFWB DAT_DATA_0000, w, ACCESS
 	#  0101 0101 0000 0000  ->	SUBFWB REG0x0, w, BANKED
@@ -1056,11 +1326,11 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	setSubtractCFlags(WREG, tmp); 
 	tmp = WREG - tmp - notC;
-	destREG = tmp;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
-:SUBWF srcREG, D, A		is op6=0x17	& srcREG & destREG & D & A		{ 
+:SUBWF srcREG, D, A		is op6=0x17	& srcREG & d=0 & D & A		{
 	#  0101 11da ffff ffff
 	#  0101 1100 0000 0000  ->	SUBWF DAT_DATA_0000, w, ACCESS
 	#  0101 1101 0000 0000  ->	SUBWF REG0x0, w, BANKED
@@ -1073,11 +1343,28 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	setSubtractFlags(tmp, WREG); 
 	tmp = tmp - WREG;
-	destREG = tmp;
+	WREG = tmp;
 	setResultFlags(tmp);
 }
 
-:SUBWFB srcREG, D, A		is op6=0x16	& srcREG & destREG & D & A		{ 
+:SUBWF srcREG, D, A		is op6=0x17	& srcREG & d=1 & D & A		{
+	#  0101 11da ffff ffff
+	#  0101 1100 0000 0000  ->	SUBWF DAT_DATA_0000, w, ACCESS
+	#  0101 1101 0000 0000  ->	SUBWF REG0x0, w, BANKED
+	#  0101 1100 1101 1000  ->	SUBWF STATUS, w, ACCESS
+	#  0101 1101 1101 1000  ->	SUBWF REG0xD8, w, BANKED
+	#  0101 1110 0000 0000  ->	SUBWF DAT_DATA_0000, f, ACCESS
+	#  0101 1111 0000 0000  ->	SUBWF REG0x0, f, BANKED
+	#  0101 1110 1101 1000  ->	SUBWF STATUS, f, ACCESS
+	#  0101 1111 1101 1000  ->	SUBWF REG0xD8, f, BANKED
+	tmp:1 = srcREG;
+	setSubtractFlags(tmp, WREG);
+	tmp = tmp - WREG;
+	srcREG = tmp;
+	setResultFlags(tmp);
+}
+
+:SUBWFB srcREG, D, A		is op6=0x16	& srcREG & d=0 & D & A		{
 	#  0101 10da ffff ffff
 	#  0101 1000 0000 0000  ->	SUBWFB DAT_DATA_0000, w, ACCESS
 	#  0101 1001 0000 0000  ->	SUBWFB REG0x0, w, BANKED
@@ -1091,11 +1378,43 @@ A: "BANKED"			is a=1										{ }
 	tmp:1 = srcREG;
 	setSubtractCFlags(tmp, WREG); 
 	tmp = tmp - WREG - notC;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:SUBWFB srcREG, D, A		is op6=0x16	& srcREG & d=1 & D & A		{
+	#  0101 10da ffff ffff
+	#  0101 1000 0000 0000  ->	SUBWFB DAT_DATA_0000, w, ACCESS
+	#  0101 1001 0000 0000  ->	SUBWFB REG0x0, w, BANKED
+	#  0101 1000 1101 1000  ->	SUBWFB STATUS, w, ACCESS
+	#  0101 1001 1101 1000  ->	SUBWFB REG0xD8, w, BANKED
+	#  0101 1010 0000 0000  ->	SUBWFB DAT_DATA_0000, f, ACCESS
+	#  0101 1011 0000 0000  ->	SUBWFB REG0x0, f, BANKED
+	#  0101 1010 1101 1000  ->	SUBWFB STATUS, f, ACCESS
+	#  0101 1011 1101 1000  ->	SUBWFB REG0xD8, f, BANKED
+	local notC = ~(C & 1);
+	tmp:1 = srcREG;
+	setSubtractCFlags(tmp, WREG);
+	tmp = tmp - WREG - notC;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }
 
-:SWAPF srcREG, D, A		is op6=0x0e	& srcREG & destREG & D & A		{ 
+:SWAPF srcREG, D, A		is op6=0x0e	& srcREG & d=0 & D & A		{
+	#  0011 10da ffff ffff
+	#  0011 1000 0000 0000  ->	SWAPF DAT_DATA_0000, w, ACCESS
+	#  0011 1001 0000 0000  ->	SWAPF REG0x0, w, BANKED
+	#  0011 1000 1101 1000  ->	SWAPF STATUS, w, ACCESS
+	#  0011 1001 1101 1000  ->	SWAPF REG0xD8, w, BANKED
+	#  0011 1010 0000 0000  ->	SWAPF DAT_DATA_0000, f, ACCESS
+	#  0011 1011 0000 0000  ->	SWAPF REG0x0, f, BANKED
+	#  0011 1010 1101 1000  ->	SWAPF STATUS, f, ACCESS
+	#  0011 1011 1101 1000  ->	SWAPF REG0xD8, f, BANKED
+	tmp:1 = srcREG;
+	WREG = (tmp << 4) | (tmp >> 4);
+}
+
+:SWAPF srcREG, D, A		is op6=0x0e	& srcREG & d=1 & D & A		{
 	#  0011 10da ffff ffff
 	#  0011 1000 0000 0000  ->	SWAPF DAT_DATA_0000, w, ACCESS
 	#  0011 1001 0000 0000  ->	SWAPF REG0x0, w, BANKED
@@ -1106,7 +1425,7 @@ A: "BANKED"			is a=1										{ }
 	#  0011 1010 1101 1000  ->	SWAPF STATUS, f, ACCESS
 	#  0011 1011 1101 1000  ->	SWAPF REG0xD8, f, BANKED
 	tmp:1 = srcREG;
-	destREG = (tmp << 4) | (tmp >> 4);	
+	srcREG = (tmp << 4) | (tmp >> 4);
 }
 
 :TSTFSZ srcREG, A			is op6=0x19 & d=0x1	& srcREG & A & skipInst	{ 
@@ -1118,7 +1437,7 @@ A: "BANKED"			is a=1										{ }
 	if (srcREG == 0) goto skipInst;
 }
 
-:XORWF srcREG, D, A		is op6=0x06	& srcREG & destREG & D & A		{ 
+:XORWF srcREG, D, A		is op6=0x06	& srcREG & d=0 & D & A		{
 	#  0001 10da ffff ffff
 	#  0001 1000 0000 0000  ->	XORWF DAT_DATA_0000, w, ACCESS
 	#  0001 1001 0000 0000  ->	XORWF REG0x0, w, BANKED
@@ -1129,7 +1448,22 @@ A: "BANKED"			is a=1										{ }
 	#  0001 1010 1101 1000  ->	XORWF STATUS, f, ACCESS
 	#  0001 1011 1101 1000  ->	XORWF REG0xD8, f, BANKED
 	tmp:1 = WREG ^ srcREG;
-	destREG = tmp;
+	WREG = tmp;
+	setResultFlags(tmp);
+}
+
+:XORWF srcREG, D, A		is op6=0x06	& srcREG & d=1 & D & A		{
+	#  0001 10da ffff ffff
+	#  0001 1000 0000 0000  ->	XORWF DAT_DATA_0000, w, ACCESS
+	#  0001 1001 0000 0000  ->	XORWF REG0x0, w, BANKED
+	#  0001 1000 1101 1000  ->	XORWF STATUS, w, ACCESS
+	#  0001 1001 1101 1000  ->	XORWF REG0xD8, w, BANKED
+	#  0001 1010 0000 0000  ->	XORWF DAT_DATA_0000, f, ACCESS
+	#  0001 1011 0000 0000  ->	XORWF REG0x0, f, BANKED
+	#  0001 1010 1101 1000  ->	XORWF STATUS, f, ACCESS
+	#  0001 1011 1101 1000  ->	XORWF REG0xD8, f, BANKED
+	tmp:1 = WREG ^ srcREG;
+	srcREG = tmp;
 	setResultFlags(tmp);
 }