Support CPU32 version of the 68000 instruction set

[LegacyNsfw]

See #1244

The "CPU32" iteration of the 68000 instruction set deprecates a few instructions and adds new table-lookup instructions. I I suspect this is not 100% complete, but it does a fine job on the firmware that I'm studying, so I don't plan to invest more time in it myself.

This is largely based on the work that @dzidaV8 began when that issue was opened. I could not have done this without that head start.

[backerman]

This PR fails to build; certification.manifest needs an entry for CPU32.slaspec.

> Task :68000:ip FAILED

FAILURE: Build failed with an exception.

* Where:
Script 'C:\Users\bsa3\source\ghidra\gradle\support\ip.gradle' line: 125

* What went wrong:
Execution failed for task ':68000:ip'.
> No IP found for C:\Users\bsa3\source\ghidra\Ghidra\Processors\68000\data\languages\CPU32.slaspec in module: C:\Users\bsa3\source\ghidra\Ghidra\Processors\68000. Expression: (ip != null). Values: ip = null

[LegacyNsfw]

Sorry for the slow turnaround on this, but I've added the missing entry, and I get a clean local build.

[GhidorahRex]

Why were these commented out?

tbl_eal: -(tbl_regan) is tbl_mode=4 & tbl_regan { local tmp:4 = tbl_regan - 4; export *:4 tmp; }

Seems to work fine.

[LegacyNsfw]

I just don't have any actual code to prove that it works, and I didn't want to check in anything that wasn't tested. But since it was written, and might actually work, I left it there as a comment. So if anyone needs it they won't have to start from scratch.

That said, I don't feel strongly about commenting or not.

[GhidorahRex]

The code commented out did not work, so I wouldn't suggest including it. I don't think we should not include the addressing modes however.

[LegacyNsfw]

I agree it would be good to include them, but the binaries that I'm working with do not use them, so I don't have a way to test them.

I propose checking in what I have, as-is, because it works. When someone needs the additional modes I'll be happy to work with them to add it.

I think it would be a mistake to leave this in uncommitted until that day arrives.

What's in this pull request is a big step forward from the current code, and it will unblock anyone else who wants to reverse engineer the P01 and P59 family of General Motors LS V8 engine computers. I'll admit that's probably only a few people so far, but they were used pretty widely in 2001-2007 trucks (and 2001-2004 Corvettes) so I'm hoping more people will join in over time. It would be great to have Ghidra working as well for them as it does for me, right out of the box.

[GhidorahRex]

Go ahead and add them in with the fixes I suggested, I'll take care of testing the addressing modes.

[GhidorahRex]

tbl_eal: (d16,tbl_regan) is tbl_mode=5 & tbl_regan; d16 { local tmp:4 = tbl_regan + d16; export *:4 tmp; }

Appears to work for this mode

[LegacyNsfw]

See above. Since the code I'm working with doesn't need it, I couldn't be sure certain that it was correct.

If you'd rather I uncomment these, I'm perfectly fine with that.

[LegacyNsfw]

Consider renaming the commit to "Initial CPU32 support for 68k" or "Partial CPU32 support..." or something like that.

[GhidorahRex]

I'm still working on getting these pcodetests to run/pass. I've been running into a few issues. The first is on my end - gcc keeps inserting bfffo instructions which cpu32 doesn't know how to process.

The second is that the cpu32 pcodetests won't even run without at least one modification. The pcodeop countleadingzeroes needs to be moved out of the #ifndef CPU32 block and should be put around line 345 with the rest of the pcodeop definitions.

After that I'm still getting some failures that I'm looking into to see what the resolution should be.

[GhidorahRex]

Pull out the define pcodeop countLeadingZeros line on 828 and move it up to the remainder of the define pcodeop lines in order to properly support emulation.

[backerman]

I've manually rebased @LegacyNsfw's PR (so far without taking care of the comments) into a branch on my fork at backerman@fafd1bb. It mostly fails to apply because some previously unimplemented 68k instructions have since been implemented.