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[mellanox] Update Kernel patches and Kconfig for Linux 6.1.x (sonic-net#359)
* Uncomment SDK patches to be properly handled by scriot Signed-off-by: Vivek Reddy <[email protected]> * Integrate SDK 4.6.2104 Kernel Patches ## Patch List * 0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch : * 0002-drop_monitor-Extend-WJH-buffer-linux-channel.patch : * Uncomment hw-mgmt patches for correct processing bythe script Signed-off-by: Vivek Reddy <[email protected]> * Intgerate HW-MGMT 7.0030.2008 Changes ## Patch List * 0001-platform-mellanox-Introduce-support-for-rack-manager.patch : torvalds/linux@f8dacbf7da2e * 0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch : torvalds/linux@488f0fca0db0 * 0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch : torvalds/linux@acc6ea304590 * 0004-platform-mellanox-Introduce-support-for-next-generat.patch : torvalds/linux@fcf3790b9b63 * 0005-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch : torvalds/linux@dd635e33b5c9 * 0006-platform-mellanox-Split-initialization-procedure.patch : torvalds/linux@0170f616f496 * 0007-platform-mellanox-Split-logic-in-init-and-exit-flow.patch : torvalds/linux@158cd8320776 * 0008-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch : torvalds/linux@233fd7e44cd7 * 0009-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch : torvalds/linux@cefdbc781566 * 0010-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch : torvalds/linux@50b823fdd357 * 0011-platform-mellanox-mlx-platform-Initialize-shift-vari.patch : torvalds/linux@1a0009abfa78 * 0012-platform-mellanox-Fix-order-in-exit-flow.patch : * 0013-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch : * 0014-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch : * 0015-platform-mellanox-Change-register-offset-addresses.patch : * 0016-platform-mellanox-Add-new-attributes.patch : * 0017-platform-mellanox-Add-field-upgrade-capability-regis.patch : * 0018-platform-mellanox-Modify-reset-causes-description.patch : * 0019-platform-mellanox-mlx-platform-Modify-health-and-pow.patch : * 0020-platform-mellanox-mlx-platform-Add-reset-cause-attri.patch : * 0021-platform-mellanox-mlx-platform-add-support-for-addit.patch : * 0022-platform-mellanox-mlx-platform-Modify-power-off-call.patch : * 0023-platform-mellanox-Cosmetic-changes.patch : * 0024-platform-mellanox-mlx-platform-Add-reset-callback.patch : * 0025-platform-mellanox-mlx-platform-Prepare-driver-to-all.patch : * 0026-platform-mellanox-mlx-platform-Introduce-ACPI-init-f.patch : * 0027-platform-mellanox-mlx-platform-Get-interrupt-line-th.patch : * 0028-platform-mellanox-Add-initial-support-for-PCIe-based.patch : * 0029-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch : * 0030-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch : * 0032-platform_data-mlxreg-Add-field-with-mapped-resource-.patch : torvalds/linux@26917eab144c * 0033-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch : * 0034-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch : * 0035-i2c-mlxcpld-Support-PCIe-mapped-register-space.patch : * 0036-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch : * 0037-mlxsw-i2c-Limit-single-transaction-buffer-size.patch : * 0038-mlxsw-core_hwmon-Adjust-module-label-names-based-on-.patch : * 0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch : * 0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch : * 0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch : * 0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch : * 0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch : torvalds/linux@26e118ea98cf * 0052-i2c-mux-Add-register-map-based-mux-driver.patch : * 0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch : torvalds/linux@e7210563432a * 0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch : torvalds/linux@e7210563432a * 0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch : torvalds/linux@443a0a0f0cf * 0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch : torvalds/linux@d11f932808dc * 0063-gpio-mlxbf3-Add-gpio-driver-support.patch : torvalds/linux@cd33f216d241 * 0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch : torvalds/linux@743d3336029f * 0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch : * 8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch : * 8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch : * 8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch : * 8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch : * 8008-hwmon-emc2305-Downstream-Allow-fan-speed-setting-gra.patch : * 8009-hwmon-mlxsw-Downstream-Allow-fan-speed-setting-granu.patch : * Dont put config under arm64 and common markers * Remove the pending mellanox-arm64 kconfig Signed-off-by: Vivek Reddy <[email protected]> --------- Signed-off-by: Vivek Reddy <[email protected]>
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161 files changed

Lines changed: 5644 additions & 19681 deletions

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‎patch/0001-i2c-mlxcpld-Update-module-license.patch‎

Lines changed: 0 additions & 58 deletions
This file was deleted.

patch/0163-platform-mellanox-Introduce-support-for-rack-manager.patch renamed to patch/0001-platform-mellanox-Introduce-support-for-rack-manager.patch

Lines changed: 29 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
1-
From 3ddb1633cbd4c914ac58b64247d5724ab7f2d6c3 Mon Sep 17 00:00:00 2001
1+
From e81bfa677c49da39ae72d58d96c997dbf2e085b3 Mon Sep 17 00:00:00 2001
22
From: Vadim Pasternak <[email protected]>
3-
Date: Mon, 14 Feb 2022 13:24:44 +0200
4-
Subject: [PATCH backport 5.10 163/182] platform: mellanox: Introduce support
3+
Date: Wed, 8 Feb 2023 08:33:18 +0200
4+
Subject: [PATCH backport 6.1.42 01/85] platform: mellanox: Introduce support
55
for rack manager switch
66

77
The rack switch is designed to provide high bandwidth, low latency
@@ -16,12 +16,15 @@ System equipped with:
1616
ASICs firmware.
1717

1818
Signed-off-by: Vadim Pasternak <[email protected]>
19+
Reviewed-by: Michael Shych <[email protected]>
20+
Link: https://lore.kernel.org/r/[email protected]
21+
Signed-off-by: Hans de Goede <[email protected]>
1922
---
20-
drivers/platform/x86/mlx-platform.c | 259 ++++++++++++++++++++++++++++
21-
1 file changed, 259 insertions(+)
23+
drivers/platform/x86/mlx-platform.c | 261 ++++++++++++++++++++++++++++
24+
1 file changed, 261 insertions(+)
2225

2326
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
24-
index 1d0c13c653b3..3ad85934d6e3 100644
27+
index 2fac05a17a5c..3e4adeb20a7e 100644
2528
--- a/drivers/platform/x86/mlx-platform.c
2629
+++ b/drivers/platform/x86/mlx-platform.c
2730
@@ -90,6 +90,12 @@
@@ -46,23 +49,23 @@ index 1d0c13c653b3..3ad85934d6e3 100644
4649
#define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7
4750
#define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET 0xc8
4851
#define MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET 0xc9
49-
@@ -215,6 +223,7 @@
52+
@@ -214,6 +222,7 @@
5053
#define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0)
5154
#define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4)
5255
#define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0)
5356
+#define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0)
5457
#define MLXPLAT_CPLD_I2C_CAP_BIT 0x04
5558
#define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT)
5659

57-
@@ -244,6 +253,7 @@
60+
@@ -243,6 +252,7 @@
5861
#define MLXPLAT_CPLD_CH2_ETH_MODULAR 3
5962
#define MLXPLAT_CPLD_CH3_ETH_MODULAR 43
6063
#define MLXPLAT_CPLD_CH4_ETH_MODULAR 51
6164
+#define MLXPLAT_CPLD_CH2_RACK_SWITCH 18
6265

6366
/* Number of LPC attached MUX platform devices */
6467
#define MLXPLAT_CPLD_LPC_MUX_DEVS 4
65-
@@ -281,6 +291,9 @@
68+
@@ -280,6 +290,9 @@
6669
/* Minimum power required for turning on Ethernet modular system (WATT) */
6770
#define MLXPLAT_CPLD_ETH_MODULAR_PWR_MIN 50
6871

@@ -72,7 +75,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
7275
/* mlxplat_priv - platform private data
7376
* @pdev_i2c - i2c controller platform device
7477
* @pdev_mux - array of mux platform devices
75-
@@ -461,6 +474,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
78+
@@ -460,6 +473,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
7679
},
7780
};
7881

@@ -109,7 +112,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
109112
/* Platform hotplug devices */
110113
static struct i2c_board_info mlxplat_mlxcpld_pwr[] = {
111114
{
112-
@@ -2165,6 +2208,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = {
115+
@@ -2064,6 +2107,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_nvlink_blade_data = {
113116
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
114117
};
115118

@@ -207,9 +210,9 @@ index 1d0c13c653b3..3ad85934d6e3 100644
207210
/* Platform led default data */
208211
static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
209212
{
210-
@@ -3166,6 +3300,42 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
213+
@@ -2947,6 +3081,44 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
211214
.mask = GENMASK(7, 0) & ~BIT(2),
212-
.mode = 0444,
215+
.mode = 0200,
213216
},
214217
+ {
215218
+ .label = "erot1_reset",
@@ -240,17 +243,19 @@ index 1d0c13c653b3..3ad85934d6e3 100644
240243
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
241244
+ .mask = GENMASK(7, 0) & ~BIT(4),
242245
+ .mode = 0644,
246+
+ .secured = 1,
243247
+ },
244248
+ {
245249
+ .label = "erot2_wp",
246250
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
247251
+ .mask = GENMASK(7, 0) & ~BIT(5),
248252
+ .mode = 0644,
253+
+ .secured = 1,
249254
+ },
250255
{
251256
.label = "reset_long_pb",
252257
.reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
253-
@@ -3361,6 +3531,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
258+
@@ -3142,6 +3314,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
254259
.mask = GENMASK(7, 0) & ~BIT(4),
255260
.mode = 0644,
256261
},
@@ -276,7 +281,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
276281
{
277282
.label = "config1",
278283
.reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET,
279-
@@ -4577,6 +4766,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
284+
@@ -4257,6 +4448,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
280285
case MLXPLAT_CPLD_LPC_REG_PWR_MASK_OFFSET:
281286
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
282287
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
@@ -287,15 +292,15 @@ index 1d0c13c653b3..3ad85934d6e3 100644
287292
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
288293
case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET:
289294
case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET:
290-
@@ -4594,6 +4787,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
295+
@@ -4274,6 +4469,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
291296
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
292297
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
293298
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
294299
+ case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
295300
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
296301
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET:
297302
case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET:
298-
@@ -4678,6 +4872,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
303+
@@ -4358,6 +4554,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
299304
case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET:
300305
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
301306
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
@@ -308,7 +313,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
308313
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
309314
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
310315
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
311-
@@ -4702,6 +4902,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
316+
@@ -4382,6 +4584,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
312317
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
313318
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
314319
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
@@ -317,7 +322,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
317322
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
318323
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET:
319324
case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET:
320-
@@ -4812,6 +5014,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
325+
@@ -4492,6 +4696,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
321326
case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET:
322327
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
323328
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
@@ -330,7 +335,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
330335
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
331336
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
332337
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
333-
@@ -4836,6 +5044,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
338+
@@ -4516,6 +4726,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
334339
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
335340
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
336341
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
@@ -339,7 +344,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
339344
case MLXPLAT_CPLD_LPC_REG_WD2_TMR_OFFSET:
340345
case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET:
341346
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
342-
@@ -4903,6 +5113,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = {
347+
@@ -4583,6 +4795,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = {
343348
{ MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 },
344349
};
345350

@@ -353,7 +358,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
353358
static const struct reg_default mlxplat_mlxcpld_regmap_eth_modular[] = {
354359
{ MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0x61 },
355360
{ MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 },
356-
@@ -4996,6 +5213,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = {
361+
@@ -4676,6 +4895,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = {
357362
.reg_write = mlxplat_mlxcpld_reg_write,
358363
};
359364

@@ -374,7 +379,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
374379
static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = {
375380
.reg_bits = 8,
376381
.val_bits = 8,
377-
@@ -5303,6 +5534,27 @@ static int __init mlxplat_dmi_qmb8700_matched(const struct dmi_system_id *dmi)
382+
@@ -4957,6 +5190,27 @@ static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *d
378383
return 1;
379384
}
380385

@@ -402,7 +407,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
402407
static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
403408
{
404409
.callback = mlxplat_dmi_default_wc_matched,
405-
@@ -5367,6 +5619,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
410+
@@ -5014,6 +5268,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
406411
DMI_MATCH(DMI_BOARD_NAME, "VMOD0009"),
407412
},
408413
},

patch/0003-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch renamed to patch/0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ Signed-off-by: Vadym Hlushko <[email protected]>
1212
1 file changed, 2 insertions(+)
1313

1414
diff --git a/include/net/psample.h b/include/net/psample.h
15-
index e328c51..1c4d70c 100644
15+
index 0509d2d..c66e325 100644
1616
--- a/include/net/psample.h
1717
+++ b/include/net/psample.h
1818
@@ -14,6 +14,8 @@ struct psample_group {

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